Erasing method and device of NVM (Non-Volatile Memory), electronic equipment, storage medium and program product

Abstract

The invention provides an erasing method and device of an NVM (Non-Volatile Memory), electronic equipment, a storage medium and a program product, relates to the field of data storage calculation, realizes direct protection of data in a program area in the NVM through a hardware means through a program protection circuit, and avoids mistaken erasing of the data in the program area in the NVM when an internal program flies away. Through the data protection circuit, the data in the data area in the NVM is directly protected through a hardware means, and random erasing and writing of the data in the data area in the NVM are avoided. The target NVM address is automatically verified through the program protection circuit and the data protection circuit, and the verification efficiency of the target NVM address is improved. Through the hardware circuit, the risk of mistakenly erasing and writing the NVM is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of data storage, and particularly to a method, device, electronic device, storage medium and program product for erasing and writing NVM. Background Art

[0002] A non-volatile memory (NVM) refers to a memory in which the stored data does not disappear when the chip power is turned off. A smart card chip refers to an integrated circuit chip that includes a microprocessor, an input / output device interface, and a memory, and provides functions of data operation, access control, and data storage. A system-on-chip (SOC) refers to an embedded operating system running on a smart card chip or other chips, and this operating system provides an erasing and writing interface for the underlying NVM for upper-layer applications to use.

[0003] In a smart card chip, the non-volatile memory is a very important component for storing the programs run by the processor and for key data, and data security is very important. The security and integrity of data are the primary concerns.

[0004] In the actual use of smart cards, some application environments are relatively harsh, and there are various interference situations for the power supply of the smart card chip. In some cases, it may cause the internal program to run wild, resulting in incorrect erasing and writing operations of the flash memory (Flash), damaging the internal data, and ultimately rendering the card unusable.

[0005] Existing protection technical solutions mainly adopt two measures: hardware protection and software protection. For the hardware part, several switches are added to control before the NVM erasing and writing is started. For the software, some monitoring points are added during the running of the program. If the running program runs wild, before finally starting the erasing and writing, it is judged whether the hardware switch is turned on and whether the software monitoring point is executed. If there is any omission or error in the middle, the NVM erasing and writing operation is not started.

[0006] In traditional protection methods, the protection switches for hardware to start erasing and writing all need to be processed by software. In the case of software running wild, although there are multiple monitoring points, if an exception occurs before calling the erasing and writing function, there is still a certain probability of incorrect rewriting, and it cannot be completely avoided. Therefore, the risk of incorrect rewriting in the existing NVM erasing and writing is high. Summary of the Invention

[0007] The present invention provides a method, device, electronic device, storage medium and program product for erasing and writing NVM to solve the defect of high risk of incorrect rewriting in the existing NVM erasing and writing in the prior art, and to reduce the risk of incorrect rewriting in the existing NVM erasing and writing.

[0008] In a first aspect, the present invention provides a method for erasing and programming an NVM, including: obtaining a target NVM address to be erased and programmed in a non-volatile memory NVM, where the target NVM address includes a target program address and a target data address; when the target NVM address is the target program address, determining whether the target program address is the program address of the chip system of the NVM based on a program protection circuit; when the target program address is not the program address of the chip system of the NVM, erasing and programming the NVM based on the target program address; when the target NVM address is the target data address, performing a verification operation on the target data address based on a data protection circuit; when the verification operation of the target data address passes, erasing and programming the NVM based on the target data address.

[0009] In one embodiment, the program protection circuit includes a first register, a second register, an address configuration detection circuit of the NVM, and an address comparator. Determining whether the target program address is the program address of the chip system of the NVM based on the program protection circuit includes: storing the target program address in the first register and sending the target program address to the address comparator; reading the program address of the chip system of the NVM from the chip configuration unit of the NVM based on the address configuration detection circuit and detecting the program address of the chip system of the NVM. When the program address of the chip system of the NVM is detected correctly, storing the program address of the chip system of the NVM in the second register; sending the program address of the chip system of the NVM to the address comparator based on the second register; determining whether the target program address is the program address of the chip system of the NVM based on the address comparator.

[0010] In one embodiment, the data protection circuit includes an address arithmetic unit and a static random access memory. Performing a verification operation on the target data address based on the data protection circuit includes: storing the target data address and the verification value of the target data address in the static random access memory and sending the target data address and the verification value to the address arithmetic unit; performing a verification operation on the target data address and the verification value based on the address arithmetic unit.

[0011] In one embodiment, the target data address is obtained based on the following steps: obtaining the target data address from the address management unit of the NVM, or obtaining the target data address from the external interface of the chip system of the NVM.

[0012] In one embodiment, when the target NVM address is the target program address, after determining whether the target program address is the program address of the chip system of the NVM, it further includes: when the target program address is the program address of the chip system of the NVM, determining that the target program address is invalid and generating an alarm signal.

[0013] In one embodiment, after the address configuration detection circuit reads the program address of the NVM chip system from the chip configuration unit of the NVM and detects the program address of the NVM chip system, it further includes: when the program address of the NVM chip system is detected to be incorrect, determining that the program address of the NVM chip system is invalid and stopping the erasing and writing of the NVM.

[0014] In a second aspect, the present invention further provides an erasing and writing device for an NVM, including: an address acquisition module for acquiring a target NVM address to be erased and written in a non-volatile memory NVM, the target NVM address including a target program address and a target data address; a program protection module for, when the target NVM address is the target program address, determining whether the target program address is the program address of the NVM chip system based on a program protection circuit; an erasing and writing control module for, when the target program address is not the program address of the NVM chip system, erasing and writing the NVM based on the target program address; a data protection module for, when the target NVM address is the target data address, performing a verification operation on the target data address based on a data protection circuit; and the erasing and writing control module is further configured to, when the verification operation of the target data address passes, erase and write the NVM based on the target data address.

[0015] In a third aspect, the present invention further provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, it implements any one of the above-mentioned NVM erasing and writing methods.

[0016] In a fourth aspect, the present invention further provides a non-transitory computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, it implements any one of the above-mentioned NVM erasing and writing methods.

[0017] In a fifth aspect, the present invention further provides a computer program product, including a computer program. When the computer program is executed by a processor, it implements any one of the above-mentioned NVM erasing and writing methods.

[0018] The NVM erasing and writing method, device, electronic device, storage medium, and program product provided by the present invention, through the program protection circuit, realize directly protecting the data in the program area of the NVM by hardware means, avoiding accidental erasing of the data in the program area of the NVM when the internal program runs wild. Through the data protection circuit, it realizes directly protecting the data in the data area of the NVM by hardware means, avoiding random erasing of the data in the data area of the NVM. The present invention automatically verifies the target NVM address through the program protection circuit and the data protection circuit, improving the verification efficiency of the target NVM address. The present invention reduces the risk of accidental erasing and writing of the NVM through hardware circuits. Description of the Drawings

[0019] To more clearly illustrate the technical solutions in the present invention or the prior art, the following will briefly introduce the accompanying drawings required for the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can also be obtained based on these drawings.

[0020] Figure 1 It is one of the flow diagrams of the erasing and writing method of the NVM provided by the present invention.

[0021] Figure 2 It is another flow diagram of the erasing and writing method of the NVM provided by the present invention.

[0022] Figure 3 It is the third flow diagram of the erasing and writing method of the NVM provided by the present invention.

[0023] Figure 4 It is the fourth flow diagram of the erasing and writing method of the NVM provided by the present invention.

[0024] Figure 5 It is the structural diagram of the erasing and writing device of the NVM provided by the present invention.

[0025] Figure 6 It is the structural diagram of the electronic device provided by the present invention. Detailed Embodiments

[0026] To make the objectives, technical solutions, and advantages of the present invention clearer, the following will clearly and completely describe the technical solutions in the present invention in conjunction with the accompanying drawings in the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.

[0027] The following will describe Figures 1-6 the erasing and writing method, device, and electronic device of the NVM of the present invention.

[0028] Figure 1 It is one of the flow diagrams of the erasing and writing method of the NVM provided by the present invention. As Figure 1 shown, the erasing and writing method of the NVM includes steps S100 to S300, and the specific steps are as follows.

[0029] S100: Obtain the target NVM address to be erased and written in the non-volatile memory NVM. The target NVM address includes the target program address and the target data address.

[0030] Download the chip system of non-volatile memory (NVM). When the system on chip (SOC) is running, obtain the target NVM address that needs to be erased and written. The target NVM address includes the target program address and the target data address. The target program address is the data address of the program area in the NVM that needs to be erased and written. The target data address is the data address of the data area in the NVM that needs to be erased and written.

[0031] When the chip system of NVM is running, write the target program address that needs to be erased and written to the first register (erase and write address register) of the program protection circuit. Obtain the target program address from the first register.

[0032] The external running software of NVM writes the target data address to the static random access memory (SRAM) of the data protection circuit through the external interface (physical interface) of the chip system. Or the internal running software of NVM writes the target data address to the SRAM through the address management unit of VNM. Obtain the target data address from the SRAM.

[0033] S200: When the target NVM address is the target program address, based on the program protection circuit, determine whether the target program address is the program address of the chip system of NVM; when the target program address is not the program address of the chip system of NVM, erase and write the NVM based on the target program address.

[0034] As Figure 2 shown, when the target program address is obtained from the first register, obtain the program address of the chip system of NVM from the second register of the program protection circuit. According to the target program address, obtain the value of the target program address. According to the program address of the chip system of NVM, determine the value range of the program address of the chip system. Determine whether the value of the target program address belongs to the value range of the program address of the chip system. If the value of the target program address does not belong to the value range of the program address of the chip system, it is determined that the target program address is not the program address of the chip system of NVM, and the target program address is determined to be valid. At this time, the address comparator of the program protection circuit sends a valid control signal to the erase and write control module of the NVM. The erase and write control module responds to this valid control signal and erases and writes the program data in the NVM according to this target program address, while ensuring that the program of the chip system will not be tampered with.

[0035] S300: When the target NVM address is the target data address, perform a verification operation on the target data address based on the data protection circuit; when the verification operation of the target data address passes, erase and write the NVM based on the target data address.

[0036] AsFigure 2 As shown, when the SRAM of the data protection circuit obtains the target data address, the SRAM sends the target data address to the address arithmetic unit of the data protection circuit. The address arithmetic unit performs a verification operation on the target data address to obtain the actual data address that needs to be erased and written. For example, perform two verification operations on the target data address. If the verification operation passes, the actual data address is obtained. At this time, the target data address is valid. The address arithmetic unit sends a valid control signal to the erase and write control module. The erase and write control module responds to this valid signal and erases and writes the NVM according to the target data address.

[0037] The method for erasing and writing the NVM provided by the embodiment of the present invention realizes directly protecting the data in the program area of the NVM through a program protection circuit by means of hardware, avoiding the accidental erasure of the data in the program area of the NVM when the internal program runs wild. Through the data protection circuit, it realizes directly protecting the data in the data area of the NVM by means of hardware, avoiding the random erasure of the data in the data area of the NVM. The present invention automatically verifies the target NVM address through the program protection circuit and the data protection circuit, improving the verification efficiency of the target NVM address. The present invention reduces the risk of accidental erasure of the NVM through a hardware circuit.

[0038] Based on the above embodiment, the program protection circuit includes a first register, a second register, an address configuration detection circuit of the NVM, and an address comparator. Judging whether the target program address is the program address of the chip system of the NVM based on the program protection circuit includes: storing the target program address in the first register and sending the target program address to the address comparator; reading the program address of the chip system of the NVM from the chip configuration unit of the NVM through the address configuration detection circuit and detecting the program address of the chip system of the NVM. When the program address of the chip system of the NVM is detected correctly, storing the program address of the chip system of the NVM in the second register; sending the program address of the chip system of the NVM to the address comparator based on the second register; judging whether the target program address is the program address of the chip system of the NVM based on the address comparator.

[0039] When the target NVM address is the target program address, after judging whether the target program address is the program address of the chip system of the NVM, it further includes: when the target program address is the program address of the chip system of the NVM, determining that the target program address is invalid and generating an alarm signal.

[0040] As Figure 3As shown, the chip runs the BootLoader and downloads the chip system through the BootLoader. After the chip system is downloaded, the program address of the chip system in the NVM is written to the chip configuration unit of the NVM. After the chip is powered off, the program switches from the BootLoader to the chip system. After the chip is powered on, the address configuration detection circuit of the NVM in the program protection circuit of the chip automatically reads the program address of the chip system in the NVM from the chip configuration unit and detects the program address of the chip system in the NVM. When the program address detection of the chip system in the NVM is correct, the program address of the chip system in the NVM is stored in the second register (program indication register).

[0041] When the chip system runs the erasing and writing program, the target program address to be erased and written is stored in the first register (erasing and writing address register). The first register sends the target program address to the address comparator. The second register sends the program address of the chip system in the NVM to the address comparator. The address comparator compares whether the target program address belongs to the program address of the chip system in the NVM. If the target program address belongs to the program address of the chip system in the NVM, the address comparator outputs an invalid control signal to the erasing and writing control module, determines that the target program address is invalid, and generates an alarm signal, and the erasing and writing control module does not erase and write the NVM according to the target program address.

[0042] If the target program address does not belong to the program address of the chip system in the NVM, the address comparator outputs a valid control signal to the erasing and writing control module. The erasing and writing control module responds to the valid control signal and erases and writes the NVM according to the target program address.

[0043] The erasing and writing method of the NVM provided by the embodiment of the present invention obtains the program address of the chip system in the NVM stored in advance, and by comparing the target program address and the program address of the chip system in the NVM, the target program address is verified, avoiding the incorrect erasing of the data in the program area in the NVM when the internal program runs wild.

[0044] Based on the above embodiment, the data protection circuit includes an address arithmetic unit and a static random access memory. Verifying and calculating the target data address based on the data protection circuit includes: storing the target data address and the verification value of the target data address based on the static random access memory, and sending the target data address and the verification value to the address arithmetic unit; verifying and calculating the target data address and the verification value based on the address arithmetic unit.

[0045] The target data address is obtained based on the following steps: obtaining the target data address from the address management unit of the NVM, or obtaining the target data address from the external interface of the chip system of the NVM.

[0046] AsFigure 4 As shown in Figure 4 , when the chip system runs the erasing and programming program, the chip system obtains the target data address from an external interface (physical interface) or from the address management unit of the NVM. The chip system stores the target data address and the check value of the target data address together in a Static Random Access Memory (SRAM). The Static Random Access Memory (SRAM) sends the target data address and the check value of the target data address to an address arithmetic unit. The address arithmetic unit performs a check operation on the target data address according to the check value and obtains the true address information.

[0047] If the address arithmetic unit correctly checks the target data address, it determines that the target data address is valid. The address arithmetic unit sends a valid control signal to the erasing and programming control module. In response to this valid control signal, the erasing and programming control module starts to erase and program the NVM.

[0048] If the address arithmetic unit incorrectly checks the target data address, it determines that the target data address is invalid. The address arithmetic unit sends an invalid control signal to the erasing and programming control module. In response to this invalid control signal, the erasing and programming control module stops erasing and programming the NVM.

[0049] In the embodiment of the present invention, through the address arithmetic unit, a check operation is performed on the target data address and the check value, which is beneficial to improving the accuracy of erasing and programming the NVM.

[0050] Based on the above embodiment, after the address configuration detection circuit reads the program address of the chip system of the NVM from the chip configuration unit of the NVM and detects the program address of the chip system of the NVM, it further includes: when the program address of the chip system of the NVM is detected to be incorrect, it determines that the program address of the chip system of the NVM is invalid and stops erasing and programming the NVM.

[0051] When the address configuration detection circuit detects that the program address of the chip system of the NVM is incorrect, the address configuration detection circuit determines that the program address of the chip system of the NVM is invalid and generates an alarm signal. The address configuration detection circuit simultaneously sends a signal to stop erasing and programming to the erasing and programming control module. In response to the signal to stop erasing and programming, the erasing and programming control module stops subsequent erasing and programming of the NVM.

[0052] In the present invention, the address configuration detection circuit performs a validity detection on the program address of the chip system of the NVM. When it detects that the program address of the chip system of the NVM is invalid, it stops erasing and programming the NVM, further avoiding accidental erasure of data in the program area of the NVM.

[0053] The erasing and programming device of the NVM provided by the present invention will be described below. The erasing and programming device of the NVM described below can be correspondingly referred to the erasing and programming method of the NVM described above.

[0054] As Figure 5 shown, a NVM erasing and writing device includes: an address acquisition module 501, configured to acquire a target NVM address that needs to be erased and written in a non-volatile memory NVM, where the target NVM address includes a target program address and a target data address.

[0055] A program protection module 502, configured to, when the target NVM address is the target program address, determine whether the target program address is the program address of the NVM chip system based on a program protection circuit.

[0056] An erasing and writing control module 504, configured to, when the target program address is not the program address of the NVM chip system, erase and write the NVM based on the target program address.

[0057] A data protection module 503, configured to, when the target NVM address is the target data address, perform a verification operation on the target data address based on a data protection circuit.

[0058] The erasing and writing control module 504 is further configured to, when the verification operation of the target data address passes, erase and write the NVM based on the target data address.

[0059] The NVM erasing and writing device provided by the embodiment of the present invention, through the program protection circuit, realizes directly protecting the data in the program area of the NVM by hardware means, avoiding the accidental erasure of the data in the program area of the NVM when the internal program runs wild. Through the data protection circuit, it realizes directly protecting the data in the data area of the NVM by hardware means, avoiding the random erasure of the data in the data area of the NVM. The present invention automatically verifies the target NVM address through the program protection circuit and the data protection circuit, improving the verification efficiency of the target NVM address. The present invention reduces the risk of accidental erasure and writing of the NVM through a hardware circuit.

[0060] In one embodiment, the program protection circuit includes a first register, a second register, an address configuration detection circuit of the NVM, and an address comparator. The program protection module 502 is configured to: store the target program address in the first register and send the target program address to the address comparator; read the program address of the NVM chip system from the chip configuration unit of the NVM based on the address configuration detection circuit and detect the program address of the NVM chip system. When the program address of the NVM chip system is detected correctly, store the program address of the NVM chip system in the second register; send the program address of the NVM chip system to the address comparator based on the second register; and determine whether the target program address is the program address of the NVM chip system based on the address comparator.

[0061] In one embodiment, the data protection circuit includes an address arithmetic unit and a static random access memory. The data protection module 503 is configured to: store a target data address and a check value of the target data address based on the static random access memory, and send the target data address and the check value to the address arithmetic unit; perform a check operation on the target data address and the check value based on the address arithmetic unit.

[0062] In one embodiment, the address acquisition module 501 is configured to: acquire the target data address from the address management unit of the NVM, or acquire the target data address from an external interface of the chip system of the NVM.

[0063] In one embodiment, the program protection module 502 is further configured to: when the target program address is the program address of the chip system of the NVM, determine that the target program address is invalid and generate an alarm signal.

[0064] In one embodiment, the program protection module 502 is further configured to: when an error is detected in the program address of the chip system of the NVM, determine that the program address of the chip system of the NVM is invalid and stop the erasing and writing of the NVM.

[0065] Figure 6 Schematically illustrates the physical structure of an electronic device, as Figure 6 shown. The electronic device may include: a processor 610, a communications interface 620, a memory 630, and a communication bus 640. Among them, the processor 610, the communications interface 620, and the memory 630 communicate with each other through the communication bus 640. The processor 610 may call logic instructions in the memory 630 to execute the erasing and writing method of the NVM. The method includes: acquiring a target NVM address to be erased and written in the non-volatile memory NVM, where the target NVM address includes a target program address and a target data address; when the target NVM address is the target program address, determining whether the target program address is the program address of the chip system of the NVM based on the program protection circuit; when the target program address is not the program address of the chip system of the NVM, performing erasing and writing on the NVM based on the target program address; when the target NVM address is the target data address, performing a check operation on the target data address based on the data protection circuit; when the check operation of the target data address passes, performing erasing and writing on the NVM based on the target data address.

[0066] In addition, when the logical instructions in the above-mentioned memory 630 are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in various embodiments of the present invention. The aforementioned storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), magnetic disks, or optical discs that can store program codes.

[0067] On the other hand, the present invention also provides a computer program product. The computer program product includes a computer program that can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the NVM erasing and writing method provided by the above-mentioned various methods. The method includes: obtaining a target NVM address to be erased and written in the non-volatile memory NVM, where the target NVM address includes a target program address and a target data address; when the target NVM address is the target program address, determining whether the target program address is the program address of the NVM chip system based on a program protection circuit; when the target program address is not the program address of the NVM chip system, erasing and writing the NVM based on the target program address; when the target NVM address is the target data address, performing a verification operation on the target data address based on a data protection circuit; when the verification operation of the target data address passes, erasing and writing the NVM based on the target data address.

[0068] In yet another aspect, the present invention also provides a non-transitory computer-readable storage medium with a computer program stored thereon. When the computer program is executed by a processor, it implements the NVM erasing and writing method provided by the above-mentioned various methods. The method includes: obtaining a target NVM address to be erased and written in the non-volatile memory NVM, where the target NVM address includes a target program address and a target data address; when the target NVM address is the target program address, determining whether the target program address is the program address of the NVM chip system based on a program protection circuit; when the target program address is not the program address of the NVM chip system, erasing and writing the NVM based on the target program address; when the target NVM address is the target data address, performing a verification operation on the target data address based on a data protection circuit; when the verification operation of the target data address passes, erasing and writing the NVM based on the target data address.

[0069] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. A person of ordinary skill in the art can understand and implement it without creative work.

[0070] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on this understanding, the essence of the above technical solution, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to enable a computer device (which can be a personal computer, server, or network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0071] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for erasing and writing NVM, characterized in that: include: Acquire a target NVM address of a non-volatile memory NVM that needs to be erased, wherein the target NVM address includes a target program address and a target data address; When the target NVM address is the target program address, judging whether the target program address is the program address of the chip system of the NVM based on the program protection circuit; when the target program address is not the program address of the chip system of the NVM, erasing the NVM based on the target program address; When the target NVM address is the target data address, performing a verification operation on the target data address based on a data protection circuit; When the verification operation of the target data address passes, the NVM is erased and written based on the target data address.

2. The NVM erasing method according to claim 1, characterized in that: The program protection circuit includes a first register, a second register, an address configuration detection circuit of the NVM, and an address comparator. The method of judging whether the target program address is a program address of the chip system of the NVM based on the program protection circuit includes: storing the target program address based on the first register, and sending the target program address to the address comparator; Reading the program address of the chip system of the NVM from the chip configuration unit of the NVM based on the address configuration detection circuit, and detecting the program address of the chip system of the NVM, and when the program address of the chip system of the NVM is detected correctly, storing the program address of the chip system of the NVM in the second register; Sending a program address of the chip system of the NVM to the address comparator based on the second register; Based on the address comparator, it is determined whether the target program address is a program address of the chip system of the NVM.

3. The NVM erasing method according to claim 1, characterized in that: The data protection circuit includes an address operator and a static random access memory, and the verification operation on the target data address based on the data protection circuit includes: Based on the static random access memory, storing the target data address and the check value of the target data address, and sending the target data address and the check value to the address operator; A check operation is performed on the target data address and the check value based on the address operator.

4. The NVM erasing method according to claim 1, characterized in that: The target data address is obtained based on the following steps: The target data address is obtained from an address management unit of the NVM, or the target data address is obtained from an external interface of a chip system of the NVM.

5. The NVM erasing method according to claim 1, characterized in that: When the target NVM address is the target program address, after determining whether the target program address is the program address of the chip system of the NVM, the method further includes: When the target program address is a program address of the chip system of the NVM, it is determined that the target program address is invalid, and an alarm signal is generated.

6. The NVM erasing method according to claim 2, characterized in that: After reading the program address of the chip system of the NVM from the chip configuration unit of the NVM based on the address configuration detection circuit and detecting the program address of the chip system of the NVM, the method further includes: When a program address detection error occurs in the chip system of the NVM, it is determined that the program address of the chip system of the NVM is invalid, and erasing and writing of the NVM is stopped.

7. A NVM erasing device, characterized in that: include: An address acquisition module, used for acquiring a target NVM address of the non-volatile memory NVM that needs to be erased, wherein the target NVM address includes a target program address and a target data address; A program protection module, configured to determine, when the target NVM address is the target program address, whether the target program address is a program address of a chip system of the NVM based on a program protection circuit; An erase control module, configured to erase the NVM based on the target program address when the target program address is not the program address of the chip system of the NVM; A data protection module, configured to perform a verification operation on the target data address based on a data protection circuit when the target NVM address is the target data address; The erase control module is further configured to erase the NVM based on the target data address when the verification operation of the target data address passes.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that: When the processor executes the computer program, the method for erasing and writing the NVM according to any one of claims 1 to 6 is implemented.

9. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method for erasing and writing the NVM according to any one of claims 1 to 6 is implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the method for erasing and writing the NVM according to any one of claims 1 to 6 is implemented.

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