Substrate and package substrate

Abstract

The present specification relates to a substrate and a package substrate. The substrate according to the present specification is a plate-shaped substrate included in a package substrate, and comprises: a glass substrate having a first surface and a second surface facing each other; the glass substrate is provided with a cavity part and a cavity expansion part, the cavity part is internally provided with an accommodating space and is provided with one or a plurality of corners, and the corners are imaginary lines where extension lines of two adjacent side surfaces of the accommodating space intersect. The cavity expansion part is arranged at the corner and is provided with a corner space connected with the accommodating space. Thus, the occurrence of a short circuit can be prevented by ensuring a sufficient distance between the cavity expansion part and the edge of the cavity device, and the stress applied to the glass substrate is dispersed by the cavity expansion part, thereby having the effect of preventing the glass substrate from being damaged.

Description

Technical Field

[0001] This embodiment relates to a substrate and a packaged substrate. Background Art

[0002] When manufacturing electronic components, the process of implementing circuits on a semiconductor wafer is called the front-end (FE) process, and the process of assembling the wafer in a state where it can be used in an actual product is called the back-end (BE) process. The back-end process includes a packaging process.

[0003] As four core technologies in the semiconductor industry that have recently achieved rapid development of electronic products, there are semiconductor technology, semiconductor packaging technology, manufacturing process technology, and software technology. Semiconductor technology is developing in various forms. For example, the line width in nanometer units below microns, more than ten million cells, high-speed operation, and the release of a large amount of heat, etc. However, there is still no relatively complete technical support for packaging the above semiconductors. Therefore, the electrical performance of semiconductors sometimes depends on the packaging technology and the corresponding electrical connections, rather than on the performance of the semiconductor technology itself.

[0004] As materials for packaged substrates, ceramics or resins are applicable. In the case of ceramic substrates such as silicon substrates, it is difficult to mount high-performance high-frequency semiconductor devices due to high resistance values or high dielectric constants. In the case of resin substrates, although relatively high-performance high-frequency semiconductor devices can be mounted, there are limitations in reducing the pitch of wirings.

[0005] Recently, silicon or glass can be applied to high-end packaged substrates. By forming vias on a silicon or glass substrate and applying a conductive material to the vias, the wiring length between the device and the motherboard can be shortened, and excellent electrical characteristics can be obtained.

[0006] As related prior arts, there are Korean Patent Publication No. 10-2023-0035258, Korean Patent Publication No. 10-2017-0067947, etc. Summary of the Invention

[0007] Technical Problem

[0008] An object of this embodiment is to provide a substrate, a manufacturing method of the substrate, and a packaged substrate using the same, wherein a cavity expansion part for expanding a corner area of a cavity part is formed in the packaged substrate using a glass substrate.

[0009] In addition, an object of the present embodiment is to provide a method for manufacturing a packaged substrate and a packaged substrate using the same, wherein the substrate has a cavity portion including a cavity expansion portion, and the cavity expansion portion expands a corner region of the cavity portion through a glass substrate to ensure a sufficient distance between the corner of the cavity portion and the edge of the cavity device.

[0010] Solution to the problem

[0011] To achieve the above object, the substrate according to the present embodiment is a plate-shaped substrate included in a packaged substrate, which includes a glass substrate having a first surface and a second surface facing each other; a cavity portion and a cavity expansion portion are provided on the glass substrate, the cavity portion has an accommodation space inside and has one or more corners, and the corner is an imaginary line where the extension lines of two adjacent side surfaces of the accommodation space intersect, and the cavity expansion portion is provided at the corner and has a corner space connected to the accommodation space.

[0012] When viewed from the direction from the first surface to the second surface, the first corner is one corner where the cavity expansion portion is located.

[0013] In the first corner, the angle on the glass substrate side of the two side surfaces can be greater than 180 degrees.

[0014] The corner space is a space in the shape of a part of the glass substrate removed from the first corner.

[0015] The edge shape of the corner space can be an arc shape of a circle or an ellipse.

[0016] The central angle of the corner space can be the angle between the two side surfaces and the two contact points of the arc.

[0017] The central angle of the corner space of the first corner can be 20 degrees or more.

[0018] When viewed from the direction from the first surface to the second surface, the second corner can be one corner where the cavity expansion portion is located.

[0019] In the second corner, the angle on the glass substrate side of the two side surfaces can be less than 180 degrees.

[0020] The corner space is a space in the shape of a part of the glass substrate removed from the second corner.

[0021] The shape of the edge of the corner space is an arc of a circle or an ellipse.

[0022] The central angle of the corner space can be the angle between the two side surfaces and the two contact points of the arc.

[0023] The central angle of the corner space of the second corner described above may be 180 degrees or less.

[0024] When viewed in the direction from the first surface to the second surface, the shape of the cavity expansion portion is an arc of a circle or an ellipse.

[0025] The average radius of the arc may be 40 μm or more.

[0026] The glass substrate may include a glass through-hole penetrating in the thickness direction.

[0027] The average radius of the arc may be 0.5 times to 3 times the radius of the glass through-hole.

[0028] The cavity portion may include four or more of the above-mentioned corners.

[0029] The cavity expansion portion may be provided in the cavity portion in a number of four or more and less than the number of the corners.

[0030] The substrate may include an electronic device provided in the cavity portion.

[0031] The distance between the side surface of the accommodation space and the electronic device is D1.

[0032] The distance between the glass wall surface of the cavity expansion portion and the electronic device is D2.

[0033] The above-mentioned D2 may be equal to or greater than the above-mentioned D1.

[0034] The substrate may include an electronic device provided in the cavity portion.

[0035] The portions other than the electronic device in the accommodation space and the corner space may be filled with a filler.

[0036] The filler may include an insulating material, a metal material, or a heat-dissipating material.

[0037] The distance D3 between the end of the cavity expansion portion and the side surface of the cavity portion may be 2 μm or more.

[0038] To achieve the above object, a packaging substrate according to another embodiment includes: the above-mentioned substrate; an electronic device provided in the cavity portion; and an upper layer provided on the substrate and provided with an upper rewiring layer for transmitting an electrical signal.

[0039] To achieve the above object, another embodiment proposes a method for manufacturing a plate-shaped substrate included in a packaging substrate.

[0040] The above manufacturing method includes: a step of generating defects for forming a cavity portion and defects for forming a cavity expansion portion on a glass substrate having a first surface and a second surface facing each other; and a step of etching the above glass substrate to form a cavity portion and a cavity expansion portion.

[0041] The above cavity portion is provided on the above glass substrate, has an accommodation space inside, and has one or more corners.

[0042] The above corner is a virtual line where the extension lines of two adjacent sides of the above accommodation space intersect.

[0043] The above cavity expansion portion is provided at the above corner and has a corner space connected to the above accommodation space.

[0044] When observed from the direction from the above first surface to the above second surface, the shape of the above cavity expansion portion is a circular or elliptical arc.

[0045] The above glass substrate includes a glass through-hole penetrating in the thickness direction.

[0046] The average radius of the above arc can be 0.5 times to 5 times the radius of the above glass through-hole.

[0047] Effects of the Invention

[0048] The substrate of the present embodiment, the package substrate including the same, and the manufacturing method of the substrate can ensure a sufficient distance between the corner of the cavity portion and the edge of the cavity device, thereby preventing the cavity device from short-circuiting.

[0049] In addition, the stress applied to the glass substrate can be dispersed by the cavity expansion portion that expands the corner of the cavity portion, thereby obtaining the effect of preventing the glass substrate from being damaged. Description of the Drawings

[0050] Figure 1 It is a conceptual diagram for explaining the cross-sectional structure of the package substrate according to the present embodiment.

[0051] Figure 2a And Figure 2b They are conceptual diagrams for explaining the cross-sectional structures of the package substrates according to different embodiments respectively.

[0052] Figure 3a For respectively explaining Figure 2a The conceptual diagram of the generation process of the cross-sectional structure of the package substrate. In addition, Figure 3b For respectively explaining Figure 2b The conceptual diagram of the generation process of the cross-sectional structure.

[0053] Figure 4 It is a flowchart for explaining the process of generating a core distribution layer during the manufacturing process of the package substrate according to the present embodiment in a sectional form.

[0054] Figure 5 The flowchart is a cross-sectional view of a process for generating an insulating layer in a process for manufacturing a package substrate according to the present embodiment.

[0055] Figure 6 2 is a diagram exemplarily showing the corner portion of the cavity portion where the curvature radius occurs and the structure of the cavity device.

[0056] Figure 7 FIG. 1 is a diagram exemplarily showing the structure of a corner portion of a cavity portion and a cavity device produced according to the present embodiment.

[0057] Figure 8 FIG. 1 is a diagram schematically showing the structure of a glass substrate including a cavity portion and a cavity device produced according to another embodiment.

[0058] Figure 9 FIG. 1 is a diagram schematically showing a structure of a glass substrate including a plurality of cavity portions generated according to another embodiment.

[0059] Figure 10a , Figure 10b , Figure 10c and Figure 10d FIG. 1 is a diagram exemplarily showing the structure of a cavity portion produced according to another embodiment.

[0060] Description of Reference Numerals

[0061] 100: Semiconductor devices

[0062] 10: Motherboard

[0063] 30: Semiconductor Devices Department

[0064] 32: The first semiconductor device

[0065] 34: Second semiconductor device

[0066] 36: The third semiconductor device

[0067] 20: Package substrate

[0068] 21, 21a: Glass substrate

[0069] 22: Core layer

[0070] 223: Core insulation

[0071] 26: Upper layer

[0072] 28: Cavity

[0073] 213: First Surface

[0074] 214: Second Surface

[0075] 23: Core through-hole

[0076] 24: Core distribution layer

[0077] 241: Core distribution pattern

[0078] 26: Upper layer

[0079] 25: Upper distribution layer

[0080] 251: Upper distribution pattern

[0081] 252: Blind hole

[0082] 253: Upper insulating layer

[0083] 27: Upper surface connection layer

[0084] 271: Upper surface connection electrode

[0085] 272: Upper surface connection pattern

[0086] 28: Cavity part

[0087] 281: Internal space

[0088] 282: Cavity distribution layer

[0089] 40: Cavity device

[0090] 50: Connection part

[0091] 51: Device connection part

[0092] 52: Board connection part

[0093] 61: Cavity device edge

[0094] 70: Cavity expansion part Detailed implementation manners

[0095] The following detailed description is provided to assist in a comprehensive understanding of the methods, apparatuses, and / or systems described herein. However, after understanding the disclosure of the present application, various changes, modifications, and equivalents of the methods, apparatuses, and / or systems described herein will be apparent. For example, the operation sequences described herein are merely examples and are not limited to those set forth herein. The operation sequences can be changed, as will be apparent after understanding the disclosure of the present application, except for operations that must occur in a specific sequence. In addition, after understanding the disclosure of the present application, the description of known features may be omitted to increase clarity and conciseness. However, the omission of features and their descriptions is not intended to admit them as common knowledge.

[0096] The features described herein may be embodied in different forms and should not be construed as limited to the examples described herein. Rather, the examples described herein are provided only to illustrate some of the many possible ways of implementing the methods, apparatuses, and / or systems described herein, which will be apparent after understanding the disclosure of the present application.

[0097] Although terms such as "first", "second", and "third" may be used herein to describe various components, parts, regions, layers, or sections, these components, parts, regions, layers, or sections should not be limited by these terms. Rather, these terms are only used to distinguish one component, part, region, layer, or section from another component, part, region, layer, or section. Thus, a first component, part, region, layer, or section referred to in the examples described herein may also be referred to as a second component, part, region, layer, or section without departing from the teachings of the examples.

[0098] Throughout the specification, when a device such as a layer, region, or substrate is described as "on another device", "connected to another device", or "coupled to another device", it may be directly "on another device", "connected to another device", or "coupled to another device", or there may be one or more other devices intervening therebetween. In contrast, when a device is described as "directly on another device", "directly connected to another device", or "directly coupled to another device", there can be no other device intervening therebetween. Similarly, expressions such as "between", "immediately between", "adjacent to", and "immediately adjacent to" can also be interpreted by the foregoing.

[0099] The terms used herein are for the purpose of describing particular examples only and are not intended to limit the disclosure. As used herein, the singular forms also include the plural forms unless the context clearly dictates otherwise. As used herein, the term "and / or" includes any one of the related listed items and any combination of any two or more of the items. As used herein, the terms "comprises", "consists of", and "has" specify the presence of the stated features, numbers, operations, devices, components, and / or combinations thereof, but do not preclude the presence or addition of one or more other features, numbers, operations, devices, components, and / or combinations thereof. The use of the term "may" with respect to an example or embodiment (e.g., with respect to what an example or embodiment may include or implement) means that there is at least one example or embodiment in which such a feature is included or implemented, and all examples are not limited thereto.

[0100] In this application, "B is placed on A" means that B is placed in direct contact with A or placed above A with another layer or structure intervening therebetween, and thus should not be construed as limited to B being placed in direct contact with A.

[0101] Unless otherwise defined, all terms used herein, including technical and scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs after understanding this disclosure and being consistent with the understanding of this disclosure. Terms such as those defined in a commonly used dictionary should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this disclosure, and should not be interpreted in an idealized or overly formal manner unless explicitly defined herein.

[0102] In one or more of the above examples, the description of "A and / or B" means "A, B, or A and B".

[0103] In one or more of the above examples, terms such as "first", "second", "A", or "B" are used to distinguish identical terms.

[0104] In one or more of the above examples, unless otherwise stated, the singular form is interpreted to include the meaning of a single quantity or multiple quantities as interpreted in the context.

[0105] Figure 1 A conceptual diagram for illustrating the cross-sectional structure of a packaging substrate according to the present embodiment, Figure 2a and Figure 2b are conceptual diagrams for respectively illustrating the cross-sectional structures of packaging substrates according to different embodiments, Figure 3a are for respectively illustrating Figure 2a the generation process of the cross-sectional structure of the packaging substrate. Additionally, Figure 3b are for respectively illustrating Figure 2b the generation process of the cross-sectional structure.

[0106] To achieve the above object, a semiconductor device 100 according to the present embodiment includes: a semiconductor device portion 30 in which one or more semiconductor devices (a first semiconductor device 32, a second semiconductor device 34, a third semiconductor device 36) are located; a packaging substrate 20 electrically connected to the semiconductor device; and a mother board 10 electrically connected to the packaging substrate 20 to transmit an external electrical signal to the semiconductor devices (the first semiconductor device 32, the second semiconductor device 34, the third semiconductor device 36) and connect the semiconductor devices and the external electrical signal.

[0107] A packaging substrate 20 according to an embodiment includes: a core layer 22; an upper layer 26 located on one surface of the core layer 22; and a cavity portion 28 in which an electronic device 40 is disposed.

[0108] The above-mentioned semiconductor device unit 30 refers to the devices installed in the semiconductor device, which are installed on the above-mentioned package substrate 20 through connection electrodes and the like. Specifically, as the above-mentioned semiconductor device unit 30, for example, computing devices such as CPUs and GPUs (the first semiconductor device 32, the second semiconductor device 34), storage devices such as memory chips (the third semiconductor device 36), etc. can be applied. However, as long as it is a semiconductor device installed in the semiconductor device, it can be applied without limitation.

[0109] The above-mentioned motherboard 10 can be a motherboard such as a printed circuit board or a printed wiring board.

[0110] The above-mentioned package substrate 20 can selectively further include a lower layer 29 located below the core layer.

[0111] The above-mentioned core layer 22 can include: a glass core 21, including a first region 221 and a second region 222, the above-mentioned first region 221 having a first thickness 211, the above-mentioned second region 222 being adjacent to the above-mentioned first region 221 and having a second thickness 212 thinner than the above-mentioned first thickness; a plurality of core vias 23, penetrating the above-mentioned glass core 21 in the thickness direction; and a core distribution layer 24, located on the surface of the above-mentioned glass core 21 or the core via 23, and electrically connecting the first surface 213 of the above-mentioned glass core 21 and the second surface 214 facing the above-mentioned first surface through the above-mentioned core via 23 (refer to Figure 3a part (a)).

[0112] The above-mentioned second region 222 of the above-mentioned core layer 22 can function as a cavity structure.

[0113] In the same region, the above-mentioned glass core 21 has opposite first surface 213 and second surface 214, and the two surfaces are substantially parallel to each other, so that the glass core 21 has a constant thickness as a whole.

[0114] The internal space 281 formed by the thickness difference between the first region 221 and the second region 222 functions to accommodate part or all of the electronic device 40. Figure 2b and Figure 3b Example of a full cavity where the glass substrate in the second region is removed. However, this embodiment is not limited thereto, and a semi-cavity can also be applied. An example of a semi-cavity is as shown in Figure 2a and Figure 3a shown.

[0115] The above glass substrate 21 may include core through-holes 23 that penetrate the first surface 213 and the second surface 214. When the second thickness is not 0, the core through-holes 23 may be formed in both the first region 221 and the second region 222, and may be formed at a desired pitch and pattern. And when the second thickness is 0, the core through-holes 23 may be formed in the first region 221 and may be formed at a desired pitch and pattern.

[0116] As a packaging substrate of a semiconductor device, a form in which a silicon substrate and an organic substrate are laminated has been conventionally applied. Due to the characteristics of semiconductors, when a silicon substrate is applied to a high-speed circuit, parasitic devices may be generated, and there is a disadvantage of relatively large power loss. In addition, the organic substrate needs to be made larger in area in order to form a more complex distribution pattern, but this does not conform to the trend of manufacturing ultra-small electronic devices. In order to form a complex distribution pattern within a predetermined size, pattern miniaturization is actually required, but due to the characteristics of materials such as polymers applied to the organic substrate, there are actually limitations in pattern miniaturization.

[0117] In the present embodiment, as a method for solving the above problems, a glass core 21 is used as a support for the core layer 22. In addition, together with the glass core 21, core through-holes 23 penetrating the glass core 21 are also applied, thereby providing a packaging substrate 20 having a shorter current length, being more miniaturized, having a faster response, and having less loss characteristics.

[0118] The above glass core 21 is preferably a glass substrate suitable for semiconductors. For example, it may be a borosilicate glass substrate, a non-alkali glass substrate, etc., but the present invention is not limited thereto.

[0119] The above core through-holes 23 penetrate the glass core 21. The above core through-holes 23 may be formed by removing a predetermined region of the glass core 21. Specifically, they may be formed by etching plate-shaped glass using physical and / or chemical methods.

[0120] Specifically, when forming the above core through-holes 23, a method of performing chemical etching after forming defects (flaws) on the surface of the glass core by methods such as laser, a laser etching method, etc. may be adopted, but the present invention is not limited thereto.

[0121] Based on the unit area (1 cm × 1 cm) of the above glass core 21, 100 to 3000 of the above core through-holes 23 may be provided, or 100 to 2500 of the above core through-holes 23 may be provided, or 225 to 1024 of the above core through-holes 23 may be provided. When the above pitch conditions are satisfied, it is more beneficial for forming a conductive layer, etc., and the performance of the packaging substrate can be improved.

[0122] The above-mentioned core distribution layer 24 includes a core distribution pattern 241 and a core insulating layer 223. The core distribution pattern 241 is a conductive layer that electrically connects the first surface and the second surface of the glass core through a core via hole. The core insulating layer 223 surrounds the core distribution pattern. A conductive layer is formed inside the core layer 22 through the core via hole to serve as an electrical path across the glass core 21, so that the upper and lower parts of the glass core can be connected at a relatively short distance, and it can have the characteristics of faster electrical signal transmission and low loss. For example, the conductive layer can be a copper plating layer, but the present invention is not limited thereto.

[0123] The above-mentioned cavity portion 28 is generally circular, triangular, quadrilateral, hexagonal, octagonal, cross-shaped, etc., and its shape is not limited.

[0124] The shape of the above-mentioned electronic device 40 can generally be cylindrical, cuboid-shaped or polygonal-shaped.

[0125] The above-mentioned cavity portion 28 may include: a cavity distribution pattern, which is a conductive layer for electrically connecting the above-mentioned electronic device 40 and the above-mentioned core distribution layer 24; and an insulating layer surrounding the cavity distribution pattern.

[0126] On the other hand, the cavity portion according to another embodiment can be implemented in a form that penetrates the first surface 213 and the second surface 214 of the glass core 21. In this case, the cavity portion can be formed according to the same process as the formation process of the core via hole 23, and the area and shape of the cavity portion penetrating the glass core 21 can be different from the area and shape of the core via hole 23.

[0127] In the present embodiment, after arranging the electronic devices 40 in the cavity portion, an insulating layer can be generated. That is to say, an insulating layer can also be generated in the cavity portion through the process of generating the above-mentioned core insulating layer 223.

[0128] The core distribution pattern 241 can be patterned to be able to be electrically connected to the above-mentioned electronic device 40.

[0129] The above-mentioned electronic device 40 may include an active device such as a transistor or a power transmission device such as a multilayer ceramic capacitor (MLCC), that is, a passive device.

[0130] When a device such as a transistor that converts an electrical signal between a mother board and a semiconductor device into an appropriate level is applied as the above-mentioned electronic device 40, it is in the form of a path where a transistor or the like is applicable to the package substrate 20. Therefore, a semiconductor device 100 with higher efficiency and speed can be provided.

[0131] In addition, power transmission devices such as multilayer ceramic capacitors (MLCCs) play an important role in the performance of semiconductor devices. As passive devices, power transmission devices are usually at least 200 in a semiconductor device, and their performance is also affected by the characteristics of the conductive layer around the device. In one embodiment, a non-circular core through-hole can be applied to where a low-resistance conductive layer is required, such as the above-mentioned power transmission devices, instead of a circular core through-hole.

[0132] On the other hand, the above-mentioned cavity device 40 can be in the form of a passive device such as a capacitor inserted separately, or can be formed as a device group including a plurality of passive devices (in the form of being embedded between insulator layers (electronic device insulating layers)) and then inserted into an electronic device in a manner that exposes the electrodes. In the latter case, the workability of manufacturing the package substrate is smoother, and it is more conducive to sufficiently and reliably arranging the insulating layer in the space between complex devices.

[0133] The above-mentioned glass core 21 plays an intermediate role in connecting the semiconductor device part 30 and the mother board 10 to the upper and lower parts respectively, and the core through-hole 23 is used as a path for transmitting their electrical signals, thus realizing smooth signal transmission. To distinguish from the core through-holes in the second region 222 described below, the core through-holes provided in the first region 221 are called first region core through-holes 231.

[0134] An upper layer 26 is provided on the above-mentioned first surface 213.

[0135] The above-mentioned upper layer 26 includes an upper distribution layer 25 and an upper surface connection layer 27 located on the above-mentioned upper distribution layer 25. The outermost surface of the above-mentioned upper layer 26 can be protected by a cover layer 60, which is formed with an opening that enables the connection electrodes of the semiconductor device part to directly contact.

[0136] The above-mentioned upper distribution layer 25 includes: an upper insulating layer 253, located on the above-mentioned first surface; and an upper distribution pattern 251, which is a conductive layer having a predetermined pattern and at least a part of which is electrically connected to the above-mentioned core distribution layer 24, and is embedded in the above-mentioned upper insulating layer 253. A plurality of upper distribution layers 25 provided above and below each other can be connected to each other through blind holes.

[0137] As the above-mentioned upper insulating layer 253, as long as it can be used as an insulator layer for semiconductor devices or package substrates, for example, an epoxy resin including fillers can be used, but the present invention is not limited thereto.

[0138] The above-mentioned insulator layer can be formed by forming a coating and curing it, or by laminating an insulator thin film in an uncured or semi-cured state on the above-mentioned core layer 22 and curing it. At this time, if a reduced-pressure lamination method or the like is adopted, the above-mentioned insulator is embedded in the space inside the core through-hole 23, so that a more effective process can be carried out.

[0139] According to an embodiment, even if multiple insulator layers are stacked and applied, it may be substantially difficult to distinguish between the insulator layers, and the multiple insulator layers are collectively referred to as the upper insulating layer. Moreover, the core insulating layer 223 and the upper insulating layer 253 can use the same insulating material, and in this case, it may be substantially impossible to distinguish their boundaries. Or, according to another embodiment, the boundaries of the insulating layers can be created by setting the pressure and temperature for curing the multiple insulating layers differently.

[0140] The above-mentioned upper distribution pattern 251 refers to a conductive layer located in the above-mentioned upper insulating layer 253 in a predetermined shape. For example, it can be formed by the Build-Up Layer method. Specifically, after forming the insulator layer, unnecessary parts in the insulator layer are removed, and then a conductive layer is formed by a method such as copper plating. Unnecessary parts in the conductive layer are selectively removed, and then an insulator layer is formed again on the conductive layer. Unnecessary parts are removed again, and then a conductive layer is formed by a method such as gold plating. By repeating the above process, the upper distribution pattern 251 with conductive layers formed in the vertical or horizontal direction in the required pattern can be formed.

[0141] Since the above-mentioned upper distribution pattern 251 is located between the core layer 22 and the semiconductor device portion 30, it is formed to include fine patterns in at least a part thereof, so as to smoothly transmit electrical signals to and from the semiconductor device portion 30 and fully accommodate the required complex patterns. At this time, the fine pattern refers to a pattern with a width and a pitch each less than 4 μm, or a pattern with a width and a pitch each equal to or less than 3.5 μm, or a pattern with a width and a pitch each equal to or less than 3 μm, or a pattern with a width and a pitch each equal to or less than 2.5 μm, or a pattern with a width and a pitch each equal to or less than 2.3 μm. The above-mentioned width and pitch can be 1 μm or more (hereinafter, the description of the fine pattern is the same).

[0142] The above-mentioned upper surface connection layer 27 includes: an upper surface connection pattern 272, at least a part of which is electrically connected to the above-mentioned upper distribution pattern 251 and is located in the above-mentioned upper insulating layer 253; and an upper surface connection electrode 271 that electrically connects the above-mentioned semiconductor device portion 30 and the above-mentioned upper surface connection pattern 272.

[0143] The above-mentioned upper surface connection pattern 272 may be located on one surface of the upper insulating layer 253, or may be embedded in such a way that at least a part of it is exposed on the upper insulating layer. For example, in the case where the above-mentioned upper surface connection pattern is located on one surface of the above-mentioned upper insulating layer, the above-mentioned upper insulating layer may be formed by methods such as plating. In the case of embedding in such a way that a part of the above-mentioned upper surface connection pattern is exposed on the upper insulating layer, it is the case of removing a part of the insulating layer or the conductive layer by methods such as surface polishing and surface etching after forming a copper plating layer or the like.

[0144] Similar to the upper part distribution pattern 251 described above, at least a part of the above-mentioned upper surface connection pattern 272 may include a fine pattern. The upper surface connection pattern 272 including the fine pattern as described above can electrically connect more devices even in a narrow area, thereby making the electrical signal connection between devices or with the outside smoother, and enabling a more integrated package.

[0145] The above-mentioned upper surface connection electrode 271 can be directly connected to the above-mentioned semiconductor device part 30 through a terminal or the like, or can be connected through a device connection part 51 such as a solder ball.

[0146] Regarding the semi-cavity substrate, the above-mentioned cavity part 28 may include: a cavity distribution layer 282, located above and / or below the above-mentioned second region 222 and electrically connected to the above-mentioned core distribution pattern 241, and an internal space 281 for arranging the cavity device 40. The above-mentioned cavity distribution layer 282 can be formed through the second region core through-hole 232 (refer to Figure 2b ).

[0147] Specifically, compared with the above-mentioned first region 221, the thickness of the glass core 21 in the above-mentioned second region 222 is thinner, and the electronic device 40 can be located in the internal space 281 formed by the thickness difference between the two. In addition, the core through-holes 23 and the core distribution layer 24 formed in the glass core 21 serve as an electrical connection structure connecting the electronic device 40 and external devices.

[0148] In addition, as described above, a cavity part may be formed in a form that penetrates the first region 221 rather than the second region 222, that is, penetrates the first surface 213 and the second surface 214 of the glass core 21, and the electronic devices 40 can be arranged in the cavity part.

[0149] The above-mentioned encapsulation substrate 20 is also connected to the mother board 10. In the above-mentioned mother board 10, the terminals of the above-mentioned mother board 10 can be directly connected to the core distribution pattern 241 located on at least a part of the second surface 214 of the above-mentioned core layer 22, and the above-mentioned mother board 10 can be electrically connected by means of a board connection part 52 such as solder balls. Moreover, the core distribution pattern 241 in contact with the mother board 10 can be connected to the above-mentioned mother board 10 by means of a lower layer (not shown in the figure) located below the above-mentioned core layer 22. The device connection part 51 and the board connection part 52 are collectively referred to as the connection part 50.

[0150] According to an example, in the encapsulation substrate 20 located between the above-mentioned semiconductor device part 30 and the above-mentioned mother board 10, substantially no other additional substrates may be applied except for the above-mentioned glass core 21.

[0151] In the past, an interposer and an organic substrate were stacked together and applied to the connection part between a device and a mother board. It is understood that such a multi-stage structure is based on at least two reasons. One is that there are scale problems in directly connecting the fine patterns of a device to a mother board, and the other is that during the bonding process or the driving process of a semiconductor device, wiring damage may be caused due to differences in the coefficient of thermal expansion.

[0152] In the present embodiment, by applying a glass core having a coefficient of thermal expansion similar to that of a semiconductor device and forming a micro pattern having a scale sufficient for mounting a device on the first surface of the glass core and its upper layer, the above-mentioned problems are solved.

[0153] Next, a manufacturing method of an encapsulation substrate according to an embodiment of the present invention will be described.

[0154] Figure 4 and Figure 5 FIG. is a flowchart for explaining the manufacturing process of the encapsulation substrate according to the present embodiment in a sectional form.

[0155] First, as Figure 4 shown in part (a) of, a glass core 21a having a flat first surface and a second surface is prepared, and defects 21b (grooves) are formed at predetermined positions on the glass surface in order to form core through holes. The above-mentioned glass may be a glass core such as a substrate applicable to an electronic device, for example, an alkali-free glass core may be applied, but it is not limited thereto. As commercially available products, products manufactured by manufacturers such as Corning Incorporated, Schott AG, and AGC Inc. may be applied. The above-mentioned defects (grooves) can be formed by methods such as mechanical etching and laser irradiation.

[0156] As Figure 4As shown in part (b), an etching step is performed to form a core through-hole 23 in the glass core 21a having a defect 21b (groove) by a physical or chemical etching process. During the etching process, while the core through-hole is formed in the defective portion of the glass core, the surface of the glass core 21a can be etched. To prevent such etching of the glass surface, a mask film or the like can be applied. However, considering the complexity of the process of applying and removing the mask film, etc., the defective glass core itself can be etched. In this case, the thickness of the glass core having the core through-hole can be slightly thinner than the thickness of the original glass core.

[0157] Then, as Figure 4 shown in parts (c) and (d), a core layer preparation step can be performed by forming a conductive layer 21d on the glass core. Typically, the above conductive layer can be a metal layer including copper metal, but the present invention is not limited thereto.

[0158] The surfaces of glass (including the surface of the glass core and the surface of the core through-hole) and copper metal have different properties, so the adhesion is poor. In the present embodiment, the adhesion between the glass surface and the metal is improved by two methods: a dry method and a wet method.

[0159] The dry method is a method of applying sputtering, that is, a method of forming a seed crystal layer 21c on the glass surface and the inner diameter of the core through-hole by metal sputtering. When forming the above seed crystal layer, a dissimilar metal such as titanium, chromium, nickel, etc. can be sputtered together with copper, etc. In this case, the adhesion between the glass and the metal is improved by the anchoring effect of the interaction between the surface morphology of the glass and the metal particles, etc.

[0160] The wet method is a method of performing primer treatment, which is a method of forming a primer layer 21c by pretreatment with a compound having a functional group such as amine. According to the required adhesion degree, after pretreatment with a silane coupling agent, primer treatment can be performed with a compound or particles having an amine functional group. As described above, the support substrate of the present embodiment needs to have high performance sufficient to form a fine pattern and also needs to maintain this state even after primer treatment. Therefore, when such a primer contains nanoparticles, nanoparticles having an average diameter of 150 nm or less are preferably applied. For example, particles having an amino group are preferably used as the nanoparticles. For example, the above primer layer can be formed by applying an adhesion improver manufactured by the CZ series of MEC Co., Ltd.

[0161] In the above-mentioned seed layer / primer layer 21c, the conductive layer can be selectively formed as a metal layer in a state where parts that do not need to form the conductive layer are removed or not removed. In addition, the above-mentioned seed layer / primer layer 21c selectively processes parts that need to form the conductive layer or parts that do not need to form the conductive layer into an activated state or a non-activated state for metal plating to perform subsequent processes. For example, the above-mentioned activation or non-activation treatment can use light irradiation treatment such as laser with a predetermined wavelength, chemical treatment, etc. When forming the metal layer, a copper plating method applicable to manufacturing semiconductor devices can be adopted, etc., but the present invention is not limited thereto.

[0162] As Figure 4 shown in part (e) of [], when a part of the above-mentioned core distribution layer is not needed, it can be removed, or metal plating can be performed after partially removing or non-activating the seed layer to form a conductive layer in a predetermined pattern, thereby forming an etching layer 21e of the core distribution layer.

[0163] Figure 5 Describe the preparation steps for forming an insulating layer and an upper distribution pattern according to an embodiment.

[0164] As Figure 5 shown in part (a) of [], after forming the core distribution layer as the above-mentioned conductive layer, the core through-hole can go through an insulating layer forming step of filling the empty space with an insulating layer. At this time, the applicable insulating layer can be an insulating layer prepared in the form of a thin film. For example, a method such as laminating a reduced-pressure laminated thin film form of the insulating layer can be adopted. When performing reduced-pressure lamination in this way, the insulating layer is sufficiently embedded in the blank space inside the above-mentioned core through-hole to form a core insulating layer without void formation.

[0165] Figure 5 Parts (b) to (e) of [] are used to illustrate the upper layer preparation steps.

[0166] The upper layer preparation step is a step of forming an upper distribution layer including an upper insulating layer and an upper distribution pattern on the core layer. The upper insulating layer can be formed by coating a resin composition for forming the insulating layer 23a or stacking an insulating thin film. Simply, it is preferably formed by stacking an insulating thin film. The stacking of the insulating thin film can be performed by laminating and curing the insulating thin film. At this time, if a reduced-pressure lamination method is adopted, the insulating resin can be sufficiently embedded in layers where no conductive layer is formed inside the core through-hole, etc. At least a part of the above-mentioned upper insulating layer is also in direct contact with the glass core, so a layer with sufficient adhesion is applicable. Specifically, the above-mentioned glass core and the above-mentioned upper insulating layer preferably have a characteristic that the adhesion test value according to ASTM D3359 satisfies 4B or more.

[0167] The upper distribution pattern can be formed by repeatedly performing the following process: forming the above-mentioned insulating layer 23a, forming the conductive layer 23c in a predetermined pattern, and etching unnecessary portions to form the etched layer 23d of the conductive layer; for the conductive layers formed adjacent to each other with the insulating layer therebetween, it is formed by performing a plating process after forming the blind holes 23b in the insulating layer. The blind holes can be formed by dry etching methods such as laser etching and plasma etching, or wet etching methods using a mask layer and an etching solution.

[0168] Thereafter, although not shown in the figure, an upper surface connection layer and a cover layer can be formed.

[0169] The upper surface connection pattern and the upper surface connection electrode can also be formed by a process similar to the process of forming the upper distribution layer. Specifically, it can be formed by a method such as forming an etched layer of the insulating layer in the insulating layer 23e, then forming a conductive layer thereon, and then forming an etched layer of the conductive layer, but it can also be formed by a method of selectively forming only the conductive layer without using an etching method. An opening (not shown in the figure) is formed at a position of the cover layer corresponding to the upper surface connection electrode, and it can be formed such that the upper surface connection electrode is exposed and directly connected to a device connection portion or a terminal of the device, etc.

[0170] Once the upper layer is produced, the process of the lower layer can be carried out by forming a lower surface connection layer and a cover layer. The lower distribution layer and / or the lower surface connection layer can be formed in a manner similar to the steps of forming the upper surface connection layer and the cover layer described above, and optionally, a cover layer (not shown in the figure) can also be formed.

[0171] On the other hand, as described above, a cavity portion can be produced in the glass substrate. In order to generate the above-mentioned cavity portion, when processing the corner portion of the cavity portion, in order to substantially suppress damage to the sharp corner portion and smoothly advance the generation process of the cavity portion, the sharp portion of the corner portion is usually processed into a smooth shape to form a curved surface. The above-mentioned curved surface can have a certain radius of curvature.

[0172] When embedding a cavity device into the above-mentioned cavity portion, due to the curved surface generated at the above-mentioned corner portion, it may be difficult to ensure a sufficient distance between the corner of the above-mentioned cavity portion and the corner of the above-mentioned cavity device. This may increase the probability of a short circuit occurring in the embedded cavity device. Additionally, to solve the above problem, if the corner portion of the above-mentioned cavity portion is processed into a sharp shape, cracks may occur in the above-mentioned cavity portion, leading to a problem of easy breakage. Another method is that if the size of the cavity portion is designed to be significantly larger than the size of the cavity device, since the distance between the cavity device and the inner wall surface of the cavity portion increases, it may severely exacerbate the occurrence of undulation of the packaging substrate. Furthermore, it may also have an adverse impact on the utilization of the surface area of the packaging substrate.

[0173] Hereinafter, a structure including a glass substrate in a processed form that is included in a packaging substrate and serves as a support substrate in the form of a plate-shaped substrate will be referred to as a substrate and described.

[0174] Figure 6 A diagram exemplarily showing the corner portion of the cavity portion where the radius of curvature occurs and the structure of the cavity device.

[0175] Refer to Figure 6 , a cavity portion 28 can be formed on the glass substrate, and the above-mentioned cavity portion 28 can be provided with a cavity device 40. For example, when the above-mentioned cavity device 40 is provided in the above-mentioned cavity portion 28, a gap is formed between them. Here, if the corner of the above-mentioned cavity portion 28 is processed into a curved surface, the above-mentioned curved surface is generally formed closer to the inside relative to the corner.

[0176] In this case, the gap between the corner portion (i.e., the edge of the cavity device) of the embedded chip, that is, the embedded cavity device, and the cavity corner wall will be narrower than the gap in the straight portion. Contact may occur between the corner of the above-mentioned cavity portion 28 and the edge 61 of the above-mentioned cavity device 40. If a wire is provided here, it may cause a short circuit of the cavity device.

[0177] To prevent this situation, if the gap between the wall of the cavity portion and the cavity device is enlarged as a whole, voids are likely to be generated when forming the insulating layer, and undulation is likely to be formed on the surface.

[0178] To prevent the above problems, this specification proposes a method of forming a cavity expansion portion in the corner region of the cavity portion.

[0179] As a cavity expansion part, for example, an embodiment is proposed in which the corner area of the cavity part is expanded to adapt to the corner space. Thus, it is possible to prevent the problem in the prior art that when processing the cavity part, due to the curved surface in the corner area, it is impossible to ensure sufficient clearance between the corner of the cavity part and the corner of the cavity device, increasing the probability of short circuit. In addition, the corner space can appropriately disperse the stress applied to the glass substrate through the cavity expansion part, thereby obtaining the effect of preventing the glass substrate from being damaged.

[0180] The substrate according to an embodiment is a plate-shaped substrate included in a package substrate, and includes a glass substrate 21 having a first surface and a second surface facing each other, and a cavity part 28 and a cavity expansion part 70 are provided on the glass substrate.

[0181] The cavity part 28 has an accommodation space inside and has one or more corners.

[0182] The corner is a virtual line formed by the intersection of the extension lines of two adjacent side surfaces in the accommodation space. The cavity expansion part 70 is provided at the corner and has a corner space connected to the accommodation space.

[0183] Figure 7 It is a diagram schematically showing the structure of the cavity part and the cavity expansion part generated according to this embodiment. Figure 7 It is a diagram conceptually simplified to illustrate the cavity part of the package substrate generated according to this embodiment, and the content described with reference to Figures 1 to 5 can be applied.

[0184] Referring to Figure 7 , when observing the cavity part 28 from above, the glass substrate may include a cavity expansion part with a corner expanded in an arc shape. The cavity expansion part 70 may have a corner space connected to the accommodation space of the cavity part 28.

[0185] For example, similar to forming a core through-hole at the corner of the cavity part 28, defects (flaws) can be formed by methods such as laser energy irradiation, and then an etching process can be performed to form the cavity part 28 and the cavity expansion part 70 simultaneously.

[0186] The cavity expansion part 70 may be a region expanded in the form of a through-hole penetrating the glass substrate 21 at the corner of the cavity part 28. The corner space may be a space in the form of a part of the glass substrate being removed.

[0187] For example, the edge of the corner space may be in the arc shape of a circle or an ellipse.

[0188] For example, the package substrate may include an electronic device 40 (cavity device) provided in the cavity part.

[0189] For example, the distance between the cavity wall (side surface) of the above-mentioned cavity expansion part 70 and the edge 61 of the above-mentioned cavity device 40 can be greater than or equal to the distance between the cavity wall on the side surface of the above-mentioned cavity part 28 and the above-mentioned cavity device 40.

[0190] For example, the distance between the side surface of the above-mentioned accommodation space and the above-mentioned electronic device 40 is D1, the distance between the glass wall surface of the above-mentioned cavity expansion part 70 and the above-mentioned electronic device 40 is D2, and the above-mentioned D2 can be equal to or greater than the above-mentioned D1 (refer to Figure 7 ). For example, the above-mentioned D2 can be 200 μm or less. In this case, the short-circuit prevention effect is excellent.

[0191] For example, the distance D3 between the end of the above-mentioned cavity expansion part 70 and the side surface of the above-mentioned cavity part 28 can be 2 μm or more (refer to Figure 7 ). The above-mentioned distance can be 2 μm or more, 5 μm or more, 10 μm or more, 15 μm or more, 20 μm or more, 25 μm or more, 30 μm or more, 35 μm or more, 40 μm or more, 45 μm or more, 50 μm or more, 55 μm or more, or 60 μm or more. The above-mentioned distance can be 120 μm or less, 110 μm or less, 100 μm or less, or 90 μm or less. In this case, the space utilization rate of the substrate can be improved and it is helpful to effectively form the cavity expansion part.

[0192] The cavity part corner including a region expanded in the form of a through hole penetrating the glass substrate at the corner of the above-mentioned cavity part 28 can be called a "Mickey Mouse ears" shaped corner or a "Mickey Mouse ears" corner.

[0193] For example, when observing from the first surface of the glass substrate 21 to the second surface direction, the above-mentioned cavity expansion part 70 can be in the arc shape of a circle or an ellipse. The above-mentioned arc has a radius, and in the case of an ellipse, the average radius is regarded as the above-mentioned radius.

[0194] The average radius of the above-mentioned arc can be 40 μm or more. The above-mentioned average radius can be 40 μm or more, 45 μm or more, 50 μm or more, 55 μm or more, 60 μm or more, 65 μm or more, 70 μm or more, 75 μm or more, 80 μm or more, 85 μm or more, 90 μm or more, 95 μm or more, or 100 μm or more. The above-mentioned average radius can be 200 μm or less, 180 μm or less, 160 μm or less, or 150 μm or less. In this case, the space utilization rate of the substrate can be improved and it is helpful to effectively form the cavity expansion part.

[0195] The above glass substrate 21 may include glass through-holes penetrating in the thickness direction.

[0196] The average radius of the above arc may be 0.5 times or more, 0.7 times or more, or 0.9 times or more the radius of the above glass through-hole. The average radius may be 3 times or less, 2.5 times or less, 2 times or less, or 1.5 times or less the radius of the above glass through-hole. In this case, the space utilization rate of the substrate can be improved and it is helpful to effectively form the cavity expansion part.

[0197] On the other hand, Figure 7 An embodiment in which the cavity expansion part 70 is an expansion area in the form of a through-hole penetrating the glass substrate 21 is shown, but the shape of the above cavity expansion part 70 proposed in this specification is not limited to the above embodiment. For example, various forms of corner shapes can be selected in consideration of the interference of the material during the process of embedding the cavity part 28. Exemplarily, the cavity expansion part can be formed in a shape similar to a partial circle or a partial ellipse.

[0198] Figure 8 It is a diagram schematically showing the structure of a substrate including a cavity part and a cavity device generated according to another embodiment.

[0199] Referring to Figure 8 , the substrate may include a cavity part 28 in which a cavity expansion part 70 is formed at a corner. An electronic device 40 (cavity device) may be provided in the above cavity part 28.

[0200] The inner wall surface of the above cavity part 28 may be a part where one surface of the glass substrate is exposed. As another example, an additional layer may be provided on the above inner wall surface of the above cavity part 28.

[0201] Figure 8 In [reference], a core distribution pattern 241 connecting the first surface and the second surface of the glass substrate 21 as a metal layer is exemplified, but it is not limited thereto, and a conductive layer such as a heat dissipation layer may also be provided.

[0202] Specifically, one or more cavity devices 40 (electronic devices) may be provided in the inner space of the cavity part. And, the inner space other than the above cavity part may be filled with a filling material. The filling material may include an insulating material, a metal material, or a heat dissipation material, or two or more different materials may be arranged in a predetermined manner.

[0203] Exemplarily, a metal layer may be provided on the inner wall surface. Exemplarily, the above metal layer may be a conductive layer, and a metal layer such as copper may be applicable. In this case, the above accommodation space refers to the part that does not include the above conductive layer. For example, the thickness of the above metal layer is D4, and the distance between the side surface of the above accommodation space and the above electronic device is D1 (refer to Figure 8 ).

[0204] The parts other than the electronic device in the above accommodation space and the above corner space may be filled with a filling material. Exemplarily, it may be filled with an insulating material, a metal material, or a heat dissipation material. Preferably, it is filled with an insulating material.

[0205] The above insulating material may include liquid crystal polymer (LCP), Epoxy Molding Compound (EMC), Ajinomoto Build-up Film (ABF), Modified Polyimide (MPI), etc.

[0206] Figure 9 A diagram schematically showing the structure of a glass substrate including a plurality of cavity portions generated according to another embodiment.

[0207] Refer to Figure 9 , the glass substrate 21 may include two or more cavity portions 28 formed with a plurality of cavity expansion portions 70. This figure exemplifies the case where four cavity portions are provided. Since the specific description of the cavity portion, the cavity expansion portion, etc. is repeated with the above description, the detailed description thereof will be omitted.

[0208] As Figure 9 shown, the cavity expansion portions 70 of different cavity portions 28 arranged adjacent to each other may have a distance of more than a certain distance P.

[0209] When the distance between the side surface of the above cavity portion 28 and the end of the above cavity expansion portion 70 is D5, the above P may be 1 time or more, 2 times or more, 3 times or more, or 4 times or more of the above D5. And the above P may be 20 times or less, 16 times or less, 14 times or less, 12 times or less, 10 times or less, 9 times or less, or 8 times or less of the above D5. In this case, by ensuring a space (gap) of more than a certain distance, the breakage of the cavity frame can be prevented. In addition, the space utilization rate of the substrate can be improved, and it is helpful to effectively construct the cavity expansion portion.

[0210] The above-mentioned P can be 100 μm or more, 110 μm or more, 120 μm or more, or 130 μm or more. Also, the above-mentioned P can be 300 μm or less, 280 μm or less, 260 μm or less, 240 μm or less, or 220 μm or less. In this case, it may be beneficial to prevent breakage of the glass substrate such as the cavity frame. In addition, the substrate can stably ensure the support function and contribute to effectively constructing the cavity expansion part.

[0211] Figure 10a , Figure 10b , Figure 10c and Figure 10d are diagrams exemplarily showing the structures of cavity parts generated according to different embodiments.

[0212] The above-mentioned cavity part 28 can include four or more of the above-mentioned corners. Exemplarily, one cavity part can include 4, 8, or 12 of the above-mentioned corners.

[0213] The above-mentioned cavity expansion part 70 can be provided in the above-mentioned cavity part 28 in a number less than or equal to the number of the above-mentioned corners (more than four). The number of the above-mentioned cavity expansion parts 70 is less than or equal to the number of corners of the above-mentioned cavity part 28.

[0214] For example, referring to Figure 10a , when viewed from above, a square cavity part 28 can be formed, and cavity expansion parts 70 can be formed at the four corners (marked as M1) of the above-mentioned cavity part 28. The specific descriptions of the cavity part, the cavity expansion part, etc. are the same as the above descriptions.

[0215] For example, referring to Figure 10b , when viewed from above, a cavity part 28 in which two quadrilaterals cross to form a cross shape can be generated, and cavity expansion parts 70 can be formed at the 12 corners of the above-mentioned cavity part 28. That is, cavity expansion parts 70 can be formed at the corners where the sides of the cavity part 28 vertically cross. In other words, referring to Figure 10b , when viewed from above, a cross-shaped cavity part 28 can be generated, and cavity expansion parts 70 can be formed at the 12 corners of the above-mentioned cavity part 28. The specific descriptions of the cavity part and the cavity expansion part, etc. are the same as the above descriptions.

[0216] For example, referring to Figure 10c and Figure 10d , when viewed from above, a cavity part 28 in a shape where one side protrudes in a quadrilateral shape in a quadrilateral can be generated, and cavity expansion parts 70 can be formed at the 8 corners of the above-mentioned cavity part 28. That is, cavity expansion parts 70 can be formed at the corners where the sides of the above-mentioned cavity part 28 vertically cross. The specific descriptions of the cavity part and the cavity expansion part, etc. are the same as the above descriptions.

[0217] On the other hand, the shape of the above-described cavity expansion portion proposed in this specification is not limited to the above-described embodiments. For example, various forms of corner shapes can be selected in consideration of interference during the process of embedding the material into the cavity portion. For example, when viewed from the direction from the first surface to the second surface of the glass substrate, the above-described cavity expansion portion can be formed in such a manner that the corner region of the cavity portion expands. For example, when viewed from the direction from the first surface to the second surface of the glass substrate, the above-described cavity expansion portion can be formed in such a manner that the corner region of the cavity portion expands in an arc shape.

[0218] Reference will be made to Figure 10a 、 Figure 10b 、 Figure 10c and 10d to describe the cavity expansion portion in more detail. However, the following descriptions of the cavity expansion portion are applicable to the above-described cavity expansion portion.

[0219] When viewed from the direction from the first surface to the second surface, the first corner M1 is one corner where the cavity expansion portion is located.

[0220] The above-described first corner space is a space in the form of a partial removal of the glass substrate at the first corner M1.

[0221] The above-described first corner M1 is arranged to be in contact with the 1-1 surface and the 1-2 surface, which are two walls (edges) of the adjacent cavity portion. The angle between the 1-1 surface and the 1-2 surface at the first corner can be less than 180 degrees. The angle can be 160 degrees or less, 140 degrees or less, 120 degrees or less, 110 degrees or less, 100 degrees or less, or 90 degrees or less. The angle can be 30 degrees or more, 40 degrees or more, or 50 degrees or more.

[0222] The above-described angle refers to the angle observed from the side of the cavity portion 28. In addition, the edge of the corner space at the above-described first corner M1 can be in the arc shape of a circle or an ellipse.

[0223] The central angle of the corner space can be the angle between the two sides and the two contact points of the arc. The central angle of the corner space is measured from the center of gravity of the corner space. In addition, the central angle of the corner space is measured along the outer edge line of the corner space.

[0224] The central angle A1 of the corner space of the above-described first corner M1 can be 120 degrees or more. The A1 can be 160 degrees or more or 180 degrees or more.

[0225] The central angle A1 of the corner space of the above-described first corner M1 can exceed 180 degrees. The A1 can be 200 degrees or more, 235 degrees or more, or 260 degrees or more. The A1 can be 320 degrees or less.

[0226] When viewed in the direction from the first surface to the second surface, the second corner M2 is another example of a corner where the cavity expansion portion is located.

[0227] The second corner M2 is arranged such that two wall surfaces (edges) of the adjacent cavity portions, namely the 2-1 surface and the 2-2 surface, are joined. At the second corner, the angle between the 2-1 surface and the 2-2 surface can exceed 180 degrees. The angle can be 160 degrees or less, 140 degrees or less, 120 degrees or less, 110 degrees or less, 100 degrees or less, or 90 degrees or less. The angle refers to the angle observed from the side of the cavity portion 28. Additionally, the edge of the corner space at the second corner M2 can be in the arc shape of a circle or an ellipse.

[0228] The cavity protrusion of the second corner M2 can be in a form that protrudes from the cavity portion towards the glass substrate side (refer to Figure 10c ). The center of gravity of the cavity protrusion can be located within the cavity portion.

[0229] The center angle A2 of the corner space of the second corner M2 can be 180 degrees or less. The center angle A2 of the corner space of the second corner M2 can be 180 degrees or less, 160 degrees or less, 140 degrees or less, 120 degrees or less, 110 degrees or less, or 100 degrees or less. The center angle A2 of the corner space can be 10 degrees or more or 20 degrees or more.

[0230] In another embodiment, refer to Figure 10d , the above-described cavity expansion portion is provided at the first corner M1, and chamfering treatment can be performed on the second corner M2 to remove the sharp edges or substantially process it into a curved surface.

[0231] When processed into a curved surface, the radius of curvature can be, for example, 35 μm or more or 60 μm or more. Exemplarily, the radius of curvature can be 200 μm or less.

[0232] The center of gravity of the cavity protrusion can be located outside the cavity portion.

[0233] The center angle A2 of the corner space of the second corner M2 can be less than 180 degrees. The center angle A2 of the corner space of the second corner M2 can be 170 degrees or less, 160 degrees or less, 140 degrees or less, 120 degrees or less, 110 degrees or less, or 100 degrees or less. The center angle A2 of the corner space can be 2 degrees or more, 5 degrees or more, 10 degrees or more, or 20 degrees or more.

[0234] This embodiment can prevent the problem of increased short - circuit probability by ensuring sufficient clearance between the wall of the cavity expansion part and the corner of the cavity device, and can appropriately disperse the stress applied to the glass substrate through the cavity expansion part, thereby obtaining the effect of preventing the glass substrate from being damaged.

[0235] In the encapsulation substrate according to this embodiment in this specification, the substrate having the above - mentioned cavity expansion part is applied as the glass substrate. The above - mentioned encapsulation substrate includes: the above - mentioned substrate; electronic devices disposed in the above - mentioned cavity part; and an upper layer disposed on the above - mentioned substrate and provided with an upper re - wiring layer for transmitting electrical signals. The above - mentioned encapsulation substrate may further include a lower layer. Since the specific descriptions of the encapsulation substrate, the cavity part, the cavity expansion part, etc. are repeated with the above descriptions, their specific descriptions will be omitted. In addition, the specific descriptions of the upper layer, the lower layer, etc. are also repeated with the above content, so the specific descriptions are omitted.

[0236] In addition, this specification presents a manufacturing method of the encapsulation substrate according to this embodiment. For example, the manufacturing method of the encapsulation substrate according to the embodiment of this specification is as follows.

[0237] For example, a cavity part 28 may be formed on a glass substrate 21 having a first surface and a second surface facing each other. The cavity part 28 may be formed in a recessed surface shape with only one of the first surface or the second surface open. The cavity part 28 may be formed in a recessed surface shape with only one of the first surface or the second surface open, so as to be able to have a space for device installation. Alternatively, the above - mentioned cavity part 28 may open and be recessed in the direction of the above - mentioned first surface or the above - mentioned second surface of the above - mentioned glass substrate 21, or penetrate the first surface and the second surface, so as to have a space for device installation.

[0238] After or simultaneously with the formation of the above - mentioned cavity part, a cavity expansion part 70 may be formed in the corner area of the above - mentioned cavity part 28.

[0239] The manufacturing method of the plate - like substrate included in the encapsulation substrate includes: a step of generating defects for forming a cavity part and defects for forming a cavity expansion part on a glass substrate having a first surface and a second surface facing each other; and a step of etching the above - mentioned glass substrate to form a cavity part and a cavity expansion part.

[0240] It may further include a step of mounting electronic devices in the above - mentioned cavity part.

[0241] The substrate manufactured in this way can prevent the problem of increased short - circuit probability by ensuring sufficient clearance between the wall of the cavity expansion part and the corner of the cavity device, and can appropriately disperse the stress applied to the glass substrate through the cavity expansion part, thereby being able to obtain the effect of preventing the glass substrate from being damaged.

[0242] As described above, this specification has been described with reference to the embodiments illustrated in the drawings, but this is merely an example, and those skilled in the art will understand that various modifications and equivalent other embodiments can be derived therefrom. In other words, the scope of this specification is not limited to the above-described embodiments, but various changes or modifications by those skilled in the art using the basic concepts of the present embodiments defined in the appended claims fall within the scope of the present embodiments. Therefore, the true technical protection scope of this specification should be determined according to the technical idea of the appended claims.

Claims

1. A substrate, which is a plate-shaped substrate included in a packaging substrate, characterized in that: The glass substrate comprises a first surface and a second surface facing each other. The glass substrate is provided with a cavity portion and a cavity expansion portion. The cavity has a receiving space inside and has one or more corners. The corner is an imaginary line where the extension lines of two adjacent side surfaces of the accommodation space intersect. The cavity expansion portion is arranged at the corner and has a corner space connected to the accommodation space.

2. The substrate according to claim 1, characterized in that When viewed from the first surface toward the second surface, the first corner is a corner where the cavity expansion portion is located. At the first corner, the angle of the glass substrates on the two sides is greater than 180 degrees. The corner space is a space in a shape where a portion of the glass substrate at the first corner is removed. The edge shape of the corner space is a circular or elliptical arc. The corner space center angle is the angle between the two side faces and the two points of contact of the arc. The corner space center angle of the first corner is greater than 20 degrees.

3. The substrate according to claim 1, characterized in that When viewed from the first surface toward the second surface, the second corner is a corner where the cavity expansion portion is located. At the second corner, the angle of the glass substrate at the two side surfaces is less than 180 degrees.

4. The substrate according to claim 3, characterized in that The corner space is a space in a shape where a portion of the glass substrate at the second corner is removed. The edge shape of the corner space is a circular or elliptical arc. The corner space center angle is the angle between the two side faces and the two points of contact of the arc. The corner space center angle of the second corner is less than 180 degrees.

5. The substrate according to claim 1, characterized in that When viewed from the first surface toward the second surface, the cavity expansion portion is in the shape of a circle or an ellipse. The average radius of the arc is 40 μm or more.

6. The substrate according to claim 5, characterized in that The glass substrate includes a through-glass hole penetrating in the thickness direction. The average radius of the arc is 0.5 to 3 times the radius of the through-glass hole.

7. The substrate according to claim 1, characterized in that The cavity portion includes four or more corners. The cavity expansion parts are provided in the cavity part in a number of four or more and not more than the number of the corners.

8. The substrate according to claim 1, characterized in that The substrate includes an electronic device disposed in the cavity. The distance between the side of the accommodation space and the electronic device is D1. The distance between the glass wall of the cavity expansion portion and the electronic device is D2. The above-mentioned D2 is equal to or greater than the above-mentioned D1.

9. The substrate according to claim 1, characterized in that The substrate includes an electronic device disposed in the cavity. The above-mentioned accommodation space and the above-mentioned corner space except for the electronic components are filled with fillers, The filler includes insulating material, metal material or heat dissipation material.

10. The substrate according to claim 1, characterized in that A distance D3 between a distal end of the cavity expansion portion and a side surface of the cavity portion is greater than or equal to 2 μm.

11. A packaging substrate, characterized in that: include: The substrate according to claim 1; An electronic device is disposed in the cavity; and The upper layer is arranged on the substrate and is provided with an upper redistribution layer for transmitting electrical signals.

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