Semiconductor module

Abstract

The invention provides a semiconductor module which uses a molded package, can freely arrange external terminals, and can adopt a special terminal shape. A semiconductor module is provided with: a molded package in which a semiconductor chip is sealed with a transfer molding resin; and a package assembly attached to a package terminal protruding from a package side surface of the molded package, the package assembly having: a printed circuit board physically and electrically connected to the package terminal; and an external terminal mounted on the printed circuit board and electrically connected to the package terminal.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor module, and more particularly to a semiconductor module capable of freely arranging external terminals. Background Art

[0002] Due to high reliability and high heat resistance, as a sealing technology for power semiconductor chips, a technology using a molded package using a thermosetting resin such as epoxy resin, which is commonly used in the manufacture of integrated circuits (ICs) and the like, is used.

[0003] As a general manufacturing process, a circuit pattern or the like is formed on a metal plate such as copper (Cu) or a Cu alloy. After connecting circuit elements to the circuit pattern, a lead frame blanked by stamping or the like is clamped by a molding die composed of upper and lower dies, and a transfer molding resin is injected into the inner cavity of the molding die, heated, and pressurized to cause a curing reaction to form a package.

[0004] Therefore, external terminals connected to an upper-level system such as a control system are prism-shaped, and are formed by protruding from the side surface of the package and bending upward or downward. Therefore, as in the system using press-fit terminals or the like widely used in a general housing-type power module disclosed in Figure 8 (a) of Non-Patent Document 1, it is difficult to cope with an installation method of pressing into a through hole of a printed circuit board (PCB) or the like in a molded package.

[0005] Non-Patent Document 1: Kotaro Ohara et al.: CIB type of industrial seventh-generation IGBT, Mitsubishi Electric Technical Report, 92. No. 3, 183-186 (2018).

[0006] In an existing molded package, since external terminals are formed by a molding die, the external terminals protrude from the side surface of the package in terms of structure, and the terminal shape also becomes prism-shaped and is bent upward or downward. Therefore, there is a problem that the external terminals cannot be freely arranged, and a special terminal shape such as a press-fit type cannot be adopted. Summary of the Invention

[0007] The present disclosure is made to solve the above problems, and an object thereof is to provide a semiconductor module that uses a molded package and can freely arrange external terminals and can also adopt a special terminal shape.

[0008] The semiconductor module of the present disclosure includes: a molded package that seals a semiconductor chip with transfer molding resin; and a package component that is mounted on package terminals protruding from a package side surface of the molded package. The package component has: a printed circuit board that is physically and electrically connected to the package terminals; and external terminals that are mounted on the printed circuit board and are electrically connected to the package terminals.

[0009] According to the semiconductor module of the present disclosure, a semiconductor module that utilizes a molded package and can freely arrange external terminals and can also adopt a special terminal shape can be obtained. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 It is a side view showing the structure of a normal molded package.

[0011] Figure 2 It is a side view showing the structure of the semiconductor module according to Embodiment 1 of the present disclosure.

[0012] Figure 3 It is a side view showing another structure of the semiconductor module according to Embodiment 1 of the present disclosure.

[0013] Figure 4 It is a side view showing the structure of the semiconductor module according to Embodiment 2 of the present disclosure.

[0014] Figure 5 It is a perspective view showing the structure of a modified example of the semiconductor module according to Embodiment 2 of the present disclosure.

[0015] Figure 6 It is a side view showing the structure of a modified example of the semiconductor module according to Embodiment 2 of the present disclosure.

[0016] Figure 7 It is a side view showing the structure of the semiconductor module according to Embodiment 3 of the present disclosure.

[0017] Figure 8 It is a side view showing another structure of the semiconductor module according to Embodiment 3 of the present disclosure.

[0018] Figure 9 It is a side view showing another structure of the semiconductor module according to Embodiment 3 of the present disclosure.

[0019] Figure 10 It is a perspective view showing a PCB used in the semiconductor module according to Embodiment 3 of the present disclosure.

[0020] Figure 11 It is a side view showing a usage example of the PCB used in the semiconductor module according to Embodiment 3 of the present disclosure.

[0021] Figure 12 is a side view showing the structure of the semiconductor module according to Embodiment 4 of the present disclosure.

[0022] Figure 13 is a side view showing the structure of the semiconductor module according to Embodiment 5 of the present disclosure.

[0023] Figure 14 is a side view showing the structure of the semiconductor module according to Embodiment 6 of the present disclosure.

[0024] Figure 15 is a side view showing another structure of the semiconductor module according to Embodiment 6 of the present disclosure.

[0025] Figure 16 is a side view showing the structure of the semiconductor module according to Embodiment 7 of the present disclosure.

[0026] Figure 17 is a side view showing another structure of the semiconductor module according to Embodiment 8 of the present disclosure.

[0027] Figure 18 is a perspective view showing an example of the semiconductor package used in the semiconductor module according to Embodiment 8 of the present disclosure.

[0028] Figure 19 is a perspective view showing the structure of the semiconductor module according to Embodiment 8 of the present disclosure.

[0029] Figure 20 is a side view showing the structure of the semiconductor module according to a modified example of Embodiment 8 of the present disclosure.

[0030] Description of reference numerals: 1, 13, 19... molded package; 2, 15... package terminal; 3... PCB; 5... press-fit terminal; 18... guide; 27... upper surface main terminal electrode; 28... lower surface main terminal electrode; 29... internal wiring of substrate; DB, DB1, D2, DBC... substrate. Detailed Description of the Invention

[0031] <First>

[0032] In the following description, the drawings are schematically shown, and the mutual relationships of the sizes and positions of the images respectively shown in different drawings are not necessarily accurately described, but can be appropriately changed. In addition, in the following description, the same reference numerals are given to the same components for illustration, and their names and functions are also the same. Therefore, the detailed description of them is sometimes omitted.

[0033] In addition, in the following description, terms such as "upper", "lower", "side", "surface", and "back surface" are sometimes used to represent specific positions and directions. However, these terms are used to facilitate understanding of the content of the embodiments and have no relation to the directions during actual implementation.

[0034] <Embodiment 1>

[0035] Figure 1 It is a side view showing the structure of the semiconductor package 1 as a normal molded package. The package terminals 2 protrude from the side surface of the package and are bent upward.

[0036] Figure 2 It is a side view showing the structure of the semiconductor module 100 according to Embodiment 1 of the present disclosure. As Figure 2 shown, in the semiconductor module 100, a package component 101 is mounted on the semiconductor package 1. The package component 101 is configured to include: a PCB 3 mounted on the package terminals 2 of the semiconductor package 1, a plurality of terminal blocks 4 mounted on the PCB 3, and press-fit terminals 5 as external terminals respectively connected to the terminal blocks 4.

[0037] The package component 101 inserts the package terminals 2 of the semiconductor package 1 into through holes (not shown) of the PCB 3 and is physically and electrically connected to a circuit pattern (not shown) provided on the surface of the PCB 3. Each terminal block 4 mounts a plurality of press-fit terminals 5 as external terminals, and the plurality of press-fit terminals 5 are electrically connected to the circuit pattern. In this way, even the package terminals 2 protruding from the side surface of the semiconductor package 1 can be effectively and inexpensively electrically connected to the press-fit terminals. Therefore, even when the system above the semiconductor module 100 corresponds to the press-fit terminals, the semiconductor module 100 can be connected.

[0038] In addition, the terminals that can be mounted on the PCB 3 are not limited to the press-fit terminals, and terminals such as cylindrical terminals, spring terminals, and connectors can also be corresponded. Therefore, even when the system above the semiconductor module 100 corresponds to terminals other than the press-fit terminals, the semiconductor module 100 can be connected.

[0039] In addition, in Figure 2 the shown PCB 3, the terminal blocks 4 are provided at positions inside the position where the package terminals 2 are inserted and protrude. The plurality of press-fit terminals 5 can be freely arranged without affecting the arrangement positions of the package terminals 2.

[0040] In addition, in Figure 3In the PCB 3 of the semiconductor module 100A shown, a terminal block 4 is provided outside the position where the package body terminals 2 are inserted and protrude. Therefore, even when the semiconductor package 1 is small, by using the package assembly 101, the degree of freedom can be increased. By leaving a margin in the terminal pitch, the layout of the circuit pattern becomes easy, so it can be applied even in industrial fields restricted by the upper system. Therefore, in industrial equipment that uses a general housing-type power module as disclosed in Figure 8 (a) of Non-Patent Document 1, the semiconductor modules 100 and 100A can also be used.

[0041] In addition, since it is not necessary to match the upper system to design the terminal positions of the semiconductor package 1 and increase the semiconductor package 1, the material cost of the semiconductor package 1 can be suppressed, and the productivity can also be improved.

[0042] <Embodiment 2>

[0043] Figure 4 is a side view showing the structure of the semiconductor module 200 according to Embodiment 2 of the present disclosure. As Figure 4 shown, in the semiconductor module 200, a package assembly 201 is mounted on the semiconductor package 1. The package assembly 201 has high functionality by mounting electronic components 6 such as capacitors and resistors on the PCB 3, is mounted on the package body terminals 2, and is fixed to the semiconductor package 1 by an adhesive 7 or the like.

[0044] Therefore, the rigidity of the PCB 3 can be improved, deformation caused by heat and external stress can be suppressed, the insertion and extraction characteristics required for the press-fit terminals 5 can be improved, and the reliability of the mounted electronic components 6 can be improved.

[0045] In addition, a recess 8 is provided on the upper surface of the semiconductor package 1 facing the PCB 3. The PCB 3 is a two-sided mounting substrate with electronic components 6 mounted on the upper and lower surfaces, and the package body is configured such that when the PCB 3 is mounted, the electronic components 6 on the lower surface can be accommodated in the recess 8.

[0046] Therefore, when the semiconductor package 1 is small, by using the two-sided mounting PCB 3, the electronic components 6 can be efficiently laid out, and the overall size including the package assembly 201 can be reduced compared to the case of using a single-sided mounting PCB 3. In addition, a circuit based on the PCB 3 can be formed, the components of the existing product can be integrated, and the product can be miniaturized more effectively.

[0047] <Modification Example>

[0048] Figure 5It is a perspective view showing the structure of the semiconductor module 200A which is a modified example of Embodiment 2 of the present disclosure. Figure 6 It is a side view of the semiconductor module 200A observed from the long side. As Figure 5 and Figure 6 shown, the similarities between the semiconductor module 200A and the semiconductor module 200 are as follows: Electronic components 6 such as capacitors and resistors are mounted on the PCB 3, but by mounting a plurality of semiconductor packages 1 on the substrate 10 and connecting the substrate 10 and the PCB 3 via a plurality of fixing tables 12 provided on the substrate 10, the rigidity of the PCB 3 is improved.

[0049] The fixing table 12 and the PCB 3 are joined by fixing screws 11 that penetrate the PCB 3. The package terminals 2 of each semiconductor package 1 are inserted into through holes (not shown) of the PCB 3 and are physically and electrically connected to circuit patterns (not shown) provided on the surface of the PCB 3, and the front ends protrude from the surface of the PCB 3. In addition, Figure 5 a plurality of terminal boards 9 are also provided, but the description thereof is omitted.

[0050] By mounting a plurality of semiconductor packages 1 on the substrate 10 and connecting them via the PCB 3, the terminal positions of each semiconductor package 1 are not affected by the mounting accuracy of each semiconductor package 1, and common signals are connected to each other within the PCB 3, enabling integration of the terminal board 9.

[0051] In addition, Figure 5 and Figure 6 show the structure in which a plurality of semiconductor packages 1 are mounted on the substrate 10, but it can also be a structure in which each package terminal 2 is only mounted on the PCB 3 without being mounted on the substrate 10.

[0052] <Embodiment 3>

[0053] Figure 7 It is a side view showing the structure of the semiconductor module 300 of Embodiment 3 of the present disclosure. As Figure 7 shown, in the semiconductor module 300, a package component 301 is mounted on the surface-mounted semiconductor package 13. For the package component 301, the mounting terminals 15 of the semiconductor package 13 are physically and electrically connected to circuit patterns (not shown) on the lower surface of the surface-mounted PCB 3 by soldering or the like. The structure of the other PCB 3 is the same as that of the PCB 3 Figure 1 shown.

[0054] In addition, Figure 7 shows the surface-mounted PCB 3, but a through-hole-mounted PCB 3 can also be used. Figure 8 It is a side view showing the structure of the semiconductor module 300A. As Figure 8As shown, in semiconductor module 300A, surface-mounted semiconductor package 13 is mounted on package component 302. For package component 302, mounting terminals 15 of semiconductor package 13 are physically and electrically connected to an unillustrated circuit pattern on the upper surface of surface-mounted PCB 3 by soldering or the like.

[0055] In addition, as Figure 9 shown, double-sided mounting type PCB 3 can also be used, and surface-mounted semiconductor packages 13 and 14 can be mounted on the upper surface and the lower surface of double-sided mounting type PCB 3 respectively. Semiconductor package 14 is, for example, an inverted-bent semiconductor package. By mounting semiconductor packages 13 and 14, a parallel circuit can be formed, and the power capacity of the semiconductor device can be increased with less space.

[0056] In addition, the shape of PCB 3 substrate can be deformed to match the product. In the case where semiconductor package 1A is small, a PCB 3 substrate having U-shaped cutouts provided on opposite sides can be used.

[0057] Figure 10 is a perspective view of PCB 16 having U-shaped cutout portions 161 provided on opposite sides, Figure 11 is a side view showing a state in which PCB 16 with semiconductor package 13 mounted on the lower surface is mounted on heat sink 10a, and heat sink 10a and PCB 16 are joined by fixing screws 11. Fixing screws 11 join heat sink 10a and PCB 16 via cutout portion 161 of PCB 16. By joining both with fixing screws 11, the joining of semiconductor package 13 and heat sink 10a can be performed efficiently.

[0058] <Embodiment 4>

[0059] Figure 12 is a side view showing the structure of semiconductor module 400 according to Embodiment 4 of the present disclosure. As Figure 12 shown, in semiconductor module 400, package component 401 is mounted on surface-mounted semiconductor package 13. For package component 401, mounting terminals 15 of semiconductor package 13 are physically and electrically connected to an unillustrated circuit pattern on the lower surface of lower surface-mounted PCB 3 by soldering or the like, and the terminal portions are sealed with resin 17 such as direct pour (DP) resin or underfill material.

[0060] Direct pour resin is a resin used for resin-sealing a power semiconductor chip, and for example, epoxy resin can be used.

[0061] The underfill material is an epoxy resin with low viscosity and containing fine fillers with a particle size of about several μm. Due to capillary action, it also enters narrow gaps and cures, thus contributing to insulation and fixing between components.

[0062] In this way, by using the DP resin or the underfill material to seal the terminal portion, it is possible to ensure the creepage along the surface between the terminals of the semiconductor package 13 and ensure space insulation. In addition, it is possible to prevent dust and the like from adhering to the terminals and improve reliability.

[0063] <Embodiment 5>

[0064] Figure 13 It is a side view showing the structure of the semiconductor module 500 according to Embodiment 5 of the present disclosure. As Figure 13 shown, in the semiconductor module 500, a package component 501 is mounted on the surface-mounted semiconductor package 13. For the package component 501, the mounting terminals 15 of the semiconductor package 13 are physically and electrically connected to a circuit pattern (not shown) on the lower surface of the bottom surface-mounted PCB 3 by soldering or the like, and a housing-shaped guide member 18 is provided so as to house the semiconductor package 13. A resin 17 such as DP resin or underfill material is sealed inside the guide member 18, and the semiconductor package 13 is resin-sealed including the terminal portion.

[0065] Thereby, even when it is impossible to ensure the creepage distance due to miniaturization of the package, insulation between the terminals can be ensured by the resin 17.

[0066] That is, in a molded package, since a voltage close to the breakdown voltage is applied between the main electrodes, it is necessary to take a creepage distance between the terminals and the mounted substrate. However, by covering with DP resin or the like, the creepage can be eliminated. Therefore, even when the entire molded package is miniaturized and the distance between the terminals in the semiconductor package alone is narrowed to the extent that the creepage distance cannot be ensured, covering with DP resin or the like can maintain insulation between the terminals.

[0067] <Embodiment 6>

[0068] Figure 14 It is a side view showing the structure of the semiconductor module 600 according to Embodiment 6 of the present disclosure. As Figure 14 shown, in the semiconductor module 600, a package component 601 is mounted on the surface-mounted non-insulated semiconductor package 19.

[0069] The non-insulated semiconductor package 19 is, for example, a package in which conductor components such as die pads and heat sinks for mounting semiconductor chips are directly exposed on the back surface of the package. On the back surface, conductor components such as Cu are exposed and can be joined to the substrate through solder for electrical conduction, silver (Ag), or Cu sintering, etc.

[0070] In Figure 14 the back surface of the non-insulated semiconductor package 19 is joined to a Cu pattern 20 provided on the upper surface of a DBC (Direct Bonded Copper) substrate DB that functions as an insulating substrate via a joining member 22 such as solder, Ag, or Cu sintering. The DBC substrate DB is composed of a ceramic substrate 21 that functions as an insulating layer, a Cu pattern 20 provided on the upper surface of the ceramic substrate 21, and a heat sink 23 on which the ceramic substrate 21 is mounted. The Cu pattern 20 is arranged such that the portion joined to the non-insulated semiconductor package 19 and the portion that physically and electrically connects the mounting terminals 15 through welding, etc. are electrically separated.

[0071] The package assembly 601 is provided with a housing-shaped guide member 18 in such a manner that an unillustrated conductor component exposed on the back surface of the non-insulated semiconductor package 19 is physically and electrically connected to the Cu pattern 20 on the upper surface of the DBC substrate DB through welding, etc., and the non-insulated semiconductor package 19 is housed. A resin 17 such as a DP resin or underfill material is sealed inside the guide member 18, and the non-insulated semiconductor package 19 is resin-sealed including the terminal portion.

[0072] Thereby, even when the creepage distance cannot be ensured due to miniaturization of the package, the insulation between terminals can be ensured by the resin 17.

[0073] As a package assembly applied to the non-insulated semiconductor package 19, the package assembly 602 shown in Figure 15 can also be adopted. In Figure 15 the back surface of the non-insulated semiconductor package 19 is joined to a Cu pattern 20 provided on the upper surface of a DBC substrate DB1 via a joining member 22. The DBC substrate DB1 is composed of a ceramic substrate 21 and Cu patterns 20 provided on the upper surface and the lower surface of the ceramic substrate 21. The Cu pattern 20 on the upper surface is arranged such that the portion joined to the non-insulated semiconductor package 19 and the portion that physically and electrically connects the mounting terminals 15 through welding, etc. are electrically separated.

[0074] The encapsulation component 602 is physically and electrically connected to the Cu pattern 20 on the upper surface of the DBC substrate DB1 by welding or the like with a conductor component (not shown) exposed on the back surface of the non-insulated semiconductor package 19, and a housing-shaped guide member 18 is provided in a manner of housing the non-insulated semiconductor package 19. Resin 17 is sealed inside the guide member 18, and the non-insulated semiconductor package 19 including the terminal portion is resin-sealed.

[0075] <Embodiment 7>

[0076] Figure 16 It is a side view showing the structure of the semiconductor module 700 according to Embodiment 7 of the present disclosure. As Figure 16 shown, in the semiconductor module 700, an encapsulation component 701 is mounted on the surface-mounted semiconductor package 13. The encapsulation component 701 is joined to the upper surface of the heat sink 23 of the DBC substrate DB2 via a heat-dissipating joining member 24 such as a highly heat-dissipating adhesive resin or adhesive sheet at the back surface of the semiconductor package 13, and a housing-shaped guide member 18 is provided in a manner of housing the semiconductor package 13. Resin 17 such as DP resin or underfill material is sealed inside the guide member 18, and the non-insulated semiconductor package 19 including the terminal portion is resin-sealed.

[0077] Thereby, even when the creepage distance cannot be ensured due to miniaturization of the package, insulation between terminals can be ensured by the resin 17.

[0078] The DBC substrate DB2 is composed of a ceramic substrate 21 that functions as an insulating layer, a Cu pattern 20 provided on the upper surface of the ceramic substrate 21, and a heat sink 23. The ceramic substrate 21 is provided at a position corresponding to the lower part of the Cu pattern 20 to which the terminal 15 is physically and electrically connected by welding or the like.

[0079] <Embodiment 8>

[0080] Figure 17 It is a side view showing the structure of the semiconductor module 800 according to Embodiment 8 of the present disclosure. As Figure 17 shown, in the semiconductor module 800, the main current terminals 26 of the high-current semiconductor package 25 are mounted on the PCB3. In addition, the package terminals 2 of the semiconductor package 25 are also mounted on the PCB3, but illustration is omitted.

[0081] The package component 801 is configured to include a PCB 3, a plurality of terminal blocks 4 mounted on the PCB 3, press-fit terminals 5 respectively connected to the terminal blocks 4, an upper surface main terminal electrode 27 provided on the upper surface of the PCB 3, a lower surface main terminal electrode 28 provided on the lower surface of the PCB 3, and an internal wiring 29 in the substrate. The upper surface main terminal electrode 27 and the lower surface main terminal electrode 28 are electrically connected to each other via the internal wiring 29 in the substrate.

[0082] The main current terminal 26 protruding from the side surface of the semiconductor package 25 is physically and electrically connected to the lower surface main terminal electrode 28 by welding or the like.

[0083] Figure 18 It is a perspective view showing a structural example of the semiconductor package 25. As Figure 18 shown, the main current terminal 26 and the package terminal 2 protrude from the opposite side surfaces of the semiconductor package 25 and are bent to be parallel to the side surface of the package. The main current terminal 26 is further bent in a direction perpendicular to the side surface of the package.

[0084] Figure 19 It is a perspective view showing the structure of the semiconductor module 800. As Figure 19 shown, in the semiconductor module 800, by mounting electronic components 6 such as capacitors and resistors on the PCB 3, mounting a plurality of semiconductor packages 25 (not shown) on the substrate 10, and connecting the substrate 10 and the PCB 3 via a plurality of fixing tables 12 provided on the substrate 10, the rigidity of the PCB 3 is improved. The fixing table 12 and the PCB 3 are joined by fixing screws 11 passing through the PCB 3. The package terminals 2 of each semiconductor package 25 are inserted into through holes (not shown) of the PCB 3 and are physically and electrically connected to a circuit pattern (not shown) provided on the surface of the PCB 3, and the front ends protrude from the surface of the PCB 3.

[0085] On the upper surface of the PCB 3 and at a position outside the press-fit terminals 5, a plurality of upper surface main terminal electrodes 27 are arranged along two long sides of the PCB 3. In addition, the plurality of upper surface main terminal electrodes 27 arranged along one long side and the plurality of upper surface main terminal electrodes 27 arranged along the other long side are different in function, but are less related to the present disclosure, and thus the description thereof is omitted.

[0086] The plurality of upper surface main terminal electrodes 27 provided on the upper surface of the PCB 3 can be freely arranged, and the semiconductor package 25 can be connected to the upper system without matching the upper system of the semiconductor module 800 by changing the terminal configuration of the semiconductor package 25.

[0087] <Modification Example>

[0088] Figure 20FIG. 0 is a side view showing the structure of a semiconductor module 800A which is a modification of Embodiment 8 of the present disclosure. Only the PCB 3 is shown in a cross-sectional view. As Figure 20 shown, in the semiconductor module 800A, the package assembly 802 is configured to include: a PCB 3, a plurality of terminal blocks 4 mounted on the PCB 3, press-fit terminals 5 respectively connected to the terminal blocks 4, upper surface main terminal electrodes 27 and 27a provided on the upper surface of the PCB 3, lower surface main terminal electrodes 28 and 28a provided on the lower surface of the PCB 3, and in-substrate wirings 29 and 29a. The upper surface main terminal electrode 27 and the lower surface main terminal electrode 28 are electrically connected to each other via the in-substrate wiring 29, and the upper surface main terminal electrode 27a and the lower surface main terminal electrode 28a are electrically connected to each other via the in-substrate wiring 29a. The upper surface main terminal electrode 27 and the lower surface main terminal electrode 28 are arranged on opposite sides of each other with the semiconductor package 25 interposed therebetween, and the upper surface main terminal electrode 27a and the lower surface main terminal electrode 28a are arranged on opposite sides of each other with the semiconductor package 25 interposed therebetween. Therefore, the directions of the currents flowing in the in-substrate wirings 29 and 29a are opposite to each other. In addition, Figure 20 FIG. shows a structure in which the main current terminal 26 protrudes from two side surfaces of one semiconductor package 25, but it is also possible to arrange two semiconductor packages 25 such that the main current terminals 26 protrude from one side surface of each in opposite directions.

[0089] The main current terminal 26 protruding from one side surface of the semiconductor package 25 is physically and electrically connected to the lower surface main terminal electrode 28 by welding or the like, and the main current terminal 26 protruding from the other side surface of the semiconductor package 25 is physically and electrically connected to the lower surface main terminal electrode 28a by welding or the like.

[0090] The in-substrate wirings 29 and 29a are stacked and arranged in a manner of being parallel flat plates in the substrate, and the directions of the currents flowing respectively are opposite to each other, so that reduction of inductance and reduction of noise can be achieved.

[0091] In addition, within the scope of the present disclosure, the embodiments can be freely combined with each other, or each embodiment can be appropriately modified or omitted.

[0092] The present disclosure described above is collectively described as an appended note.

[0093] (Appended Note 1)

[0094] A semiconductor module, comprising:

[0095] a molded package which seals a semiconductor chip with a transfer molding resin; and

[0096] A package component is installed on package terminals protruding from a package side surface of the molded package.

[0097] The package component has:

[0098] A printed circuit board that is physically and electrically connected to the package terminals; and

[0099] External terminals that are installed on the printed circuit board and are electrically connected to the package terminals.

[0100] (Supplementary Note 2)

[0101] In the semiconductor module described in Supplementary Note 1,

[0102] The external terminals are installed at a position closer to the center of the molded package than the package side surface.

[0103] (Supplementary Note 3)

[0104] In the semiconductor module described in Supplementary Note 1,

[0105] The external terminals are installed at a position farther from the center of the molded package than the package side surface.

[0106] (Supplementary Note 4)

[0107] In the semiconductor module described in Supplementary Note 1,

[0108] The printed circuit board is bonded to the surface of the molded package.

[0109] (Supplementary Note 5)

[0110] In the semiconductor module described in Supplementary Note 1,

[0111] Electronic components are installed on the printed circuit board.

[0112] (Supplementary Note 6)

[0113] In the semiconductor module described in Supplementary Note 5,

[0114] For the printed circuit board, the electronic components are installed on both sides of the board.

[0115] (Supplementary Note 7)

[0116] In the semiconductor module described in Supplementary Note 1,

[0117] The molded package is a plurality of molded packages,

[0118] The printed circuit board is physically and electrically connected to the package terminals of each of the plurality of molded packages.

[0119] (Supplementary Note 8)

[0120] In the semiconductor module described in Supplementary Note 1,

[0121] the molded package is a surface-mounted molded package.

[0122] (Supplementary Note 9)

[0123] In the semiconductor module described in Supplementary Note 8,

[0124] For the printed circuit board, the surface-mounted molded package is mounted on both sides of the board.

[0125] (Supplementary Note 10)

[0126] In the semiconductor module described in Supplementary Note 8,

[0127] For the surface-mounted molded package, the package terminals are resin-sealed.

[0128] (Supplementary Note 11)

[0129] In the semiconductor module described in Supplementary Note 8,

[0130] The package assembly further has a housing-shaped guide for accommodating the surface-mounted molded package,

[0131] Resin is sealed within the guide, and the surface-mounted molded package including the package terminals is sealed.

[0132] (Supplementary Note 12)

[0133] In the semiconductor module described in Supplementary Note 8,

[0134] The printed circuit board further has:

[0135] A first main terminal electrode that is physically and electrically connected to a main current terminal that protrudes from a side surface of the surface-mounted molded package and through which a main current flows, and is provided on a first surface of the printed circuit board;

[0136] A second main terminal electrode that is provided on a second surface of the printed circuit board on a side opposite to the first surface; and

[0137] Inner board wirings that are provided inside the printed circuit board and electrically connect the first main terminal electrode and the second main terminal electrode.

[0138] (Supplementary Note 13)

[0139] In the semiconductor module described in Supplementary Note 12,

[0140] The internal wirings in the substrate are stacked and arranged in such a manner that they form parallel plates with other internal wirings in the printed circuit board.

[0141] (Supplementary Note 14)

[0142] A semiconductor module, comprising:

[0143] A molded package that seals a semiconductor chip with transfer molding resin; and

[0144] A package component that is mounted on package terminals protruding from the side surface of the package of the molded package,

[0145] The molded package is a non-insulated semiconductor package in which a conductor component carrying the semiconductor chip is exposed from the surface,

[0146] The package component has:

[0147] An insulating substrate that physically and electrically connects to the conductor component of the non-insulated semiconductor package; and

[0148] External terminals that are mounted on the insulating substrate and electrically connected to the package terminals.

[0149] (Supplementary Note 15)

[0150] A semiconductor module, comprising:

[0151] A molded package that seals a semiconductor chip with transfer molding resin; and

[0152] A package component that is mounted on package terminals protruding from the side surface of the package of the molded package,

[0153] The package component has:

[0154] An insulating substrate that physically connects to the surface of the molded package; and

[0155] External terminals that are mounted on the insulating substrate and electrically connected to the package terminals.

Claims

1. A semiconductor module, characterized in that: have: A molded package in which a semiconductor chip is sealed with a transfer molding resin; and a package component mounted on a package terminal protruding from a package side surface of the molded package, The package assembly comprises: a printed circuit substrate physically and electrically connected to the package terminals; and The external terminal is mounted on the printed circuit board and is electrically connected to the package terminal.

2. The semiconductor module according to claim 1, characterized in that The external terminal is mounted at a position closer to the center of the molded package than the side surface of the package.

3. The semiconductor module according to claim 1, characterized in that The external terminal is mounted at a position farther from the center of the molded package than the side surface of the package.

4. The semiconductor module according to claim 1, characterized in that The printed circuit substrate is bonded to the surface of the molded package.

5. The semiconductor module according to claim 1, characterized in that The printed circuit board has electronic components mounted thereon.

6. The semiconductor module according to claim 5, characterized in that In the printed circuit board, the electronic components are mounted on both surfaces of the board.

7. The semiconductor module according to claim 1, characterized in that The molded package is a plurality of molded packages, The printed circuit substrate is physically and electrically connected to the package terminals of each of the plurality of molded packages.

8. The semiconductor module according to claim 1, characterized in that The molded package is a surface mount type molded package.

9. The semiconductor module according to claim 8, characterized in that In the printed circuit board, the surface-mounted molded package is mounted on both surfaces of the board.

10. The semiconductor module according to claim 8, characterized in that In the surface mount molded package, the package terminals are sealed with resin.

11. The semiconductor module according to claim 8, characterized in that The package assembly further includes a housing-shaped guide for accommodating the surface-mounted molded package. Resin is sealed in the lead, and the surface mount molded package including the package terminals is sealed.

12. The semiconductor module according to claim 8, characterized in that The printed circuit substrate also has: A first main terminal electrode, which is physically and electrically connected to a main current terminal protruding from a side surface of the package of the surface-mounted molded package and through which a main current flows, and is provided on a first surface of the printed circuit board; a second main terminal electrode disposed on a second surface of the printed circuit substrate opposite to the first surface; and The intra-substrate wiring is provided inside the printed circuit substrate and electrically connects the first main terminal electrode and the second main terminal electrode.

13. The semiconductor module according to claim 12, characterized in that The intra-substrate wiring is arranged in a stacked manner inside the printed circuit board so as to form parallel plates with other intra-substrate wirings.

14. A semiconductor module, characterized in that: have: A molded package in which a semiconductor chip is sealed with a transfer molding resin; and a package component mounted on a package terminal protruding from a package side surface of the molded package, The molded package is a non-insulated semiconductor package in which the conductor part of the semiconductor chip is exposed from the surface. The package assembly comprises: an insulating substrate for physically and electrically connecting the conductor components of the non-insulating semiconductor package; and The external terminal is mounted on the insulating substrate and is electrically connected to the package terminal.

15. A semiconductor module, characterized in that: have: A molded package in which a semiconductor chip is sealed with a transfer molding resin; and a package component mounted on a package terminal protruding from a package side surface of the molded package, The package assembly comprises: an insulating substrate physically connected to a surface of the molded package; and The external terminal is mounted on the insulating substrate and is electrically connected to the package terminal.

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