Reverse connection prevention and short circuit protection circuit applied to high-side power supply output
By designing anti-reverse circuits and short-circuit protection circuits, the existing high-side output circuits have been solved, and the problem of insufficient anti-reverse and short-circuit protection in high voltage and high current applications is achieved, and the power output with low power consumption and high stability is ensured, ensuring the safety of the system and MOS tubes.
Patent Information
- Application Number
- CN202510432948.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-08
- Publication Date
- 2025-06-24
AI Technical Summary
The existing high-side output circuits have problems with insufficient protection against reverse connection and short circuit in high voltage and high current applications, which poses a threat to system stability and MOS tube safety.
A high-side power supply output circuit including an anti-reverse circuit and a short-circuit protection circuit is designed. The anti-reverse circuit consisting of the third MOS tube Q3, the seventh resistor R7 and the bootstrap circuit, and the short-circuit protection circuit consisting of the first MOS tube Q1, the second MOS tube Q2 and the resistor are designed to effectively prevent reverse and short-circuit while achieving low on-voltage drop and low power consumption.
The circuit maintains stable operation under high current conditions, effectively prevents reverse connection and short circuit, reduces system power consumption, ensures the safety and reliability of MOS tubes and power supply systems, and is suitable for high-side output, high-current, and high-voltage load applications.
Smart Images
Figure CN120200201A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of electronic information technology, and in particular to a high-side power output reverse connection prevention and short-circuit protection circuit. Background Art
[0002] Existing high-side output circuits mainly include the following forms: integrated chips with protection functions, diode parallel reverse connection prevention circuits, NMOS bootstrap control high-side output reverse connection prevention circuits, etc. Among them, integrated chips are generally applied to low-voltage and small-current occasions, and the latter two circuit forms are mostly used in high-voltage and large-current occasions.
[0003] Using an integrated chip as a high-side output, the circuit is simple and the protection measures are complete. However, when an integrated chip is used as a high-side output, it generally supports a relatively low input voltage and a small current, and is not suitable for high-voltage and large-current application occasions.
[0004] Although the diode reverse connection prevention circuit has a low cost, it has a large voltage drop and high power consumption, and is only suitable for small-current load applications and not for large-current application scenarios.
[0005] For the NMOS bootstrap control output reverse connection prevention circuit, although it has a reverse connection prevention function, when the power is turned on, it will directly output through the NMOS body diode. If the load is short-circuited at this time or during use, the power supply will be directly short-circuited and pulled down, causing a large current to pass through the MOS tube, which may lead to damage and thus affect the stability of the entire system operation. Summary of the Invention
[0006] Therefore, the present invention provides a high-side power output reverse connection prevention and short-circuit protection circuit, which has a small on-state voltage drop, low system power consumption, and can effectively prevent reverse connection and short-circuit protection, and is suitable for high-side output large-current and high-voltage load applications.
[0007] To solve the above technical problems, the present invention provides a high-side power output reverse connection prevention and short-circuit protection circuit, including a reverse connection prevention circuit and a short-circuit protection circuit; The reverse connection prevention circuit includes: a seventh resistor R7, a third MOS transistor Q3, and a bootstrap circuit; wherein: The source of the third MOS transistor Q3 is connected to the input power supply VIN; One end of the seventh resistor R7 is connected to the gate of the third MOS transistor Q3, and the other end of the seventh resistor R7 is connected to the bootstrap circuit; The short-circuit protection circuit unit includes: a first MOS transistor Q1, a second MOS transistor Q2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, and a fifth resistor R5; wherein: The source of the second MOS transistor Q2 is connected to the drain of the third MOS transistor Q3, and the drain of the second MOS transistor Q2 is an output pin and is connected to an external load; Both ends of the fourth resistor R4 are respectively connected to the source and the drain of the second MOS transistor Q2; Both ends of the fifth resistor R5 are respectively connected to the gate and the source of the second MOS transistor Q2; One end of the second resistor R2 is connected to the gate of the second MOS transistor Q2, and the other end is connected to the drain of the first MOS transistor Q1; One end of the first resistor R1 is connected to the gate of the first MOS transistor Q1, and the other end is connected to the ground terminal GND; The source of the first MOS transistor Q1 is connected to the ground terminal GND; One end of the third resistor R3 is connected to the gate of the first MOS transistor Q1, and the other end is connected to the drain of the second MOS transistor Q2.
[0008] In an embodiment of the present invention, a soft-start circuit is further included. The soft-start circuit includes a first capacitor C1, and both ends of the first capacitor C1 are respectively connected to the gate and the source of the third MOS transistor Q3.
[0009] In an embodiment of the present invention, the first capacitor C1 is a ceramic capacitor.
[0010] In an embodiment of the present invention, the first MOS transistor Q1 is an NMOS.
[0011] In an embodiment of the present invention, the second MOS transistor Q2 is a PMOS.
[0012] In an embodiment of the present invention, the third MOS transistor Q3 is an NMOS.
[0013] The above technical solution of the present invention has the following advantages compared with the prior art: An anti-reverse connection and short-circuit protection circuit applied to high-side power output according to the present invention effectively overcomes the disadvantages of high voltage drop and high power consumption of diodes in the prior art, as well as the disadvantage of the working stability of the system power supply caused by the direct output of the NMOS bootstrap control due to load short circuit. By setting a short-circuit protection circuit composed of a first MOS transistor Q1, a second MOS transistor Q2, and a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, and a fifth resistor R5, it can effectively reduce the system power consumption while when the output terminal load is short-circuited, the short-circuit protection circuit can effectively disconnect the output to protect the stability of the system power supply and the safety and reliability of the MOS itself, meeting the requirements of high-side output and other high-power loads; under the guarantee of multiple protection measures such as anti-reverse connection and short-circuit protection, the safety of the circuit and equipment can be ensured even under abnormal working conditions; when the load is short-circuited due to an abnormality, the power supply short circuit can be effectively prevented.
[0014] The present invention sets an anti-reverse connection circuit and a soft-start circuit. The anti-reverse connection circuit is composed of a third MOS transistor Q3, a seventh resistor R7, and a bootstrap circuit. At the initial stage of power-on, the input power supply VIN is directly output through the body diode, and the third MOS transistor Q3 is not conducting. When the voltage output by the bootstrap circuit is fully charged through a first capacitor C1, a voltage difference is formed between the gate and source of the third MOS transistor Q3, and the third MOS transistor Q3 starts to conduct, forming a low on-resistance path. The power loss during the current conduction process is extremely small, thus realizing the low-power operation of the entire system. The low on-resistance enables the circuit to still operate stably under high-current conditions and will not cause additional power consumption and heat accumulation due to excessive voltage drop.
[0015] When the drain output voltage of the third MOS transistor Q3 is applied to the source of the second MOS transistor Q2 in the present invention, this voltage forms a loop through the fourth resistor R4, the third resistor R3, and the first resistor R1, and a voltage is established at the source of the first MOS transistor Q1 to drive the first MOS transistor Q1 to conduct. After conduction, the second resistor R2 and the fifth resistor R5 divide the voltage, and thus a voltage difference is formed between the gate and source of the second MOS transistor Q2 to conduct and output. When the load is short-circuited, this circuit cuts off the output to protect the MOS from damage and the stability of the power supply system. In the case of reverse connection of the anti-reverse connection circuit, since an effective gate-source voltage cannot be formed, the third MOS transistor Q3 remains in the off state, thereby preventing the current from forming a loop and avoiding device damage caused by reverse connection.
[0016] When the output terminal VOUT has a short-circuit fault in this circuit, the drain potential of the second MOS transistor Q2 is pulled down to the ground terminal. As a result, the driving voltage of the first MOS transistor Q1 disappears, there is no voltage difference between the gate and source of the second MOS transistor Q2, the second MOS transistor Q2 quickly turns off, and the abnormal current disappears, effectively preventing the instantaneous large current from impacting the MOS transistor and the system power supply, causing system instability and device damage. Description of the Drawings
[0017] In order to make the content of the present invention easier to be clearly understood, the following further details the present invention according to specific embodiments of the present invention in conjunction with the accompanying drawings.
[0018] Figure 1 It is a schematic structural diagram of the present invention applied to a high-side power output reverse connection prevention and short-circuit protection circuit. Specific embodiments
[0019] The following further describes the present invention in conjunction with the accompanying drawings and specific embodiments, so that those skilled in the art can better understand the present invention and be able to implement it, but the embodiments cited do not limit the present invention.
[0020] In the present invention, when directions (up, down, left, right, front, and back) are described, it is only for the convenience of describing the technical solution of the present invention, rather than indicating or implying that the technical features referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present invention.
[0021] In the present invention, the meaning of "several" is one or more, the meaning of "multiple" is two or more, and "greater than", "less than", "exceeding", etc. are understood not to include the present number; "above", "below", "within", etc. are understood to include the present number. In the description of the present invention, if "first" and "second" are described, they are only for the purpose of distinguishing technical features and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features or implicitly indicating the sequence relationship of the indicated technical features.
[0022] In the present invention, unless otherwise clearly defined, terms such as "set", "installed", "connected", etc. should be understood in a broad sense. For example, they can be directly connected, or indirectly connected through an intermediate medium; they can be fixedly connected, or detachably connected, or integrally formed; they can be mechanically connected, or electrically connected or capable of communicating with each other; they can be the communication inside two components or the interaction relationship between two components. Those skilled in the art can reasonably determine the specific meaning of the above terms in the present invention in combination with the specific content of the technical solution.
[0023] Referring to Figure 1 As shown, an application of the present invention to a high-side power output reverse connection prevention and short-circuit protection circuit includes a reverse connection prevention circuit and a short-circuit protection circuit; The reverse connection prevention circuit includes: a seventh resistor R7, a third MOS transistor Q3, and a bootstrap circuit; wherein: The source of the third MOS transistor Q3 is connected to the input power supply VIN; One end of the seventh resistor R7 is connected to the gate of the third MOS transistor Q3, and the other end of the seventh resistor R7 is connected to the bootstrap circuit; The short - circuit protection circuit unit includes: a first MOS transistor Q1, a second MOS transistor Q2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, and a fifth resistor R5; where: The source of the second MOS transistor Q2 is connected to the drain of the third MOS transistor Q3, and the drain of the second MOS transistor Q2 is an output pin and is connected to an external load; Both ends of the fourth resistor R4 are respectively connected to the source and the drain of the second MOS transistor Q2; Both ends of the fifth resistor R5 are respectively connected to the gate and the source of the second MOS transistor Q2; One end of the second resistor R2 is connected to the gate of the second MOS transistor Q2, and the other end is connected to the drain of the first MOS transistor Q1; One end of the first resistor R1 is connected to the gate of the first MOS transistor Q1, and the other end is connected to the ground terminal GND; The source of the first MOS transistor Q1 is connected to the ground terminal GND; One end of the third resistor R3 is connected to the gate of the first MOS transistor Q1, and the other end is connected to the drain of the second MOS transistor Q2.
[0024] In one embodiment, a soft - start circuit is further included. The soft - start circuit includes a first capacitor C1. Both ends of the first capacitor C1 are respectively connected to the gate and the source of the third MOS transistor Q3. Optionally, the first capacitor C1 is a ceramic capacitor. It can effectively suppress noise and voltage fluctuations, improve the overall anti - interference performance of the system, and prevent the third MOS transistor Q3 from turning on too fast and causing output oscillation.
[0025] In addition, it can be understood that the bootstrap circuit, also known as a boost circuit, uses electronic components such as a bootstrap boost diode and a bootstrap boost capacitor to superimpose the capacitor discharge voltage and the power supply voltage, thereby increasing the voltage. In some circuits, the increased voltage can reach several times the power supply voltage.
[0026] It should be noted that by setting the short - circuit protection circuit composed of the first MOS transistor Q1, the second MOS transistor Q2, and the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, and the fifth resistor R5, while effectively reducing the system power consumption, when the output - side load is short - circuited, the short - circuit protection circuit can effectively disconnect to protect the stability of the system power supply and the safety and reliability of the MOS itself, meeting the requirements of high - side output and other high - power loads; with the guarantee of multiple protection measures such as reverse - connection prevention and short - circuit protection, the safety of the circuit and equipment can be ensured even under abnormal working conditions; when the load is short - circuited due to an abnormality, it can effectively prevent the power supply from being short - circuited.
[0027] By setting up an anti-reverse connection circuit and a soft-start circuit, the anti-reverse connection circuit is composed of the third MOS transistor Q3, the seventh resistor R7 and a bootstrap circuit. At the initial stage of power-on, the input power supply VIN directly outputs through the body diode. The third MOS transistor Q3 is not conducting. When the voltage output by the bootstrap circuit charges the first capacitor C1, a voltage difference is formed between the gate and the source of the third MOS transistor Q3, and the third MOS transistor Q3 starts to conduct, forming a low on-resistance path. The power loss during the current conduction process is extremely small, thus realizing the low-power operation of the entire system. The low on-resistance enables the circuit to still operate stably under high-current conditions without causing additional power consumption and heat accumulation due to excessive voltage drop.
[0028] In one embodiment, the first MOS transistor Q1 is an NMOS; the second MOS transistor Q2 is a PMOS; the third MOS transistor Q3 is an NMOS.
[0029] The principle of the high-side power output anti-reverse connection and short-circuit protection circuit is as follows: Conduction principle: When the input power supply VIN is powered on, it first conducts through the body diode of the third MOS transistor Q3. This voltage forms a loop through the fourth resistor R4, the third resistor R3 and the first resistor R1, and a voltage drop is formed across the first resistor R1. This voltage serves as the drive power supply for the first MOS transistor Q1, causing the first MOS transistor Q1 to conduct. Then, one end of the second resistor R2 is shorted to the ground terminal GND through the first MOS transistor Q1. The second resistor R2 and the fifth resistor R5 are used for voltage division, that is, a voltage difference is formed between the gate and the source, and the second MOS transistor Q2 conducts and outputs.
[0030] Anti-reverse principle: When the input power supply VIN is reversely connected to the ground terminal GND, the Vgs voltage cannot be established, and no current loop can be formed after the reverse connection, so the circuit will not be damaged during reverse connection.
[0031] Short-circuit protection principle: In practical applications, when the output terminal VOUT is shorted to the ground due to other factors of the load. When the short-circuit occurs. Since the output terminal VOUT is connected to the ground, the gate drive voltage of the first MOS transistor Q1 disappears, causing the first MOS transistor Q1 to turn off. At this time, one end of the second resistor R2 is floating, and the gate-source voltage of the second MOS transistor Q2 is equal without a voltage difference, so the second MOS transistor Q2 turns off, effectively protecting the impact and influence on the MOS itself and the power supply system caused by the large current output due to the load short circuit.
[0032] Finally, it should be noted that the above specific embodiments are only used to illustrate the technical solutions of the present invention and not to limit them. Although the present invention has been described in detail with reference to the examples, those of ordinary skill in the art should understand that the technical solutions of the present invention can be modified or equivalently replaced without departing from the spirit and scope of the technical solutions of the present invention, and they should all be covered within the scope of the claims of the present invention.
Claims
1. A circuit for preventing reverse connection and short circuit protection of high-side power supply output, characterized in that: Including anti-reverse connection circuit and short circuit protection circuit; The anti-reverse connection circuit includes: a seventh resistor R7, a third MOS tube Q3 and a bootstrap circuit; wherein: The source of the third MOS tube Q3 is connected to the input power supply VIN; One end of the seventh resistor R7 is connected to the gate of the third MOS transistor Q3, and the other end of the seventh resistor R7 is connected to the bootstrap circuit; The short circuit protection circuit unit includes: a first MOS transistor Q1, a second MOS transistor Q2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4 and a fifth resistor R5; wherein: The source of the second MOS transistor Q2 is connected to the drain of the third MOS transistor Q3, and the drain of the second MOS transistor Q2 is an output pin and is connected to an external load; Two ends of the fourth resistor R4 are respectively connected to the source and drain of the second MOS transistor Q2; Two ends of the fifth resistor R5 are respectively connected to the gate and source of the second MOS transistor Q2; One end of the second resistor R2 is connected to the gate of the second MOS transistor Q2, and the other end is connected to the drain of the first MOS transistor Q1; One end of the first resistor R1 is connected to the gate of the first MOS transistor Q1, and the other end is connected to the ground terminal GND; The source of the first MOS tube Q1 is connected to the ground terminal GND; One end of the third resistor R3 is connected to the gate of the first MOS transistor Q1 , and the other end is connected to the drain of the second MOS transistor Q2 .
2. The circuit for preventing reverse connection and short circuit of high-side power supply output according to claim 1, characterized in that: It also includes a slow start circuit, which includes a first capacitor C1, and two ends of the first capacitor C1 are respectively connected to the gate and the source of the third MOS tube Q3.
3. The circuit for preventing reverse connection and short circuit of high-side power supply output according to claim 2, characterized in that: The first capacitor C1 is a ceramic capacitor.
4. The circuit for preventing reverse connection and short circuit of high-side power supply output according to claim 1, characterized in that: The first MOS transistor Q1 is an NMOS.
5. The circuit for preventing reverse connection and short circuit of high-side power supply output according to claim 1, characterized in that: The second MOS tube Q2 is a PMOS.
6. The circuit for preventing reverse connection and short circuit of high-side power supply output according to claim 1, characterized in that: The third MOS transistor Q3 is an NMOS.