Photomask correction method and device and semiconductor equipment
By collecting and analyzing the key dimension data of the photomask on the wafer, generating the correction rate, and performing multiple corrections, the problem of the effect of the photomask on the key dimension uniformity in semiconductor manufacturing is solved, achieving higher calibration accuracy and product quality.
Patent Information
- Application Number
- CN202510592087.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-08
- Publication Date
- 2025-06-27
AI Technical Summary
In the semiconductor manufacturing process, the photomask has an increasing impact on the circuit pattern quality formed on the wafer surface, especially when the graphics size continues to shrink, it is difficult for the prior art to effectively solve the impact of the photomask on the key dimension uniformity.
By collecting the initial critical dimension uniformity and historical exposure data of the target mask on the wafer, the initial critical dimension correction rate is generated and multiple corrections are performed until the target value of the critical dimension uniformity is reached.
Through multiple corrections, the accuracy and effect of mask correction can be effectively improved, the uniformity of key dimensions can be optimized, and the product quality of semiconductor manufacturing can be improved.
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Figure CN120215223A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to, but is not limited to, a mask correction method, apparatus, and semiconductor device. Background Art
[0002] In the field of semiconductor manufacturing, a mask is a core tool in the lithography process, used to transfer circuit patterns onto the surface of a wafer.
[0003] In the lithography process, the quality of the circuit patterns formed on the surface of the wafer is affected by the mask and the lithography machine. However, with the continuous development of semiconductor manufacturing technology and the continuous miniaturization of the pattern size of the mask, the influence of the mask on the circuit patterns formed on the surface of the wafer has become increasingly prominent. Summary of the Invention
[0004] In view of this, embodiments of the present disclosure provide a mask correction method, apparatus, and semiconductor device.
[0005] Embodiments of the present disclosure provide a mask correction method, including: collecting the initial critical dimension uniformity of a target mask on a wafer and generating an initial critical dimension correction rate of the target mask; based on the initial critical dimension uniformity and the initial critical dimension correction rate, performing a first correction on the target mask; using the target mask after the first correction for exposure to obtain the first critical dimension uniformity of the target mask on the wafer and the actual critical dimension correction rate of the target mask; based on the first critical dimension uniformity and the actual critical dimension correction rate, performing at least one more correction on the target mask and performing exposure until a target value of the critical dimension uniformity is reached.
[0006] In some embodiments of the present disclosure, generating the initial critical dimension correction rate of the target mask includes: collecting historical exposure data of the target mask; predicting the initial critical dimension correction rate based on the historical exposure data.
[0007] In some embodiments of the present disclosure, the historical exposure data includes at least one of light source data, circuit pattern type, critical dimension change amount, and mask transmittance.
[0008] In some embodiments of the present disclosure, generating the initial critical dimension correction rate of the target mask further includes: exposing using the target mask in a manner of stepwise adjusting exposure parameters to obtain an exposure-energy matrix; the exposure parameters include a focus value and an exposure energy; calculating the initial critical dimension correction rate based on the exposure-energy matrix.
[0009] In some embodiments of the present disclosure, the method of adjusting the exposure parameters step by step and using the target photomask for exposure to obtain an exposure-energy matrix includes: dividing the target photomask into multiple test regions; performing exposure on the multiple test regions respectively with step-varying exposure parameters; detecting the critical dimensions of the target pattern in the multiple test regions; and establishing the exposure-energy matrix based on the relationship between the critical dimensions of the target pattern and the exposure parameters.
[0010] In some embodiments of the present disclosure, the process of calibrating the target photomask each time includes: adjusting the light transmittance of all positions on the target photomask to the target value of the light transmittance; and determining the exposure compensation amount based on the target value of the light transmittance, where the exposure compensation amount is used to adjust the exposure parameters during the process of using the target photomask for exposure.
[0011] In some embodiments of the present disclosure, the adjusting the light transmittance of all positions on the target photomask to the target value of the light transmittance includes: determining the lowest light transmittance on the target photomask as the target value of the light transmittance; irradiating the target photomask with a laser to form a light-shielding layer, and adjusting the light transmittance of all positions on the target photomask to the lowest light transmittance.
[0012] In some embodiments of the present disclosure, the target value of the critical dimension uniformity is obtained through software simulation.
[0013] Embodiments of the present disclosure further provide a photomask calibration device, which is configured to execute the photomask calibration method described in the above solution.
[0014] Embodiments of the present disclosure further provide a semiconductor device, including: the photomask calibration device described in the above solution.
[0015] It can be understood that since at least one subsequent calibration is performed on the target photomask at the actual critical dimension calibration rate. Therefore, compared with the first calibration, at least one subsequent calibration will be more accurate, and thus it is easier to adjust the critical dimension uniformity of the target photomask to the optimal value. That is to say, in the embodiments of the present disclosure, by performing multiple calibrations on the photomask, the calibration effect can be effectively improved, thereby optimizing the critical dimension uniformity. Description of the Drawings
[0016] Figure 1A is a schematic diagram of the exposure process of the lithography process;
[0017] Figure 1B is a schematic diagram of the critical dimensions at different positions on the wafer surface;
[0018] Figure 2One of the flow diagrams of the photomask correction method provided by the embodiments of the present disclosure;
[0019] Figure 3 Two of the flow diagrams of the photomask correction method provided by the embodiments of the present disclosure;
[0020] Figure 4 Three of the flow diagrams of the photomask correction method provided by the embodiments of the present disclosure;
[0021] Figure 5 Four of the flow diagrams of the photomask correction method provided by the embodiments of the present disclosure;
[0022] Figure 6 Schematic diagram of the exposure - energy matrix provided by the embodiments of the present disclosure;
[0023] Figure 7 Five of the flow diagrams of the photomask correction method provided by the embodiments of the present disclosure;
[0024] Figure 8 Six of the flow diagrams of the photomask correction method provided by the embodiments of the present disclosure;
[0025] Figure 9 Schematic diagram of the critical dimension correction process provided by the embodiments of the present disclosure;
[0026] Figure 10A One of the effect schematic diagrams of the critical dimension correction process provided by the embodiments of the present disclosure;
[0027] Figure 10B Effect schematic diagram of the critical dimension correction process provided by the embodiments of the present disclosure Figure 2 ;
[0028] Figure 10C Effect schematic diagram of the critical dimension correction process provided by the embodiments of the present disclosure Figure 3 ;
[0029] Figure 11 Schematic diagram of the structure of the semiconductor device provided by the embodiments of the present disclosure. Detailed implementation manners
[0030] Next, in combination with the embodiments of the present disclosure and the accompanying drawings, the technical solutions in the embodiments of the present disclosure will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those of ordinary skill in the art without making creative efforts belong to the scope of protection of the present disclosure.
[0031] In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present disclosure. However, it will be apparent to one of ordinary skill in the art that the present disclosure may be practiced without one or more of these specific details. In other instances, well-known features have not been described in order to avoid obscuring the present disclosure; that is, not all features of actual embodiments are described herein, and well-known functions and structures are not described in detail.
[0032] In the drawings, for the sake of clarity, the dimensions of layers, regions, elements, and their relative dimensions may be exaggerated. Like reference numerals throughout the drawings denote like elements.
[0033] It should be understood that when an element or layer is referred to as being "on," "adjacent to," "connected to," or "coupled to" another element or layer, it can be directly on, adjacent to, connected, or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers, and / or sections, these elements, components, regions, layers, and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, or section from another. Thus, a first element, component, region, layer, or section discussed below may be referred to as a second element, component, region, layer, or section without departing from the teachings of the present disclosure. And when a second element, component, region, layer, or section is discussed, it does not necessarily imply that a first element, component, region, layer, or section exists in the present disclosure.
[0034] Spatial relationship terms such as "under," "below," "beneath," "underneath," "above," "over," etc. are used herein for convenience in describing the relationship of one element or feature to another element or feature shown in the figures. It should be understood that, in addition to the orientation shown in the figures, spatial relationship terms are intended to encompass different orientations of the device in use and operation. For example, if the device in the figures is flipped, then an element or feature described as "under" or "beneath" or "underneath" another element or feature will be oriented "over" the other element or feature. Thus, the exemplary terms "under" and "beneath" can include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatial descriptors used herein are to be interpreted accordingly.
[0035] The purpose of the terms used herein is only to describe specific embodiments and is not a limitation of the present disclosure. As used herein, the singular forms "a", "an" and "the" are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms "comprising" and / or "including", when used in this specification, specify the presence of the stated features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups. As used herein, the term "and / or" includes any and all combinations of the related listed items.
[0036] To thoroughly understand the present disclosure, detailed steps and structures will be presented in the following description to illustrate the technical solutions of the present disclosure. The preferred embodiments of the present disclosure are described in detail below. However, in addition to these detailed descriptions, the present disclosure may have other embodiments.
[0037] The following are the explanations of some terms related to the present disclosure:
[0038] CD (Critical Dimension) refers to the minimum feature size on a chip (e.g., the minimum line width). The critical dimension directly determines the chip performance and the process accuracy.
[0039] CDU (Critical Dimension Uniformity) is the core index to measure the consistency of the critical dimension on the wafer surface and directly affects the chip performance and the yield.
[0040] CDCR (Critical Dimension Correction Ratio) refers to the ratio relationship between the change of the critical dimension and the mask correction amplitude.
[0041] The CDC (Critical Dimension Correction) process is to correct the mask to improve the CDU.
[0042] SCDU (Shot Critical Dimension Uniformity) refers to the difference between the maximum and minimum values of the critical dimension within the same lithography exposure area (Shot), and is the core index to measure the distribution consistency of the critical dimension (CD) within a single exposure area in semiconductor lithography processes.
[0043] It should be noted that with reference to Figure 1A, in the exposure (scanner) process of the lithography process, the light emitted by the lithography machine passes through the photomask and irradiates the photoresist on the surface of the wafer. Thus, a circuit pattern is formed in the photoresist on the surface of the wafer. Among them, both the lithography machine and the photomask will affect the formed circuit pattern. For example, the energy of the light emitted by the lithography machine, the angle of light irradiation, and the light transmittance of the photomask will all affect the critical dimensions in the circuit pattern.
[0044] Reference Figure 1B , due to the influence of the lithography machine and the photomask, among the six positions a, b, c, d, e, and f on the surface of the wafer, the critical dimensions of the circuit pattern are different. Among them, only the critical dimensions of positions c and d reach the target critical dimensions, while the critical dimensions of positions a and b slightly exceed the target critical dimensions, and the critical dimensions of positions e and f greatly exceed the target critical dimensions. As the pattern size of the photomask continues to shrink, the influence of the photomask on the circuit pattern formed on the surface of the wafer becomes more and more prominent. Therefore, it is necessary to correct the photomask to improve the critical dimension uniformity.
[0045] Figure 2 is an optional flowchart of the photomask correction method provided by the embodiments of the present disclosure. As Figure 2 shown, the photomask correction method includes steps S101 to S104, which will be described in combination with each step.
[0046] S101. Collect the initial critical dimension uniformity of the target photomask on the wafer and generate the initial critical dimension correction rate of the target photomask.
[0047] In the embodiments of the present disclosure, the critical dimension correction process (CDC process) can adjust the critical dimension uniformity by adjusting the light transmittance of each position on the photomask. Since the critical dimension correction process (CDC process) requires the critical dimension uniformity (CDU) of the target photomask before correction and the critical dimension correction rate (CDCR) of the target photomask. Therefore, before the first correction of the target photomask, it is necessary to collect the initial critical dimension uniformity of the target photomask and generate the initial critical dimension correction rate of the target photomask.
[0048] In the embodiments of the present disclosure, before correcting the target photomask, the target photomask can be used to expose at least one wafer. In this way, the critical dimension uniformity of the circuit pattern formed on the wafer is the initial critical dimension uniformity. Among them, the test wafer can be exposed with the target photomask to obtain the initial critical dimension uniformity; or during the processing of the product wafer, the measurement data of the target photomask can be collected to obtain the initial critical dimension uniformity.
[0049] In the embodiments of the present disclosure, since the critical dimension correction rate (CDCR) of the target reticle cannot be directly measured without performing the critical dimension correction (CDC) process on the target reticle, it is necessary to infer the predicted value of the critical dimension correction rate (i.e., the initial critical dimension correction rate) through other data of the target reticle.
[0050] S102. Perform the first correction on the target reticle based on the initial critical dimension uniformity and the initial critical dimension correction rate.
[0051] In the embodiments of the present disclosure, after obtaining the initial critical dimension uniformity and the initial critical dimension correction rate of the target reticle, the first correction can be performed on the target reticle according to the initial critical dimension correction rate on the basis of the initial critical dimension uniformity, so as to adjust the critical dimension uniformity (CDU) of the target reticle to a better value.
[0052] It should be noted that since the initial critical dimension correction rate is a predicted value and there will be a certain error between it and the actual value, it is difficult to directly adjust the critical dimension uniformity (CDU) of the target reticle to the optimal value by the first correction performed according to the initial critical dimension correction rate.
[0053] S103. Use the target reticle after the first correction for exposure to obtain the first critical dimension uniformity of the target reticle on the wafer and the actual critical dimension correction rate of the target reticle.
[0054] In the embodiments of the present disclosure, after the first correction, the target reticle can be used to expose at least one wafer, and the critical dimension uniformity of the circuit pattern formed on the wafer can be measured, that is, the first critical dimension uniformity of the target reticle on the wafer can be obtained.
[0055] At the same time, the change amount of the critical dimension before and after the first correction is measured, and compared with the correction amplitude of the reticle in the first correction, the actual critical dimension correction rate of the target reticle can be obtained.
[0056] S104. Based on the first critical dimension uniformity and the actual critical dimension correction rate, perform at least one more correction on the target reticle and perform exposure until the target value of the critical dimension uniformity is reached.
[0057] In the embodiments of the present disclosure, after the first correction, at least one more correction can be performed on the target reticle according to the actual critical dimension correction rate on the basis of the first critical dimension uniformity, so as to adjust the critical dimension uniformity (CDU) of the target reticle to the target value.
[0058] In the embodiments of the present disclosure, in at least one subsequent correction, each correction is performed based on the critical dimension uniformity measured in the previous time. For example, the second correction is performed based on the first critical dimension uniformity; after the second correction, the second critical dimension uniformity can be measured. Further, the third correction is performed based on the second critical dimension uniformity, and so on.
[0059] It can be understood that since at least one subsequent correction is performed on the target reticle according to the actual critical dimension correction rate. Therefore, compared with the first correction, at least one subsequent correction will be more accurate. Thus, it is easier to adjust the critical dimension uniformity (CDU) of the target reticle to an optimal value. That is to say, in the embodiments of the present disclosure, by performing multiple corrections on the reticle, the correction effect can be effectively improved, thereby optimizing the critical dimension uniformity.
[0060] In some embodiments of the present disclosure, the method for generating the initial critical dimension correction rate of the target reticle includes Figure 3 Steps S201 to S202 shown will be described in combination with each step.
[0061] S201. Collect historical exposure data of the target reticle.
[0062] S202. Predict the initial critical dimension correction rate based on the historical exposure data.
[0063] In the embodiments of the present disclosure, the change relationship curve between the historical exposure data and the initial critical dimension correction rate can be established in advance through statistics and simulation. Thus, by collecting the historical exposure data of the target reticle and substituting it into the change relationship curve, the initial critical dimension correction rate of the target reticle can be predicted.
[0064] In the embodiments of the present disclosure, the historical exposure data may include at least one of: light source data, circuit pattern types, critical dimension change amount, and reticle transmittance.
[0065] Among them, the light source data can be collected from the lithography machine stage; the light source data may include the wavelength of the light source, the energy of the light source, and other light source data affecting the critical dimension.
[0066] The circuit pattern types can be obtained by dividing the circuit patterns on the target reticle. For example, one-dimensional patterns (i.e., linear patterns) and two-dimensional patterns (i.e., polyline patterns) can be divided.
[0067] The critical dimension change amount refers to the change amount of the critical dimension of the target reticle after past use or correction; the critical dimension change amount can be collected from the historical measurement data of the wafers that have used the target reticle.
[0068] The light mask transmittance refers to the light transmission performance of the light mask, that is, the proportion of light that can reach the surface of the light mask after passing through the light mask; the light mask transmittance can be obtained by performing a light transmission test on the target light mask.
[0069] It can be understood that based on the historical exposure data of the target light mask, the initial critical dimension correction rate is predicted. In this way, without knowing the actual critical dimension correction rate of the target light mask, the first correction of the target light mask can be performed based on the predicted initial critical dimension uniformity, ensuring the progress of the light mask correction.
[0070] In some embodiments of the present disclosure, the method for generating the initial critical dimension correction rate of the target light mask includes Figure 4 The steps S301 to S302 shown will be described in conjunction with each step.
[0071] S301. Expose using the target light mask in the manner of stepwise adjusting the exposure parameters to obtain an exposure-energy matrix; the exposure parameters include: focus value and exposure energy.
[0072] S302. Calculate the initial critical dimension correction rate based on the exposure-energy matrix.
[0073] It should be noted that the exposure-energy matrix (Focus-Energy Matrix, FEM) is a two-dimensional parameter matrix formed by systematically changing the focus value (Focus) and exposure energy (Energy) on the wafer. Among them, the focus value is in nanometers (nm) and reflects the offset of the optical system focus. The exposure energy is in millijoules per square centimeter (mJ / cm 2 ) and represents the light energy received by the photoresist.
[0074] In the embodiments of the present disclosure, since the exposure-energy matrix can characterize the relationship between the critical dimension and the exposure parameters, and the factors affecting the critical dimension include the exposure parameters and the light mask transmittance; therefore, in the case where the change amount of the exposure parameters is preset, the relationship between the critical dimension and the light mask transmittance can be obtained based on the exposure-energy matrix, that is, the initial critical dimension correction rate is obtained.
[0075] In some embodiments of the present disclosure, it can be achieved through Figure 5 The steps S401 to S404 shown Figure 4 The step S301 shown will be described in conjunction with each step.
[0076] S401. Divide the target light mask into multiple test areas.
[0077] S402. Expose each of the multiple test areas with stepwise varying exposure parameters; the exposure parameters include: focus value and exposure energy.
[0078] In the embodiments of the present disclosure, with reference to Figure 6 , a target photomask can be divided into a plurality of test regions in a grid pattern. Further, for the plurality of test regions, exposure is performed respectively using exposure parameters that change step by step. Among them, an exposure energy that changes step by step can be adopted along the X direction, and at the same time, a focus value that changes step by step is adopted along the Y direction. In this way, each test region corresponds to a unique combination of exposure energy and focus value.
[0079] S403. Detect the critical dimension of the target pattern in a plurality of test regions.
[0080] S404. Based on the relationship between the critical dimension of the target pattern and the change of the exposure parameters, establish an exposure-energy matrix.
[0081] In the embodiments of the present disclosure, continuing to refer to Figure 6 , after the exposure of a plurality of test regions is completed, the critical dimension of the target pattern in the plurality of test regions can be detected. Further, an exposure-energy matrix is established based on the relationship between the critical dimension of the target pattern and the change of the exposure parameters. Among them, similar patterns can be selected as the target pattern. For example, one-dimensional linear patterns are all selected. In this way, the interference caused by different patterns can be excluded.
[0082] It can be understood that by establishing an exposure-energy matrix, an initial critical dimension correction rate can be calculated. In this way, in the case where the actual critical dimension correction rate of the target photomask is unknown, the target photomask can be corrected for the first time based on the predicted initial critical dimension uniformity, ensuring the progress of the photomask correction.
[0083] In some embodiments of the present disclosure, the process of correcting the target photomask each time includes Figure 7 Steps S501 - S502 shown will be described in combination with each step.
[0084] S501. Adjust the light transmittance of all positions on the target photomask to the target value of the light transmittance.
[0085] S502. Determine an exposure compensation amount based on the target value of the light transmittance; wherein, the exposure compensation amount is used to adjust the exposure parameters during the exposure process using the target photomask.
[0086] In the embodiments of the present disclosure, during the process of implementing the critical dimension correction process (CDC process) each time, based on the critical dimension uniformity (CDU) before correction and the critical dimension correction rate (CDCR) of the target photomask, the light transmittance of all positions on the target photomask can be adjusted to the target value of the light transmittance, so that the light transmittance of all positions on the target photomask can be evenly distributed. In this way, the purpose of adjusting the critical dimension uniformity can be achieved.
[0087] However, adjusting the light transmittance of the target mask will affect the energy of the light received on the wafer surface. Therefore, it is necessary to determine the exposure compensation amount and make corresponding adjustments to the exposure parameters to compensate for the energy of the light received on the wafer surface. For example, if the light transmittance of the mask is reduced, the energy of the light source needs to be increased accordingly to ensure that the light received on the wafer surface has sufficient energy.
[0088] In some embodiments of the present disclosure, it can be achieved through Figure 8 the steps S601 - S602 shown Figure 7 The step S501 shown will be described in conjunction with each step.
[0089] S601. Determine the lowest light transmittance on the target mask as the target value of the light transmittance.
[0090] S602. Use a laser to irradiate the target mask to form a light - shielding layer, and adjust the light transmittance of all positions on the target mask to the lowest light transmittance.
[0091] In the embodiments of the present disclosure, referring to Figure 9 , in the critical dimension correction process (CDC process), a laser can be used to irradiate certain positions of the target mask, thereby forming a light - shielding layer at these positions. That is to say, by implanting light - shielding layers with different densities at different positions of the target mask, the control of the light energy in different regions can be achieved, so as to improve the critical dimension uniformity (CDU).
[0092] In the embodiments of the present disclosure, the target mask may include a base layer and a light - shielding layer, and the base layer and the light - shielding layer form an upper - lower layered structure. Among them, the base layer can be composed of quartz, which has a high transmittance and ensures that the light source efficiently passes through and projects onto the wafer surface. The light - shielding layer can be composed of chromium, and the light - shielding layer will block the light.
[0093] In the embodiments of the present disclosure, continuing to refer to Figure 9 , a laser with a specific wavelength (such as 536 nm) can be used to irradiate the target mask. The laser will be focused at a specific height of the base layer of the mask, so that the focused position generates a "micro - explosion" due to absorbing the laser energy. Furthermore, due to the "micro - explosion", "voids" (which can be called pixels) are generated. The center of the pixel is a low - density area, and the edge is a high - density area. The "micro - explosion" can change the material density of the focused position by breaking and recombining the chemical bonds at the focused position. A large number of aggregated pixels in the base layer can form a local light - shielding layer, thereby reducing the light energy passing through this area. In this way, precise control of the exposure intensity can be achieved during the lithography process.
[0094] In the disclosed embodiment, the method of generating a shading layer on the target photomask by laser irradiation can only reduce the transmittance of the irradiated position but cannot increase the transmittance; therefore, the minimum transmittance on the target photomask can be determined as the target value of the transmittance, and then, the transmittance of each position on the target photomask can be reduced. The transmittance of all positions on the target photomask can be adjusted to the minimum transmittance, so that the transmittance of all positions on the target photomask can be evenly distributed.
[0095] Figure 10A , Figure 10B and Figure 10C It reflects the changes in the critical dimension (CD) at different locations on the wafer surface during the critical dimension correction process (CDC process).
[0096] In the embodiments of the present disclosure, reference Figure 10A Before the critical dimension correction process, the distribution of CD measurement values at different positions on the wafer surface is uneven, and the CD measurement value on the wafer surface is positively correlated with the transmittance of the corresponding position on the target mask. Therefore, the point with the minimum CD value can be selected as the target point, which also corresponds to the position with the lowest transmittance on the target mask.
[0097] Furthermore, refer to Figure 10B , the transmittance of all positions on the target mask can be adjusted to the minimum transmittance, so that the CD measurement values at different positions on the wafer surface all reach the CD minimum value, so that the CD measurement values on the wafer surface can be evenly distributed. However, at this time, the CD measurement value on the wafer surface still does not reach the CD target value.
[0098] Furthermore, refer to Figure 10C The exposure parameters in the exposure process can be adjusted according to the exposure compensation amount to compensate for the energy of the light received by the wafer surface, so that the CD measurement value on the wafer surface can be evenly distributed near the CD target value. In this way, the purpose of optimizing the critical dimension uniformity (CDU) is achieved.
[0099] It is understandable that in the disclosed embodiment, the transmittance of the mask is adjusted to make the transmittance of the mask evenly distributed, and then the energy of the light received by the wafer surface is compensated by adjusting the exposure parameters during the exposure process. In this way, the uniformity of the key dimension is optimized and the product quality is improved.
[0100] In some embodiments of the present disclosure, the target value of the critical dimension uniformity (CDU) is obtained by software simulation. The software can be used to simulate the influence of the concentration of the subsequent planting pixel layer and the planting target height on the previous layer, thereby obtaining the simulated optimal value of the critical dimension uniformity, that is, obtaining the target value of the critical dimension uniformity.
[0101] An embodiment of the present disclosure also provides a photomask correction device. Refer to Figure 11 , the photomask correction device 20 is configured to execute the photomask correction method in the foregoing embodiment.
[0102] An embodiment of the present disclosure also provides a semiconductor device. Refer to Figure 11 , the semiconductor device 10 includes the photomask correction device 20.
[0103] It should be understood that the term "one embodiment" or "an embodiment" mentioned throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of the present disclosure. Therefore, the appearances of "in one embodiment" or "in an embodiment" throughout the specification do not necessarily refer to the same embodiment. In addition, these specific features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. It should be understood that in various embodiments of the present disclosure, the sequence numbers of the foregoing processes do not indicate the order of execution, and the order of execution of each process should be determined by its function and internal logic, and should not constitute any limitation to the implementation process of the embodiments of the present disclosure. The sequence numbers of the embodiments of the present disclosure are only for description and do not represent the advantages and disadvantages of the embodiments.
[0104] The foregoing is only the preferred embodiment of the present disclosure, and does not limit the patent scope of the present disclosure. Any equivalent structural transformation made by using the content of the specification and drawings of the present disclosure under the inventive concept of the present disclosure, or any direct / indirect application in other related technical fields is included in the patent protection scope of the present disclosure.
Claims
1. A mask correction method, characterized in that: include: Collecting the initial critical dimension uniformity of the target mask on the wafer and generating the initial critical dimension correction rate of the target mask; Based on the initial critical dimension uniformity and the initial critical dimension correction rate, performing a first correction on the target mask; Using the target photomask after the first correction to perform exposure, to obtain a first critical dimension uniformity of the target photomask on the wafer, and an actual critical dimension correction rate of the target photomask; Based on the first CD uniformity and the actual CD correction rate, the target mask is calibrated at least once again, and then exposed until a target CD uniformity value is reached.
2. The mask correction method according to claim 1, characterized in that: Generating an initial critical dimension correction rate of the target mask, comprising: Collecting historical exposure data of the target reticle; The initial critical dimension correction rate is predicted based on the historical exposure data.
3. The mask correction method according to claim 2, characterized in that: The historical exposure data includes at least one of light source data, circuit pattern type, key dimension change, and mask transmittance.
4. The mask correction method according to claim 1, characterized in that: Generating an initial critical dimension correction rate of the target mask further includes: The target mask is used for exposure in a stepwise manner to adjust exposure parameters, thereby obtaining an exposure-energy matrix; the exposure parameters include: a focus value and an exposure energy; Based on the exposure-energy matrix, the initial critical dimension correction rate is calculated.
5. The mask correction method according to claim 4, characterized in that: The method of adjusting the exposure parameters step by step, using the target mask for exposure, and obtaining an exposure-energy matrix includes: Dividing the target photomask into a plurality of test areas; Exposing the multiple test areas respectively using exposure parameters with step-by-step changes; detecting a critical dimension of a target pattern in the plurality of test areas; The exposure-energy matrix is established based on the relationship between the critical dimension of the target pattern and the exposure parameters.
6. The mask correction method according to claim 1, characterized in that: The process of calibrating the target mask each time includes: Adjusting the light transmittance at all positions on the target photomask to a target light transmittance value; Based on the target value of the transmittance, an exposure compensation amount is determined; wherein the exposure compensation amount is used to adjust exposure parameters during exposure using the target mask.
7. The mask correction method according to claim 6, characterized in that: The step of adjusting the transmittance of all positions on the target photomask to a target transmittance value includes: Determining the lowest light transmittance on the target photomask as the target value of the light transmittance; The target photomask is irradiated with laser to form a light shielding layer, and the light transmittance at all positions on the target photomask is adjusted to the minimum light transmittance.
8. The mask correction method according to claim 1, characterized in that: The target value of the critical dimension uniformity is obtained through software simulation.
9. A mask correction device, characterized in that: The mask correction device is configured to execute the mask correction method according to any one of claims 1 to 8.
10. A semiconductor device, characterized in that: include: The mask correction device as claimed in claim 9.
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Method for correcting photomask layout
CN121142889A
