Cache data processing method and device, electronic equipment and storage medium
By reading and comparing the flag bits of cached data in the dual FIFO structure, the problem of read and write errors in high-speed data transmission scenarios is solved, and more accurate and efficient data processing is achieved.
Patent Information
- Application Number
- CN202510369446.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-26
- Publication Date
- 2025-06-27
AI Technical Summary
Dual FIFO structure is prone to read and write errors in high-speed data transmission scenarios.
By acquiring the data read request, the data packet information cached in the first cache structure is read, and the cached data in the second cache structure is read based on the information. Comparison of read cache flags with read packet flags corresponding to the data group to generate feedback information to handle more read or less read errors.
Accurately judge the read status of cached data, handle more read or less read errors, and improve the accuracy and efficiency of data processing.
Smart Images
Figure CN120215836A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of computer technology, and in particular, to a method, apparatus, electronic device, and storage medium for processing cached data. Background Art
[0002] With the rapid development of information technology, the efficiency and accuracy of data processing have become important indicators for measuring the performance of computer systems. In the process of data processing, the FIFO (First In First Out) structure, as a common cache management structure, is widely used in various data processing scenarios. However, in high-speed data transmission scenarios, due to the complexity of data flow, the double FIFO structure is prone to read and write errors when processing data. Summary of the Invention
[0003] This application provides a method, apparatus, electronic device, and storage medium for processing cached data, so as to at least solve the problem that the double FIFO structure is prone to read and write errors when processing data in related technologies.
[0004] This application provides a method for processing cached data, including:
[0005] Obtaining a data reading request sent by a data reading module, and reading data packet information cached in a first cache structure based on the data reading request;
[0006] Based on the data packet information, reading cached data in a second cache structure to obtain cached content corresponding to each data group in the data packet information, and a read cache flag bit corresponding to the cached content;
[0007] Comparing the read cache flag bit with the read packet flag bit corresponding to the data group to obtain a flag bit comparison result;
[0008] Generating feedback information for the data reading request based on the flag bit comparison result and the cached content.
[0009] In an optional implementation manner, generating feedback information for the data reading request based on the flag bit comparison result and the cached content includes:
[0010] If the flag bit comparison result indicates that the read cache flag bit is the same as the read packet flag bit, obtaining the unread amount of the unread cache flag bit corresponding to the read packet flag bit;
[0011] If the unread amount is zero and the data packet information in the first cache structure is empty, generating feedback information indicating correct reading based on the cached content.
[0012] In an alternative embodiment, generating feedback information for a data reading request based on the flag bit comparison result and the cache content further includes:
[0013] If the flag bit comparison result indicates that the read cache flag bit is different from the read packet flag bit, and the next cache flag bit read is also different from the read cache flag bit, it is determined that there is a multiple read error in the cache data, and at the same time, the cache data in the second cache structure remains unchanged;
[0014] Generating feedback information for the data reading request based on the multiple read error.
[0015] In an alternative embodiment, generating feedback information for a data reading request based on the flag bit comparison result and the cache content further includes:
[0016] If the flag bit comparison result indicates that the read cache flag bit is different from the read packet flag bit, and the next cache flag bit read is still the same as the read cache flag bit, it is determined that there is a missed read error in the cache data;
[0017] Reading the unread cache data belonging to the previous data group in the second cache structure into the third cache structure;
[0018] Generating feedback information for the data reading request based on the missed read error and the unread cache data read into the third cache structure, so that the data reading module makes up for the unread cache data based on the missed read error.
[0019] In an alternative embodiment, generating feedback information for a data reading request based on the flag bit comparison result and the cache content further includes:
[0020] If there is a missed read error in the cache data, discard the cache data belonging to the previous data group in the second cache structure;
[0021] Generating feedback information for the data reading request based on the reading result of the cache data belonging to the remaining data groups.
[0022] In an alternative embodiment, generating feedback information for a data reading request based on the flag bit comparison result and the cache content further includes:
[0023] If there is a multiple read error in the cache data, discard the cache data belonging to the current data group and the next data group in the second cache structure;
[0024] Generating feedback information for the data reading request based on the reading result of the cache data belonging to the remaining data groups.
[0025] In an alternative embodiment, after obtaining the data reading request sent by the data reading module, the above method further includes:
[0026] Prefetch the data grouping information cached in the first cache structure to obtain prefetch grouping information;
[0027] Based on the prefetch grouping information, prefetch the cached data cached in the second cache structure to obtain prefetch cached data;
[0028] If a data reading request sent by the data reading module is received, then based on the prefetch cached data, generate feedback information for the data reading request.
[0029] This application also provides a cached data processing device, including:
[0030] A data acquisition module, configured to acquire a data reading request sent by the data reading module, and read the data grouping information cached in the first cache structure based on the data reading request;
[0031] A content reading module, configured to read the cached data cached in the second cache structure based on the data grouping information, so as to obtain cached content corresponding to each data group in the data grouping information, and a read cached flag bit corresponding to the cached content;
[0032] A data comparison module, configured to compare the read cached flag bit with the read grouping flag bit corresponding to the data group to obtain a flag bit comparison result;
[0033] A data feedback module, configured to generate feedback information for the data reading request based on the flag bit comparison result and the cached content.
[0034] This application also provides an electronic device, including: a memory for storing a computer program; a processor for implementing the steps of any of the above cached data processing methods when executing the computer program.
[0035] This application also provides a computer-readable storage medium, in which a computer program is stored, and wherein the computer program implements the steps of any of the above cached data processing methods when executed by a processor.
[0036] This application also provides a computer program product, including a computer program, and the computer program implements the steps of any of the above cached data processing methods when executed by a processor.
[0037] Through this application, by comparing the read cache flag bit with the read group flag bit, the read status of the cache data can be accurately judged, and corresponding feedback information can be generated. When a multiple-read error or a less-read error is detected, corresponding measures can be taken, such as discarding the incorrect cache data or reading in the unread cache data, to ensure the accuracy of data reading. In addition, through the prefetch mechanism, the cache data can be read in advance, further improving the efficiency of data processing. Therefore, the technical problem of read-write errors that are prone to occur when the dual-FIFO structure processes data can be solved, achieving the technical effect of improving the accuracy and efficiency of data processing. Description of the Drawings
[0038] To more clearly illustrate the embodiments of the present application, the accompanying drawings required for use in the embodiments will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can be obtained based on these drawings.
[0039] Figure 1 Application scenario diagram of the cache data processing method provided by the embodiment of the present application;
[0040] Figure 2 Flowchart of flag bit filling in the cache data processing method provided by the embodiment of the present application;
[0041] Figure 3 Data flow diagram of the cache data processing method provided by the embodiment of the present application;
[0042] Figure 4 Flow schematic diagram of the cache data processing method provided by the embodiment of the present application;
[0043] Figure 5 Flow schematic diagram of another cache data processing method provided by the embodiment of the present application;
[0044] Figure 6 Structure block diagram of the cache data processing device provided by the embodiment of the present application;
[0045] Figure 7 Structure schematic diagram of the electronic device provided by the embodiment of the present application. Detailed Embodiments
[0046] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, rather than all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the protection scope of the present application.
[0047] It should be noted that in the description of this application, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or elements inherent to such process, method, article or device. The terms "first", "second", etc. in this application are used to distinguish similar objects, rather than to describe a specific order or sequence.
[0048] To enable those skilled in the art of this technology to better understand the solution of this application, the following further details this application in conjunction with the accompanying drawings and specific embodiments.
[0049] Please refer to Figure 1 , Figure 1 which is a schematic diagram of an application environment provided by an embodiment of the present invention. The schematic diagram includes a data cache module and a data reading module electrically connected to the data cache module.
[0050] Furthermore, a first cache structure FIFO1, a second cache structure FIFO2, a flag bit filling module, an error detection module, and a third cache structure FIFO3 are provided on the data cache module. Among them, the first cache structure FIFO1 and the second cache structure FIFO2 can be prefetch cache structures or non-prefetch cache structures. The prefetch cache structure pre-exports the read data when no read request is received, and pre-exports the next data after receiving the read request. The flag bit filling module adds a 1-bit flag bit to the data according to the grouping information of the target data, and the flag bits of different groups are inverted. The error detection module determines whether the cached content to be read matches the grouping information according to the flag bit. If not, it reports an error and corrects the error.
[0051] Furthermore, when the target data stream enters the cache module, the flag bit is first filled in the flag bit filling module, and then stored in the second cache structure FIFO2. After the data grouping information enters the cache module, after the last data of each data group in the target data stream is stored in the second cache structure FIFO2, it is then stored in the first cache structure FIFO1. After the data reading module detects that the first cache structure FIFO1 is not empty, it first reads the data grouping information of a data group in the first cache structure FIFO1, and then reads the cached data in the second cache structure FIFO2 according to the data grouping information. During the reading process, the error detection module continuously detects whether the flag bit of the data is correct. If there is a case of reading too much or too little, the error detection module will perform error handling, such as restoring the cached data to the state where the data grouping information and the cached content correspond one by one.
[0052] Specifically, please refer to Figure 2, the flag bit filling module expands the cache data bit width by 1 bit to fill the cache flag bit, and the expanded cache flag bit is at a fixed position in the cache data. Taking the expanded bit at the highest bit as an example, the cache flag bit filling process is as follows: Initially, the cache flag bit is 0 and the counter value is 0; for each received cache data, the cache flag bit is filled to the highest bit of the data and the counter is incremented by 1; if no data packet information is received, the counting continues; if data packet information is received, the count value is compared with the corresponding data group information in the data packet information. If they are equal, the counter is cleared and the flag bit is flipped, that is, the flag bit is flipped between high and low levels, so that the cache flag bits of adjacent two data groups are different, otherwise it remains and the counting continues.
[0053] The error detection module is used to detect whether the cache data of the read target data stream matches the data packet information. The error detection module also maintains a flag bit. For the convenience of description, the flag bit maintained by the error detection module is called the packet flag bit. The initial value of the packet flag bit is 1. Each time the first cache structure FIFO1 (data packet information) is read, the level of the packet flag bit is flipped once to obtain the read packet flag bit. After the data reading module detects that the first cache structure FIFO1 is not empty, it first reads the data packet information of a data group in the first cache structure FIFO1, and then reads the cache data in the second cache structure FIFO2 according to the packet information. When reading the cache data in the second cache structure FIFO2, the read packet flag bit is compared with the read cache flag bit of the second cache structure FIFO2 in real time. If they are equal, the data reading is correct; if they are not equal, an incorrect read occurs.
[0054] Data reading errors are divided into two cases: over-reading and under-reading. When it is detected that the cache flag bit read this time is not equal to the packet flag bit, it is over-reading. When the reading ends this time and the cache flag bit read by the second cache structure FIFO2 is still the same as the previous time, it is under-reading. In the case of over-reading, the current read signal is set to invalid, so that the cache data still remains in the second cache structure FIFO2, and at the same time, the over-reading information is output to the data reading module. In the case of under-reading, the remaining amount belonging to the previous data group in the second cache structure FIFO2 is all read out and placed in the third cache structure FIFO3, and the under-reading information is output to the data reading module.
[0055] The data reading module performs error handling according to the received error information. When a multiple-reading error occurs, the current reading operation is cancelled, and the first cache structure FIFO1 and the second cache structure FIFO2 are read again according to the process. When a less-reading error occurs, the remaining data needs to be read from the third cache structure FIFO3, and then the first cache structure FIFO1 and the second cache structure FIFO2 are read again according to the process. Through this operation, the first cache structure FIFO1 and the second cache structure FIFO2 always maintain the state where the data grouping information and the cache content are in one-to-one correspondence. The data reading and error detection process is as follows Figure 3 .
[0056] According to an embodiment of the present invention, an embodiment of a cache data processing method is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. And although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in a different order than here.
[0057] The present disclosure provides a cache data processing method, which can accurately judge the reading state of cache data in the scenario of reading and writing data streams with a dual-FIFO structure. When a multiple-reading error or a less-reading error is detected, corresponding measures can be taken, and thus the accuracy and efficiency of data processing can be improved. The cache data processing method can be applied to Figure 1 the cache data processing system therein, or applied to an electronic device running the cache data processing system. The electronic device may include, but is not limited to, a tablet computer, a notebook computer, a desktop computer, a server, a controller, etc. Referring to Figure 4 , a flowchart of the cache data processing method provided by some embodiments of the present disclosure is shown. Figure 4 In
[0058] Step 410, obtain the data reading request sent by the data reading module, and read the data grouping information cached in the first cache structure based on the data reading request.
[0059] As above, by obtaining the data reading request sent by the data reading module and reading the data grouping information cached in the first cache structure based on the data reading request, a necessary basis for subsequent data processing is provided. And through the reading of the data grouping information, the position and range of the cache data to be read are determined based on this information, so as to ensure that the required data can be accurately obtained.
[0060] In some alternative embodiments, when reading data packet information cached in the first cache structure based on a data reading request, it is possible to first detect whether the first cache structure is empty. If it is not empty, then read the data packet information therein. The data packet information contains specific details about the data packets, such as the starting position, ending position, and the number of data within the data group of the data group. Such information is crucial for accurately reading the corresponding cached data from the second cache structure subsequently. After reading the data packet information, it can be temporarily stored in a temporary storage area for subsequent use. Meanwhile, to ensure the accuracy and integrity of the data, the data packet information can also be verified to determine whether an error has occurred during transmission. If the verification result is correct, then continue to execute the subsequent steps; if the verification result is incorrect, then re-read the data packet information until the correct information is obtained.
[0061] Step 420, based on the data packet information, read the cached data cached in the second cache structure to obtain the cached content corresponding to each data group in the data packet information, and the read cache flag bits corresponding to the cached content.
[0062] As described above, by reading the cached data cached in the second cache structure based on the data packet information, it is possible to ensure that the correct data content is read, and based on the read cache flag bits, it is possible to determine which data has been read, thereby avoiding duplicate reading or missed reading.
[0063] In some alternative embodiments, when reading the cached data cached in the second cache structure based on the data packet information to obtain the cached content corresponding to each data group in the data packet information, and the read cache flag bits corresponding to the cached content, it is possible to first determine the range and position of the data to be read according to the data packet information, and then read the data from the second cache structure in a predetermined order, that is, the first-in-first-out reading order. During the process of reading the data, the cache flag bits corresponding to the cached content can be read simultaneously for subsequent comparison and verification of the data based on the read cache flag bits. For example, Figure 1 For example, the data packet information in the first cache structure includes data group N and data group M. When a data reading request is received, based on the first-in-first-out order, first read the packet information of data group N, and at the same time mark the packet flag bit of data group N as the read packet flag bit, such as 0. Then read the cached data corresponding to data group N from the second cache structure according to the packet information. When reading the cached data of data group N, read the cached content data_1, data_2... data_N, and the corresponding cache flag bit 0 simultaneously to obtain the read cache flag bits. After completing the reading of data group N, read the cached data and cache flag bits of data group M in the same way.
[0064] Further, to ensure the accuracy and integrity of the data, the cached data read can also be verified to determine whether an error occurred during transmission. If the verification result is correct, the subsequent steps are continued; if the verification result is incorrect, the cached data is read again until the correct cached data is obtained. The cached data read and the read cache flag bit can be temporarily stored in a temporary storage area for subsequent use.
[0065] Step 430: Compare the read cache flag bit with the read group flag bit corresponding to the data group to obtain a flag bit comparison result.
[0066] As above, by comparing the read cache flag bit with the read group flag bit corresponding to the data group, it is determined whether the data reading is accurate based on the obtained flag bit comparison result. If the read cache flag bit is the same as the read group flag bit, it indicates that the data reading is correct, and the subsequent steps are continued; if the read cache flag bit is different from the read group flag bit, it indicates that there is an error in the data reading, and there may be a case of multiple reads or missed reads. At this time, an error handling step needs to be executed to ensure the accuracy and integrity of the data.
[0067] In some alternative embodiments, specifically, the read cache flag bit is used to identify whether the cached data has been read. When reading the cached data, comparing the read cache flag bit with the read group flag bit corresponding in the data grouping information can obtain a flag bit comparison result. If the flag bit comparison results are consistent, it indicates that the cached data is read correctly; if the flag bit comparison results are inconsistent, it indicates that there is an error in the cached data reading, and there may be a case of multiple reads or missed reads.
[0068] For the case of multiple reads, that is, the read cache flag bit indicates that the data has been read, but in fact the data reading module did not request to read the data. At this time, the current read signal can be set to invalid, so that the cached data still remains in the second cache structure, and a multiple read message is output to the data reading module. After receiving the multiple read message, the data reading module can cancel the current reading operation and re-read the data in the first cache structure and the second cache structure according to the process.
[0069] For the case of missed reads, that is, the read cache flag bit indicates that the data has not been read, but in fact the data reading module has requested to read the data but failed to successfully read the complete data. At this time, the remaining amount belonging to the previous data group in the second cache structure can be completely read out and placed in the third cache structure, and a missed read message is output to the data reading module. After receiving the missed read message, the data reading module can read the remaining data from the third cache structure, and then re-read the data in the first cache structure and the second cache structure according to the process.
[0070] By comparing the read cache flag bit with the read group flag bit, the read status of the cache data can be accurately judged, and corresponding measures can be taken to handle the situation of over-reading or under-reading, so as to ensure the accuracy of data reading. At the same time, through the pre-reading mechanism, the cache data can be read in advance, further improving the efficiency of data processing.
[0071] Further, in the case of under-reading, when all the remaining amounts belonging to the previous data group in the second cache structure are read out and placed in the third cache structure, the reading operation of the data reading module can be paused first to avoid interfering with the data in the third cache structure FIFO3. Then, the remaining data belonging to the previous data group in the second cache structure FIFO2 is completely copied to the third cache structure FIFO3, and the accuracy and integrity of the data during the copying process are ensured. After the copying is completed, the data reading module is notified that the under-reading situation has been processed and the subsequent data reading operation can continue.
[0072] In addition, when determining the under-read cache data, the range of under-read data can be determined by recording the end position of the last successfully read data group and the position of the first cache data that does not match the read group flag bit encountered during the current reading process. Specifically, if it is found during the reading process that the read cache flag bit does not match the read group flag bit, and this position is after the end position of the last successfully read data group, then the data between the end position of the last successfully read data group and the current position can be determined as the under-read data. In this way, the under-read data can be accurately located, providing an accurate basis for subsequent data recovery and processing. After determining the under-read data, it can be read out from the third cache structure FIFO3 and combined with the data grouping information for error correction to ensure the accuracy and integrity of the data.
[0073] The error correction process can be achieved by comparing the currently read data grouping information with the preset data grouping information for matching verification. If the currently read data grouping information is inconsistent with the preset data grouping information, it means that there is a data error. At this time, the data redundancy feature in the cache structure can be used to locate and correct the error data by comparing the data in different cache structures. At the same time, in order to ensure that the corrected data is accurate, the corrected data can be verified again to ensure that it is consistent with the preset data grouping information. In this way, the accuracy and integrity of the data can be effectively improved, ensuring the reliability of the data during transmission and processing.
[0074] Step 440, generate feedback information for the data reading request based on the flag bit comparison result and the cache content.
[0075] Among them, the feedback information may include the confirmation information of successful data reading, or the specific information of data reading error, such as the specific data group information of over-reading or under-reading. The data reading module can confirm the data reading status according to the feedback information, and take corresponding measures to handle the possible errors, such as re-reading the data or performing error correction.
[0076] In some alternative embodiments, when generating the feedback information for the data reading request based on the flag bit comparison result and the cache content, if the flag bit comparison result indicates that the read cache flag bit is the same as the read packet flag bit, the unread amount of the unread cache flag bit corresponding to the read packet flag bit is obtained; if the unread amount is zero and the data packet information in the first cache structure is empty, the feedback information of correct reading is generated based on the cache content. If the unread amount is not zero, or the data packet information in the first cache structure is not empty, the feedback information of reading error is generated based on the flag bit comparison result and the cache content, and the feedback information of reading error includes the error type and the error location. After receiving the feedback information of reading error, the data reading module can locate the specific error data according to the error type and the error location, and take corresponding error handling measures, such as re-reading the data, performing data error correction or marking the error data as abnormal data, etc., to ensure the accuracy and integrity of the data.
[0077] In some alternative embodiments, when generating feedback information for a data read request based on the flag bit comparison result and the cache content, if the flag bit comparison result indicates that the read cache flag bit is different from the read packet flag bit, and the next cache flag bit read is also different from the read cache flag bit, it is determined that there is a multiple read error in the cache data. At the same time, the cache data in the second cache structure remains unchanged. Based on the multiple read error, feedback information for the data read request is generated. The feedback information clearly indicates the specific data group and the multiple read position of the multiple read error. After receiving this feedback information, the data read module can cancel the data read operation for the multiple read data and re-read the data in the first cache structure and the second cache structure according to the established process to ensure the accuracy and integrity of the data. If the flag bit comparison result indicates that the read cache flag bit is different from the read packet flag bit, and the next cache flag bit read is the same as the read packet flag bit, it is determined that there is a missed read error in the cache data. At this time, all the remaining amount of the previous data group in the second cache structure is read out and placed in the third cache structure, and feedback information for the data read request is generated based on the missed read error. The feedback information clearly indicates the specific data group and the missed read position of the missed read error. After receiving this feedback information, the data read module can read the remaining data from the third cache structure and then re-read the data in the first cache structure and the second cache structure according to the established process to ensure the accuracy and integrity of the data. By generating feedback information containing detailed error information, the data read module can accurately locate the specific error data and take corresponding measures for processing, thereby improving the accuracy and efficiency of data processing.
[0078] Specifically, when it is determined that there is a missed read error in the cache data and all the remaining amount of the previous data group in the second cache structure needs to be read out and placed in the third cache structure, the read cache flag bit of the current data group in the second cache structure can be updated first and marked as read to avoid reading this part of the data again later. Then, continue to read the subsequent data from the second cache structure until the end flag bit of the previous data group is read or the predetermined read amount is reached. Place the remaining amount of data of the previous data group read in the third cache structure and update the cache flag bit in the third cache structure for subsequent data processing and reading. At the same time, to ensure the accuracy and integrity of the data, the data placed in the third cache structure can also be verified to determine whether an error has occurred during the transmission process. If the verification result is correct, continue to execute the subsequent steps; if the verification result is incorrect, re-read and verify the data until the correct data is obtained. Through this operation, it can be ensured that when a missed read error occurs, the remaining amount of data of the previous data group can be accurately obtained and placed in the third cache structure for subsequent data processing and reading.
[0079] In some alternative embodiments, when generating feedback information for a data read request based on the flag bit comparison result and the cache content, if there are multiple read errors in the cache data, the cache data belonging to the current data group and the next data group in the second cache structure is discarded; based on the read results of the cache data belonging to the remaining data groups, feedback information for the data read request is generated. The feedback information may include the range of data groups involved in the multiple read errors and the specific positions of the multiple reads. After receiving this feedback information, the data read module can skip the currently multiply read data groups and continue to read the data of subsequent data groups to ensure the continuity and integrity of the data. At the same time, in order to avoid the impact of multiple read errors on the data processing flow, the data read module can be reset after discarding the multiply read data to ensure the accuracy of subsequent data read operations. In addition, for the handling of multiple read errors, error logs can be recorded for subsequent data analysis and error tracking to further improve the reliability and stability of data processing.
[0080] In some other alternative embodiments, when it is determined that there are multiple read errors in the cache data, in addition to discarding the cache data belonging to the current data group and the next data group in the second cache structure, the number and specific circumstances of the multiple read errors can also be recorded for subsequent data quality analysis and optimization. At the same time, in addition to including the specific data groups and positions of the multiple read errors in the generated feedback information, the number of multiple read errors and possible cause analysis can also be included, so that the data read module can better understand the error situation and take corresponding corrective measures.
[0081] For the handling of under-read errors, in addition to reading out all the remaining amounts belonging to the previous data group in the second cache structure and placing them in the third cache structure, and generating feedback information including specific information about the under-read errors, the remaining data in the third cache structure can also be verified and repaired to restore as complete data as possible. If it cannot be repaired, it is clearly marked in the feedback information so that the data read module can take further remedial measures.
[0082] In addition, in order to improve the efficiency and accuracy of data processing, some optimization measures can also be introduced in the embodiments. For example, a parallel processing method can be adopted to read the data in the first cache structure and the second cache structure simultaneously to reduce the waiting time for data reading. Additionally, prefetching and caching technologies can be adopted to pre-read and cache the data that may be needed to further improve the efficiency of data processing.
[0083] In summary, the cache data processing method provided by the present invention can accurately judge the read status of cache data in the scenario of reading and writing data streams with a dual FIFO structure, and take corresponding measures to handle multiple read or under-read errors, thereby improving the accuracy and efficiency of data processing. This method can be widely applied to various electronic devices, providing strong support for data processing.
[0084] Figure 5 shows a flowchart of another embodiment of the cache data processing method of the present invention. As Figure 5 shown, the method includes the following steps:
[0085] Step 510, obtain the data reading request sent by the data reading module, and read the data packet information cached in the first cache structure based on the data reading request.
[0086] For details, please refer to Figure 1 step 410 of the shown embodiment, which will not be elaborated here.
[0087] Step 520, based on the data packet information, read the cached data cached in the second cache structure to obtain the cached content corresponding to each data group in the data packet information, and the read cache flag bit corresponding to the cached content.
[0088] For details, please refer to Figure 1 step 420 of the shown embodiment, which will not be elaborated here.
[0089] Step 530, compare the read cache flag bit with the read packet flag bit corresponding to the data group to obtain the flag bit comparison result.
[0090] For details, please refer to Figure 1 step 430 of the shown embodiment, which will not be elaborated here.
[0091] Step 540, generate feedback information for the data reading request based on the flag bit comparison result and the cached content.
[0092] Specifically, the above step 540 includes:
[0093] Step 5401, if the flag bit comparison result indicates that the read cache flag bit is different from the read packet flag bit, and the next read cache flag bit is still the same as the read cache flag bit, determine that there is a missed read error in the cached data;
[0094] Step 5402, read the unread cached data belonging to the previous data group in the second cache structure into the third cache structure;
[0095] Step 5403, generate feedback information for the data reading request based on the missed read error and the unread cached data read into the third cache structure, so that the data reading module makes up for the unread cached data based on the missed read error.
[0096] Specifically, if the flag bit comparison result indicates that the read cache flag bit is different from the read packet flag bit, and the next cache flag bit read is the same as the read packet flag bit, it is determined that there is a read miss error in the cache data. At this time, all the remaining data of the previous data group in the second cache structure is read out and placed in the third cache structure, and feedback information for the data read request is generated based on the read miss error. The feedback information clearly indicates the specific data group and the read miss position of the read miss error. After receiving this feedback information, the data reading module can read the remaining data from the third cache structure, and then re-read the data in the first cache structure and the second cache structure according to the established process to ensure the accuracy and integrity of the data. By generating feedback information containing detailed error information, the data reading module can accurately locate the specific error data and take corresponding measures to process it, thereby improving the accuracy and efficiency of data processing.
[0097] In some alternative embodiments, when generating feedback information for the data read request based on the flag bit comparison result and the cache content, if there is a read miss error in the cache data, the cache data belonging to the previous data group in the second cache structure is discarded; and feedback information for the data read request is generated based on the read result of the cache data belonging to the remaining data groups.
[0098] In some alternative embodiments, in order to avoid data loss or data inconsistency problems caused by read miss errors, after determining that there is a read miss error in the cache data, in addition to reading out the remaining data of the previous data group in the second cache structure and placing it in the third cache structure, and generating feedback information containing specific information about the read miss error, the current data reading operation can also be immediately paused and a data recovery process can be started. The data recovery process can include attempting to recover the lost data from other backup or redundant data sources, or recovering the complete data through data reconstruction techniques. If the data recovery is successful, the subsequent data reading operation is continued; if the data recovery fails, an error log is recorded and the data reading module is notified to take further remedial measures, such as re-requesting the data or marking the data as unavailable.
[0099] In some alternative embodiments, the data packet information cached in the first cache structure can also be pre-read to obtain pre-read packet information; based on the pre-read packet information, the cache data cached in the second cache structure is pre-read to obtain pre-read cache data; if a data read request sent by the data reading module is received, feedback information for the data read request is generated based on the pre-read cache data, and by preparing the data that may be needed in advance, the delay of data reading is further reduced and the real-time performance of data processing is improved.
[0100] Further, in order to improve the real-time performance and response speed of data processing, before the data reading module sends a data reading request, the data in the first cache structure and the second cache structure can be pre-read. Specifically, a pre-reading module can be set up. This pre-reading module monitors the data status in the first cache structure and the second cache structure in real time or periodically. Once it detects that new data packet information or cached data is written, it immediately performs a pre-reading operation and stores the pre-read data in the pre-reading buffer. When the data reading module sends a data reading request, the pre-reading module can quickly search for and return the required data from the pre-reading buffer, thereby greatly reducing the waiting time for data reading and improving the efficiency of data processing.
[0101] In summary, the cache data processing method provided by the present invention realizes the goal of accurately judging the cache data reading status and effectively processing errors in the scenario of reading and writing data streams with a dual-FIFO structure by introducing a comparison mechanism of read cache flags and read packet flags, as well as corresponding multiple-read and less-read error handling strategies. At the same time, by introducing optimization measures such as pre-reading and caching technologies, and parallel processing strategies, the efficiency and real-time performance of data processing are further improved.
[0102] Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by means of software plus a necessary general hardware platform. Of course, it can also be implemented by hardware, but in many cases, the former is a better implementation method.
[0103] Figure 6 The structural schematic diagram of an embodiment of a code retrieval device according to the present invention is shown. As Figure 6 shown, the device includes:
[0104] A data acquisition module 610, configured to acquire the data reading request sent by the data reading module, and read the data packet information cached in the first cache structure based on the data reading request;
[0105] A content reading module 620, configured to read the cached data cached in the second cache structure based on the data packet information to obtain the cached content corresponding to each data group in the data packet information, and the read cache flag corresponding to the cached content;
[0106] A data comparison module 630, configured to compare the read cache flag with the read packet flag corresponding to the data group to obtain a flag comparison result;
[0107] A data feedback module 640, configured to generate feedback information for the data reading request based on the flag comparison result and the cached content.
[0108] In an optional embodiment, the data feedback module 640 includes:
[0109] The first flag bit comparison unit is configured to obtain the unread quantity of the unread cache flag bit corresponding to the read packet flag bit if the flag bit comparison result indicates that the read cache flag bit is the same as the read packet flag bit;
[0110] The first feedback information generation unit is configured to generate feedback information indicating correct reading based on the cache content if the unread quantity is zero and the data packet information in the first cache structure is empty.
[0111] In an optional implementation manner, the data feedback module 640 further includes:
[0112] The second flag bit comparison unit is configured to determine that there is a multiple reading error in the cache data and keep the cache data in the second cache structure unchanged if the flag bit comparison result indicates that the read cache flag bit is different from the read packet flag bit and the next cache flag bit read is also different from the read cache flag bit;
[0113] The second feedback information generation unit is configured to generate feedback information for the data reading request based on the multiple reading error.
[0114] In an optional implementation manner, the data feedback module 640 further includes:
[0115] The third flag bit comparison unit is configured to determine that there is a missing reading error in the cache data if the flag bit comparison result indicates that the read cache flag bit is different from the read packet flag bit and the next cache flag bit read is still the same as the read cache flag bit;
[0116] The unread cache data reading-in unit is configured to read the unread cache data belonging to the previous data group in the second cache structure into the third cache structure;
[0117] The third feedback information generation unit is configured to generate feedback information for the data reading request based on the missing reading error and the unread cache data read into the third cache structure, so that the data reading module makes up for the unread cache data based on the missing reading error.
[0118] In an optional implementation manner, the data feedback module 640 further includes:
[0119] The first cache data discarding unit is configured to discard the cache data belonging to the previous data group in the second cache structure if there is a missing reading error in the cache data;
[0120] The fourth feedback information generation unit is configured to generate feedback information for the data reading request based on the reading result of the cache data belonging to the remaining data groups.
[0121] In an optional implementation manner, the data feedback module 640 further includes:
[0122] A second cache discard data unit, configured to discard the cache data belonging to the current data group and the next data group in the second cache structure if there are multiple read errors in the cache data;
[0123] A fifth feedback information generation unit, configured to generate feedback information for the data read request based on the read results of the cache data belonging to the remaining data groups.
[0124] In an optional implementation manner, the data feedback module 640 is further configured to pre-read the data grouping information cached in the first cache structure to obtain pre-read grouping information; based on the pre-read grouping information, pre-read the cache data cached in the second cache structure to obtain pre-read cache data; if a data read request sent by the data read module is received, generate feedback information for the data read request based on the pre-read cache data.
[0125] For the descriptions of the features in the corresponding embodiments of the cache data processing device, reference may be made to the relevant descriptions in the corresponding embodiments of the cache data processing method, which will not be elaborated herein one by one.
[0126] An embodiment of the present application further provides an electronic device, as Figure 7 shown, including a memory 10 and a processor 20. A computer program is stored in the memory 10, and the processor 20 is configured to run the computer program to execute the steps in any of the above-mentioned embodiments of the cache data processing method.
[0127] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, and the computer program is configured to execute the steps in any of the above-mentioned embodiments of the cache data processing method when running.
[0128] In an exemplary embodiment, the above-mentioned computer-readable storage medium may include, but is not limited to: various media such as a USB flash drive, a read-only memory (ROM for short), a random access memory (RAM for short), a mobile hard disk, a magnetic disk, or an optical disc that can store a computer program.
[0129] An embodiment of the present application further provides a computer program product, the above-mentioned computer program product includes a computer program, and when the computer program is executed by a processor, the steps in any of the above-mentioned embodiments of the cache data processing method are implemented.
[0130] An embodiment of the present application further provides another computer program product, including a non-volatile computer-readable storage medium storing a computer program, and the computer program, when executed by a processor, implements the steps in any of the above-described embodiments of the cache data processing method.
[0131] Those skilled in the art can further realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present application.
[0132] The above has introduced in detail a cache data processing method, apparatus, electronic device, and storage medium provided by the present application. Specific examples are used herein to elaborate on the principle and implementation manner of the present application. The description of the above embodiments is only used to help understand the method and its core idea of the present application. It should be noted that for those of ordinary skill in the art in the technical field, without departing from the principle of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the protection scope of the claims of the present application.
Claims
1. A cache data processing method, characterized in that: include: Acquire a data reading request sent by a data reading module, and read the data group information cached in the first cache structure based on the data reading request; Based on the data grouping information, read the cache data cached in the second cache structure to obtain cache content corresponding to each data group in the data grouping information and a read cache flag corresponding to the cache content; Compare the read cache flag bit with the read group flag bit corresponding to the data group to obtain a flag bit comparison result; Based on the flag bit comparison result and the cache content, feedback information for the data read request is generated.
2. The method according to claim 1, characterized in that The generating feedback information for the data read request based on the flag bit comparison result and the cache content includes: If the flag bit comparison result indicates that the read cache flag bit is the same as the read group flag bit, then obtaining the unread amount of the unread cache flag bit corresponding to the read group flag bit; If the unread amount is zero and the data group information in the first cache structure is empty, feedback information indicating that the reading is correct is generated based on the cache content.
3. The method according to claim 1, characterized in that The step of generating feedback information for the data read request based on the flag bit comparison result and the cache content further includes: If the flag bit comparison result indicates that the read cache flag bit is different from the read group flag bit, and the next cache flag bit read is also different from the read cache flag bit, it is determined that there is a multiple read error in the cache data, and the cache data in the second cache structure is kept unchanged; Based on the multiple read errors, feedback information for the data read request is generated.
4. The method according to claim 1, characterized in that: The step of generating feedback information for the data read request based on the flag bit comparison result and the cache content further includes: If the flag bit comparison result indicates that the read cache flag bit is different from the read group flag bit, and the next cache flag bit read is still the same as the read cache flag bit, it is determined that there is an under-read error in the cache data; Reading the unread cache data belonging to the previous data group in the second cache structure into the third cache structure; Based on the minor read error and the unread cache data read into the third cache structure, feedback information for the data read request is generated, so that the data read module reads the unread cache data based on the minor read error.
5. The method according to claim 4, characterized in that The step of generating feedback information for the data read request based on the flag bit comparison result and the cache content further includes: If there is an under-read error in the cache data, discarding the cache data belonging to the previous data group in the second cache structure; Based on the read result of the cache data belonging to the remaining data group, feedback information for the data read request is generated.
6. The method according to claim 3, characterized in that The step of generating feedback information for the data read request based on the flag bit comparison result and the cache content further includes: If there is a multiple read error in the cache data, discarding the cache data belonging to the current data group and the next data group in the second cache structure; Based on the read result of the cache data belonging to the remaining data group, feedback information for the data read request is generated.
7. The method according to claim 1, characterized in that After obtaining the data reading request sent by the data reading module, the method further includes: Pre-reading the data group information cached in the first cache structure to obtain pre-read group information; Based on the pre-read grouping information, pre-read the cache data cached in the second cache structure to obtain pre-read cache data; If a data reading request sent by the data reading module is received, feedback information for the data reading request is generated based on the pre-read cache data.
8. A cache data processing device, characterized in that: include: A data acquisition module, configured to acquire a data read request sent by the data reading module, and read the data group information cached in the first cache structure based on the data read request; A content reading module, configured to read cache data cached in a second cache structure based on the data grouping information, so as to obtain cache content corresponding to each data group in the data grouping information, and a read cache flag corresponding to the cache content; A data comparison module, used for comparing the read cache flag bit with the read group flag bit corresponding to the data group to obtain a flag bit comparison result; A data feedback module is used to generate feedback information for the data read request based on the flag bit comparison result and the cache content.
9. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the cache data processing method according to any one of claims 1 to 7 when executing the computer program.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the cache data processing method according to any one of claims 1 to 7.