Instruction sending method, instruction receiving method and related equipment

Abstract

The invention discloses an instruction sending method, an instruction receiving method and related equipment. When a target program running on a processor core needs to send an operation instruction to external equipment, the operation instruction is stored in a target storage unit corresponding to the target program; the physical address of the target storage unit has a corresponding relationship with the instruction receiving virtual address of the external equipment, and the corresponding relationship is stored in the page table of the target program, and sending a page table identifier corresponding to the page table of the target program to the external equipment, the external device obtains the physical address corresponding to the instruction receiving virtual address from the corresponding page table according to the page table identifier, and obtains and executes the operation instruction from the target storage unit according to the physical address. As the target program only needs to have the target storage unit corresponding to the instruction receiving virtual address of the external equipment, and the virtual equipment does not need to be created, the external equipment can meet the use requirements of more target programs, such as thousands of target programs.

Description

Technical Field

[0001] This application relates to the field of computer technologies, and in particular, to an instruction sending method, an instruction receiving method, and related devices. Background Art

[0002] SVA (Shared Virtual Addressing) technology allows a processor including one or more processor cores to share a page table with an external device. To solve the problem of shared use security when multiple applications running on a processor core use the same external device, a current method is to use SR-IOV (Single Root I / O virtualization) technology to virtualize the external device into multiple virtual devices, and provide a virtual device for each application that needs to use the external device, so as to solve the data security problem when different applications share the same external device. However, since the number of virtual devices is limited, the number of applications that can use virtual devices is also limited. Therefore, virtual devices cannot meet the usage requirements of a larger number of applications for external devices. Summary of the Invention

[0003] This application discloses an instruction sending method, an instruction receiving method, and related devices to solve the problem that external devices cannot meet the usage requirements of a larger number of applications.

[0004] In a first aspect, this application discloses an instruction sending method, which is applied to a processor core of a processor, and the processor core is connected to an external device of the processor. The method includes: when a target program running on the processor core needs to send an operation instruction to the external device, storing the operation instruction in a target storage unit corresponding to the target program; a physical address of the target storage unit has a corresponding relationship with an instruction receiving virtual address of the external device; the corresponding relationship is stored in a page table of the target program; the instruction receiving virtual address is a virtual address pre-allocated by the processor core to the external device; sending a page table identifier corresponding to the page table of the target program to the external device, so that the external device obtains, according to the page table identifier, a physical address corresponding to its instruction receiving virtual address from the page table of the target program, and obtains the operation instruction from the target storage unit according to the physical address.

[0005] In some embodiments of the present application, the operation instruction includes an instruction status and instruction content. Storing the operation instruction in a target storage unit corresponding to the target program includes: marking the instruction status of the operation instruction as invalid; storing the instruction content of the operation instruction in the target storage unit; and marking the instruction status of the operation instruction as valid.

[0006] In some embodiments of the present application, sending a page table identifier corresponding to a page table of the target program to the external device includes: obtaining a status value of the external device; if the status value is a preset value, sending the page table identifier corresponding to the page table of the target program to the external device; the preset value is used to indicate that the external device is in an idle state.

[0007] In some embodiments of the present application, the external device includes a doorbell register, the doorbell register is used to receive and store the page table identifier sent by the processor core, the status value of the external device includes the value of the doorbell register, and sending the page table identifier corresponding to the page table of the target program to the external device includes: if the value of the doorbell register is a preset value, storing the page table identifier corresponding to the page table of the target program in the doorbell register.

[0008] In some embodiments of the present application, the target program includes an operating system or an application.

[0009] In a second aspect, the present application also discloses an instruction receiving method, which is applied to an external device of a processor. The processor includes a processor core, and the processor core is connected to the external device. The method includes: receiving a page table identifier sent by the processor core; obtaining a physical address corresponding to an instruction receiving virtual address of the external device from a page table of a target program corresponding to the page table identifier; the physical address is a physical address of a target storage unit corresponding to the target program; there is a corresponding relationship between the physical address of the target storage unit and the instruction receiving virtual address of the external device; the corresponding relationship is stored in the page table of the target program; the instruction receiving virtual address is a virtual address pre-allocated by the processor core to the external device; and obtaining the operation instruction from the target storage unit according to the physical address.

[0010] In some embodiments of the present application, after obtaining the operation instruction, it further includes: marking the instruction status of the operation instruction in the target storage unit as invalid.

[0011] In some embodiments of the present application, after obtaining the operation instruction, the method further includes: if the external device supports parallel execution of multiple operation instructions, execute the operation instruction, and before or before completing the execution of the operation instruction, set the status value of the external device to a preset value; the preset value is used to indicate that the external device is in an idle state; if the external device does not support parallel execution of multiple operation instructions, execute the operation instruction, and after completing the execution of the operation instruction, set the status value of the external device to a preset value.

[0012] In some embodiments of the present application, the external device includes a doorbell register, the doorbell register is used to receive and store the page table identifier sent by the processor core, the status value of the external device includes the value of the doorbell register, and setting the status value of the external device to a preset value includes: setting the value of the doorbell register to a preset value; receiving the page table identifier sent by the processor core includes: obtaining the page table identifier sent by the processor core from the doorbell register.

[0013] In some embodiments of the present application, executing the operation instruction includes: determining whether the instruction status of the operation instruction is valid; if the instruction status of the operation instruction is valid, execute the operation instruction.

[0014] In some embodiments of the present application, the target program includes an operating system or an application.

[0015] In a third aspect, the present application also discloses a processor, the processor includes a processor core, and the processor core is configured to execute the instruction sending method described in any one of the above.

[0016] In a fourth aspect, the present application also discloses an external device of a processor, the processor includes a processor core, the processor core is connected to the external device, and the external device includes a processor and a memory; wherein, the memory is connected to the processor, and the memory is used to store a computer program; the processor is used to implement the instruction receiving method described in any one of the above by running the computer program stored in the memory.

[0017] In a fifth aspect, the present application also discloses a computer-readable storage medium, on which a computer program is stored, and when the computer program is run by a processor, it executes the instruction sending method described in any one of the above or executes the instruction receiving method described in any one of the above.

[0018] The instruction sending method, instruction receiving method, and related devices disclosed in this application, when the target program running on the processor core needs to send an operation instruction to an external device, store the operation instruction in the target storage unit corresponding to the target program. The physical address of the target storage unit has a corresponding relationship with the instruction receiving virtual address of the external device, and this corresponding relationship is stored in the page table of the target program. The instruction receiving virtual address is the virtual address pre-allocated by the processor core to the external device. Therefore, after sending the page table identifier corresponding to the page table of the target program to the external device, the external device can obtain the physical address corresponding to its instruction receiving virtual address from the page table of the target program according to the page table identifier, and obtain and execute the operation instruction from the target storage unit according to the physical address. Since the target program (such as an application) only needs to have a target storage unit corresponding to the instruction receiving virtual address of the external device to use the external device to execute its operation instructions, neither creating a virtual device nor limiting the number of target programs that can use the external device is required. Therefore, the external device can meet the usage requirements of a larger number of target programs, such as thousands of them. Description of the Drawings

[0019] In order to more clearly illustrate the technical solutions in the embodiments of this application or the background art, the drawings required for use in the embodiments of this application or the background art will be described below.

[0020] Figure 1 It is a schematic structural diagram of a processor disclosed in an embodiment of this application.

[0021] Figure 2 It is a flowchart of an instruction sending method disclosed in an embodiment of this application.

[0022] Figure 3 It is a flowchart of an instruction receiving method disclosed in an embodiment of this application.

[0023] Figure 4 It is a schematic structural diagram of an external device disclosed in an embodiment of this application. Detailed Embodiments

[0024] The technical solutions in the embodiments of this application will be described below with reference to the drawings in the embodiments of this application. According to the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the scope of protection of this application.

[0025] To solve the security problem of shared use when multiple applications need to use the same external device, one current method is to utilize the SR-IOV (Single Root I / O virtualization) technology to virtualize the external device into multiple virtual devices and provide each application that needs to use the external device with a virtual device. By enabling different applications to use different virtual devices, the data security problem when different applications share the same external device can be solved. However, since the number of virtual devices is limited, the number of applications that can use the virtual devices is also limited. Therefore, the virtual devices cannot meet the usage requirements of a larger number of applications.

[0026] Based on this, the present application discloses an instruction processing solution. When any application running on a processor core needs to use an external device, the operation instruction that the application needs the external device to execute is stored in a target storage unit in the storage unit of the application that has a corresponding relationship with the instruction reception virtual address of the external device, and the page table identifier corresponding to the page table of the application storing this corresponding relationship is sent to the external device, so that the external device can obtain the physical address corresponding to its instruction reception virtual address from the page table according to this page table identifier, and obtain and execute the operation instruction of the application from the target storage unit according to this physical address. In this way, not only can the data security problem when different applications share the same external device be solved, but also the number of applications using the external device is not limited.

[0027] As an optional implementation of the disclosed content of the present application, an embodiment of the present application discloses an instruction sending method, and this instruction sending method is applied to the processor core of a processor.

[0028] As Figure 1 shown, Figure 1 is a schematic structural diagram of a processor disclosed in an embodiment of the present application. The processor 10 is connected to a memory 11 and an external device 12. The processor 10 includes a processor core 100, a Memory Manage Unit (MMU) 101, and a System Memory Management Unit (SMMU) 102.

[0029] Among them, the processor core 100 can access the data in the memory 11 through the memory management unit 101, and the memory management unit 101 is used to implement the conversion between the virtual address and the physical address between the processor core 100 and the memory 11. The external device 12 can access the data in the memory 11 in DMA mode through the system memory management unit 102, and the system memory management unit 102 is used to implement the conversion between the virtual address and the physical address between the external device 12 and the memory 11. Among them, the external device 12 supports the SVA technology, that is, the external device 12 can share the page table storing the corresponding relationship between the virtual address and the physical address with the processor 10.

[0030] As Figure 2 shown, Figure 2 is a flowchart of an instruction sending method disclosed in an embodiment of the present application. The instruction sending method includes:

[0031] S101: When the target program running on the processor core needs to send an operation instruction to the external device, store the operation instruction in the target storage unit corresponding to the target program; the physical address of the target storage unit has a corresponding relationship with the instruction receiving virtual address of the external device; the corresponding relationship is stored in the page table of the target program; the instruction receiving virtual address is the virtual address pre-allocated by the processor core to the external device.

[0032] In the embodiment of the present application, the target program running on the processor core 100 includes: an operating system or an application running on the processor core 100. For example, when any application or operating system running on the processor core 100 needs to send an operation instruction to the external device 12, the processor core 100 (specifically, the application or operating system running on the processor core 100) will store the operation instruction in the target storage unit corresponding to the application or the operating system.

[0033] Among them, the operation instruction is used to control the external device 12 to perform operations such as data transfer or data encryption and decryption. The target storage unit is a part of the storage unit in the memory 11 allocated by the processor core 100 to the application or the operating system. The instruction receiving virtual address of the external device is the virtual address pre-allocated by the processor core 100 to the external device. Each external device 12 has only one instruction receiving virtual address. Moreover, the processor core 100 has pre-established the corresponding relationship between the target storage unit of the application or the operating system and the instruction receiving virtual address of the external device, and stores the corresponding relationship between the physical address of the target storage unit of the application or the operating system and the instruction receiving virtual address of the external device in the page table of the application or the operating system.

[0034] S102: Send the page table identifier corresponding to the page table of the target program to the external device, so that the external device can obtain the physical address corresponding to its instruction reception virtual address from the page table according to the page table identifier, and obtain the operation instruction from the target storage unit according to the physical address.

[0035] In the embodiment of the present application, after the processor core 100 stores the operation instruction in the target storage unit corresponding to the target program, it will send the page table identifier (Process Address Space ID, abbreviated as PASID) corresponding to the page table of the target program to the external device 12. Among them, the processor core 100 can obtain the page table corresponding to the application or the operating system and the page table identifier corresponding to the page table through the memory management unit 101.

[0036] Moreover, each page table has a corresponding page table identifier, that is, different page table identifiers can distinguish different page tables, so that after receiving the page table identifier, the external device 12 can obtain the corresponding page table according to the page table identifier, and obtain the physical address corresponding to the instruction reception virtual address of the external device 12 from the corresponding page table, and obtain and execute the operation instruction from the corresponding target storage unit according to the physical address.

[0037] It should be noted that the physical addresses of the target storage units for storing operation instructions of different applications are all different, and the physical addresses of the target storage units for storing operation instructions of applications and the operating system are also different. However, the instruction reception virtual addresses of the same external device 12 are the same. In this way, when different applications or the operating system need to use the external device 12, they can directly store the operation instructions in the target storage unit corresponding to the instruction reception virtual address of the external device 12 in its storage unit, which is simple and convenient to operate.

[0038] Because the processor core 100 does not send the virtual address of any application to the external device 12, when other applications use the external device 12, they cannot forge the virtual address of the application to obtain or rewrite the data of the application, so as to ensure the data security of any application, and thus solve the data security problem when different applications share the same external device 12.

[0039] Because the target program (such as an application) only needs to have a target storage unit corresponding to the instruction reception virtual address of the external device 12 to use the external device 12 to execute its operation instructions, neither creating a virtual device nor restricting the number of target programs that can use the external device 12 is required. Therefore, the external device 12 can meet the usage requirements of a larger number of target programs, such as thousands of target programs.

[0040] Moreover, any application only exclusively occupies the external device 12 briefly when it needs to use the external device 12. When it does not need to use the external device 12, other applications can use and exclusively occupy the external device 12, that is, the external device 12 does not limit the number of applications using it.

[0041] In some embodiments of the present application, when an application running on the processor core 100 needs to use the external device 12, the page table identifier sent by the processor core 100 (specifically, the application running on the processor core 100) to the external device 12 is the page table identifier of the application. The page table corresponding to the page table identifier is the page table of the application, and this page table is used to store the correspondence between the physical address and the virtual address of the data of the application.

[0042] Of course, the present application is not limited thereto. In some other embodiments, when the operating system running on the processor core 100 needs to use the external device 12, the page table identifier sent by the processor core 100 (specifically, the operating system running on the processor core 100) to the external device 12 is the page table identifier of the operating system. The page table corresponding to the page table identifier is the page table of the operating system, and this page table is used to store the correspondence between the physical address and the virtual address of the data of the operating system.

[0043] Generally speaking, an application uses a peripheral through the user-mode library of the peripheral. This user-mode library will first request the kernel driver of the external device to obtain the virtual address for receiving instructions corresponding to the external device, and then write an operation instruction to the target storage unit corresponding to the virtual address for receiving instructions. If the kernel driver of the external device does not have a virtual address for receiving instructions, it requests the operating system kernel to allocate a virtual address for receiving instructions for the external device.

[0044] In some embodiments of the present application, the operating system kernel of the processor core 100 can respond to a virtual address allocation request sent by the driver of the external device 12 and send the allocated virtual address for receiving instructions to the external device 12.

[0045] In some specific embodiments, the operating system kernel of the processor core 100 reserves a preset number of virtual addresses for multiple external devices 12 during the initialization phase. For the convenience of managing the virtual addresses for receiving instructions, the preset number of reserved virtual addresses can be the highest-end virtual addresses of the user-mode virtual addresses.

[0046] After the operating system kernel of the processor core 100 receives a virtual address allocation request sent by the driver of any external device 12, it will confirm whether an instruction reception virtual address has been allocated for the external device 12. If it has been allocated, it will directly send the allocated instruction reception virtual address to the external device 12; if it has not been allocated, it will allocate an instruction reception virtual address for the external device 12 from the reserved preset number of virtual addresses and send the instruction reception virtual address to the external device 12.

[0047] In some embodiments of the present application, the operation instruction includes an instruction status and an instruction content. Storing the operation instruction in the target storage unit corresponding to the target program includes: marking the instruction status of the operation instruction as invalid; storing the instruction content of the operation instruction in the target storage unit; and marking the instruction status of the operation instruction as valid.

[0048] In this way, even if an attacker sends a forged page table identifier to the external device 12 after the processor core 100 registers the page table with the external device 12, the external device 12 will not execute the operation instruction, so that the attacker cannot obtain the data obtained after the external device 12 executes the operation instruction, thereby further ensuring data security.

[0049] In some embodiments of the present application, the processor core 100 (specifically, an application or an operating system running on the processor core 100) will obtain the status value of the external device 12 and confirm whether the status value is a preset value. If the status value is a preset value, it will send the page table identifier corresponding to the page table of the target program (specifically, an application or an operating system running on the processor core 100) to the external device 12; if the status value is not a preset value, it will not send the page table identifier corresponding to the above page table to the external device 12.

[0050] Among them, the preset value is used to indicate that the external device 12 is in an idle state. That is to say, if the status value of the external device 12 is a preset value, it means that the external device 12 is in an idle state and can receive and execute new operation instructions. If the status value of the external device 12 is not a preset value, it means that the external device 12 is in a busy state and cannot receive or execute new operation instructions. Optionally, the preset value can be 0.

[0051] In some embodiments of the present application, the external device 12 includes a doorbell register, which is used to receive and store the page table identifier sent by the processor core 100. The status value of the external device 12 includes the value of the doorbell register. If the value of the doorbell register is a preset value, the page table identifier corresponding to the page table of the target program will be stored in the doorbell register, so as to send the page table identifier corresponding to the page table of the target program to the external device 12 in this way; if the value of the doorbell register is not a preset value, the page table identifier corresponding to the page table of the target program will not be stored in the doorbell register.

[0052] As another alternative implementation of the disclosure of the present application, embodiments of the present application also disclose an instruction receiving method, which is applied to an external device of a processor. As Figure 1 shown, the instruction receiving method is applied to an external device 12 connected to a processor 10.

[0053] As Figure 3 shown, Figure 3 is a flowchart of an instruction receiving method disclosed in an embodiment of the present application. The instruction receiving method includes the following operations performed by the external device 12:

[0054] S201: Receive a page table identifier sent by a processor core.

[0055] In an embodiment of the present application, when any application or operating system running on a processor core 100 needs to send an operation instruction to an external device 12, the processor core 100 (specifically, the application or operating system running on the processor core 100) stores the operation instruction in a target storage unit corresponding to the application or the operating system, and sends the page table identifier corresponding to the page table of the target program to the external device, so that the external device 12 receives the page table identifier sent by the processor core 100.

[0056] Wherein, the operation instruction is used to control the external device 12 to perform operations such as data transfer or data encryption and decryption. The target storage unit is a part of the storage unit in the memory 11 allocated by the processor core 100 to the application or the operating system. The instruction receiving virtual address of the external device is the virtual address pre-allocated by the processor core 100 to the external device. Each external device 12 has only one instruction receiving virtual address. Moreover, the processor core 100 has pre-established a correspondence between the target storage unit of the application or the operating system and the instruction receiving virtual address of the external device, and stores the correspondence between the physical address of the target storage unit of the application or the operating system and the instruction receiving virtual address of the external device in the page table of the application or the operating system.

[0057] S202: Obtain the physical address corresponding to the instruction receiving virtual address of the external device from the page table of the target program corresponding to the page table identifier.

[0058] In an embodiment of the present application, after the external device 12 receives the page table identifier sent by the processor core 100, it obtains the physical address corresponding to the instruction receiving virtual address of the external device 12 from the page table corresponding to the page table identifier. Wherein, the external device 12 can obtain the page table corresponding to the page table identifier and the physical address corresponding to the instruction receiving virtual address through a system memory management unit 102.

[0059] S203: Obtain an operation instruction from the target storage unit according to the physical address.

[0060] In the embodiments of the present application, if the external device 12 can obtain the physical address, then according to the physical address, obtain the operation instruction from the target storage unit in DMA mode, cache the operation instruction, and put the operation instruction into the instruction cache queue to execute the operation instruction in the order of the instruction cache queue. If the external device 12 cannot obtain the physical address, the process ends.

[0061] Because the external device 12 uses the instruction received virtual address stored in itself and the received page table identifier to obtain the operation instruction, when an attacker cannot write an operation instruction to the target storage unit corresponding to the instruction received virtual address of other applications, the attacker cannot deceive the external device to operate on the memory space of other applications.

[0062] Moreover, any application exclusively occupies the external device 12 only when it needs to use the external device 12. When it does not need to use the external device 12, other applications can use and exclusively occupy the external device 12, that is, the external device 12 does not limit the number of applications using it. In addition, in the embodiments of the present application, multiple applications can share the same external device 12 without borrowing the SR-IOV technology.

[0063] In some embodiments of the present application, when an application running on the processor core 100 needs to use the external device 12, the page table identifier received by the external device 12 is the page table identifier of the application, and the page table corresponding to the page table identifier is the page table of the application, and this page table is used to store the correspondence between the physical address and the virtual address of the data of the application.

[0064] Of course, the present application is not limited to this. In some other embodiments, when the operating system running on the processor core 100 needs to use the external device 12, the page table identifier received by the external device 12 is the page table identifier of the operating system, and the page table corresponding to the page table identifier is the page table of the operating system, and this page table is used to store the correspondence between the physical address and the virtual address of the data of the operating system.

[0065] In some embodiments of the present application, the driver of the external device 12 also sends a virtual address allocation request to the processor core 100, so that the processor core 100 (specifically, the operating system running on the processor core 100) sends the instruction received virtual address allocated for it to the external device 12.

[0066] In some embodiments of the present application, after obtaining an operation instruction, the external device 12 may mark the instruction status of the original operation instruction, i.e., the operation instruction in the target storage unit, as invalid. In some specific embodiments, the external device 12 may mark the instruction status of the operation instruction in the target storage unit as invalid in a DMA manner. In this way, an attacker cannot make the external device 12 obtain and execute the operation instruction again by sending a forged page table identifier to the external device 12, so that the attacker cannot obtain the data after the external device 12 executes the operation instruction.

[0067] In some embodiments of the present application, if the external device 12 supports parallel execution of multiple operation instructions, after caching the operation instructions, the external device 12 may first set the status value of the external device 12 to a preset value and then execute the operation instructions, so that the external device 12 can execute multiple operation instructions in parallel to improve the instruction execution efficiency of the external device 12. Specifically, the status value of the external device may be set to the preset value before or before the execution of the operation instruction is completed. Of course, the present application is not limited thereto. In some other embodiments, if the external device 12 does not support parallel execution of multiple operation instructions, the external device 12 may also cache the operation instructions, then execute the operation instructions, and after the execution of the operation instruction is completed, set the status value of the external device 12 to the preset value.

[0068] In some embodiments of the present application, when the external device 12 executes an operation instruction, it will first determine whether the instruction status of the operation instruction is valid; if the instruction status of the operation instruction is valid, it will cache and execute the operation instruction and mark the instruction status of the operation instruction in the target storage unit as invalid; otherwise, it will not cache and execute the operation instruction. In this way, even if the attacker sends a forged page table identifier to the external device 12 before the processor core 100 stores the operation instruction in the target storage unit corresponding to the target program, the external device 12 will not execute the operation instruction, so that the attacker cannot obtain the data obtained after the external device 12 executes the operation instruction, thereby further ensuring data security.

[0069] In some embodiments of the present application, as Figure 4 shown, Figure 4 is a schematic structural diagram of an external device disclosed in an embodiment of the present application. Taking the external device 12 as an EP (Endpoint) device as an example, the external device 12 is connected to the system memory management unit 102 through a Root Complex (RC) device. In addition, the external device 12 includes a doorbell register 120, an address register 121, and a control module 122.

[0070] Among them, the doorbell register 120 is used to receive and store the page table identifier sent by the processor core 100. The address register 121 is used to receive and store the instruction reception virtual address sent by the processor core 100. The control module 122 is used to obtain the page table identifier sent by the processor core 100 from the doorbell register 120, obtain the instruction reception virtual address of the external device 12 from the address register 121, and obtain the physical address corresponding to the instruction reception virtual address of the external device 12 from the corresponding page table according to the page table identifier, and obtain and execute the operation instruction from the target storage unit according to the physical address.

[0071] Among them, if the control module 122 can obtain the physical address, the operation instruction is obtained from the target storage unit in DMA mode according to the physical address, and the operation instruction is placed in the instruction cache queue. If the control module 122 cannot obtain the physical address, the doorbell register 120 is cleared and the process ends.

[0072] In some embodiments of the present application, when any application or operating system running on the processor core 100 needs to send an operation instruction to the external device 12, the processor core 100 writes the instruction reception virtual address of the external device 12 into the address register 121, establishes a mapping relationship between the application or operating system and the doorbell register 120, so that the application or operating system can write the page table identifier into the doorbell register 120, and registers the corresponding relationship between the page table identifier and the page table, and sends the page table identifier corresponding to the page table to the external device 12 according to the corresponding relationship between the page table identifier and the page table.

[0073] It should be noted that the operating system running on the processor core 100 will also configure the system memory management unit 102 so that the system memory management unit 102 can support the control module 122 to access the corresponding page table and the corresponding physical address, etc.

[0074] In some embodiments of the present application, the value of the doorbell register 120 represents the status value of the external device 12. If the value of the doorbell register 120 is a preset value, it means that the status value of the external device 12 is a preset value, and the processor core 100 can write the page table identifier corresponding to the above page table into the doorbell register 120. If the value of the doorbell register 120 is not a preset value, it means that the status value of the external device 12 is not a preset value, and the processor core 100 cannot write the page table identifier corresponding to the above page table into the doorbell register 120.

[0075] Moreover, the doorbell register 120 supports atomic compare-and-swap operations. The processor core 100 can write the page table identifier corresponding to the above page table into the doorbell register 120 in an atomic compare-and-swap manner. The control module 122 can also obtain the page table identifier from the doorbell register 120 in an atomic compare-and-swap manner.

[0076] In addition, after the processor core 100 writes the page table identifier corresponding to the above page table into the doorbell register 120, it will modify the value of the doorbell register 120 to a non-preset value. After the control module 122 determines that the value of the doorbell register 120 is a non-preset value, it obtains the page table identifier from the doorbell register 120 and modifies the value of the doorbell register 120 to a preset value. Herein, the non-preset value can be any non-zero value or the value of any page table identifier.

[0077] It should be noted that if the external device 12 supports parallel execution of multiple operation instructions, the control module 122 can first modify the value of the doorbell register 120 to a preset value and then execute the operation instructions, so that the external device 12 can parallelly execute multiple operation instructions to improve the instruction execution efficiency of the external device 12; if the external device 12 does not support parallel execution of multiple operation instructions, the control module 122 can first execute the operation instructions and then modify the value of the doorbell register 120 to a preset value.

[0078] In some embodiments of the present application, after obtaining the operation instruction, the control module 122 can mark the instruction status of the original operation instruction, that is, the operation instruction in the above target storage unit, as invalid. In some embodiments of the present application, when the control module 122 executes the operation instruction, it will first determine whether the instruction status of the operation instruction is valid; if the instruction status of the operation instruction is valid, it will cache and execute the operation instruction and mark the instruction status of the operation instruction in the target storage unit as invalid; otherwise, it will not cache and execute the operation instruction.

[0079] As another alternative implementation of the disclosed content of the present application, embodiments of the present application also disclose a processor, which includes a processor core configured to execute the instruction sending method disclosed in any of the above embodiments.

[0080] As another alternative implementation of the disclosed content of the present application, embodiments of the present application also disclose an external device of a processor, which includes a processor core connected to the external device. The external device includes a processor and a memory; wherein, the memory is connected to the processor and is used to store a computer program; the processor is used to implement the instruction receiving method disclosed in any of the above embodiments by running the computer program stored in the memory.

[0081] As another alternative implementation of the disclosed content of the present application, embodiments of the present application also disclose a computer-readable storage medium, on which a computer program is stored. When the computer program is run by a processor, it executes the instruction sending method disclosed in any of the above embodiments or executes the instruction receiving method disclosed in any of the above embodiments.

[0082] The technical features of the above embodiments can be combined arbitrarily. For the sake of concise description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this specification.

[0083] The above embodiments only express several implementation manners of this specification, and their descriptions are relatively specific and detailed. However, it should not be construed as a limitation on the scope of the patent application. It should be noted that for those of ordinary skill in the art, without departing from the concept of this specification, several modifications and improvements can still be made, and these all belong to the protection scope of this specification. Therefore, the protection scope of the patent of this specification shall be subject to the appended claims.

Claims

1. A method for sending an instruction, characterized in that: The method is applied to a processor core of a processor, the processor core is connected to an external device of the processor, and the method includes: When the target program running on the processor core needs to send an operation instruction to the external device, the operation instruction is stored in a target storage unit corresponding to the target program; the physical address of the target storage unit has a corresponding relationship with the instruction receiving virtual address of the external device; the corresponding relationship is stored in the page table of the target program; the instruction receiving virtual address is a virtual address pre-allocated by the processor core to the external device; The page table identifier corresponding to the page table of the target program is sent to the external device, so that the external device obtains the physical address corresponding to the instruction receiving virtual address from the page table of the target program according to the page table identifier, and obtains the operation instruction from the target storage unit according to the physical address.

2. The method according to claim 1, characterized in that The operation instruction includes an instruction status and an instruction content, and storing the operation instruction in the target storage unit corresponding to the target program includes: marking the instruction status of the operation instruction as invalid; storing the instruction content of the operation instruction in the target storage unit; and marking the instruction status of the operation instruction as valid.

3. The method according to claim 1, characterized in that The sending the page table identifier corresponding to the page table of the target program to the external device includes: Obtaining a status value of the external device; If the state value is a preset value, a page table identifier corresponding to the page table of the target program is sent to the external device; the preset value is used to indicate that the external device is in an idle state.

4. The method according to claim 3, characterized in that The external device includes a doorbell register, the doorbell register is used to receive and store the page table identifier sent by the processor core, the state value of the external device includes the value of the doorbell register, and sending the page table identifier corresponding to the page table of the target program to the external device includes: If the value of the doorbell register is a preset value, the page table identifier corresponding to the page table of the target program is stored in the doorbell register.

5. The method according to claim 1, characterized in that The target program includes an operating system or an application.

6. A command receiving method, characterized in that: The method is applied to an external device of a processor, the processor includes a processor core, the processor core is connected to the external device, and the method includes: Receiving a page table identifier sent by the processor core; Obtaining a physical address corresponding to a virtual address for receiving an instruction of the external device from a page table of a target program corresponding to the page table identifier; the physical address is a physical address of a target storage unit corresponding to the target program; the physical address of the target storage unit has a corresponding relationship with a virtual address for receiving an instruction of the external device; the corresponding relationship is stored in a page table of the target program; the virtual address for receiving an instruction is a virtual address pre-assigned by the processor core to the external device; An operation instruction is obtained from the target storage unit according to the physical address.

7. The method according to claim 6, characterized in that After obtaining the operation instruction, the method further includes: The instruction status of the operation instruction in the target storage unit is marked as invalid.

8. The method according to claim 6, characterized in that After obtaining the operation instruction, the method further includes: If the external device supports executing multiple operation instructions in parallel, the operation instructions are executed, and before executing the operation instructions or before the operation instructions are completed, the state value of the external device is set to a preset value; the preset value is used to indicate that the external device is in an idle state; If the external device does not support executing multiple operation instructions in parallel, the operation instruction is executed, and after the operation instruction is executed, the state value of the external device is set to a preset value.

9. The method according to claim 8, characterized in that The external device includes a doorbell register, and the doorbell register is used to receive and store the page table identifier sent by the processor core. The state value of the external device includes the value of the doorbell register. Setting the state value of the external device to a preset value includes: setting the value of the doorbell register to a preset value; receiving the page table identifier sent by the processor core includes: obtaining the page table identifier sent by the processor core from the doorbell register.

10. The method according to claim 9, characterized in that The executing the operation instruction comprises: Determine whether the instruction status of the operation instruction is valid; If the instruction status of the operation instruction is valid, the operation instruction is executed.

11. The method according to claim 6, characterized in that The target program includes an operating system or an application.

12. A processor, characterized in that: The processor comprises a processor core, and the processor core is configured to execute the instruction sending method according to any one of claims 1 to 5.

13. A processor external device, characterized in that: The processor includes a processor core, which is connected to the external device, and the external device includes a processor and a memory; wherein the memory is connected to the processor, and the memory is used to store a computer program; the processor is used to implement the instruction receiving method as described in any one of claims 6 to 11 by running the computer program stored in the memory.

14. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the instruction sending method according to any one of claims 1 to 5 or the instruction receiving method according to any one of claims 6 to 11 is executed.

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