Method of manufacturing a package substrate

By using a glass core board and immersion etching on the packaging substrate, the problems of circuit damage and high cost in the prior art are solved, realizing low-cost and high-efficiency circuit manufacturing and improving yield.

CN120221419BActive Publication Date: 2026-05-01AALTOSEMI INC
View PDF 2 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
AALTOSEMI INC
Filing Date
2025-05-14
Publication Date
2026-05-01

AI Technical Summary

Technical Problem

The existing vertical double-sided spray etching method results in excess etching solution continuing to etch the copper layer after the bottom copper part is etched, which can damage the circuit and is also costly.

Method used

Double-sided embedded circuit types are made using glass core boards. The metal layer is removed using an immersion etching method to avoid lateral etching. The core board is formed by encapsulating the first circuit layer and conductive pillars with molten glass, and the core board is kept horizontal during etching to avoid lateral etching.

Benefits of technology

It reduced manufacturing costs, improved etching efficiency, prevented circuit damage, and increased yield.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120221419B_ABST
    Figure CN120221419B_ABST
Patent Text Reader

Abstract

A method for manufacturing a package substrate includes providing a substrate structure including a board body, a metal layer formed on the board body, a first wiring layer formed on the metal layer, and a conductive pillar formed on the first wiring layer. Then, a molten glass is formed on the metal layer to cover the first wiring layer and the conductive pillar, and the molten glass is solidified to form a core board. After that, the board body is removed, and a groove is formed on the core board to form a second wiring layer in the groove. Finally, the metal layer is soaked in an etching solution to remove the metal layer. Thus, the metal layer is removed by using the soaking etching method with the glass-made core board, and the side etching phenomenon can be avoided.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This disclosure relates to a semiconductor packaging process, and more particularly to a method for manufacturing a packaging substrate that can improve yield. Background Technology

[0002] With the booming development of the electronics industry, electronic products are becoming thinner and smaller in form, and are moving towards high performance, high functionality, and high speed in terms of function. Therefore, in order to meet the requirements of high integration and miniaturization of semiconductor devices, packaging substrates with high-density and fine-pitch lines are often used in packaging processes.

[0003] Currently, resin substrates are commonly used as carriers for fabricating double-sided circuit layers. In the early days, immersion etching was used to form the desired pattern lines when fabricating circuit layers. However, this method resulted in severe side etching, so the industry gradually replaced it with the more expensive vertical double-sided spray etching method.

[0004] However, existing vertical double-sided spray etching methods often result in excess etching solution continuing to etch the copper layer after the bottom copper part has been etched, causing over-etching depth and leading to circuit damage.

[0005] Therefore, overcoming the problems of the existing technology has become an urgent issue that needs to be addressed. Summary of the Invention

[0006] The purpose of this invention is to provide a method for manufacturing a packaging substrate to solve at least one of the above-mentioned problems.

[0007] In view of the various deficiencies of the prior art, this disclosure provides a method for manufacturing a packaging substrate, comprising: providing a substrate structure including a plate body, a metal layer formed on the plate body, a first circuit layer formed on the metal layer, and conductive pillars formed on the first circuit layer, such that the first circuit layer is electrically connected to the conductive pillars; forming molten glass on the metal layer to cover the first circuit layer and the conductive pillars; solidifying the molten glass to form a core board; removing the plate body; forming a groove on the core board to form a second circuit layer in the groove, such that the second circuit layer is electrically connected to the conductive pillars; and removing the metal layer.

[0008] In one specific embodiment, the plate is an alumina ceramic substrate.

[0009] In one specific embodiment, the metal layer is a copper foil.

[0010] In one specific embodiment, the molten glass comprises borosilicate glass or bismuth-based lead-free glass.

[0011] In one specific embodiment, the melting point of the molten glass is 700–850°C.

[0012] In one specific embodiment, the molten glass is solidified by cooling to form the core board.

[0013] In one specific embodiment, the groove exposes the conductive post.

[0014] In one specific embodiment, the groove is formed by laser ablation.

[0015] In one specific embodiment, the metal layer is immersed in an etching solution to remove the metal layer.

[0016] In one specific embodiment, the etching solution is loaded into a receiving tank. Further, the core board can be placed into the receiving tank using a suction jig.

[0017] As can be seen from the above, the method for manufacturing the packaging substrate disclosed herein mainly involves using a glass core board to create the first and second circuit layers of the double-sided buried circuit type, and then using a low-cost immersion etching method to remove the metal layer, thereby avoiding side etching. Therefore, compared with the existing vertical double-sided spray etching method, the method disclosed herein not only reduces manufacturing costs but also has higher etching efficiency. Attached Figure Description

[0018] Figures 1A to 1E This is a cross-sectional schematic diagram of the front-end operation of the packaging substrate of this disclosure.

[0019] Figures 2A to 2H This is a cross-sectional schematic diagram of the manufacturing method of the packaging substrate disclosed herein.

[0020] The attached figures are labeled as follows:

[0021] 1. Substrate Structure

[0022] 10 Molten Glass

[0023] 2 Packaging substrate

[0024] 20-core board

[0025] 21 First Line Layer

[0026] 22 Second Line Layer

[0027] 23 Conductive pillars

[0028] 3. Mold

[0029] 4. Receiving slot

[0030] 40 Etching Solution

[0031] 5, 6, 7 barrier layers

[0032] 60 perforations

[0033] 70 Groove

[0034] 8. Suction fixture

[0035] 9. Bearing components

[0036] 90 plate body

[0037] 91 First Metal Layer

[0038] 92 Second metal layer. Detailed Implementation

[0039] The following specific embodiments illustrate the implementation of this disclosure. Those skilled in the art can easily understand other advantages and effects of this disclosure from the content disclosed in this specification.

[0040] It should be understood that the structures, proportions, sizes, etc., shown in the accompanying drawings are only for illustrative purposes to aid those skilled in the art in understanding and reading the content disclosed herein, and are not intended to limit the implementation conditions of this disclosure. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to the size, without affecting the effectiveness and purpose of this disclosure, should still fall within the scope of the technical content disclosed herein. Furthermore, the terms such as "above," "first," "second," and "one" used in this specification are merely for clarity of description and are not intended to limit the scope of this disclosure. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of this disclosure's implementation.

[0041] Figures 1A to 1E This is a cross-sectional schematic diagram of the front-end operation of the packaging substrate 2 of this disclosure.

[0042] like Figures 1A to 1B As shown, a carrier 9 is provided, on which a first metal layer 91 and a second metal layer 92 are sequentially formed. Next, a patterning process is performed to form a first circuit layer 21 on the second metal layer 92 using a patterned resist layer 5. Afterwards, the resist layer 5 is removed, exposing the second metal layer 92.

[0043] In this embodiment, the plate 90 is an alumina ceramic substrate that can withstand a high temperature of about 1500°C, and the first metal layer 91 is a thick copper layer, while the second metal layer 92 is an ultra-thin copper foil.

[0044] Furthermore, the plate 90 and the first metal layer 91 can be joined using the AMB (Active Metal Brazing) method, and the second metal layer 92 and the first metal layer 91 can be joined using a high-temperature resistant metal adhesive. In this case, the bonding force between the plate 90 and the first metal layer 91 is greater than the bonding force between the second metal layer 92 and the first metal layer 91.

[0045] It should be understood that, regarding the selection of materials for plate 90, although alumina ceramic has better cost and bonding strength with copper, other high-temperature resistant materials can also be used as plate 90 for bonding copper through corresponding bonding techniques, and are not limited to the above.

[0046] like Figures 1C to 1E As shown, a layer-addition process is performed to form a plurality of through-holes 60 in the patterned resist layer 6 on the second metal layer 92, and then a plurality of conductive pillars 23 are formed by, for example, electroplating, so that the first circuit layer 21 is electrically connected to the plurality of conductive pillars 23, as shown. Figure 1D As shown. Then, as... Figure 1E As shown, the resist layer 6 is removed to obtain a substrate structure 1.

[0047] In this embodiment, the plurality of through holes 60 expose a portion of the surface of the first circuit layer 21 to form the plurality of conductive pillars 23 on the first circuit layer 21.

[0048] Figures 2A to 2H This is a cross-sectional schematic diagram of the manufacturing method of the packaging substrate 2 disclosed herein.

[0049] like Figure 2A As shown, the substrate structure 1 is placed in a mold 3, and molten glass 10 is filled into the mold 3 by casting, so that the molten glass 10 is formed on the second metal layer 92 to cover the first circuit layer 21 and the conductive pillar 23.

[0050] In this embodiment, the molten glass 10 covers the plurality of conductive pillars 23 to a certain height, so that the plurality of conductive pillars 23 protrude from the surface of the molten glass 10.

[0051] Furthermore, the molten glass 10 contains borosilicate glass or bismuth-based lead-free glass with a melting point of 700–850°C, which is lower than the melting point of copper and much lower than the heat resistance temperature of the plate 90. Therefore, the process stability can be maintained at this temperature.

[0052] like Figure 2BAs shown, after the molten glass 10 is cooled and solidified into a core board 20, the mold 3 is removed, and a leveling operation is performed to remove the protruding portions of the plurality of conductive pillars 23. Next, the plate body 90 and the first metal layer 91 are removed, leaving the second metal layer 92 on the core board 20. The cooling method can be static cooling, fan-assisted cooling, or further controlled cooling, such as controlling temperature, airflow, humidity, and a multi-stage cooling process in a cooling furnace, to reduce internal stress in the glass and improve its quality and transparency.

[0053] like Figures 2C to 2E As shown, a patterning process is performed to form multiple grooves 70 on the core board 20 by means of a patterned resist layer 7, exposing the plurality of conductive pillars 23. Next, a second circuit layer 22 electrically connecting the plurality of conductive pillars 23 is formed in the plurality of grooves 70, as shown. Figure 2D As shown. Then, as... Figure 2E As shown, remove the barrier layer 7.

[0054] In this embodiment, the groove 70 extends into the core board 20, making the surface of the core board 20 uneven, and the second circuit layer 22 is embedded in the core board 20 and does not protrude from the surface of the core board 20.

[0055] Furthermore, the required circuit pattern groove 70 is formed by exposure and development, and the groove 70 is burned to a certain depth by laser. At this time, some molten glass will remain in the groove 70. Therefore, at this stage, an etching solution containing hydrofluoric acid or potassium hydroxide can be used to clean the slag and further expand the groove 70 to achieve the desired pattern width.

[0056] Alternatively, using methods such as physical vapor deposition (PVD), sputtering, or chemical vapor deposition (CVD), a seed layer can be first formed in the groove 70, and then the metal material can be filled into the groove 70 to form a complete circuit pattern. For example, the metal material can be formed on the seed layer by electroplating. For areas of the groove 70 with a large area or areas where the dimensional accuracy of the pattern is not high, metal paste, such as copper paste or silver paste, can also be used for filling.

[0057] In addition, after removing the barrier layer 7, it can be cleaned and polished to make the surface of the core board 20 smooth and flat.

[0058] like Figures 2F to 2HAs shown, the core board 20 is placed in a receiving tank 4 containing etching solution 40 by means of a suction jig 8, so that the second metal layer 92 is immersed in the etching solution 40 and removed to obtain the packaging substrate 2. Then, the packaging substrate 2 is taken out from the receiving tank 4.

[0059] In this embodiment, the suction jig 8 is positioned to the non-wire area (such as the exposed part of the glass substrate) of the core board 20 by vacuum adsorption so as to hold the core board 20 in a horizontal state for gripping.

[0060] Furthermore, compared to traditional resin substrates, the glass core board 20 has higher rigidity and surface flatness. Traditional resin substrates are prone to deformation under their own weight due to insufficient rigidity after multi-point gripping, resulting in the inability to maintain the flatness of the board after gripping. In contrast, the glass core board 20 can still maintain a high degree of flatness after multi-point gripping.

[0061] In addition, when the core board 20 is placed in the receiving tank 4 in a horizontal position, the liquid level of the etching solution 40 is flush with or slightly higher than the lower surface of the core board 20, so that the etching solution 40 will only etch the part that extends beyond the glass surface (i.e., the second metal layer 92), and will not affect the embedded circuits (such as the first circuit layer 21) in the glass surface, thereby obtaining a circuit layer with no lateral etching depth.

[0062] Therefore, the method disclosed herein uses a glass core board 20 to fabricate a first circuit layer 21 and a second circuit layer 22 of the double-sided embedded circuit type, and uses a low-cost immersion etching method to remove the second metal layer 92 to avoid lateral etching. Therefore, compared with the existing vertical double-sided spray etching method, the method disclosed herein can not only reduce the manufacturing cost, but also has higher etching efficiency.

[0063] In summary, the manufacturing method disclosed herein can avoid the problem of circuit damage by avoiding lateral erosion, thus improving the yield.

[0064] The above embodiments are illustrative of the principles and effects of this disclosure and are not intended to limit this disclosure. Those skilled in the art can modify the above embodiments without departing from the spirit and scope of this disclosure. Therefore, the scope of protection of this disclosure should be as set forth in the claims.

Claims

1. A method for manufacturing a packaging substrate, characterized in that, include: A substrate structure is provided, comprising a plate body, a metal layer formed on the plate body, a first circuit layer formed on the metal layer, and conductive pillars formed on the first circuit layer, such that the first circuit layer is electrically connected to the conductive pillars. A molten glass is formed on the metal layer to cover the first circuit layer and the conductive pillar; Solidify the molten glass to form a core board; Remove the plate; A groove is formed on the core board to form a second circuit layer in the groove, so that the second circuit layer is electrically connected to the conductive post; as well as The metal layer is removed by immersing it in an etching solution using an immersion etching method.

2. The method for manufacturing the packaging substrate as described in claim 1, characterized in that, The plate is an alumina ceramic substrate.

3. The method for manufacturing the packaging substrate as described in claim 1, characterized in that, The metal layer is copper foil.

4. The method for manufacturing the packaging substrate as described in claim 1, characterized in that, The molten glass contains either borosilicate glass or lead-free glass from the bismuth series.

5. The method for manufacturing the packaging substrate as described in claim 1, characterized in that, The melting point of this molten glass is 700~850℃.

6. The method for manufacturing the packaging substrate as described in claim 1, characterized in that, The molten glass is solidified by cooling to form the core board.

7. The method for manufacturing the packaging substrate as described in claim 1, characterized in that, The groove exposes the conductive post.

8. The method for manufacturing the packaging substrate as described in claim 1, characterized in that, The groove was formed by laser ablation.

9. The method for manufacturing the packaging substrate as described in claim 1, characterized in that, The etching solution is loaded into a container tank.

10. The method for manufacturing the packaging substrate as described in claim 9, characterized in that, The manufacturing process also includes placing the core board into the receiving groove using a suction jig.

Citation Information

Patent Citations

  • Method of manufacturing semiconductor chip assembly with sacrificial metal-based core carrier

    CN101436547A

  • Fabrication method of package substrate

    CN119626908A