A method for processing a semiconductor structure and a semiconductor structure

Abstract

The present application discloses a method for processing a semiconductor structure and a semiconductor structure. The processing method includes: providing a substrate having a high aspect ratio etching structure, wherein the sidewall of the high aspect ratio etching structure has a rough surface topography; using a first neutral particle to perform a first treatment on the surface of the sidewall to generate an oxide layer on the surface of the sidewall; using a second neutral particle to perform a second treatment on the surface of the sidewall to remove the oxide layer and reduce the roughness of the sidewall surface; using a third neutral particle to perform a third treatment on the surface of the sidewall to repair the lattice damage existing on the sidewall surface. The present application uses metastable particles to excite different neutral particles to perform corresponding treatments on the rough surface of the sidewall, which can finely control the treatment degree, achieve lower damage, and have more controllable uniformity, making the treated sidewall surface smoother, thereby improving the device performance.

Description

Technical Field

[0001] The present application relates to the field of semiconductor processing technologies, and in particular, to a method for processing a semiconductor structure and a semiconductor structure. Background Art

[0002] Deep Silicon Etching (DSE) is an advanced process for fabricating high aspect ratio (high depth, narrow line width) microstructures on a silicon substrate, and is widely used in optical devices, MEMS devices, power devices, 3D integration and packaging, etc. Its core technology includes the Bosch process. However, after etching a deep trench using the Bosch process, it is very easy to form scallop stripes on the sidewalls. The scallop stripes refer to the periodic corrugated structure formed on the sidewalls due to the alternating passivation and etching steps. For optical devices (such as optical waveguides, diffraction gratings), the sidewall corrugations will introduce additional light scattering, reducing the optical efficiency or increasing the noise, and will increase the surface roughness, affecting the surface reflection and transmission characteristics of the optical devices. In microfluidic devices, the sidewall corrugations will increase the resistance of fluid flow, affecting the fluid transmission efficiency. Moreover, the sidewall corrugations may become trapping points for particles or bubbles, affecting the cleanliness and performance of the device; the sidewall corrugations will increase the difficulty of subsequent processes (such as thin film deposition, bonding, packaging), reducing the process yield; the sidewall corrugations will affect the uniformity and adhesion of the thin film, possibly resulting in thin film defects. In addition, the concave-convex structure of the sidewall corrugations may cause a reduction in mechanical strength and increase the risk of fracture.

[0003] However, scallop stripes are a common phenomenon in the Bosch etching process and cannot be completely avoided during the Bosch process, and can only be improved through post-processing. Therefore, it is necessary to study a process method that can significantly reduce the sidewall scallop stripes. Summary of the Invention

[0004] The purpose of the present application is to overcome the above problems existing in the prior art, and to provide a method for processing a semiconductor structure and a semiconductor structure, so as to significantly reduce the sidewall scallop stripes, thereby reducing the sidewall roughness and enhancing the device performance.

[0005] To achieve the above purpose, the technical solution of the present application is as follows:

[0006] According to the first aspect of the present application, an embodiment of the present application provides a method for processing a semiconductor structure, including:

[0007] Providing a substrate having a high aspect ratio etching structure, wherein the sidewalls of the high aspect ratio etching structure have a rough surface topography;

[0008] Using a first neutral particle to perform a first treatment on the surface of the sidewall to generate an oxide layer on the surface of the sidewall;

[0009] Using a second neutral particle, a second treatment is performed on the surface of the sidewall to remove the oxide layer and reduce the roughness of the sidewall surface;

[0010] Using a third neutral particle, a third treatment is performed on the surface of the sidewall to repair the lattice damage existing on the sidewall surface;

[0011] Wherein, the first neutral particle, the second neutral particle, and the third neutral particle are obtained by exciting a first reactive gas, a second reactive gas, and a third reactive gas respectively using metastable particles, and the metastable particles are obtained from a first plasma formed by exciting a first non-reactive gas.

[0012] In some embodiments, before performing the first treatment, it further includes: using a fourth neutral particle to perform a fourth treatment on the surface of the sidewall to perform a first cleaning on the surface of the sidewall, and the fourth neutral particle is obtained by exciting a fourth reactive gas using the metastable particles.

[0013] In some embodiments, after performing the second treatment and before performing the third treatment, it further includes: using a second plasma formed by exciting a fifth reactive gas to perform a fifth treatment on the surface of the sidewall to remove the remaining oxide layer on the sidewall surface.

[0014] In some embodiments, the fourth treatment and the first treatment are sequentially performed to form a first cycle, the first cycle is performed multiple times, and then, it is sequentially performed with the second treatment, the fifth treatment, and the third treatment to form a second cycle, and the second cycle is performed multiple times.

[0015] In some embodiments, after performing the third treatment, it further includes: using a third plasma formed by exciting a second non-reactive gas to perform a sixth treatment on the surface of the sidewall to perform a second cleaning on the surface of the sidewall.

[0016] In some embodiments, the first temperature during the first treatment, the second temperature during the second treatment, the third temperature during the third treatment, and the fourth temperature during the fourth treatment are below 195 °C.

[0017] In some embodiments, the first pressure during the first treatment, the second pressure during the second treatment, the third pressure during the third treatment, and the fourth pressure during the fourth treatment are 500 mTorr to 1000 mTorr.

[0018] In some embodiments, the fifth temperature during the fifth treatment is below 50°C, and the fifth pressure during the fifth treatment is 10 mTorr to 100 mTorr.

[0019] In some embodiments, the sixth temperature during the sixth treatment is below 50°C, and the sixth pressure during the sixth treatment is 5 mTorr to 50 mTorr.

[0020] In some embodiments, the ratio of the fourth time during the fourth treatment to the first time during the first treatment is 3:1 to 1:3, and the fourth time and the first time are at least 5 s, and the sum of the times for performing each of the first cycles is 30 s to 180 s.

[0021] In some embodiments, the second time during the second treatment is 5 s to 30 s, and the ratio of the second time to the fifth time during the fifth treatment is 5:1 to 1:5.

[0022] In some embodiments, the third time during the third treatment is 30 s to 180 s.

[0023] In some embodiments, the sixth time during the sixth treatment is 5 s to 20 s.

[0024] In some embodiments, the method for obtaining the metastable particles specifically includes:

[0025] Exciting a first non-reactive gas to form a first plasma;

[0026] Filtering out charged particles in the first plasma to obtain metastable particles;

[0027] The method for obtaining the first neutral particle, the second neutral particle, the third neutral particle, and the fourth neutral particle specifically includes:

[0028] Causing the metastable particles to undergo inelastic collisions with a first reactive gas, a second reactive gas, a third reactive gas, and a fourth reactive gas respectively, so that the first reactive gas, the second reactive gas, the third reactive gas, and the fourth reactive gas are respectively excited after obtaining the energy transferred by the metastable particles, thereby obtaining a first neutral particle, a second neutral particle, a third neutral particle, and a fourth neutral particle respectively.

[0029] In some embodiments, the first reactive gas includes oxygen, and the first neutral particle includes oxygen radicals.

[0030] In some embodiments, the second reactive gas includes nitrogen trifluoride, and the second neutral particle includes fluorine radicals.

[0031] In some embodiments, the third reactive gas includes hydrogen, and the third neutral particle includes a hydrogen radical.

[0032] In some embodiments, the fourth reactive gas includes hydrogen, and the fourth neutral particle includes a hydrogen radical.

[0033] In some embodiments, the first non-reactive gas includes helium, and the metastable particle includes a helium metastable particle.

[0034] In some embodiments, the fifth reactive gas includes nitrogen trifluoride.

[0035] In some embodiments, the second non-reactive gas includes argon.

[0036] In some embodiments, the high aspect ratio etching structure is obtained by etching the surface of the substrate using the Bosch process. The sidewalls of the high aspect ratio etching structure have scalloped stripes, forming a rough surface topography.

[0037] In some embodiments, the substrate material includes silicon.

[0038] According to a second aspect of the present application, embodiments of the present application provide a semiconductor structure, which is processed using the semiconductor structure processing method provided in any one of the above embodiments of the present application.

[0039] Embodiments of the present application may / at least have the following advantages:

[0040] (1) By using different neutral particles excited by metastable particles to correspondingly process the rough surface of the sidewalls of the high aspect ratio etching structure, the problems of high thermal budget and difficult control of the processing degree caused by conventional high-temperature oxidation treatment and high-energy ion bombardment are avoided. The processing degree can be finely controlled, resulting in lower damage and more controllable uniformity, making the sidewall surface smoother after processing.

[0041] (2) By using the fourth neutral particle (hydrogen radical) to perform a fourth treatment to clean the surface of the sidewalls before using the first neutral particle (oxygen radical) to perform a first treatment to generate an oxide layer, the hydrogen radical can penetrate into the protruding parts of the scalloped stripes on the sidewalls in multiple directions. This can not only effectively remove the polymer residues on the sidewalls, providing a good oxidation base surface, but also enable the oxygen radical to preferentially oxidize the protruding parts of the scalloped stripes, resulting in more sufficient oxidation at low temperature and a flatter interface after oxidation. Moreover, when using the second neutral particle (fluorine radical) to perform a second treatment to remove the oxide layer, the removal of the oxidized protruding parts is also more effective, thereby achieving fine control of the oxidation degree and the removal degree of the protruding parts.

[0042] (3) By using a third neutral particle (hydrogen radical) for the third treatment to repair the sidewall surface damage, the bombardment effect caused by using high-energy ions is avoided. Without affecting the state of the sidewall surface, the lattice damage on the sidewall surface generated by etching can be well repaired, thereby improving the device performance.

[0043] (4) Through a novel combination method, while significantly reducing the sidewall roughness and repairing the sidewall damage, in-situ Bosch etching and sidewall surface treatment at a low temperature (below 200 °C) can be achieved. Therefore, a deep hole structure with a smaller size (critical dimension less than 50 nm) can be realized.

[0044] Other advantages of this application will be elaborated in the following specific embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 It is a flowchart of a semiconductor structure processing method according to a preferred embodiment of this application.

[0046] Figure 2 It is a schematic structural diagram after forming a trench on a substrate according to a preferred embodiment of this application.

[0047] Figure 3 It is a schematic structural diagram after forming an oxide layer on the sidewall of the trench according to a preferred embodiment of this application.

[0048] Figure 4 It is a schematic structural diagram after removing the oxide layer on the sidewall of the trench according to a preferred embodiment of this application.

[0049] Figure 5 It is a schematic structural diagram of the final structure after processing according to a preferred embodiment of this application.

[0050] In the figure, 10. Substrate; 11. Deep trench; 12. Scalloped stripes; 13. Oxide layer; 14. Protrusion; 15. Depression. SPECIFIC EMBODIMENTS

[0051] In order to improve the problem of scallop stripes formed on the sidewall surface after etching deep trenches (deep holes) using the Bosch process, the existing methods generally involve oxidizing the sidewall surface of the deep trenches and then removing the oxide layer generated by oxidation to improve the sidewall roughness. However, due to the relatively high temperature of the oxidation process used in the existing methods and the relatively intense oxidation degree, it is difficult to control the absolute thickness of the oxide layer, the depth and uniformity at each position. Moreover, different reaction chambers need to be used for processing, which easily leads to problems that are difficult to precisely control in the overall oxidation uniformity of the deep trench sidewalls (the upper, middle, and lower parts of the deep trench) and the processing uniformity of the deep trench sidewalls in different regions of the entire wafer. Therefore, it is difficult to achieve deep hole structures with smaller dimensions (critical dimension less than 50 nm). In addition, due to the difficult control of the oxidation thickness during high-temperature oxidation, when removing the oxide layer, there will be a phenomenon that the oxide layer in some regions has been completely removed while the oxide layer in other regions has not been completely removed, resulting in more uneven sidewall roughness. Furthermore, using the high-energy ion bombardment method to remove the oxide layer will also cause problems that the processing degree and uniformity cannot be precisely controlled, as well as problems of substrate damage.

[0052] In view of the above problems existing in the prior art, the embodiments of the present application provide a semiconductor structure processing method and a semiconductor structure, which can significantly reduce the sidewall roughness while achieving more precise sidewall processing, more precise and controllable processing degree, better overall uniformity and surface treatment.

[0053] The embodiments of the present application provide a semiconductor structure processing method, including:

[0054] providing a substrate with a high aspect ratio etching structure, the sidewall of the high aspect ratio etching structure having a rough surface morphology;

[0055] using a first neutral particle to perform a first treatment on the surface of the sidewall to generate an oxide layer on the surface of the sidewall;

[0056] using a second neutral particle to perform a second treatment on the surface of the sidewall to remove the oxide layer and reduce the roughness of the sidewall surface;

[0057] using a third neutral particle to perform a third treatment on the surface of the sidewall to repair the lattice damage existing on the sidewall surface;

[0058] wherein, the first neutral particle, the second neutral particle, and the third neutral particle are obtained by exciting a first reactive gas, a second reactive gas, and a third reactive gas respectively using metastable particles, and the metastable particles are obtained from a first plasma formed by exciting a first non-reactive gas.

[0059] In the embodiments of the present application, by using different neutral particles excited by metastable particles to perform corresponding processing on the rough surface of the sidewall of the high aspect ratio etching structure, the problems of high thermal budget and difficult control of the processing degree caused by the conventional high-temperature oxidation treatment and high-energy ion bombardment are avoided. The processing degree can be finely controlled, resulting in lower damage and more controllable uniformity, making the sidewall surface after processing smoother.

[0060] The following will combine the accompanying drawings to elaborate on the specific embodiments of the present application in detail.

[0061] Reference Figure 1 The embodiments of the present application provide a semiconductor structure processing method, which sequentially includes the following steps:

[0062] Step S11: Provide a substrate.

[0063] Reference Figure 2 In some embodiments, the material of the substrate 10 includes silicon (i.e., a silicon substrate).

[0064] In some embodiments, a silicon wafer (wafer) can be used as the substrate 10 to further form a required high aspect ratio etching structure on the substrate 10.

[0065] In some embodiments, the high aspect ratio etching structure includes a deep trench, a deep via, or a through via, etc. Here, taking the formation of a deep trench 11 as the high aspect ratio etching structure on the substrate 10 as an example, the embodiments of the present application will be elaborated in detail. Moreover, the embodiments of the present application specifically Figures 2 to 5 adopt a drawing method that only shows the local structure to facilitate highlighting the key points.

[0066] In some embodiments, the silicon wafer can be doped to provide a substrate 10 that meets the required electrical properties.

[0067] In some embodiments, an integrated circuit, such as a transistor structure, etc., can be fabricated on the substrate 10, so that after the deep trench 11 (high aspect ratio etching structure) is formed, the required vertical interconnection can be achieved through the deep trench 11 filled with a conductive material.

[0068] Step S12: Perform a Bosch process to etch the surface of the substrate and form a deep trench on the substrate.

[0069] Reference Figure 2 In some embodiments, the existing Bosch process is used to etch the surface of the substrate 10 to form a deep trench 11 in the substrate 10 on the surface of the substrate 10.

[0070] In some embodiments, the Bosch process includes a plurality of periodic cycle steps formed in sequence by a passivation layer deposition step, a passivation layer removal step, and an etching step. Due to the characteristics of the Bosch process, multiple scalloped stripes 12 are formed on the sidewalls of the deep trench 11, resulting in a rough surface topography of the sidewalls of the deep trench 11. Therefore, it is necessary to eliminate the scalloped stripes 12 to reduce the roughness of the sidewalls of the deep trench 11 and improve the smoothness of the sidewalls of the deep trench 11.

[0071] In some embodiments, C4F8 is used as the reaction gas and Ar is used as the dilution gas to perform the passivation layer deposition step.

[0072] In some embodiments, SF6 is used as the reaction gas and Ar is used as the dilution gas to perform the passivation layer removal step and the etching step.

[0073] In some embodiments, when performing the passivation layer deposition step, the passivation layer removal step, and the etching step, rapid switching is performed between any two adjacent steps to avoid forming thick scalloped stripes.

[0074] In some embodiments, when performing the Bosch process, the temperature is below 50°C. For example, the temperature can be 50°C, 45°C, 40°C, 35°C, 30°C, 25°C, 20°C, 15°C, or 10°C, but is not limited thereto.

[0075] In some embodiments, when performing the Bosch process, the pressure is 10 mTorr to 200 mTorr. For example, the pressure can be 10 mTorr, 20 mTorr, 50 mTorr, 70 mTorr, 100 mTorr, 120 mTorr, 150 mTorr, 180 mTorr, or 200 mTorr, or any value between any two of the aforementioned pressure values.

[0076] In some embodiments, when performing the Bosch process, the source power is 1000 W to 4000 W. For example, the source power can be 1000 W, 1200 W, 1500 W, 2000 W, 2500 W, 3000 W, 3500 W, or 4000 W, or any value between any two of the aforementioned source power values.

[0077] In some embodiments, when performing the Bosch process, the bias power is 10 W to 200 W. For example, the bias power can be 10 W, 20 W, 50 W, 90 W, 100 W, 130 W, 150 W, 180 W, or 200 W, or any value between any two of the aforementioned bias power values.

[0078] In some embodiments, when performing the Bosch process, by setting the bias power, pulsed etching can be achieved in the etching step.

[0079] Step S13: Perform pre-cleaning on the sidewall surface of the deep trench.

[0080] After the Bosch process, polymers (by-products) often remain on the sidewalls of the deep trench 11. Therefore, it is necessary to perform pre-cleaning (first cleaning) on the sidewall surface of the deep trench 11 to remove the polymers on the sidewalls of the deep trench 11 and avoid affecting subsequent processes.

[0081] In some embodiments, a fourth neutral particle is used to perform a fourth treatment on the sidewall surface of the deep trench 11 to perform the first cleaning (pre-cleaning) on the sidewall surface of the deep trench 11. Among them, the fourth neutral particle is obtained by exciting a fourth reactive gas using metastable particles. The metastable particles are obtained from a first plasma formed by exciting a first non-reactive gas.

[0082] In some embodiments, a first plasma is formed by exciting a first non-reactive gas; then, the charged particles in the first plasma are filtered out to obtain metastable particles. Then, by making the metastable particles undergo inelastic collisions with a fourth reactive gas, the fourth reactive gas is excited after obtaining the energy transferred by the metastable particles, thereby obtaining a fourth neutral particle.

[0083] In some embodiments, the fourth reactive gas includes hydrogen, and the fourth neutral particle includes a hydrogen radical.

[0084] In some embodiments, the first non-reactive gas includes helium, and the metastable particle includes a helium metastable particle.

[0085] In this embodiment, a hydrogen radical is used to perform a pre-cleaning treatment (fourth treatment) on the sidewall surface of the deep trench 11 to remove the polymers existing on the sidewall surface of the deep trench 11. Among them, a helium plasma is formed by exciting helium; then, the charged particles (ions, electrons) in the helium plasma are filtered out to obtain helium metastable particles. Then, by making the helium metastable particles undergo inelastic collisions with hydrogen, hydrogen is excited after obtaining the energy transferred by the helium metastable particles, thereby obtaining a hydrogen radical.

[0086] Step S14: Generate an oxide layer on the sidewall surface of the deep trench.

[0087] Reference Figure 3. In some embodiments, a first neutral particle is used to perform a first treatment on the sidewall surface of the deep trench 11 to generate an oxide layer 13 on the sidewall surface of the deep trench 11. Among them, the first neutral particle is obtained by exciting a first reactive gas using a metastable particle. The metastable particle is obtained from a first plasma formed by exciting a first non-reactive gas. The method for obtaining the first neutral particle can be understood by referring to the method for obtaining the fourth neutral particle described above.

[0088] In some embodiments, the first reactive gas includes oxygen, the first neutral particle includes an oxygen radical, the first non-reactive gas includes helium, and the metastable particle includes a helium metastable particle. The method for obtaining the oxygen radical can be understood by referring to the method for obtaining the hydrogen radical described above.

[0089] In this embodiment, an oxygen radical is used to perform an oxidation treatment (the first treatment) on the sidewall surface of the deep trench 11 to generate an oxide layer 13 on the sidewall surface of the deep trench 11.

[0090] In some embodiments, a new excitation method is adopted to obtain hydrogen radicals and oxygen radicals. For example, a plasma processing chamber can be used, and helium gas as the first non-reactive gas is introduced to be excited in the first reaction field in the chamber to generate a helium plasma. Then, the charged particles in the helium plasma are filtered out to obtain helium metastable particles (non-ground state), and the helium metastable particles are made to enter the second reaction field in the chamber. Since the helium metastable particles have a certain amount of energy, in the second reaction field, through inelastic collisions, the energy is transferred to the fourth reactive gas (for example, a mixed gas of nitrogen and hydrogen can be used as the fourth reactive gas, and the flow ratio of nitrogen to hydrogen can be 96:4), so that the hydrogen in it is excited to become hydrogen radicals (non-plasma), and in the third reaction field, a pre-cleaning treatment is performed on the sidewall surface of the deep trench 11 on the substrate 10, and the surface reaction of the protrusion 14 (the junction of two scalloped stripes 12) of the scalloped stripe 12 will be preferentially carried out. The hydrogen radicals can penetrate into the protrusion 14 on the sidewall in multiple directions, while the penetration depth at the depression 15 (the bottom of the scalloped stripe 12) of the scalloped stripe 12 is relatively shallow. Then, an oxidation treatment is performed on the sidewall surface of the deep trench 11 using oxygen radicals, and the oxidation of the protrusion 14 of the scalloped stripe 12 will be preferentially carried out, while the oxidation depth at the depression 15 of the scalloped stripe 12 is relatively shallow. The morphology of the oxide layer 13 formed after oxidation is as Figure 3 shown. It can be seen that compared with the undulation degree of the sidewall surface, the undulation degree at the interface between the oxide layer 13 and the material of the substrate 10 has been significantly reduced and has become relatively smooth.

[0091] In some embodiments, the fourth process and the first process are sequentially executed to form a first cycle. Moreover, the first cycle is executed multiple times. Thus, by performing multiple cycles of pre-cleaning - oxidation, the degree of each oxidation process can be finely controlled.

[0092] Therefore, in the embodiments of the present application, by adopting a new excitation method to obtain hydrogen radicals and oxygen radicals, and using the hydrogen radicals and oxygen radicals to sequentially treat the sidewall surface, this method can not only effectively filter high-energy ions (if there are ions, bombardment will occur, resulting in the problem that the treatment degree cannot be finely controlled), achieve lower damage, but also enable a more controllable surface treatment in terms of uniformity. At the same time, by adopting the method of sequentially treating with hydrogen radicals and oxygen radicals, more sufficient oxidation can be achieved at low temperatures.

[0093] In summary, by first using hydrogen radicals to perform a cleaning treatment on the sidewall surface before using oxygen radicals to oxidize the sidewall to form the oxide layer 13, the hydrogen radicals can penetrate into the convex portions 14 of the scalloped stripes 12 on the sidewall in multiple directions. This can not only effectively remove the polymer residues on the sidewall, providing a good oxidation base surface, but also enable the oxygen radicals to preferentially oxidize the convex portions 14 of the scalloped stripes 12, so that the oxidation is more sufficient at low temperatures, and the interface after oxidation is more flattened. Moreover, when the oxide layer 13 is removed subsequently, the removal of the oxidized convex portions 14 is also more effective, thereby achieving fine control of the oxidation degree and the removal degree of the convex portions 14.

[0094] In some embodiments, the ratio of the fourth time during the fourth process to the first time during the first process is 3:1 to 1:3. For example, the ratio of the fourth time to the first time can be 3:1, 2.5:1, 2:1, 1.5:1, 1:1, 1:1.5, 1:2, 1:2.5, or 1:3, or any ratio between any two of the foregoing ratios.

[0095] In some embodiments, the fourth time and / or the first time is at least 5 s. For example, the fourth time and / or the first time can be 5 s, 10 s, 15 s, 20 s, etc., but is not limited thereto.

[0096] In some embodiments, the sum of the times for executing each first cycle is 30 s to 180 s. For example, the sum of the times for executing each first cycle can be 30 s, 60 s, 90 s, 120 s, 150 s, or 180 s, or any value between any two of the foregoing time values.

[0097] In some embodiments, when performing the first cycle (the fourth process and the first process), the temperature (the fourth temperature and the first temperature) can be below 199°C, below 198°C, below 197°C, below 196°C, below 195°C, below 190°C, below 185°C, below 180°C, below 170°C, below 150°C, or below 100°C, etc., but is not limited thereto.

[0098] In some embodiments, when performing the first cycle (the fourth process and the first process), the pressure (the fourth pressure and the first pressure) is 500 mTorr to 1000 mTorr. For example, the pressure can be 500 mTorr, 550 mTorr, 600 mTorr, 650 mTorr, 700 mTorr, 750 mTorr, 800 mTorr, 850 mTorr, 900 mTorr, 950 mTorr, or 1000 mTorr, or any value between any two of the foregoing pressure values.

[0099] In some embodiments, when performing the first cycle (the fourth process and the first process), the source power is 100 W to 2000 W. For example, the source power can be 100 W, 200 W, 500 W, 1000 W, 1300 W, 1500 W, 1800 W, or 2000 W, or any value between any two of the foregoing source power values.

[0100] In the embodiments of the present application, by using helium metastable particles to excite hydrogen radicals and oxygen radicals, sidewall polymer removal is performed, and then sidewall oxidation is performed, and the first cycle is executed multiple times. Eventually, the protruding portion 14 of the scalloped stripe 12 can be fully oxidized, while the oxidation degree of the concave portion 15 is relatively small, and a relatively smooth oxide layer 13 boundary is formed within the sidewall of the deep trench 11. Thereby, fine control of the depth (oxidation degree) of the formed oxide layer 13 is achieved, effectively avoiding the over-tolerance effect on the critical dimension of the deep trench 11. Moreover, the surface treatment uniformity of the entire substrate 10 (wafer) can be adjusted through the uniform distribution of metastable particles on the surface of the substrate 10, making the overall uniformity during processing and the uniformity of sidewall surface treatment better.

[0101] Step S15: Remove the oxide layer.

[0102] Reference Figure 4After the treatment of the above first cycle, then, a second treatment is performed on the surface of the sidewall using a second neutral particle to remove the oxide layer 13 formed by oxidation on the surface of the sidewall of the deep trench 11 in the previous step, and to smooth the newly formed sidewall surface after removing the oxide layer 13, thereby reducing the roughness of the sidewall surface. Among them, the second neutral particle is obtained by exciting a second reactive gas using a metastable particle. The metastable particle is obtained from a first plasma formed by exciting a first non-reactive gas. The method for obtaining the second neutral particle can be understood by referring to the method for obtaining the fourth neutral particle described above.

[0103] In some embodiments, the second reactive gas includes nitrogen trifluoride, the second neutral particle includes fluorine radicals, the first non-reactive gas includes helium, and the metastable particle includes helium metastable particles. The method for obtaining fluorine radicals can be understood by referring to the method for obtaining hydrogen radicals described above.

[0104] In this embodiment, the fluorine radicals obtained by exciting helium metastable particles are used to perform a second treatment on the sidewall surface of the deep trench 11 based on isotropic etching to remove the oxide layer 13 formed by oxidation on the sidewall surface of the deep trench 11 in the previous step. Since the second treatment is performed using isotropic etching, the oxide layer 13 on the sidewall surface can be completely removed, effectively preventing the problem in the prior art that when removing the oxide layer, the oxide layer in some areas has been completely removed while the oxide layer in some other areas has not been completely removed, resulting in a more uneven sidewall roughness. Moreover, using fluorine radicals obtained by exciting helium metastable particles to remove the oxide layer can avoid the problems of uncontrollable processing degree and uniformity caused by high-energy ion bombardment and damage to the substrate 10.

[0105] In some embodiments, the second time during the second treatment is 5 s to 30 s. For example, the second time can be 5 s, 10 s, 15 s, 20 s, 25 s, or 30 s, or any value between any two of the foregoing time values.

[0106] In some embodiments, the second temperature during the second treatment can be 199 °C or below, 198 °C or below, 197 °C or below, 196 °C or below, 195 °C or below, 190 °C or below, 185 °C or below, 180 °C or below, 170 °C or below, 150 °C or below, or 100 °C or below, etc., but is not limited thereto.

[0107] In some embodiments, the second pressure during the second process is 500 mTorr to 1000 mTorr. For example, the pressure can be 500 mTorr, 550 mTorr, 600 mTorr, 650 mTorr, 700 mTorr, 750 mTorr, 800 mTorr, 850 mTorr, 900 mTorr, 950 mTorr or 1000 mTorr, or any value between any two of the aforementioned pressure values.

[0108] In some embodiments, when performing the second process, the source power is 100 W to 2000 W. For example, the source power can be 100 W, 200 W, 500 W, 1000 W, 1300 W, 1500 W, 1800 W or 2000 W, or any value between any two of the aforementioned source power values.

[0109] In some embodiments, after the above-mentioned second process, then, the sidewall surface of the deep trench 11 is subjected to a fifth process using the second plasma formed by exciting the fifth reactive gas to remove the residual oxide layer 13 on the sidewall surface.

[0110] In some embodiments, the fifth reactive gas includes nitrogen trifluoride, and helium can be used as a dilution gas. The second plasma is formed by exciting nitrogen trifluoride, and the sidewall surface of the deep trench 11 is subjected to a fifth process based on anisotropic etching using the fluoride ions contained in the second plasma to remove the possible residual oxide layer 13 on the sidewall surface. Since the fifth process uses anisotropic etching, the lateral etching effect of the fluoride ions on the sidewall surface of the deep trench 11 can be effectively reduced. The main purpose is to remove the small amount of oxide remaining on the sidewall after the previous process, so it will not cause the problem of critical dimension over-tolerance due to excessive lateral etching, and can play a role in regularizing the perpendicularity of the sidewall of the deep trench 11, which is beneficial to promoting the width consistency of the upper, middle and lower parts of the deep trench 11, and can also produce a certain smoothing effect on the sidewall surface.

[0111] The surface morphology of the sidewall of the deep trench 11 after the above-mentioned second process and fifth process is as Figure 4 shown. It can be seen that the surface profile of the sidewall after removing the oxide layer 13 has been significantly improved in terms of the degree of undulation compared with the Figure 2 initial surface profile of the sidewall shown.

[0112] In some embodiments, the fifth time during the fifth process is 6 s to 25 s. For example, the fifth time can be 6 s, 10 s, 15 s, 20 s or 25 s, or any value between any two of the aforementioned time values.

[0113] In some embodiments, the fifth temperature during the fifth process can be 50°C or lower, 45°C or lower, 40°C or lower, 35°C or lower, 30°C or lower, 25°C or lower, 20°C or lower, 15°C or lower, or 10°C or lower, etc., but is not limited thereto.

[0114] In some embodiments, the fifth pressure during the fifth process is 10 mTorr to 100 mTorr. For example, the pressure can be 10 mTorr, 20 mTorr, 30 mTorr, 40 mTorr, 50 mTorr, 60 mTorr, 70 mTorr, 80 mTorr, 90 mTorr, or 100 mTorr, or any value between any two of the aforementioned pressure values.

[0115] In some embodiments, the source power during the fifth process is 100 W to 2000 W. For example, the source power can be 100 W, 200 W, 500 W, 1000 W, 1300 W, 1500 W, 1800 W, or 2000 W, or any value between any two of the aforementioned source power values.

[0116] During the fifth process, by adopting a relatively low fifth pressure (10 mTorr to 100 mTorr), it is beneficial to the good discharge of by-products, avoiding the problem of "etching stop", and can meet the requirements of a smaller size (critical dimension < 50 nm).

[0117] Step S16: Repair the damage on the sidewall surface of the deep trench.

[0118] Since the etching of the deep trench 11 may cause surface lattice damage to the sidewalls, therefore, the surface of the sidewalls can be treated with a third neutral particle to repair the lattice damage existing on the sidewall surface. Among them, the third neutral particle is obtained by exciting a third reactive gas with a metastable particle. The metastable particle is obtained from the first plasma formed by exciting the first non-reactive gas. The method for obtaining the third neutral particle can be understood by referring to the method for obtaining the fourth neutral particle described above.

[0119] In some embodiments, the third reactive gas includes hydrogen, the third neutral particle includes a hydrogen radical, the first non-reactive gas includes helium, and the metastable particle includes a helium metastable particle. The method for obtaining the hydrogen radical in this example can be understood by referring to the method for obtaining the hydrogen radical in the above embodiments.

[0120] In this embodiment, hydrogen radicals are used to repair the damage on the sidewall surface of the deep trench 11. Since non-plasma hydrogen radicals are used to repair the damage on the sidewall surface of the deep trench 11, the bombardment effect caused by the use of high-energy ions is avoided. The lattice damage on the sidewall surface generated by etching can be well repaired without affecting the state of the sidewall surface, thereby improving the device performance.

[0121] In some embodiments, the third time for performing the third process is 30 s to 180 s. For example, the third time can be 30 s, 40 s, 50 s, 60 s, 70 s, 80 s, 90 s, 100 s, 110 s, 120 s, 130 s, 140 s, 150 s, 160 s, 170 s, or 180 s, or any value between any two of the foregoing time values.

[0122] In some embodiments, the third temperature for performing the third process can be 199 °C or lower, 198 °C or lower, 197 °C or lower, 196 °C or lower, 195 °C or lower, 190 °C or lower, 185 °C or lower, 180 °C or lower, 170 °C or lower, 150 °C or lower, or 100 °C or lower, etc., but is not limited thereto.

[0123] In some embodiments, the third pressure for performing the third process is 500 mTorr to 1000 mTorr. For example, the third pressure can be 500 mTorr, 550 mTorr, 600 mTorr, 650 mTorr, 700 mTorr, 750 mTorr, 800 mTorr, 850 mTorr, 900 mTorr, 950 mTorr, or 1000 mTorr, or any value between any two of the foregoing pressure values.

[0124] In some embodiments, when performing the third process, the source power is 100 W to 2000 W. For example, the source power can be 100 W, 200 W, 500 W, 1000 W, 1300 W, 1500 W, 1800 W, or 2000 W, or any value between any two of the foregoing source power values.

[0125] In some embodiments, after the first cycle (inner cycle) formed by sequentially performing the fourth process and the first process is executed multiple times, the first cycle that is repeatedly executed multiple times is used as an overall processing step, and then is sequentially executed with the subsequent second process, fifth process, and third process to form a second cycle (outer cycle), and the second cycle including a set of first cycles is executed multiple times.

[0126] Among them, the process conditions for continuing to execute the second first cycle can be determined according to the sidewall oxidation degree data obtained after executing the first first cycle, and so on. The number of times of executing the first cycle and the process condition data can be obtained according to the collected historical data, so as to realize the fine control of the sidewall oxidation degree. The process conditions for continuing to execute the second second cycle can be determined according to the sidewall morphology data obtained after executing the first second cycle, and so on. The number of times of executing the second cycle and the process condition data can be obtained according to the collected historical data, so as to realize the fine control of the sidewall treatment effect, and achieve a surface treatment with lower damage and more controllable uniformity.

[0127] In some embodiments, the ratio of the second time for the second treatment to the fifth time for the fifth treatment is 5:1 to 1:5. For example, the ratio of the second time to the fifth time can be 5:1, 4:1, 3:1, 2:1, 1:1, 1:2, 1:3, 1:4, or 1:5, or any ratio between any two of the foregoing ratios.

[0128] In some embodiments, the ratio of the second time to the fifth time is adjusted accordingly according to the increasing number of executions of the second cycle. For example, when performing the first (first time) second cycle, the ratio of the second time to the fifth time can be 5:1; when the second time is 30 s, the fifth time is 6 s. When performing the nth (n is less than the total number of executions of the second cycle) second cycle, the ratio of the second time to the fifth time can be 1:1; when the second time is 20 s, the fifth time is also 20 s. When performing the last second cycle, the ratio of the second time to the fifth time can be 1:5; when the second time is 5 s, the fifth time is 25 s. However, it is not limited thereto.

[0129] In the embodiments of the present application, by executing multiple first cycles, only a relatively small oxidation treatment is performed on the sidewall surface of the deep groove 11 each time, and by performing multiple second cycles, the convex portions 14 of the scalloped stripes 12 on the sidewall surface are gradually removed. Under the condition of realizing fine control, the sidewall surface profile after treatment is as shown in Figure 4 On this basis, a gradual smoothing change to the sidewall surface profile as shown in Figure 5 will occur. Finally, the expected treatment purpose and effect are achieved.

[0130] Moreover, by adopting a relatively high pressure (500 mTorr to 1000 mTorr) and performing the fourth treatment, the first treatment, the second treatment, and the third treatment, free radicals can more easily enter the deep trench 11 and can be evenly adsorbed along the sidewalls of the deep trench 11, so that the sidewall surfaces can be evenly treated accordingly. By adopting a lower temperature and performing the fourth treatment, the first treatment, the second treatment, the fifth treatment, the third treatment, and the sixth treatment, the thermal budget can be greatly saved, and at the same time, it is beneficial to protect the device and avoid performance degradation caused by high-temperature treatment.

[0131] Step S17: Re-clean the sidewall surfaces of the deep trench.

[0132] In some embodiments, after performing the third treatment for surface damage of the sidewalls and after performing the last second cycle, the sixth treatment is further performed on the sidewall surfaces using the third plasma formed by exciting the second non-reactive gas, so as to perform a second cleaning on the sidewall surfaces, thereby making the sidewall surfaces smoother.

[0133] In some embodiments, the second non-reactive gas includes argon. The third plasma is formed by exciting argon, and the sixth treatment based on vertical bombardment is performed on the sidewall surfaces of the deep trench 11 using the argon ions contained in the third plasma, so as to make the sidewall surfaces smoother.

[0134] The sidewall surface topography of the deep trench 11 after the above-mentioned sixth treatment is as Figure 5 shown. It can be seen that the final contour of the sidewall surface obtained after multiple second cycles and the sixth treatment has approached linearity and exhibits good perpendicularity.

[0135] Therefore, by performing the above-mentioned post-treatment method after etching the deep trench 11 in the embodiments of the present application to improve the sidewall topography, in the original Bosch process chamber (plasma processing chamber), by adding post-treatment steps from the first treatment to the sixth treatment through a new process method, the scalloped stripes 12 on the sidewall surfaces can be minimized or even eliminated, thereby significantly reducing the sidewall roughness and enhancing the device performance.

[0136] In some embodiments, the sixth time for performing the sixth treatment is 5 s to 20 s. For example, the sixth time can be 5 s, 10 s, 15 s, or 20 s, or any value between any two of the foregoing time values.

[0137] In some embodiments, the sixth temperature for performing the sixth treatment is 50 °C or lower. For example, the sixth temperature can be 50 °C or lower, 45 °C or lower, 40 °C or lower, 35 °C or lower, 30 °C or lower, 25 °C or lower, 20 °C or lower, 15 °C or lower, or 10 °C or lower, but is not limited thereto.

[0138] In some embodiments, the sixth pressure during the execution of the sixth process is 5 mTorr to 50 mTorr. For example, the sixth pressure can be 5 mTorr, 10 mTorr, 20 mTorr, 30 mTorr, 40 mTorr, or 50 mTorr, or any value between any two of the aforementioned pressure values.

[0139] In some embodiments, during the execution of the sixth process, the source power is 100 W to 400 W. For example, the source power can be 100 W, 150 W, 200 W, 250 W, 300 W, 350 W, or 400 W, or any value between any two of the aforementioned source power values.

[0140] In some embodiments, during the execution of the sixth process, the bias power is 10 W to 30 W. For example, the bias power can be 10 W, 15 W, 20 W, 25 W, or 30 W, or any value between any two of the aforementioned bias power values.

[0141] In some embodiments, a plasma processing chamber is used, and a heating base is provided in the chamber. The heating base is used to place the substrate 10, and the Bosch process is adopted in the plasma processing chamber to etch the substrate 10 to form a deep trench 11, and the above semiconductor structure processing method of the embodiments of the present application is continued to be executed. Among them, by providing a lifting ejector pin on the heating base, the height distance between the substrate 10 and the top surface of the heating base is adjusted, so as to adjust the heat transfer capacity of the heating base to adjust the actual temperature obtained by the substrate 10. The heating base always maintains the heating target temperature (for example, about 200 °C). When it is necessary to lower the temperature of the substrate 10, the lifting ejector pin can be raised to the first target height to lift the substrate 10 from the heating base, increasing the distance between the substrate 10 and the heating base, so that the temperature of the substrate 10 is lower than the target temperature of the heating base and reaches the corresponding lower processing temperature. On the contrary, when it is necessary to raise the temperature of the substrate 10, the lifting ejector pin can be lowered to the second target height to lower the substrate 10, reducing the distance between the substrate 10 and the heating base, and the temperature of the substrate 10 can also be raised to reach the corresponding higher processing temperature.

[0142] In some embodiments, by collecting historical data, a model for controlling the effects of the above-mentioned various processing steps (the first process to the sixth process) can be established, so that the processing degree of each step including pre-cleaning, sidewall oxidation, oxide layer removal, sidewall damage repair, re-cleaning, etc. can be finely controlled.

[0143] Therefore, the above surface treatment method adopted in the embodiments of the present application can first etch the deep trench 11 based on the Bosch process in the same plasma processing chamber, and quickly switch between the deposition and etching steps, and then perform the adjustment treatment for the sidewall roughness. The treatment of the sidewall of the deep trench 11 can be more finely controlled, the overall uniformity and surface treatment are better, and the treatment uniformity on the entire substrate 10 surface can be adjusted through the uniform distribution of metastable particles. Moreover, since high-energy ions (ions will cause bombardment) are effectively filtered out, the damage to the surface of the substrate 10 will be very low. After the protrusions 14 on the sidewall are oxidized, the removal is also more effective, and the degree of oxidation and the degree of removal of the protrusions 14 can be finely controlled. In addition, the lattice damage on the sidewall surface caused by the previous-step etching can be repaired without affecting the surface state of the sidewall. The embodiments of the present application can be compatible with the existing processes, with accurate and fine control, and can realize deep hole structures with smaller dimensions (critical dimension less than 50 nm).

[0144] The embodiments of the present application further provide a semiconductor structure, and the semiconductor structure is processed using the semiconductor structure processing method provided in any one of the above embodiments of the present application.

[0145] Reference Figure 5 In some embodiments, the semiconductor structure includes a substrate 10, and a deep trench 11 formed by etching using the Bosch process is provided on the substrate 10. Moreover, the deep trench 11 has been subjected to the above series of treatments for the sidewall surface using the semiconductor structure processing method provided in any one of the above embodiments of the present application, significantly reducing the sidewall scalloped stripes 12 (reference Figure 2 ), thereby reducing the sidewall roughness and enhancing the device performance.

[0146] In some embodiments, the semiconductor structure is applied to fields such as optical devices, MEMS devices, power devices, and three-dimensional advanced packaging.

[0147] In a third aspect, the embodiments of the present application further provide a plasma processing device, and the plasma processing device is used to execute the semiconductor structure processing method corresponding to the above embodiments to process and form the semiconductor structure corresponding to the above embodiments. The plasma processing device can be, for example, an inductively coupled plasma (ICP) etching device or a capacitively coupled plasma (CCP) etching device, etc. There are at least two filters provided in the cavity of the plasma processing device. The inlet side of the first filter has a first reaction field for generating plasma; the second reaction field is between the two filters for exciting free radicals; the outlet side of the second filter has a third reaction field for placing the substrate 10 and receiving the treatment.

[0148] In other aspects, embodiments of the present application further provide an electronic device, including the semiconductor structure of the above embodiments or a semiconductor structure obtained by processing using the semiconductor structure processing method of the above embodiments. The electronic device can be a storage device, a mobile phone, a computer, a tablet computer, a television, an electronic instrument, an artificial intelligence device, etc.

[0149] In summary, in the embodiments of the present application, by using different neutral particles excited by metastable particles to perform corresponding processing on the rough surface of the sidewall of the high aspect ratio etching structure, the problems of high thermal budget and difficult-to-control processing degree brought by the conventional high-temperature oxidation treatment and high-energy ion bombardment are avoided. The processing degree can be finely controlled, achieving lower damage and more controllable uniformity, making the sidewall surface smoother after processing. Through the novel combination method, the embodiments of the present application can significantly reduce the sidewall roughness and repair the sidewall damage while realizing in-situ Bosch etching and sidewall surface treatment at a low temperature (below 200 °C), so that deep hole structures with smaller dimensions (critical dimension less than 50 nm) can be realized.

[0150] The above are only the preferred embodiments of the present application, and the embodiments are not intended to limit the protection scope of the present application. Therefore, all equivalent changes made by using the content of the specification and drawings of the present application should be included in the protection scope of the present application by the same token.

Claims

1. A method for processing a semiconductor structure, characterized in that, Including: Providing a substrate with a high aspect ratio etching structure, wherein the sidewalls of the high aspect ratio etching structure have a rough surface topography; Using a first neutral particle to perform a first treatment on the surface of the sidewalls to generate an oxide layer on the surface of the sidewalls; Using a second neutral particle to perform a second treatment on the surface of the sidewalls to remove the oxide layer and reduce the roughness of the surface of the sidewalls; Using a third neutral particle to perform a third treatment on the surface of the sidewalls to repair the lattice damage existing on the surface of the sidewalls; Wherein, the first neutral particle, the second neutral particle and the third neutral particle are obtained by exciting a first reactive gas, a second reactive gas and a third reactive gas respectively using metastable particles, and the metastable particles are obtained from a first plasma formed by exciting a first non-reactive gas.

2. The method for processing a semiconductor structure according to claim 1, wherein, Before performing the first treatment, it further includes: using a fourth neutral particle to perform a fourth treatment on the surface of the sidewalls to perform a first cleaning on the surface of the sidewalls, and the fourth neutral particle is obtained by exciting a fourth reactive gas using the metastable particles.

3. The method for processing a semiconductor structure according to claim 2, wherein, After performing the second treatment and before performing the third treatment, it further includes: using a second plasma formed by exciting a fifth reactive gas to perform a fifth treatment on the surface of the sidewalls to remove the residual oxide layer on the surface of the sidewalls.

4. The semiconductor structure processing method according to claim 3, wherein The fourth treatment and the first treatment are sequentially executed to form a first cycle, the first cycle is executed multiple times, and then, it is sequentially executed with the second treatment, the fifth treatment and the third treatment to form a second cycle, and the second cycle is executed multiple times.

5. The semiconductor structure processing method according to claim 4, wherein After performing the third treatment, it further includes: using a third plasma formed by exciting a second non-reactive gas to perform a sixth treatment on the surface of the sidewalls to perform a second cleaning on the surface of the sidewalls; Wherein, the first temperature during the first treatment, the second temperature during the second treatment, the third temperature during the third treatment and the fourth temperature during the fourth treatment are below 195 °C, and / or, the first pressure during the first treatment, the second pressure during the second treatment, the third pressure during the third treatment and the fourth pressure during the fourth treatment are 500 mTorr to 1000 mTorr, and / or, the fifth temperature during the fifth treatment is below 50 °C, the fifth pressure during the fifth treatment is 10 mTorr to 100 mTorr, and / or, the sixth temperature during the sixth treatment is below 50 °C, the sixth pressure during the sixth treatment is 5 mTorr to 50 mTorr; Among them, the ratio of the fourth time during the fourth treatment to the first time during the first treatment is 3:1 to 1:3, and the fourth time and the first time are at least 5 s. The sum of the times for performing each of the first cycles is 30 s to 180 s, and / or the second time during the second treatment is 5 s to 30 s, and the ratio of the second time to the fifth time during the fifth treatment is 5:1 to 1:5, and / or the third time during the third treatment is 30 s to 180 s, and / or the sixth time during the sixth treatment is 5 s to 20 s.

6. The method for processing a semiconductor structure according to claim 2, wherein The method for obtaining the metastable particles specifically includes: Exciting a first non-reactive gas to form a first plasma; Filtering out charged particles in the first plasma to obtain metastable particles; The method for obtaining the first neutral particle, the second neutral particle, the third neutral particle, and the fourth neutral particle specifically includes: Making the metastable particles undergo inelastic collisions with a first reactive gas, a second reactive gas, a third reactive gas, and a fourth reactive gas respectively, so that the first reactive gas, the second reactive gas, the third reactive gas, and the fourth reactive gas are excited respectively after obtaining the energy transferred by the metastable particles, thereby obtaining a first neutral particle, a second neutral particle, a third neutral particle, and a fourth neutral particle respectively.

7. The method for processing a semiconductor structure according to claim 6, wherein The first reactive gas includes oxygen, and the first neutral particle includes an oxygen radical; and / or the second reactive gas includes nitrogen trifluoride, and the second neutral particle includes a fluorine radical; and / or the third reactive gas includes hydrogen, and the third neutral particle includes a hydrogen radical; and / or the fourth reactive gas includes hydrogen, and the fourth neutral particle includes a hydrogen radical; and / or the first non-reactive gas includes helium, and the metastable particles include helium metastable particles.

8. The method for processing a semiconductor structure according to claim 5, wherein The fifth reactive gas includes nitrogen trifluoride; and / or the second non-reactive gas includes argon.

9. The method for processing a semiconductor structure according to claim 1, wherein The high aspect ratio etching structure is obtained by etching the surface of the substrate using the Bosch process. The sidewall of the high aspect ratio etching structure has scalloped stripes, forming a rough surface topography; and / or the substrate material includes silicon.

10. A semiconductor structure, characterized in that, Processing is performed using the semiconductor structure processing method according to any one of claims 1-9.

Images