Switching converter and integrated control circuit and control method thereof

Abstract

The invention discloses a switching converter and an integrated control circuit and a control method thereof. The switching converter is provided with an output feedback circuit, and the control method comprises the following steps: during the normal connection period of a load and the switching converter, generating a switching control signal based on an output feedback signal representing an output voltage to control the power operation of the switching converter; configuring the output feedback circuit to a disconnected state during disconnection of the load from the switching converter; and detecting the cut-off connection state of the output feedback circuit based on the rising slope of the voltages at the two ends of the auxiliary winding of the switching converter or the duration of stopping power operation of the switching converter, and after the cut-off connection state is detected, enabling the switching converter to enter a sleep mode. The switching converter has extremely low no-load power consumption.

Description

Technical Field

[0001] Embodiments of the present invention relate to electronic circuits, and more particularly to a switching converter, an integrated control circuit thereof, and a control method therefor. Background Art

[0002] With the increasing importance of energy efficiency and environmental protection, as well as the rapid development of switching power supply technology, people's expectations for the efficiency of switching power supplies are getting higher and higher. For example, more and more customers require that the power supply products provided by power supply manufacturers have extremely low no-load power losses. In order to improve the light-load (load current is very small) or no-load (load current is zero or approximately zero, or the load is disconnected from the output terminal of the switching power supply) efficiency, existing switching power supplies adopt technologies such as pulse skipping mode and burst mode, and can operate at a lower switching frequency when in light load or no load, thereby reducing switching losses. However, these switching power supplies still have a certain amount of power loss when in light load or no load, and can no longer meet the requirements of customers for extremely low no-load power consumption. Summary of the Invention

[0003] In view of the problems existing in the prior art, the present invention provides a switching converter, an integrated control circuit thereof, and a control method therefor, which have extremely low no-load power consumption.

[0004] According to an embodiment of the present invention, an integrated control circuit for a switching converter is disclosed. The switching converter has an output feedback circuit. The integrated control circuit includes: a first pin coupled to the output feedback circuit to receive an output feedback signal; a second pin providing a switching control signal to control the power operation of the switching converter; a third pin coupled to an auxiliary winding of the switching converter to detect a voltage across the auxiliary winding; a switching control circuit coupled to the first pin to receive the output feedback signal and generating the switching control signal based on the output feedback signal; and a sleep mode determination circuit coupled to the first pin to receive the output feedback signal, coupled to the third pin to receive an auxiliary winding voltage signal representing the voltage across the auxiliary winding, and determining whether the integrated control circuit enters and exits a sleep mode based on the auxiliary winding voltage signal and the output feedback signal.

[0005] According to another embodiment of the present invention, an integrated control circuit for a switching converter is disclosed, where the switching converter has an output feedback circuit, and the integrated control circuit includes: a first pin coupled to the output feedback circuit to receive an output feedback signal; a second pin providing a switching control signal to control the power operation of the switching converter; a primary conduction control circuit coupled to the first pin to receive the output feedback signal and generating a primary conduction signal based on the output feedback signal; an isolation circuit generating a synchronous signal pulse electrically isolated from the primary conduction signal; a logic circuit generating the switching control signal based on the synchronous signal pulse; and a sleep mode determination circuit determining whether the integrated control circuit enters and exits the sleep mode based on the switching control signal and the synchronous signal pulse.

[0006] According to yet another embodiment of the present invention, a switching converter is disclosed, including: a voltage conversion circuit converting an input voltage into an output voltage; an output feedback circuit generating an output feedback signal; and the integrated control circuit as described above.

[0007] According to still another embodiment of the present invention, a control method for a switching converter is disclosed, where the switching converter has an output feedback circuit, and the control method includes: during the period when the load is normally connected to the switching converter, generating a switching control signal based on the output feedback signal representing the output voltage to control the power operation of the switching converter; during the period when the load is disconnected from the switching converter, configuring the output feedback circuit to a disconnected state; and detecting the disconnected state of the output feedback circuit based on the rising slope of the voltage across the auxiliary winding of the switching converter or the duration of the switching converter stopping power operation, and after detecting the disconnected state, the switching converter enters the sleep mode.

[0008] According to an embodiment of the present invention, during the period when the load is disconnected from the switching converter, the output feedback circuit is configured to a disconnected state, and the integrated control circuit is configured to enter the sleep mode, thereby reducing the power consumption of the output feedback circuit and the integrated control circuit, and obtaining a switching converter with extremely low no-load power consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] To better understand the present invention, the present invention will be described in detail according to the following drawings:

[0010] Figure 1 The circuit block diagram of a switching converter 100 according to an embodiment of the present invention is shown;

[0011] Figure 2 The circuit schematic diagram of a switching converter 200A according to another embodiment of the present invention is shown;

[0012] Figure 3Shows the circuit schematic diagram of the integrated control circuit 12B for the switching converter 200A according to an embodiment of the present invention;

[0013] Figure 4 Shows the working flowchart of the integrated control circuit 12B and the PD controller 13A during the disconnection of the load from the switching converter 200A according to an embodiment of the present invention;

[0014] Figure 5 Shows the working waveform diagram of the switching converter 200A according to an embodiment of the present invention;

[0015] Figure 6 Shows the circuit schematic diagram of the switching converter 200B according to another embodiment of the present invention;

[0016] Figure 7 Shows the circuit schematic diagram of the switching converter 200C according to still another embodiment of the present invention;

[0017] Figure 8 Shows the circuit schematic diagram of the integrated control circuit 12D for the switching converter 200C according to an embodiment of the present invention;

[0018] Figure 9 Shows the working flowchart of the integrated control circuit 12D and the PD controller 13C during the disconnection of the load from the switching converter 200C according to an embodiment of the present invention;

[0019] Figure 10 Shows the working waveform diagram of the switching converter 200C according to an embodiment of the present invention. Detailed Embodiments

[0020] The specific embodiments of the present invention will be described in detail below. It should be noted that the embodiments described here are only for illustrative purposes and are not used to limit the present invention. In the following description, a large number of specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to those of ordinary skill in the art that the present invention does not have to be practiced with these specific details. In other instances, well-known circuits, materials, or methods have not been specifically described in order to avoid obscuring the present invention.

[0021] Throughout the specification, references to "one embodiment", "an embodiment", "one example", or "an example" mean that a particular feature, structure, or characteristic described in connection with the embodiment or example is included in at least one embodiment of the present invention. Thus, the phrases "in one embodiment", "in an embodiment", "one example", or "an example" that appear throughout the specification do not necessarily all refer to the same embodiment or example. Additionally, the particular features, structures, or characteristics may be combined in any suitable combination and / or sub-combination in one or more embodiments or examples. Further, those of ordinary skill in the art should understand that the diagrams provided herein are for illustrative purposes only and are not necessarily drawn to scale. Like reference numerals indicate like elements. It should be understood that when an element is referred to as being "connected to" or "coupled to" another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected to" or "directly coupled to" another element, no intervening elements are present. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0022] Throughout the specification, related terms such as first and second etc. may be used merely to distinguish one entity or action from another entity or action, and do not necessarily or imply any order between these entities or actions. Numerical sequences such as "first", "second", "third", etc. merely refer to different individuals among a plurality, and do not imply any order or sequence, unless the claim language specifically limits it. The order of the text in any one claim does not mean that the processing steps must be carried out in this order or logical order, unless the claim language specifically provides otherwise. Without departing from the scope of the present invention, these processing steps can be interchanged in any order, as long as such interchange does not make the claim language contradictory and does not result in logical absurdity.

[0023] Figure 1 A circuit diagram of a switching converter 100 according to an embodiment of the present invention is shown. In Figure 1 the embodiment shown, the switching converter 100 includes an input capacitor Cin, a voltage conversion circuit 10, an output capacitor Co, an output feedback circuit 11, and an integrated control circuit 12.

[0024] The voltage conversion circuit 10 includes a switching transistor, and converts the input voltage Vin across the input capacitor Cin into an output voltage Vout across the output capacitor Co by turning on and off the switching transistor, so as to supply power to a load (not shown). The output feedback circuit 11 is coupled to the output terminal of the voltage conversion circuit 10 to generate an output feedback signal Vfb.

[0025] The integrated control circuit 12 includes a plurality of pins, and the plurality of pins include a feedback pin FB and a drive pin DRV. The integrated control circuit 12 receives an output feedback signal Vfb through the feedback pin FB, generates a switching control signal CTRL based on the output feedback signal Vfb, and provides the switching control signal CTRL to the switching transistor of the voltage conversion circuit 10 through the drive pin DRV to control the power operation of the switching converter 100.

[0026] In one embodiment, during the normal connection of the load to the switching converter 100, the output feedback circuit 11 is configured in a normal connection state, and in response to the normal connection state of the output feedback circuit 11, the integrated control circuit 12 is configured in a normal operating mode.

[0027] In one embodiment, the normal connection state of the output feedback circuit 11 means that the output feedback circuit 11 is normally coupled to the output terminal of the voltage conversion circuit 10, and the generated output feedback signal Vfb can represent the output voltage Vout.

[0028] In one embodiment, the normal operating mode of the integrated control circuit 12 means that the integrated control circuit 12 adjusts the output voltage Vout in a controllable manner, generates a switching control signal CTRL according to the output feedback signal Vfb to control the voltage conversion circuit 10, so as to adjust the output voltage Vout to an expected value, and at the same time, each functional module of the integrated control circuit 12 functions normally.

[0029] In one embodiment, during the disconnection of the load from the switching converter 100, the output feedback circuit 11 is configured in a disconnected state, and in response to the disconnected state of the output feedback circuit 11, the integrated control circuit 12 is configured to enter a sleep mode.

[0030] In one embodiment, the disconnected state of the output feedback circuit 11 means that the output feedback circuit 11 is open and no current flows through the output feedback circuit 11.

[0031] In one embodiment, the integrated control circuit 12 entering the sleep mode means that the switching control signal CTRL remains in an invalid state (such as low level), the switching transistor of the voltage conversion circuit 10 remains off, the switching converter 100 stops power operation, and at the same time, some functional modules of the integrated control circuit 12, such as the overload protection module, are turned off. Those skilled in the art can understand that the overload protection module is used to detect whether an overload occurs, and after detecting the occurrence of an overload, turn off, restart or perform other operations on the switching converter 100.

[0032] Those skilled in the art can understand that during the period when the load is disconnected from the switching converter 100, in addition to the disconnected state, the output feedback circuit 11 can also be configured in other states, such as the normal connection state or the short - circuit - to - ground state, which will be described in detail in the embodiments hereinafter.

[0033] In Figure 1 the illustrated embodiment, the switching converter 100 further includes a switch Q1, a USB port USBC, and a power delivery (PD) controller 13. As Figure 1 shown, the PD controller 13 includes a plurality of pins, and the plurality of pins include a pin VG coupled to the control terminal of the switch Q1 and a pin FBD coupled to the output feedback circuit 11.

[0034] The PD controller 13 detects whether the load is disconnected from the switching converter 100, for example, detects whether an electronic device (not shown) is disconnected from the USB port USBC. In response to the load being normally connected or disconnected from the switching converter 100, the PD controller 13 configures the state of the output feedback circuit 11 through the pin FBD. In one embodiment, if the load is disconnected from the switching converter 100, the PD controller 13 configures the output feedback circuit 11 to the disconnected state through the pin FBD. If the load is normally connected to the switching converter 100, the PD controller 13 configures the output feedback circuit 11 to the normal connection state through the pin FBD.

[0035] The PD controller 13 also controls the switch Q1 through the pin VG according to the power requirement of the USB port USBC, so as to configure the voltage conversion circuit 10 to supply power to the USB port USBC.

[0036] Figure 2 shows a circuit schematic diagram of a switching converter 200A according to another embodiment of the present invention. As Figure 2 shown, the switching converter 200A includes a transformer T1, a primary switch MP, a secondary switch MS, an output capacitor Co, an output feedback circuit 11A, an integrated control circuit 12A, and a PD controller 13A. The transformer T1 has a primary winding Pri and a secondary winding Sec, where both the primary winding Pri and the secondary winding Sec have a first end and a second end, and the first end of the primary winding Pri is coupled to receive an input voltage Vin. The primary switch MP is coupled between the second end of the primary winding Pri and the primary reference ground. The first end of the secondary winding Sec is coupled to the output capacitor Co to provide an output voltage Vout. The secondary switch MS is coupled between the second end of the secondary winding Sec and the secondary reference ground. The voltage across the output capacitor Co is the output voltage Vout. Those skilled in the art will know that the secondary switch MS can also be coupled between the first end of the secondary winding Sec and the output capacitor Co.

[0037] In Figure 2 the illustrated embodiment, the output feedback circuit 11A includes an optocoupler op_co having a photosensitive element on the primary side and a light-emitting element on the secondary side, wherein a first end of the light-emitting element is coupled to the output voltage Vout.

[0038] The integrated control circuit 12A on the primary side includes a feedback pin COMP, a current detection pin CS, a zero-crossing detection pin ZCD, and a drive pin DRV. The feedback pin COMP is coupled to the photosensitive element of the optocoupler op_co to receive an output feedback signal Vcomp. The current detection pin CS is coupled to the primary switch MP to receive a primary current signal Vcs representative of the current flowing through the primary switch MP. The zero-crossing detection pin ZCD is coupled to an auxiliary winding Aux on the primary side to detect the voltage across the auxiliary winding Aux. In Figure 2 the illustrated embodiment, the zero-crossing detection pin ZCD is coupled to a voltage detection circuit 14A to receive an auxiliary winding voltage signal Vzcd representative of the voltage across the auxiliary winding Aux, wherein the voltage detection circuit 14A includes a resistor voltage divider composed of resistors R1 and R2. The drive pin DRV provides a switching control signal CTRLP to the control terminal of the primary switch MP to control the power operation of the switching converter 200A.

[0039] The PD controller 13A on the secondary side includes a pin FBD, a pin VIN, and a pin VG. The pin FBD is coupled to a second end of the light-emitting element of the optocoupler op_co, and the PD controller 13A configures the state of the output feedback circuit 11A through the pin FBD. The pin VIN is used to detect the output voltage Vout.

[0040] In one embodiment, during normal connection of the load to the switching converter 200A, the PD controller 13A configures the output feedback circuit 11A to a normal connection state, at which time, the output feedback signal Vcomp has a first state (e.g., the output feedback signal Vcomp characterizes the output voltage Vout). In response to the first state of the output feedback signal Vcomp, the integrated control circuit 12A operates in a normal operating mode.

[0041] In one embodiment, during disconnection of the load from the switching converter 200A, the output feedback circuit 11A can be configured to a disconnected state or a shorted-to-ground state. In one embodiment, during disconnection of the load from the switching converter 200A, the integrated control circuit 12A determines whether to enter the sleep mode based on the auxiliary winding voltage signal Vzcd and determines whether to exit the sleep mode based on the output feedback circuit Vcomp.

[0042] In one embodiment, during the period when the load is disconnected from the switching converter 200A, in response to the output voltage Vout decreasing to the first output threshold Vo1, the PD controller 13A configures the output feedback circuit 11A to a disconnected state. For example, the pin FBD is disconnected from the second end of the light-emitting element, such that the current lp_sec flowing through the light-emitting element is zero. At this time, the output feedback signal Vcomp has a second state (for example, the output feedback signal Vcomp reaches the maximum value). In response to the second state of the output feedback signal Vcomp, the output voltage Vout rises sharply, and the auxiliary winding voltage signal Vzcd also rises sharply. When the integrated control circuit 12A detects that the rising slope of the auxiliary winding voltage signal Vzcd is greater than a slope threshold, it enters the sleep mode.

[0043] In one embodiment, during the period when the load is disconnected from the switching converter 200A, in response to the output voltage Vout decreasing to the second output threshold Vo2, the PD controller 13A configures the output feedback circuit 11A to a short-circuited to ground state. For example, the pin FBD is shorted to the secondary reference ground, such that the current lp_sec flowing through the light-emitting element is the maximum. At this time, the output feedback signal Vcomp has a third state (for example, the output feedback signal Vcomp reaches the minimum value). In response to the third state of the output feedback signal Vcomp, when the integrated control circuit 12A detects that the output feedback signal Vcomp decreases to the feedback threshold, it exits the sleep mode. In one embodiment, the second output threshold Vo2 is greater than the first output threshold Vo1.

[0044] Figure 3 The circuit schematic diagram of the integrated control circuit 12B for the switching converter 200A according to an embodiment of the present invention is shown. As Figure 3 shown, the integrated control circuit 12B includes a sleep mode determination circuit 15 and a switching control circuit 16.

[0045] The sleep mode determination circuit 15 includes a sample and hold circuit 151, a slope detection circuit 152, a first comparison circuit 153, and a first logic circuit 154. The sample and hold circuit 151 is coupled to the zero-crossing detection pin ZCD to receive the auxiliary winding voltage signal Vzcd, and generates a sample and hold signal Vsh based on the auxiliary winding voltage signal Vzcd. The slope detection circuit 152 detects the rising slope of the sample and hold signal Vsh, and generates a slope detection signal Pslo based on the detection result. In one embodiment, when the rising slope is greater than the slope threshold, the slope detection signal Pslo is valid (such as high level).

[0046] The first comparison circuit 153 is coupled to the feedback pin COMP to receive the output feedback signal Vcomp, and compares the output feedback signal Vcomp with the feedback threshold Vcompth to generate a first comparison signal CP1. In one embodiment, when the output feedback signal COMP decreases to the feedback threshold Vcompth, the first comparison signal CP1 becomes valid (such as high level). In one embodiment, the first comparison circuit 153 includes a comparator CMP1.

[0047] The first logic circuit 154 receives the slope detection signal Pslo and the first comparison signal CP1, and generates a sleep mode signal SMP based on the slope detection signal Pslo and the first comparison signal CP1. In one embodiment, the first logic circuit 154 includes an RS flip-flop FF1, where the set terminal S receives the slope detection signal Pslo, the reset terminal R receives the first comparison signal CP1, the output terminal Q generates the sleep mode signal SMP, and the inverted output terminal Q generates an inverted sleep mode signal In one embodiment, when the sleep mode signal SMP is valid (such as high level), the integrated control circuit 12B enters the sleep mode and the overload protection function is turned off.

[0048] The switch control circuit 16 includes a conduction control circuit 161, a turn-off control circuit 162, and a second logic circuit 163. The conduction control circuit 161 is coupled to the feedback pin COMP to receive the output feedback signal Vcomp, and generates a conduction control signal Con based on the output feedback signal Vcomp to control the conduction of the primary switch transistor MP. In one embodiment, when the output feedback signal Vcomp increases, the frequency of the conduction control signal Con increases; when the output feedback signal Vcomp decreases, the frequency of the conduction control signal Con decreases.

[0049] The turn-off control circuit 162 is coupled to the current detection pin CS to receive the primary current signal Vcs, and compares the primary current signal Vcs with the current threshold signal Vcsth to generate a turn-off control signal Coff to control the turn-off of the primary switch transistor MP. In one embodiment, when the primary current signal Vcs increases to the current threshold signal Vcsth, the turn-off control signal Coff becomes valid (such as high level). In one embodiment, the turn-off control circuit 162 includes a comparator CMP2.

[0050] The second logic circuit 163 receives the conduction control signal Con, the inverted sleep mode signal and the turn-off control signal Coff, and based on the conduction control signal Con, the inverted sleep mode signal and the turn-off control signal Coff to generate a switch control signal CTRLP. In one embodiment, the second logic circuit 153 includes an AND gate circuit AND and an RS flip-flop FF2. The AND gate circuit AND performs a logical AND operation on the inverted sleep mode signal and the conduction control signal Con to generate an AND signal Cand. The set terminal S of the RS flip-flop FF2 receives the AND signal Cand, the reset terminal R receives the turn-off control signal Coff, and the output terminal Q generates the switch control signal CTRLP. In one embodiment, when the sleep mode signal SMP is valid (such as high level), the switch control signal CTRLP remains low level.

[0051] Figure 4 FIG. shows a flowchart of the operation of the integrated control circuit 12B and the PD controller 13A during the disconnection of the load from the switch converter 200A according to an embodiment of the present invention. The flowchart includes steps S101 to S105.

[0052] The PD controller 13A executes steps S101 to S103. In step S101, it is detected whether the load is disconnected from the switch converter 200A. If so, the output feedback circuit 11A is configured to be short-circuited to the ground state.

[0053] In step S102, it is detected whether the output voltage Vout decreases to a first output threshold Vo1. If so, the output feedback circuit 11A is configured to be in a disconnected state; if not, step S102 is repeated.

[0054] In step S103, it is detected whether the output voltage Vout decreases to a second output threshold Vo2. If so, the output feedback circuit 11A is configured to be short-circuited to the ground state and enter step S102. If not, step S103 is repeated.

[0055] The integrated control circuit 12B executes steps S104 to 105. In response to the disconnected state of the output feedback circuit 11A, in step S104, the integrated control circuit 12B determines whether the rising slope of the auxiliary winding voltage signal Vzcd is greater than the slope threshold. If so, it enters the sleep mode; if not, step S104 is repeated.

[0056] In step S105, the integrated control circuit 12B determines whether the output feedback signal Vcomp decreases to the feedback threshold Vcompth. If so, it exits the sleep mode and enters step S104; if not, step S105 is repeated.

[0057] Figure 5 FIG. shows a waveform diagram of the operation of the switch converter 200A according to an embodiment of the present invention. The following is combined with Figures 2 - 5 to illustrate the operating principle of the switch converter 200A.

[0058] Before time t1, the load indication signal Load_unplug is at a low level, indicating that the load is normally connected to the switching converter 200A. The output feedback circuit 11A is configured in a normal connection state, the output feedback signal Vcomp has a first state, the integrated control circuit 12B operates in a normal operating mode, and the sleep mode signal SMP is at a low level.

[0059] At time t1, the load indication signal Load_unplug changes from a low level to a high level, indicating that the load is disconnected from the switching converter 200A. The output feedback circuit 11A is configured in a short - circuit - to - ground state, the output feedback signal Vcomp has a second state (reaching a minimum value), the switch control signal CTRLP remains at a low level, and the output voltage Vout decreases.

[0060] At time t2, the output voltage Vout decreases to a first output threshold Vo1. The output feedback circuit 11A is configured in a disconnected state, the output feedback signal Vcomp has a third state (reaching a maximum value), the frequency of the switch control signal CTRLP increases accordingly, the output voltage Vout increases sharply, and the auxiliary winding voltage signal Vzcd also increases sharply.

[0061] At time t3, the integrated control circuit 12B detects that the rising slope of the auxiliary winding voltage signal Vzcd is greater than the slope threshold. The sleep mode signal SMP changes from a low level to a high level, the integrated control circuit 12B enters the sleep mode, the switch control signal CTRLP remains at a low level, and the output voltage Vout decreases.

[0062] At time t4, the output voltage Vout decreases to a second output threshold Vo2. The output feedback circuit 11A is configured in a short - circuit - to - ground state, the output feedback signal Vcomp has a second state (reaching a minimum value). The integrated control circuit 12B detects that the output feedback signal Vcomp decreases to the feedback threshold Vcompth, the sleep mode signal SMP changes from a high level to a low level, and the integrated control circuit 12B exits the sleep mode.

[0063] At time t5, the output voltage Vout decreases to the first output threshold Vo1 again. The output feedback circuit 11A is configured in a disconnected state again, the output feedback signal Vcomp has a third state (reaching a maximum value), the frequency of the switch control signal CTRLP increases accordingly, the output voltage Vout increases sharply, and the auxiliary winding voltage signal Vzcd also increases sharply. The integrated control circuit 12B detects that the rising slope of the auxiliary winding voltage signal Vzcd is greater than the slope threshold, and the sleep mode signal SMP changes from a low level to a high level again, and the integrated control circuit 12B enters the sleep mode again.

[0064] At time t6, the load indication signal Load_unplug changes from high level to low level, indicating that the load is reconnected to the switching converter 200. The output feedback circuit 11A is configured to be shorted to ground, and the output feedback signal Vcomp has a second state (reaching the minimum value). The integrated control circuit 12B detects that the output feedback signal Vcomp decreases to the feedback threshold Vcompth, and the sleep mode signal SMP changes from high level to low level, and the integrated control circuit 12B exits the sleep mode.

[0065] At time t7, the load indication signal Load_unplug is at low level, indicating that the load is normally connected to the switching converter 200A. The output feedback circuit 11A is configured to be in a normal connection state, the output feedback signal Vcomp has a first state, and the integrated control circuit 12B operates in a normal operating mode.

[0066] In the above embodiment, during the period when the load is disconnected from the switching converter 200A, the duration of the output feedback circuit 11A in the disconnected state is much longer than the duration of the output feedback circuit 11A in the shorted-to-ground state (for example, the time period from t2 to t4 is much longer than the time period from t4 to t5). The duration of the integrated control circuit 12B entering the sleep mode is also much longer than the duration of exiting the sleep mode. The power losses of the output feedback circuit 11A and the integrated control circuit 12B are greatly reduced, and the switching converter 200A has extremely low no-load power consumption.

[0067] Figure 6 The circuit schematic diagram of the switching converter 200B according to another embodiment of the present invention is shown. Different from Figure 2 the shown switching converter 200A, the switching converter 200B further includes a secondary control circuit 17 for controlling the secondary switch tube MS. The secondary control circuit 17 includes a drive pin DRV and a power supply pin VCC. The drive pin DRV provides the secondary control signal CTRLS to the secondary switch tube MS. The power supply pin VCC is coupled to the output voltage Vout to supply power to the secondary control circuit 17 using the output voltage Vout.

[0068] In one embodiment, when the output feedback circuit 11A is configured to be in the disconnected state, the power supply pin VCC is configured to be disconnected from the output voltage Vout to further reduce power consumption. In Figure 6 the shown embodiment, the power supply pin VCC is coupled to the output feedback circuit 11A and is also coupled to the output voltage Vout via the switch S1. The PD controller 13B turns off the switch S1 through the pin IO to configure the output feedback circuit 11A to be in the disconnected state and at the same time disconnect the power supply pin VCC from the output voltage Vout.

[0069] Figure 7The circuit schematic diagram of a switching converter 200C according to another embodiment of the present invention is shown. As Figure 7 shown, the switching converter 200C includes a transformer T1, a primary switching transistor MP, a secondary switching transistor MS, an output capacitor Co, an output feedback circuit 11C, an integrated control circuit 12C, and a PD controller 13C.

[0070] The output feedback circuit 11C is used to generate an output feedback signal Vfb. In Figure 7 the embodiment shown, the output feedback circuit 11C includes a resistor voltage divider composed of resistors R3 and R4.

[0071] The integrated control circuit 12C integrates functions such as isolation control, primary control, and secondary control on the same chip. The integrated control circuit 12C includes a feedback pin FB, a secondary drive pin SDRV, a current detection pin CS, and a primary drive pin PDRV. Among them, the feedback pin FB is coupled to the output feedback circuit 11C to receive the output feedback signal Vfb. The current detection pin CS is coupled to the primary switching transistor MP to receive a primary current signal Vcs representing the current flowing through the primary switching transistor MP. The primary drive pin PDRV and the secondary drive pin SDRV respectively provide a switching control signal CTRLP and a secondary control signal CTRLS to the primary switching transistor MP and the secondary switching transistor MS to control the power operation of the switching converter 200C.

[0072] The PD controller 13C located on the secondary side includes a pin IO, a pin VIN, and a pin VG. Among them, the pin IO is coupled to the output feedback circuit 11C to configure the state of the output feedback circuit 11C. The pin VIN is used to detect the output voltage Vout.

[0073] In one embodiment, during the normal connection of the load to the switching converter 200C, the PD controller 13C configures the output feedback circuit 11C to the normal connection state through the pin IO. At this time, the output feedback signal Vfb has a first state (for example, the output feedback signal Vfb can characterize the output voltage Vout). In response to the first state of the output feedback signal Vfb, the integrated control circuit 12C operates in the normal operating mode.

[0074] In one embodiment, during the disconnection of the load from the switching converter 200C, the output feedback circuit 11C can be configured to the cut-off connection state or the normal connection state. The integrated control circuit 12C determines whether to enter the sleep mode based on the switching control signal CTRLP.

[0075] In one embodiment, during the period when the load is disconnected from the switching converter 200C, in response to the output voltage Vout increasing to a third output threshold Vo3, the PD controller 13C configures the output feedback circuit 11C to a disconnected state through the pin IO. At this time, the output feedback signal Vfb has a second state (for example, the output feedback signal Vfb is zero). In response to the second state of the output feedback signal Vfb, the switch control signal CTRLP remains low. When the integrated control circuit 12C detects that the duration for which the switch control signal CTRLP remains low is greater than a duration threshold Tdet, it enters the sleep mode. In response to the output voltage Vout decreasing to a fourth output threshold Vo4, the PD controller 13C configures the output feedback circuit 11C to a normal connection state through the pin IO.

[0076] In Figure 7 In the illustrated embodiment, the output feedback circuit 11C further includes a switch S2, and the PD controller 13C controls the conduction / turn-off of the switch S2 through the pin IO to configure the normal connection state / disconnected state of the output feedback circuit 11C.

[0077] Figure 8 The circuit schematic diagram of the integrated control circuit 12D for the switching converter 200C according to an embodiment of the present invention is shown. As Figure 8 shown, the integrated control circuit 12D includes a switch control circuit 18 and a sleep mode determination circuit 19.

[0078] The switch control circuit 18 includes a primary conduction control circuit 181, an isolation circuit 182, a turn-off control circuit 183, and a logic circuit 184. The primary conduction control circuit 181 is coupled to the feedback pin FB to receive the output feedback signal Vfb, and generates a primary conduction signal PRON based on the output feedback signal Vfb. In one embodiment, as the output feedback signal Vfb decreases, the frequency of the primary conduction signal PRON decreases.

[0079] The isolation circuit 182 receives the primary conduction signal PRON, and generates a synchronous signal pulse SYNC that is electrically isolated from the primary conduction signal PRON to control the conduction of the primary switch MP.

[0080] The turn-off control circuit 183 is coupled to the current detection pin CS to receive the primary current signal Vcs, and compares the primary current signal Vcs with a current threshold signal Vcsth to generate a turn-off control signal Coff to control the turn-off of the primary switch MP. In one embodiment, when the primary current signal Vcs increases to the current threshold signal Vcsth, the turn-off control signal Coff is valid (such as high level). In one embodiment, the turn-off control circuit 162 includes a comparator CMP.

[0081] The logic circuit 184 receives the synchronization signal pulse SYNC and the turn-off control signal Coff, and generates the switch control signal CTRLP based on the synchronization signal pulse SYNC and the turn-off control signal Coff. In one embodiment, the logic circuit 184 includes an RS flip-flop FF, where the set terminal S receives the synchronization signal pulse SYNC, the reset terminal R receives the turn-off control signal Coff, and the output terminal Q generates the switch control signal CTRLP.

[0082] The sleep mode determination circuit 19 generates the sleep mode signal SMP based on the synchronization signal pulse SYNC and the switch control signal CTRLP. In one embodiment, when the synchronization signal pulse SYNC appears, the sleep mode signal SMP is invalid, and the integrated control circuit 12D exits the sleep mode. In one embodiment, when the duration that the switch control signal CTRLP remains in the invalid state (such as low level) exceeds the duration threshold Tdet, that is, when the duration that the switch converter 200C stops power operation exceeds the duration threshold Tdet, the sleep mode signal SMP is valid, and the integrated control circuit 12D enters the sleep mode. In one embodiment, when the integrated control circuit 12D operates in the sleep mode, the overload protection function is turned off.

[0083] Those skilled in the art can understand that the sleep mode determination circuit 19 can also generate the sleep mode signal SMP only according to the synchronization pulse signal SYNC or the switch control signal CTRLP. For example, when the switch control signal CTRLP changes from low level to high level, the sleep mode signal SMP is invalid. When the duration that the switch control signal CTRLP remains low level exceeds the duration threshold Tdet, the sleep mode signal SMP is valid.

[0084] Figure 9 The working flowchart of the integrated control circuit 12D and the PD controller 13C during the disconnection of the load from the switch converter 200C according to an embodiment of the present invention is shown, and the working flowchart includes steps S101 to S105.

[0085] The PD controller 13C executes steps S101 to S103. In step S101, it is detected whether the load is disconnected from the switch converter 200C. If so, the output feedback circuit 11C is configured to the disconnection state.

[0086] In step S102, it is detected whether the output voltage Vout decreases to the fourth output threshold Vo4. If so, the output feedback circuit 11C is configured to the normal connection state; if not, step S102 is repeated.

[0087] In step S103, it is detected whether the output voltage Vout increases to the third output threshold Vo3. If so, the output feedback circuit 11C is configured to be in a disconnected state, and step S102 is entered; if not, step S103 is repeated.

[0088] The integrated control circuit 12D executes steps S104 to S105. In response to the disconnected state of the output feedback circuit 11A, in step S104, the integrated control circuit 12D determines whether the duration for which the switching converter 200C stops power operation exceeds the duration threshold. If so, the integrated control circuit 12D enters the sleep mode; if not, step S104 is repeated.

[0089] In step S105, the integrated control circuit 12D determines whether the synchronization signal pulse SYNC appears. If so, the integrated control circuit 12D exits the sleep mode and enters step S104; if not, step S105 is repeated.

[0090] Figure 10 The working waveform diagram of the switching converter 200C according to an embodiment of the present invention is shown. The following will be combined with Figures 7 - 10 to elaborate on the working principle of the switching converter 200C.

[0091] Before time t1, the load indication signal Load_unplug is at a low level, indicating that the load is normally connected to the switching converter 200C. The output feedback circuit 11C is configured to be in a normal connected state, the output feedback signal Vfb has a first state, and the integrated control circuit 12D operates in the normal operating mode.

[0092] At time t1, the load indication signal Load_unplug changes from a low level to a high level, indicating that the load is disconnected from the switching converter 200C. The output feedback circuit 11C is configured to be in a disconnected state, the output feedback signal Vfb has a second state (zero), the switch control signal CTRLP remains at a low level, and the output voltage Vout decreases.

[0093] At time t2, the duration for which the switching converter 200C stops power operation reaches the duration threshold Tdet, the sleep mode signal SMP changes from a low level to a high level, and the integrated control circuit 12D enters the sleep mode.

[0094] At time t3, the output voltage Vout decreases to the fourth output threshold Vo4, the output feedback circuit 11C is configured to be in a normal connected state, the output feedback signal Vfb is in the first state, the synchronization signal pulse SYNC appears, the sleep mode signal SMP changes from a high level to a low level, and the integrated control circuit 12D exits the sleep mode. At the same time, the frequency of the switch control signal CTRLP increases, and the output voltage Vout increases.

[0095] At time t4, the output voltage Vout increases to the third output threshold Vo3, the output feedback circuit 11C is configured to be in a disconnected state, the output feedback signal Vfb has a second state (zero), the switch control signal CTRLP remains low, and the output voltage Vout decreases. After a duration threshold Tdet, the sleep mode signal SMP changes from low level to high level, and the integrated control circuit 12D enters the sleep mode again.

[0096] At time t5, the load indication signal Load_unplug changes from high level to low level, indicating that the load is reconnected to the switch converter 200C. The output feedback circuit 11C is configured to be in a normal connected state, the output feedback signal Vfb has a first state, and the integrated control circuit 12D operates in the normal operating mode.

[0097] According to an embodiment of the present invention, during the period when the load is disconnected from the switch converter, the output feedback circuit is configured to be in a disconnected state, reducing power loss. At the same time, the integrated control circuit operates in the sleep mode, also reducing power loss, so that the switch converter has extremely low no-load power consumption.

[0098] Although the above embodiment uses a PD controller to detect the load, detect the output voltage, and set the state of the output feedback circuit, those skilled in the art can understand that other circuits capable of detecting whether the load is disconnected from the switch converter, detecting the magnitude of the output voltage, and setting the state of the output feedback circuit are applicable to the present invention.

[0099] In the flowchart described in the above embodiment, the functions marked in the boxes can also occur in an order different from that shown in the figure. For example, two consecutive boxes shown can actually be executed substantially in parallel, and they can sometimes be executed in the reverse order, depending on the specific functions involved.

[0100] Those skilled in the art can understand that the relationship between the logic level of the above control signal and the on / off of the switch tube is related to the type of switch tube used. The relationship between the level type of the control signal and the on / off of the switch tube in the embodiment of the present invention is only for illustrative purposes and does not limit the type of signal and its relationship with the on / off of the switch tube.

[0101] Although the present invention has been described with reference to several exemplary embodiments, it should be understood that the terms used are illustrative and exemplary, rather than restrictive. Since the present invention can be embodied in many forms without departing from the spirit or essence of the invention, it should be understood that the above embodiments are not limited to any of the foregoing details, but should be broadly construed within the spirit and scope defined by the appended claims. Therefore, all changes and modifications falling within the scope of the claims or their equivalents should be covered by the appended claims.

Claims

1. An integrated control circuit for a switching converter, wherein the switching converter has an output feedback circuit, and the integrated control circuit includes: A first pin coupled to the output feedback circuit to receive an output feedback signal; A second pin providing a switching control signal to control the power operation of the switching converter; A third pin coupled to an auxiliary winding of the switching converter to detect the voltage across the auxiliary winding; A switching control circuit coupled to the first pin to receive the output feedback signal and generating the switching control signal based on the output feedback signal; And A sleep mode determination circuit coupled to the first pin to receive the output feedback signal, coupled to the third pin to receive an auxiliary winding voltage signal representing the voltage across the auxiliary winding, and determining whether the integrated control circuit enters and exits the sleep mode based on the auxiliary winding voltage signal and the output feedback signal.

2. The integrated control circuit according to claim 1, wherein the sleep mode determination circuit determines whether the integrated control circuit enters the sleep mode based on the rising slope of the auxiliary winding voltage signal.

3. The integrated control circuit according to claim 2, wherein the sleep mode determination circuit includes: A sample and hold circuit generating a sample and hold signal based on the auxiliary winding voltage signal; And A slope detection circuit detecting the rising slope of the sample and hold signal, wherein when the rising slope is greater than a slope threshold, the integrated control circuit enters the sleep mode.

4. The integrated control circuit according to claim 1, wherein the sleep mode determination circuit includes: A comparison circuit comparing the output feedback signal with a feedback threshold, wherein when the output feedback signal decreases to the feedback threshold, the integrated control circuit exits the sleep mode.

5. The integrated control circuit according to claim 1, wherein: When the integrated control circuit operates in the sleep mode, the switching converter stops power operation and the overload protection function is turned off.

6. The integrated control circuit according to claim 1, wherein: During the period when the load is disconnected from the switching converter, in response to the output voltage of the switching converter decreasing to a first output threshold, the output feedback circuit is configured to cut off the connection state.

7. The integrated control circuit according to claim 6, wherein: During the period when the load is disconnected from the switching converter, in response to the output voltage decreasing to a second output threshold, the output feedback circuit is configured to be shorted to the ground state, wherein the second output threshold is greater than the first output threshold.

8. The integrated control circuit according to claim 6, wherein the switching converter further includes: A secondary control circuit having a fourth pin coupled to the output voltage, and when the output feedback circuit is configured to cut off the connection state, the fourth pin is configured to be disconnected from the output voltage.

9. An integrated control circuit for a switching converter, wherein the switching converter has an output feedback circuit, and the integrated control circuit includes: A first pin coupled to the output feedback circuit to receive an output feedback signal; A second pin providing a switching control signal to control the power operation of the switching converter; A primary conduction control circuit coupled to the first pin to receive the output feedback signal and generating a primary conduction signal based on the output feedback signal; An isolation circuit that generates a synchronous signal pulse electrically isolated from the primary conduction signal; A logic circuit that generates the switch control signal based on the synchronous signal pulse; And A sleep mode determination circuit that determines whether the integrated control circuit enters and exits the sleep mode based on the switch control signal and the synchronous signal pulse.

10. The integrated control circuit according to claim 9, wherein: When the duration for which the switch control signal remains low exceeds a duration threshold, the integrated control circuit enters the sleep mode.

11. The integrated control circuit according to claim 9, wherein: When the synchronous signal pulse appears, the integrated control circuit exits the sleep mode.

12. The integrated control circuit according to claim 9, wherein: During the period when the load is disconnected from the switch converter, in response to the output voltage of the switch converter increasing to a third threshold, the output feedback circuit is configured to cut off the connection state; and During the period when the load is disconnected from the switch converter, in response to the output voltage decreasing to a fourth threshold, the output feedback circuit is configured to be in a normal connection state.

13. A switch converter, comprising: A voltage conversion circuit that converts an input voltage into an output voltage; An output feedback circuit that generates an output feedback signal; And The integrated control circuit according to any one of claims 1 to 12.

14. The switch converter according to claim 13, further comprising: A power transfer controller that detects whether a load is connected to the switch converter and is coupled to the output feedback circuit to configure the state of the output feedback circuit.

15. A control method for a switch converter, wherein the switch converter has an output feedback circuit, and the control method includes: During the period when the load is normally connected to the switch converter, generating a switch control signal based on the output feedback signal representing the output voltage to control the power operation of the switch converter; During the period when the load is disconnected from the switch converter, configuring the output feedback circuit to a cut-off connection state; And Detecting the cut-off connection state of the output feedback circuit based on the rising slope of the voltage across the auxiliary winding of the switch converter or the duration for which the switch converter stops power operation, and after detecting the cut-off connection state, the switch converter enters the sleep mode.

16. The control method according to claim 15, wherein: When the rising slope of the voltage across the auxiliary winding is greater than a slope threshold, the switch converter enters the sleep mode.

17. The control method according to claim 16, further comprising: Judging whether to exit the sleep mode based on the output feedback signal, wherein when the output feedback signal decreases to a feedback threshold, the switch converter exits the sleep mode.

18. The control method according to claim 15, wherein: When the duration for which the switch converter stops power operation exceeds a duration threshold, the switch converter enters the sleep mode.

19. The control method according to claim 18, further comprising: Generating a primary conduction signal based on the output feedback signal; Generating a synchronous signal pulse electrically isolated from the primary conduction signal; And Generating the switch control signal based on the synchronous signal pulse; Wherein When the synchronous signal pulse appears, the switch converter exits the sleep mode.

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