Compensation loop and compensation optimization method thereof

Abstract

The invention provides a compensation loop with a starting overshoot restraining function and a compensation optimizing method of the compensation loop. The compensation loop comprises an operational amplifier circuit, a first input end of which receives a reference signal and a second input end of which receives a feedback signal; the compensation network comprises a compensation resistor and a compensation capacitor which are connected in series and is coupled with the output end of the operational amplifier circuit, and the output end of the operational amplifier circuit provides a compensation signal; and the adjusting circuit is used for controlling the resistance value of the compensation resistor and / or the capacitance value of the compensation capacitor. The compensation loop can be used for improving the starting speed of the compensation signal while suppressing starting overshoot.

Description

Technical Field

[0001] The present invention relates to the field of electronics, and in particular but not limited to a compensation loop and a method for optimizing compensation thereof. Background Art

[0002] Figure 1 A common compensation loop is shown, which is used to input a feedback signal Vfb of a feedback output signal and a reference signal Vref into an operational amplifier circuit 10 for error amplification, and a compensated output compensated voltage signal Vcomp is obtained through compensation of a compensation network 11. The compensated voltage signal Vcomp is used for further processing and is used to control a switching device in a main circuit, so as to obtain a stable output signal. Figure 2 A waveform diagram during an existing startup process is shown. When the steady-state loop design of the system is relatively fast, during the startup process of the system, the reference signal Vref is established quickly, while the feedback signal Vfb is very small in the initial stage of startup, resulting in a very large error current Ierror output by the operational amplifier circuit 10, so that the rising speed of the compensated voltage Vcomp is relatively fast and exceeds the steady-state value, resulting in an overshoot of the output current Io reflected by the feedback signal, which may cause instability of the system and damage to the load.

[0003] In view of this, a new structure or control method is needed to solve at least part of the above problems. Summary of the Invention

[0004] At least aiming at one or more problems in the background art, the present invention proposes a compensation loop with a function of suppressing startup overshoot and a method for optimizing compensation.

[0005] According to one aspect of the present invention, a compensation loop with a function of suppressing startup overshoot is proposed, including: an operational amplifier circuit, the first input end of the operational amplifier circuit receives a reference signal, and the second input end of the operational amplifier circuit receives a feedback signal; a compensation network, including a series-connected compensation resistor and a compensation capacitor, the compensation network is coupled between the output end of the operational amplifier circuit and the reference ground, and the output end of the operational amplifier circuit provides a compensation signal; and an adjustment circuit, which adjusts the resistance value of the compensation resistor and / or the capacitance value of the compensation capacitor during the startup stage.

[0006] Optionally, the transconductance of the operational amplifier circuit or the reference signal increases from small to large during the startup process to suppress startup overshoot; the adjustment circuit controls the compensation resistor to be large first and then small during the startup process to boost the compensation signal and shorten the startup time.

[0007] Optionally, the adjustment circuit is used to control the resistance value of the compensation resistor, the compensation resistor includes a plurality of shunt resistors connected in parallel, and the adjustment circuit includes at least one switch, and each switch is connected in series with a corresponding shunt resistor.

[0008] Optionally, in the first time period of startup, the adjustment circuit controls m switches to conduct, and in the subsequent second time period, the adjustment circuit controls n switches to conduct, where m and n are positive integers and m < n.

[0009] Optionally, during startup, the proportional gain of the compensation loop remains unchanged, and the integral gain gradually increases from small as the transconductance of the operational amplifier circuit increases, where the proportional gain is the product of the transconductance and the resistance value of the compensation resistor, and the integral gain is the transconductance divided by the capacitance value of the compensation capacitor.

[0010] Optionally, the compensation network further includes a second capacitor, coupled between the output terminal of the operational amplifier circuit and the reference ground, and in parallel with the series-connected compensation resistor and compensation capacitor.

[0011] Optionally, the transconductance of the operational amplifier circuit or the reference signal increases from small during startup to suppress overshoot of the compensation signal; the adjustment circuit controls the compensation capacitor to be small first and then large during startup to boost the compensation signal and shorten the startup time.

[0012] Optionally, the adjustment circuit controls the compensation resistor to increase from small during startup to suppress voltage overshoot of the compensation signal.

[0013] According to another aspect of the present invention, an optimized compensation method is proposed, including: using an operational amplifier circuit to amplify the error between the feedback signal and the reference signal; coupling a compensation network to the output terminal of the operational amplifier circuit to obtain a compensation signal, the compensation network including a series-connected compensation resistor and compensation capacitor; and adjusting the resistance value of the compensation resistor and / or the capacitance value of the compensation capacitor during startup to suppress startup overshoot while increasing the startup speed of the compensation signal.

[0014] Optionally, the method further includes controlling the proportional gain to remain unchanged during startup, and the integral gain gradually increases from small as the transconductance of the operational amplifier circuit increases, where the proportional gain is the product of the transconductance and the compensation resistor, and the integral gain is the transconductance divided by the compensation capacitor.

[0015] Optionally, the method further includes: controlling the transconductance of the operational amplifier circuit or the reference signal to increase from small during startup to suppress startup overshoot; and controlling the compensation resistor to be large first and then small or controlling the compensation capacitor to be small first and then large during startup to boost the compensation signal and shorten the startup time.

[0016] The compensation loop and the optimized compensation method proposed by the present invention can increase the startup speed while effectively suppressing startup overshoot and shorten the startup time. Description of the Drawings

[0017] The accompanying drawings are used to provide a further understanding of the present invention, and together with the description, are used to explain embodiments of the present invention, and do not constitute a limitation to the present invention. In the accompanying drawings:

[0018] Figure 1 A compensation loop is shown;

[0019] Figure 2 A waveform diagram during an existing startup process is shown;

[0020] Figure 3 A waveform diagram of a solution of a comparative example is shown;

[0021] Figure 4 Another waveform diagram of a solution of a comparative example is shown;

[0022] Figure 5 A compensation loop according to an embodiment of the present invention is shown;

[0023] Figure 6 A waveform diagram of a compensation method according to an embodiment of the present invention is shown;

[0024] Figure 7 Shows for Figure 6 Each signal in the compensation loop of the compensation method in a waveform diagram during startup;

[0025] Figure 8 A circuit diagram of a compensation loop according to an embodiment of the present invention is shown;

[0026] Figure 9 A method flow diagram for optimizing compensation according to an embodiment of the present invention is shown. Detailed implementation manners

[0027] To further understand the present invention, the preferred implementation manners of the present invention will be described below in conjunction with embodiments. However, it should be understood that these descriptions are only for further explaining the features and advantages of the present invention, rather than a limitation to the claims of the present invention.

[0028] The description of this part only targets several typical embodiments, and the present invention is not limited to the scope described by the embodiments. Combinations of different embodiments, mutual replacement of some technical features in different embodiments, and mutual replacement of the same or similar prior art means and some technical features in the embodiments are also within the scope described and protected by the present invention.

[0029] "Coupling" or "connection" in the specification includes both direct connection and indirect connection. Indirect connection is a connection through an intermediate medium, such as a connection through an electrical conduction medium like a conductor, where the electrical conduction medium may contain parasitic inductance or parasitic capacitance, or it can also be a connection through an intermediate circuit or component described in the embodiments of the specification; indirect connection can also include a connection through other active or passive devices based on achieving the same or similar functions, such as a connection through circuits or components like switches, signal amplification circuits, follower circuits, etc. "Multiple" or "plurality" means two or more than two.

[0030] Figure 3 A waveform diagram of a comparative solution to the above problem is shown. In this solution, the reference signal Vref is set to rise slowly, so that the compensation signal Vcomp also rises slowly, eliminating the overshoot phenomenon of the output signal corresponding to the feedback signal during the startup process. Figure 4 A waveform diagram of another comparative solution is shown. This solution maintains the rapid establishment of the reference signal Vref, but controls the transconductance (the gain of the output current to the input error voltage) of the operational amplifier circuit to rise slowly, so that the compensation signal Vcomp also rises slowly, eliminating the startup overshoot phenomenon. However, both of these solutions will prolong the time for the compensation signal Vcomp to reach a steady state, resulting in an overly long startup process time.

[0031] Figure 5A compensation loop with a function of suppressing startup overshoot according to an embodiment of the present invention is shown. The compensation loop includes an operational amplifier circuit 20, a compensation network 21, and an adjustment circuit 22. The first input terminal of the operational amplifier circuit 20 receives a reference signal Vref, and the second input terminal of the operational amplifier circuit 20 is coupled to a feedback signal Vfb. In one embodiment, the voltage value of the feedback signal Vfb characterizes the output voltage of the power supply circuit. For example, Vfb is proportional to the output voltage. In another embodiment, the voltage value of the feedback signal Vfb characterizes the output current of the circuit. For example, Vfb is proportional to the output current value. The feedback signal may also characterize other parameters and be used to feedback other types of signals. The operational amplifier circuit 20 amplifies the error between the feedback signal Vfb and the reference signal Vref and provides an error current. The compensation network 21 includes a series-connected compensation resistor Rc and a compensation capacitor Cc, which are coupled between the output terminal of the operational amplifier circuit 20 and the reference ground. The output terminal of the operational amplifier circuit 20 provides a compensation signal Vcomp. The compensation signal Vcomp can be further processed. For example, it is compared with a sawtooth wave or the feedback signal. By controlling the on and off states of the control system switching transistor, the output signal corresponding to the feedback signal Vfb follows the change of the compensation signal Vcomp. The compensation network 21 may further include a second capacitor Cp, which is coupled between the output terminal of the operational amplifier circuit 20 and the reference ground and is coupled in parallel with the series-connected compensation resistor Rc and the compensation capacitor Cc. The adjustment circuit 22 receives a signal used to characterize entering the startup state, such as a startup signal START, and adjusts the resistance value of the compensation resistor Rc and / or the capacitance value of the compensation capacitor Cc in the compensation network 21 during the startup phase, so as to suppress the voltage overshoot of the compensation signal while increasing or maintaining the rising speed of the compensation signal, that is, the startup speed. In one embodiment, the adjustment circuit 22 may further adjust the transconductance gm of the operational amplifier circuit 20 during the startup process, so that the transconductance gm changes from small to large during the startup phase, which is used to reduce the excessive error current output by the operational amplifier circuit caused by the excessive error between the reference signal Vref and the feedback signal Vfb during the startup phase, and avoid the overshoot phenomenon of the output signals corresponding to the compensation signal and the feedback signal during the startup phase. While reducing the error current at the initial stage of startup, the startup speed is increased by adjusting the resistance value of the compensation resistor Rc and / or the capacitance value of the compensation capacitor Cc, so that it can enter the steady state as soon as possible. Of course, the transconductance of the operational amplifier circuit 20 can also be adjusted by an internal circuit in the operational amplifier circuit 20 or a circuit external to other operational amplifier circuits 20.

[0032] In one embodiment, the compensation resistor Rc is continuously adjusted from large to small. In another embodiment, the adjustment circuit performs at least a two-stage stepwise adjustment of the resistance value of the compensation resistor Rc from large to small.

[0033] In another embodiment, instead of adjusting the transconductance of the operational amplifier circuit, the reference signal is adjusted to slowly rise from small to large during the startup phase to suppress the generation of overshoot. At the same time, the compensation resistor is also controlled to decrease from large to small, so that the compensation signal Vcomp is increased at the initial stage of startup to accelerate entering the steady state and shorten the startup speed.

[0034] In another embodiment, instead of adjusting the compensation resistor, the compensation capacitor Cc is adjusted to increase from small to large during the startup process to increase the value of the compensation signal, shorten the time from the start of startup to reaching the steady state, reduce the startup time. At the same time, the transconductance gm of the operational amplifier circuit or the received reference signal Vref increases from small to large during the startup process to suppress the overshoot of the compensation signal and suppress the startup overshoot.

[0035] Figure 6 The waveform diagram of the compensation method according to an embodiment of the present invention is shown. In this solution, the transconductance gm of the operational amplifier circuit increases from small to large during the startup process to reduce the error current and suppress the startup overshoot. At the same time, the compensation resistor Rc is controlled to be large first and then small during the startup process to increase the compensation signal and shorten the startup time. In one embodiment, during the startup process, the proportional gain of the compensation loop remains basically unchanged, and the integral gain gradually increases as the transconductance gm of the operational amplifier circuit increases from small to large. The proportional gain is gm*Rc, and the integral gain is gm / Cc. By controlling the transconductance gm to gradually increase from small to large and the compensation resistor Rc to gradually decrease from large to small, the basic stability of the proportional gain is achieved. Specifically, at time t1, the system enters the startup state, such as the startup signal START outputs an effective value. The transconductance gm of the operational amplifier circuit in the compensation loop is set to the lowest value and gradually increases. During the startup process, the transconductance gm increases from small to large to reduce the output current value of the operational amplifier circuit at startup and prevent the overshoot of the compensation signal Vcomp caused by the excessive error between the reference signal and the feedback signal at the initial stage of startup. At the same time, the adjustment circuit controls the compensation resistor Rc to be large first and then small during the startup process to increase the compensation signal Vcomp and shorten the startup time. This embodiment can suppress the startup overshoot and increase the startup speed.

[0036] In another embodiment, if it is necessary to increase the startup speed, the proportional gain gm*Rc can be controlled to gradually increase to the steady-state value during the process of the transconductance gm increasing from small to large. In another embodiment, if there is a risk of overshoot when the proportional gain is fixed, the proportional gain gm*Rc can be controlled to gradually decrease to the steady-state value.

[0037] Figure 7 shows for Figure 6Waveform diagrams of various signals in the compensation loop of the medium compensation method during the startup process. These signals are, from top to bottom, the reference signal Vref, the feedback signal Vfb, the output current Io, the voltage VRc across the compensation resistor Rc, and the voltage VCc across the compensation capacitor Cc. Among them, the feedback signal Vfb represents the value of the output current Io. At time t1, the system enters the startup state, and the reference signal Vref is quickly established. At this time, the feedback signal Vfb has not started to rise yet, and the difference between the reference signal Vref and the feedback signal Vfb is high. However, at the same time, the transconductance gm is at its lowest value at this time. Therefore, the error current Ierror provided at the output end of the operational amplifier circuit, Ierror = (Vref - Vfb) * gm, is not high, and the voltage difference VCc across the corresponding capacitor Cc is low. At this time, the compensation resistor Rc is high, so the voltage difference VRc across the compensation resistor Rc is high. This causes the compensation signal Vcomp to be quickly increased. The rapid increase of the compensation signal Vcomp can quickly bring the output current into a steady state and shorten the startup time. At the same time, in the early stage t1 - t2 of startup, the error current Ierror output by the operational amplifier circuit has a low value due to the low gm, so that the compensation signal Vcomp and the output current Io will not show overshoot phenomena, eliminating system instability and damage to the load. At time t2, the compensation resistor decreases, and the voltage VRc across the compensation resistor decreases. However, at this time, due to the increase in the transconductance gm of the operational amplifier circuit, the error current Ierror increases, the voltage drop VCc across the corresponding compensation capacitor increases, and the compensation signal Vcomp also increases and enters a steady state at time t3.

[0038] Figure 8Shows a compensation loop circuit diagram according to an embodiment of the present invention. In this embodiment, the compensation resistor includes three parallel sub-resistors Rc1, Rc2, and Rc3. Of course, the number of parallel compensation resistors is not limited to 3, and can be any positive integer greater than or equal to 2. The adjustment circuit 32 includes an adjustment control circuit 321 and three switches K1, K2, and K3. The three switches K1, K2, and K3 are respectively connected in series with the corresponding sub-resistors Rc1, Rc2, and Rc3. The number of switches can also be less than the number of sub-resistors, and each switch is respectively connected in series with a corresponding sub-resistor. The input end of the adjustment control circuit 321 receives the start signal START, and multiple output ends of the adjustment control circuit 321 are respectively coupled to the control ends of the switches K1-K3 and the transconductance gm adjustment control end of the operational amplifier circuit 30. In one embodiment, Rc1 > Rc2 > Rc3. When the system is in the startup state, the switch K1 is turned on, and the switches K2 and K3 are turned off, and the compensation resistor is Rc1. Then, in turn, the switch K2 is turned on, and the switches K1 and K3 are turned off, and the compensation resistor is Rc2; then the switch K3 is turned on, and the switches K1 and K2 are turned off, and the compensation resistor is Rc3. In another embodiment, the adjustment control circuit 321 can further control two of the switches K1 and K2 to be turned on and the switch K3 to be turned off, and the compensation resistor is Rc1*Rc2 / (Rc1+Rc2); and so on until the three switches K1-K3 are fully turned on, so that the stable value of the compensation resistor is the parallel value of Rc1, Rc2, and Rc3, that is, in the first time period of startup, m switches are turned on, and in the subsequent second time period, n switches are turned on, where m and n are positive integers and m is less than n.

[0039] Figure 9The figure shows a flowchart of a method for optimizing compensation according to an embodiment of the present invention. The method for optimizing compensation includes, in step 901, using an operational amplifier circuit to amplify the error between the feedback signal Vfb and the reference signal Vref. Preferably, the operational amplifier circuit is a transconductance operational amplifier circuit, and the operational amplifier circuit converts the difference between the feedback signal Vfb and the reference signal Vref into a current output. In step 902, a compensation resistor Rc and a compensation capacitor Cc connected in series are coupled to the output terminal of the operational amplifier circuit to form a compensation network to obtain a compensation signal Vcomp. The compensation network may further include other components, such as further connecting a second capacitor in parallel with the series-connected compensation resistor Rc and compensation capacitor Cc. The above method for optimizing compensation further includes, in step 903, adjusting the resistance value of the compensation resistor Rc and / or the capacitance value of the compensation capacitor Cc during the startup process, for suppressing the overshoot of the compensation signal Vcomp while increasing the startup speed of the compensation signal Vcomp and shortening the startup time. The above steps do not represent the order of execution in time, but only represent the logical order, and the above steps can be carried out simultaneously. In one embodiment, during the startup process, the transconductance gm is first set to the minimum value and then slowly increased to the steady-state value, for suppressing the error current at the output terminal of the operational amplifier circuit when the difference between the reference signal Vref and the feedback signal Vfb is large at the initial stage of startup, thereby preventing the compensation signal Vcomp from overshooting. At the same time, in order to increase the startup speed of the compensation signal, the resistance value of the compensation resistor is controlled to decrease from large to small. During the startup stage, the compensation resistor Rc is first set to the maximum value and then slowly decreased to the steady-state value, for increasing the rising speed of the compensation signal Vcomp and accelerating the system to enter the steady state.

[0040] In one embodiment, the above method for optimizing compensation includes keeping the proportional gain constant during the startup process and the integral gain gradually increasing with the transconductance of the operational amplifier circuit from small to large, where the proportional gain is the product of the transconductance gm of the operational amplifier circuit and the compensation resistor Rc, and the integral gain is the transconductance gm divided by the compensation capacitor Cc. In one embodiment, the compensation capacitor remains unchanged. In another embodiment, while adjusting the compensation resistor, the compensation capacitor can also be adjusted simultaneously, for optimizing the waveform of the compensation signal.

[0041] In another embodiment, the transconductance gm of the operational amplifier circuit is adjusted to increase from small to large during the startup process, and the capacitance value of the compensation capacitor Cc is adjusted to increase from small to large during the startup process, for increasing the startup speed while suppressing the process. At the same time, the compensation resistor can be kept unchanged.

[0042] In another embodiment, during the startup process, the reference signal is controlled to increase from small to large, for suppressing the voltage overshoot of the compensation signal, and the compensation resistor Rc is controlled to be first large and then small or the compensation capacitor Cc is controlled to be first small and then large during the startup process, for enhancing the compensation signal and shortening the startup time.

[0043] In another embodiment, during the startup process, the reference signal Vref and the transconductance gm remain unchanged, and the adjustment circuit controls the compensation resistor to increase from small to large, or decrease from large to small and then increase from small to large during the startup process, so as to suppress the voltage drop of the relatively large error current Ierror output at the output end of the operational amplifier circuit on the compensation resistor Rc and prevent the voltage overshoot of the compensation signal.

[0044] In another embodiment, during the startup process, the reference signal Vref and the transconductance gm remain unchanged, and the adjustment circuit controls the compensation capacitor Cc and / or the second capacitor Cp to decrease from large to small during the startup process, so that at the initial stage of startup, the voltage difference of the relatively large error current Ierror on the compensation capacitor is reduced, for suppressing the voltage overshoot of the compensation signal.

[0045] Those skilled in the art should know that the "high level" and "low level", "set" and "reset", "AND gate" and "OR gate", "non-inverting input terminal" and "inverting input terminal" in the logic control involved in the specification or drawings can be interchanged or changed with each other, and the same functions or purposes as those in the above embodiments can be achieved by adjusting the subsequent logic control.

[0046] The description and application of the present invention here are illustrative, and it is not intended to limit the scope of the present invention to the above embodiments. The relevant descriptions of the effects or advantages involved in the specification may not be reflected in the actual experimental examples due to the uncertainty of specific condition parameters or other factors, and the relevant descriptions of the effects or advantages are not used to limit the scope of the invention. The deformations and changes of the disclosed embodiments here are possible, and the substitutions and equivalent various components of the embodiments are well known to those of ordinary skill in the art. Those skilled in the art should clearly understand that the present invention can be implemented in other forms, structures, arrangements, proportions, and with other components, materials, and parts without departing from the spirit or essential characteristics of the present invention. Other deformations and changes can be made to the disclosed embodiments here without departing from the scope and spirit of the present invention.

Claims

1. A compensation loop with the function of suppressing startup overshoot, comprising: An operational amplifier circuit, wherein a first input terminal of the operational amplifier circuit receives a reference signal, and a second input terminal of the operational amplifier circuit receives a feedback signal; A compensation network, comprising a compensation resistor and a compensation capacitor connected in series, the compensation network is coupled between the output terminal of the operational amplifier circuit and a reference ground, and the output terminal of the operational amplifier circuit provides a compensation signal; as well as The adjustment circuit adjusts the resistance value of the compensation resistor and / or the capacitance value of the compensation capacitor during the startup phase.

2. The compensation loop as described in claim 1, wherein the transconductance or reference signal of the operational amplifier circuit increases from small to large during the startup process, so as to suppress startup overshoot; the adjustment circuit controls the compensation resistor to increase first and then decrease during the startup process, so as to enhance the compensation signal and shorten the startup time.

3. The compensation loop as claimed in claim 1, wherein the adjustment circuit is used to control the resistance value of the compensation resistor, the compensation resistor includes a plurality of branch resistors connected in parallel, and the adjustment circuit includes at least one switch, each switch being connected in series with a corresponding branch resistor.

4. The compensation loop as claimed in claim 3, wherein in a first time period of startup, the adjustment circuit controls m switches to be turned on, and in a subsequent second time period, the adjustment circuit controls n switches to be turned on, wherein m and n are positive integers, and m is less than n.

5. The compensation loop as described in claim 1, wherein the proportional gain of the compensation loop remains unchanged during the startup process, and the integral gain gradually increases with the transconductance of the operational amplifier circuit, wherein the proportional gain is the product of the transconductance and the resistance value of the compensation resistor, and the integral gain is the transconductance divided by the capacitance of the compensation capacitor.

6. The compensation circuit as claimed in claim 1, wherein the compensation network further comprises a second capacitor coupled between the output terminal of the operational amplifier circuit and the reference ground and connected in parallel with the compensation resistor and the compensation capacitor connected in series.

7. The compensation loop as described in claim 1, wherein the transconductance or reference signal of the operational amplifier circuit increases from small to large during the startup process, so as to suppress overshoot of the compensation signal; the adjustment circuit controls the compensation capacitor to first decrease and then increase during the startup process, so as to enhance the compensation signal and shorten the startup time.

8. The compensation loop as claimed in claim 1, wherein the adjustment circuit controls the compensation resistor to increase from a small value during startup to suppress voltage overshoot of the compensation signal.

9. A method for optimizing compensation, comprising: An operational amplifier circuit is used to amplify the error between the feedback signal and the reference signal; A compensation network is coupled to the output end of the operational amplifier circuit to obtain a compensation signal, wherein the compensation network includes a compensation resistor and a compensation capacitor coupled in series; as well as During the startup process, the resistance of the compensation resistor and / or the capacitance of the compensation capacitor are adjusted to improve the startup speed of the compensation signal while suppressing startup overshoot.

10. The method as claimed in claim 9 further includes controlling the proportional gain to remain unchanged during the startup process, and the integral gain gradually increases with the transconductance of the operational amplifier circuit, wherein the proportional gain is the product of the transconductance and the compensation resistance, and the integral gain is the transconductance divided by the compensation capacitance.

11. The method of claim 9, further comprising: During the startup process, the transconductance or reference signal of the operational amplifier circuit is controlled to increase from a small value to suppress startup overshoot; as well as The compensation resistor is controlled to increase first and then decrease during the startup process, or the compensation capacitor is controlled to decrease first and then increase during the startup process, so as to enhance the compensation signal and shorten the startup time.

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