Image sensor manufacturing method and image sensor

By depositing the nanostructured layer on the light-entry side of the substrate and performing two etchings, the material selection limitations caused by the poor high temperature resistance of the photoresist layer are solved, and efficient manufacturing of the image sensor and energy utilization are achieved.

CN120224803BActive Publication Date: 2025-08-29SHPHOTONICS LTD
View PDF 3 Cites 0 Cited by

Patent Information

Application Number
CN202510697278.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-05-28
Publication Date
2025-08-29
Estimated Expiration
2045-05-28

AI Technical Summary

Technical Problem

In the prior art, the high temperature resistance of the photoresist layer is poor, which limits the material selection and plating process temperature of the nanostructured layer, resulting in the limitation of the manufacturing of image sensors.

Method used

The nanostructured layer is deposited on the light-incoming side of the substrate, and a metasurface is formed on the light-incoming side of the photoelectric chip through two etching processes to avoid deposition of the nanostructured layer in the photoresist layer window, and to relieve the limitation of process temperature.

Benefits of technology

The diversified selection of nanostructured layer materials is realized, the manufacturing process is simplified, and the energy utilization rate and light energy collection efficiency of the image sensor are improved.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120224803B_ABST
    Figure CN120224803B_ABST
Patent Text Reader

Abstract

The present invention provides a method for manufacturing an image sensor and an image sensor. The method for manufacturing the image sensor includes the following steps: providing a photoelectric sensing device, the photoelectric sensing device including a photoelectric chip, a substrate for carrying the photoelectric chip, and a pad electrically connected to the photoelectric chip; depositing a nanostructured layer on the light incident side of the substrate, and etching the nanostructured layer for a first time so that the nanostructured layer at least covers the light incident side of the photoelectric chip; etching the nanostructured layer for a second time to form a metasurface on the light incident side of the photoelectric chip; and completing the fabrication of the metasurface by depositing the nanostructured layer on the light incident side of the substrate and etching the nanostructured layer twice, thereby eliminating the need to deposit the nanostructured layer within a window formed by a photoresist layer, removing the limitation on the deposition process temperature, and avoiding restrictions on the material selection of the nanostructured layer.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the technical field of photoelectric sensors, and in particular to a manufacturing method of an image sensor and the image sensor. Background Art

[0002] An image sensor is a device that converts light signals into electrical signals and consists of pixels arranged in an array. Metasurfaces are increasingly being used in image sensors due to their advantages, such as small size and low manufacturing cost.

[0003] In related art, when forming a metasurface on an image sensor, a photoresist layer is typically formed on a substrate, a window is created in the photoresist layer, and then a nanostructured layer is deposited within the window. After etching the nanostructured layer, the metasurface is completed. However, due to the poor high-temperature resistance of the photoresist layer, the deposition temperature of the nanostructured layer within the window formed by the photoresist layer is limited, which in turn limits the material selection for the nanostructured layer. Summary of the Invention

[0004] An object of the present invention is to provide a method for manufacturing an image sensor and an image sensor that avoids restrictions on the material selection of the nanostructure layer.

[0005] To achieve one of the above-mentioned objectives, an embodiment of the present invention provides a method for manufacturing an image sensor, comprising the following steps:

[0006] A photoelectric sensor device is provided, comprising a photoelectric chip, a substrate for carrying the photoelectric chip, and a pad electrically connected to the photoelectric chip;

[0007] depositing a nanostructured layer on the light incident side of the substrate;

[0008] forming a first photoresist layer on the nanostructure layer;

[0009] exposing and developing the first photoresist layer to form a patterned first photoresist layer, wherein a projection of the optoelectronic chip on the substrate is complementary to a projection of the patterned first photoresist layer on the substrate;

[0010] forming a first mask layer on the patterned first photoresist layer;

[0011] stripping the first photoresist layer to form a first mask layer on the end surface of the nanostructure layer;

[0012] performing a first etching on the nanostructure layer so that the nanostructure layer at least covers the light incident side of the optoelectronic chip;

[0013] removing the first mask layer on the end surface of the nanostructure layer by using an acidic solvent;

[0014] After the nanostructure layer is etched a second time, a metasurface is formed on the light-entering side of the optoelectronic chip.

[0015] As a further improvement of an embodiment of the present invention, after forming a second mask layer on the nanostructure layer, a second etching is performed.

[0016] As a further improvement of one embodiment of the present invention, forming a second mask layer on the nanostructure layer specifically includes:

[0017] forming a second photoresist layer on the nanostructure layer;

[0018] exposing and developing the second photoresist layer to form a patterned second photoresist layer, wherein a projection of the metasurface on the substrate is complementary to a projection of the patterned second photoresist layer on the substrate;

[0019] A second mask layer is formed on the patterned second photoresist layer.

[0020] As a further improvement of one embodiment of the present invention, forming a mask layer on the nanostructure layer specifically includes:

[0021] A mask layer is formed on the nanostructure layer through a deposition process, and the material of the mask layer is a metal material or an inorganic non-metallic material.

[0022] As a further improvement of one embodiment of the present invention, a nanostructure layer is deposited on the light incident side of the substrate, specifically comprising:

[0023] After a dielectric layer is deposited on the surface of the substrate, a nanostructure layer is deposited on the surface of the dielectric layer.

[0024] As a further improvement of an embodiment of the present invention, after the nanostructure layer is deposited, the nanostructure layer and the dielectric layer are etched for the first time.

[0025] As a further improvement of one embodiment of the present invention, the refractive index of the dielectric layer is lower than the refractive index of the nanostructure layer.

[0026] As a further improvement of one embodiment of the present invention, the optoelectronic chip includes at least three pixel units, the metasurface includes metasurface units corresponding one-to-one to the pixel units, each pixel unit includes a target pixel for sensing a target band and a reference pixel for sensing a reference band, different pixel units sense different target bands, and different pixel units sense the same reference bands, each metasurface unit routes the light of the target band to the pixel in the corresponding pixel unit that matches the target band, and routes the light of at least part of the reference band to the pixel in the corresponding pixel unit that matches the reference band.

[0027] As a further improvement of an embodiment of the present invention, all metasurface units are configured as metalenses or gratings; or,

[0028] A portion of the metasurface units are configured as metalenses, and another portion of the metasurface units are configured as gratings.

[0029] In order to achieve one of the objectives of the above invention, the present invention further provides an image sensor, which is manufactured by the above manufacturing method.

[0030] Compared with the prior art, in an embodiment of the present invention, a nanostructured layer is deposited on the light incident side of the substrate and the nanostructured layer is etched twice to complete the production of the metasurface, thereby eliminating the need to deposit the nanostructured layer within the window formed by the photoresist layer, removing the limitation on the deposition process temperature, and avoiding restrictions on the material selection of the nanostructured layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 is a schematic cross-sectional view of an image sensor in a preferred embodiment of the present invention;

[0032] Figure 2 is an exploded schematic diagram of an image sensor in a preferred embodiment of the present invention;

[0033] Figure 3 yes Figure 2 A top view of the optoelectronic chip of the image sensor;

[0034] Figure 4 A schematic diagram of a local optical path of an image sensor in a preferred embodiment of the present invention;

[0035] Figure 5 is a schematic diagram of a local optical path of an image sensor in another preferred embodiment of the present invention;

[0036] Figure 6 1 is a schematic diagram of the optical path at the first metasurface unit of the image sensor in another preferred embodiment of the present invention;

[0037] Figure 7 1 is a schematic diagram of the optical path at the second metasurface unit of the image sensor in another preferred embodiment of the present invention;

[0038] Figure 8 Schematic diagram of the optical path at the third metasurface unit of the image sensor in another preferred embodiment of the present invention;

[0039] Figure 9 yes Figure 3 A top view of the first pixel unit of the optoelectronic chip;

[0040] Figure 10is a top view of various embodiments of color pixel groups;

[0041] Figure 11 is a top view of one embodiment of a color pixel group;

[0042] Figure 12 are top views of various embodiments of color pixel groups;

[0043] Figure 13 yes Figure 3 Schematic diagram of the light spot at the reference pixel of the first pixel unit of the optoelectronic chip;

[0044] Figure 14 yes Figure 3 Top views of various embodiments of the first metasurface unit corresponding to the first pixel unit of the optoelectronic chip;

[0045] Figure 15 FIG1 is a diagram showing some process steps of a method for manufacturing an image sensor according to a preferred embodiment of the present invention;

[0046] Figure 16 This is another partial process step diagram of a method for manufacturing an image sensor in a preferred embodiment of the present invention. DETAILED DESCRIPTION

[0047] The present invention will be described in detail below with reference to the specific embodiments shown in the accompanying drawings. However, these embodiments do not limit the present invention, and any structural, methodological, or functional changes made by those skilled in the art based on these embodiments are all within the scope of protection of the present invention.

[0048] It should be understood that terms such as “having”, “including” and “comprising” used herein do not preclude the existence or addition of one or more other elements or combinations thereof.

[0049] In the various drawings of the present invention, for the sake of convenience, some sizes of structures or parts are exaggerated relative to other structures or parts, and thus, only the basic structure of the subject matter of the present invention is illustrated.

[0050] like Figure 1 , an image sensor, the photoelectric sensing device 1 includes a photoelectric chip 10, a substrate 15 for carrying the photoelectric chip 10, and a pad 16 electrically connected to the photoelectric chip 10.

[0051] In this embodiment, the photoelectric sensing device 1 may be a back-illuminated CMOS (Complementary Metal Oxide Semiconductor).

[0052] In this embodiment, the optoelectronic chip 10 can convert the received optical signal into an electrical signal. The optoelectronic chip 10 is electrically connected to other circuits or chips via the bonding pads 16 .

[0053] In this embodiment, the pads 16 are exposed on the outer surface of the substrate 15 (eg, exposed on the light incident surface of the substrate 15 ), thereby facilitating connection between the photoelectric sensor device 1 and other circuits or chips.

[0054] In some embodiments, the reference Figure 2 As shown, the image sensor further includes a metasurface 20 .

[0055] In this embodiment, the metasurface 20 is located on the light incident side of the optoelectronic chip 10 . The metasurface 20 is used to modulate the incident light so that the light is routed to (or transmitted to) the optoelectronic chip 10 .

[0056] In this embodiment, metasurface 20 refers to an artificial layered material with dimensions less than or approximately equal to the wavelength, which can be considered the two-dimensional counterpart of a metamaterial. Metasurface 20 can manipulate the polarization, phase, amplitude, frequency, and propagation mode of electromagnetic waves through its subwavelength metastructure units, enabling properties such as beam shaping, beam deflection, superlensing, superholography, optical rotation, and anti-reflection and anti-reflection.

[0057] In this embodiment, the metasurface 20 is a sub-wavelength optical element, which is suitable for the current micron-scale sensor architecture. At the same time, its preparation process is compatible with mature semiconductor sensor technology and has strong practicality and economy.

[0058] In some embodiments, the reference Figure 3 As shown, the optoelectronic chip 10 includes at least three pixel units (11, 12, 13), and each pixel unit includes a plurality of pixels (111, 112) for sensing light of different wavelength bands.

[0059] In this embodiment, the optoelectronic chip 10 is divided to obtain greater than or equal to three pixel units, and the wavelength bands of light sensed by the three pixel units (11, 12, 13) are at least partially different. Each of the three pixel units (11, 12, 13) includes at least two pixels (111, 112), so that each can sense light of at least two wavelength bands, that is, light of a specific wavelength band is sensed by at least two pixels. Each pixel receives a light signal of a specific wavelength band and responds to the light signal of the specific wavelength band. Each pixel is configured to convert the light signal of the specific wavelength band into an electrical signal.

[0060] In some embodiments, the metasurface 20 includes metasurface units (21, 22, 23) corresponding one-to-one to the pixel units (11, 12, 13).

[0061] In this embodiment, after the metasurface 20 is divided, the same number of metasurface units (21, 22, 23) as the number of pixel units (11, 12, 13) are obtained, and the structures of different metasurface units (21, 22, 23) are different. Each pixel unit (11, 12, 13) and each metasurface unit (21, 22, 23) are connected along the optical axis direction ( Figure 2 The Z axis in the image has a one-to-one correspondence.

[0062] In some embodiments, each metasurface unit (21, 22, 23) is configured to perform phase modulation on incident light so that light of different wavelength bands is respectively routed to pixels in the pixel unit that match the wavelength bands.

[0063] In this embodiment, after incident light of different wavelength bands is incident on the metasurface 20, each metasurface unit (21, 22, 23) can modulate the light of the corresponding wavelength band, so that the light of the corresponding wavelength band is routed or transmitted to the corresponding pixel in the pixel unit (11, 12, 13), and is then sensed by the corresponding pixel and converted into an electrical signal.

[0064] For example, Figure 2 The optoelectronic chip 10 includes a first pixel unit 11, a second pixel unit 12, and a third pixel unit 13, and the metasurface 20 includes a first metasurface unit 21, a second metasurface unit 22, and a third metasurface unit 23 corresponding thereto.

[0065] For example, Figure 2 and Figure 3 Each metasurface unit (21, 22, 23) is configured to phase-modulate incident light so that light of different wavelengths is routed to pixels in corresponding pixel units (11, 12, 13) that match the wavelengths. For example, the first metasurface unit 21 is configured to phase-modulate incident light so that light of different wavelengths is routed to pixels (111, 112) in the first pixel unit 11 that match the wavelengths.

[0066] In this embodiment, the metasurface 20 is used to route light of different wavelengths to pixels that sense light of different wavelengths, thereby increasing the light energy received by each pixel, avoiding light energy loss caused by filters, and improving energy utilization.

[0067] In some embodiments, each pixel unit (11, 12, 13) includes a target pixel (111, 121, 131) for sensing a target band and a reference pixel (112, 122, 132) for sensing a reference band. Different pixel units sense different target bands, and different pixel units sense different reference bands or at least partially the same reference bands.

[0068] In this embodiment, the target band ( Figure 3The reference band (marked with R, G, and B) is the specific wavelength required for imaging, such as the three primary colors of red (R), green (G), and blue (B) required for color imaging. Figure 3 The reference wavelengths may be other wavelengths of incident light except the target wavelength, such as light from near-infrared light to near-infrared cutoff wavelengths, and there may be multiple reference wavelengths, thereby providing more selectivity for the reference wavelengths.

[0069] Illustratively, when the target band of the first pixel unit 11 is red (R) light, the reference band of the first pixel unit 11 can be one or more of green (G) light, blue (B) light, and near-infrared (IR) light, as long as it is different from the target band.

[0070] In this embodiment, by providing a reference pixel (112, 122, 132) within each pixel unit (11, 12, 13) to sense light in a reference wavelength band, the light in the reference wavelength band can be used as reference light to provide more optical signals for color reconstruction. When performing color reconstruction, the electrical signals generated by the reference pixels (112, 122, 132) are used as a reference, thereby reducing the difficulty of color reconstruction. Furthermore, sensing light other than the target wavelength band can also improve the energy utilization of the image sensor.

[0071] For example, Figure 3 The first pixel unit 11 includes a first target pixel 111 for sensing light in a first target band and a first reference pixel 112 for sensing light in a first reference band. The second pixel unit 12 includes a second target pixel 121 for sensing light in a second target band and a second reference pixel 122 for sensing light in a second reference band. The third pixel unit 13 includes a third target pixel 131 for sensing light in a third target band and a third reference pixel 132 for sensing light in a third reference band.

[0072] Exemplarily, the wavelength of the first target wavelength band (or at least a portion of the first target wavelength band) is greater than the wavelength of the second target wavelength band, and the wavelength of the second target wavelength band (or at least a portion of the second target wavelength band) is greater than the wavelength of the third target wavelength band. The first target wavelength band is between 585nm and 650nm, and may be 617nm, i.e., red (R) light; the second target wavelength band is between 495nm and 595nm, and may be 545nm, i.e., green (G) light; and the third target wavelength band is between 400nm and 505nm, and may be 452nm, i.e., blue (B) light.

[0073] In some embodiments, each metasurface unit (21, 22, 23) routes light in a target wavelength band and at least a portion of light in a reference wavelength band to pixels matching the wavelength band in corresponding pixel units (11, 12, 13).

[0074] In this embodiment, each metasurface unit (21, 22, 23) routes all target wavelength band light and all reference wavelength band light to pixels in the corresponding pixel units (11, 12, 13) that match the wavelength band. In other words, the metasurface unit only needs to route the incident light to the corresponding pixel unit, thereby simplifying the design of the metasurface unit.

[0075] Exemplarily, the first metasurface unit 21 routes all first target band light to the first target pixel 111 in the first pixel unit 11 that matches the band, and routes all first reference band light to the first reference pixel 112 in the first pixel unit 11 that matches the band.

[0076] In some embodiments, the reference wavelength bands sensed by different pixel units (11, 12, 13) are the same and are different from the target wavelength band of each pixel unit (11, 12, 13).

[0077] In this embodiment, each pixel unit (11, 12, 13) uses the same reference pixel (112, 122, 132), that is, the first reference pixel 112, the second reference pixel 122, and the third reference pixel 132 are all the same, that is, the first reference band, the second reference band, and the third reference band are all the same. As a result, the optoelectronic chip 10 only needs to sense four wavelength bands of light (i.e., three target wavelength bands of light and one reference wavelength band of light), simplifying the optoelectronic chip 10. Moreover, each metasurface unit (21, 22, 23) only needs to phase modulate two wavelength bands of light, simplifying the design and manufacturing difficulty of the metasurface unit.

[0078] Exemplarily, the first reference waveband, the second reference waveband, and the third reference waveband are all located between 650 nm and 1100 nm, and may be 900 nm, ie, near infrared (IR) light.

[0079] In some embodiments, the image sensor further includes a dielectric layer 30 disposed on the photosensitive side of the optoelectronic chip 10 , and the metasurface 20 is formed on the light incident surface of the dielectric layer 30 through a semiconductor manufacturing process.

[0080] In some embodiments, the reference Figure 4 As shown, all metasurface units (21, 22, 23) are configured as metalenses.

[0081] In this embodiment, the metalens can converge the incident light, such as focusing, deflecting and focusing, etc., through different phase distributions.

[0082] In this embodiment, the metalens includes a plurality of array-arranged superstructure units, each of which has a nanostructure 25 at its center and / or vertex. The superstructure units are obtained by dividing the metalens into structural units centered on each nanostructure 25. Multiple nanostructures 25 are arranged on the dielectric layer 30, wherein the nanostructures 25 in each period constitute a superstructure unit. The superstructure unit is a densely packed pattern, such as a regular quadrilateral, a regular hexagon, a fan, etc., each period contains a nanostructure 25, and the vertex and / or center of the superstructure unit can be provided with a nanostructure 25. In the case where the superstructure unit is a regular hexagon, at least one nanostructure 25 is provided at each vertex and center of the regular hexagon. Similarly, the same is true for fan-shaped and square shapes.

[0083] In this embodiment, the multiple superstructure units of the metalens are arranged periodically or aperiodically. A periodic arrangement means that the period values ​​of the superstructure units are equal. An aperiodic arrangement means that the period values ​​of the superstructure units are at least partially different. The different period values ​​may be different radial period values ​​and / or circumferential period values, or different period values ​​in the X-axis direction and / or the Y-axis direction.

[0084] In this embodiment, the nanostructure 25 is configured as a polarization-dependent structure or a polarization-independent structure. Depending on the usage scenario, the nanostructure 25 can be configured as either a polarization-dependent structure or a polarization-independent structure. Polarization-independent structures include, for example, cylindrical, square, cross-shaped, and square-shaped cylinders with circular holes. Polarization-dependent structures include, for example, elliptical cylinders, rectangular cylinders, and hexagonal prisms. The nanostructure 25 can be either a positive or negative structure. For example, the shapes of the nanostructure 25 include cylindrical, hollow cylindrical, square prisms, and hollow square prisms.

[0085] In this embodiment, the refractive index of dielectric layer 30 is lower than that of nanostructures 25. Dielectric layer 30 can be made of any material with a low refractive index and absorption coefficient in the visible or near-infrared bands, such as silicon dioxide (SiO2), spin-on glass (SOG), or polymers such as polymethyl methacrylate (PMMA), polydimethylsiloxane (PDMS), polymethylpentene (PMP), and combinations thereof. Nanostructures 25 can be made of a dielectric material with a higher refractive index than dielectric layer 30, such as c-Si, polycrystalline silicon (p-Si), amorphous silicon (a-Si), compound semiconductors (such as GaN, GaP, GaAs, SiC, etc.), TiO2, Si3N4, AlSb, AlAs, AlGaAs, AlGaInP, BP, ZnGeP2, and other suitable materials, as well as combinations thereof. The metalens also includes a protective layer 26 covering the nanostructure 25. The material of the protective layer 26 is similar to that of the dielectric layer 30 and can be any material with a low refractive index and absorption coefficient in the visible light or near-infrared band, such as silicon dioxide (SiO2), spin-on glass (SOG), or polymers such as polymethyl methacrylate (PMMA), polydimethylsiloxane (PDMS), polymethylpentene (PMP), and combinations of the above materials. Air (i.e., no protective layer 26) can also be used.

[0086] For example, the metalens can modulate the amplitude, phase, and polarization of incident light through the nanostructures 25 disposed thereon. The phase distribution of the metalens at least satisfies:

[0087] ; (1)

[0088] ; (2)

[0089] ; (3)

[0090] in, is the design wavelength in free space, is the focal length propagating in the dielectric layer 30, where the dielectric is SiO2, , is the deflection distance between the focus and the center point of the metasurface, is the deflection angle along the x-direction. The same applies to the deflection along the y-direction. Moreover, formula (1) is applicable to the scene focused on the center, while formulas (2) and (3) are applicable to the scene of deflection focusing.

[0091] In some embodiments, the reference Figure 5 As shown, all metasurface units (21, 22, 23) are configured as gratings.

[0092] In this embodiment, a grating (e.g., a metagrating) can deflect incident light, improving routing efficiency at wide angles. Because a metagrating has no phase gradient and is completely periodic, it can maintain high efficiency at wide angles.

[0093] Exemplarily, the deflection angle of the grating can be calculated by the grating equation, which is:

[0094] ; (4)

[0095] Among them, n0 is the refractive index of the medium in the incident direction, k0 is the incident wave vector 2π / λ0, θ0 is the incident angle in the x-axis direction, m is the diffraction order, which can be 0, ±1, ±2, etc., P0 is the period in the x-axis direction, n m is the refractive index of the medium in the outgoing direction, θ m is the diffraction angle.

[0096] Therefore, the metasurface units (21, 22, 23) allow light of different wavelengths to be routed separately, or it can be said that the metasurface units (21, 22, 23) allow light of different wavelengths to be converged or deflected separately.

[0097] In an embodiment not shown, the metasurface units (21, 22, 23) may be configured such that a portion of the metasurface units are configured as metalenses and another portion of the metasurface units are configured as gratings, thereby meeting different usage requirements.

[0098] In some embodiments, the reference Figure 6 、 Figure 7 and Figure 8 As shown, the distance between the metasurface 20 and the optoelectronic chip 10 along the optical axis is no greater than the modulation focal length of each metasurface unit (21, 22, 23) for the target wavelength band light of the corresponding pixel unit (11, 12, 13).

[0099] In this embodiment, the metasurface units (21, 22, 23) modulate the target band light of the corresponding pixel units (11, 12, 13) in a defocused manner, so that the focus of the target band light is located on the side of the target pixel (111, 121, 131) away from the photosensitive surface, thereby making the spot area of ​​the target band light on the target pixel larger, the target pixel collects more energy, and is conducive to the target pixel sensing the target band light.

[0100] In this embodiment, the distance between the metasurface 20 and the optoelectronic chip 10 along the optical axis is not equal to the modulation focal length of each metasurface unit (21, 22, 23) for target wavelength light of other pixel units. Since the three target wavelengths are different, the modulation focal length of the same metasurface unit for the three target wavelengths decreases as the wavelength increases. Therefore, by adjusting the distance between the metasurface 20 and the optoelectronic chip 10 (i.e., adjusting the thickness of the dielectric layer 30 along the optical axis), and / or adjusting the modulation focal length of each metasurface unit (21, 22, 23) for target wavelength light, other light (e.g., second target wavelength light and / or second target wavelength light) that is not sensed by the target pixel (e.g., first target pixel 111) can be routed or diverged to the reference pixel (e.g., first reference pixel 112) of the target pixel unit or to other pixel units (e.g., second pixel unit 12 and / or third pixel unit 13), thereby reducing the influence of other target wavelength light on the target pixel.

[0101] In this embodiment, since the wavelengths of the first target wavelength band, the second target wavelength band, and the third target wavelength band decrease in sequence, the modulation focal length of the same metasurface unit (21, 22, 23) for the first target wavelength band (R) light, the second target wavelength band (G) light, and the third target wavelength band (B) light increases in sequence.

[0102] For example, Figure 6 The distance between the metasurface 20 and the optoelectronic chip 10 is set to be smaller than the modulation focal length of the first metasurface unit 21 for the first target band (R) light, so that the first metasurface unit 21 can route the second target band (G) light and the third target band (B) light to the first reference pixel 112 without focusing.

[0103] For example, Figure 7 The distance between the metasurface 20 and the optoelectronic chip 10 is greater than the modulation focal length of the second metasurface unit 22 for the first target band (R) light, and is less than the modulation focal length of the second metasurface unit 22 for the second target band (G) light, so that the second metasurface unit 22 can route the third target band (B) light to the second reference pixel 122 without focusing, and can also enable the second metasurface unit 22 to focus the first target band (R) light and then diverge it to the second reference pixel 122.

[0104] For example, Figure 8 The distance between the metasurface 20 and the optoelectronic chip 10 is greater than the modulation focal length of the third metasurface unit 23 for the second target band (G) light, and is less than the modulation focal length of the third metasurface unit 23 for the third target band (B) light, so that the third metasurface unit 23 can focus the first target band (R) light and the second target band (G) light and then diverge them onto the second reference pixel 122.

[0105] In some embodiments, the reference Figure 9 As shown, each pixel unit includes at least one target pixel and a plurality of reference pixels. All target pixels together form a target area 111s, and all reference pixels together form a reference area 112s.

[0106] In this embodiment, preferably, Figure 9 The target area 111 s and the reference area 112 s are represented by different shadows in FIG. 1 . In the XY plane, the reference area 112 s surrounds the four sides of the target area 111 s .

[0107] In some embodiments, the reference Figure 10 、 Figure 11 and Figure 12 As shown, the reference area 112s surrounds at least one side of the target area 111s.

[0108] In this embodiment, the number of pixels in the target area 111s is not greater than the number of pixels in the reference area 112s. Figure 10 , the pixel unit adopts a 2×2 pixel array, and the reference area 112s surrounds the two sides of the target area 111s. Figure 11 , the pixel unit adopts a 3×3 pixel array, and the reference area 112s surrounds the four sides of the target area 111s. Figure 12 , the pixel unit adopts a 4×4 pixel array, Figure 12 In the embodiment (a), the reference area 112s surrounds one side of the target area 111s. Figure 12 In the embodiment (b), the reference area 112s surrounds two sides of the target area 111s. Figure 12 In embodiment (c), the reference region 112 s surrounds three sides of the target region 111 s .

[0109] In this embodiment, a suitable phase distribution formula can be selected based on the positional relationship between the reference area 112s and the target area 111s. For example, Figure 3 、 Figure 11 When the pixel unit in the metasurface unit is , the metasurface unit can use formula (1) to obtain the phase required by the meta-lens. Figure 10 、 Figure 12 When the pixel unit in , the metasurface unit can use formula (2) and formula (3) to obtain the phase required by the metalens.

[0110] Coordinate Reference Figure 13As shown, the present invention provides an embodiment in which a metasurface is configured as a metalens, in which each metasurface unit is capable of modulating light of two wavelength bands (i.e., target wavelength band light and reference wavelength band light) so as to route them to specific areas (e.g., target area 111s and reference area 112s), respectively.

[0111] In some embodiments, each metasurface unit includes a target phase set for a target band light of a corresponding pixel unit and a reference phase set for a reference band light of a corresponding pixel unit, one of the target phase and the reference phase selects a focusing phase, and the other of the target phase and the reference phase selects a vortex phase.

[0112] In this embodiment, since each pixel unit preferably adopts the technical solution of "the reference area 112s surrounds at least one side of the target area 111s", for this solution, the target phase selects the focusing phase and the reference phase selects the vortex phase, thereby routing the light of the target band to the target area 111s and routing the light of the reference band to the reference area 112s.

[0113] Of course, in an embodiment not shown, when each pixel unit adopts the technical solution of "the target area 111s surrounds at least one side of the reference area 112s", the reference phase can also be the focusing phase and the target phase can be the vortex phase.

[0114] In this embodiment, the focusing phase, i.e., formula (1), focuses the target band light at the center of the pixel unit (i.e., target region 111s). The vortex phase focuses the reference band light at the edge of the pixel unit (i.e., reference region 112s). In other words, the vortex phase can form a hollow beam. This increases the energy of the reference band light, facilitates reference pixel sensing, and reduces the impact of the reference band light on the target band pixels.

[0115] Exemplarily, the phase formula of the vortex phase is:

[0116] ; (5)

[0117] in, is the number of topological cores.

[0118] For example, to facilitate better sensing of the reference wavelength band light modulated by the vortex phase by the reference pixel, the vortex phase is preferably a vortex focusing phase. The vortex focusing phase can be used to modulate incident light of the corresponding wavelength band (i.e., the reference wavelength band light) into defocused vortex light, thereby forming a hollow circular light spot similar to a "doughnut" shape. By adjusting the number of topological cores, hollow beams of varying sizes can be achieved.

[0119] Of course, in an embodiment not shown, the vortex phase can also adopt a vortex divergence phase, or other vortex phases, as long as the light of the reference band can be routed to the reference area 112s corresponding to the reference pixel, thereby avoiding the reference band light from affecting the target pixel.

[0120] Coordinate Reference Figure 14 As shown, the present invention provides another embodiment of a metasurface configured as a metalens. In this embodiment, each metasurface unit is divided into multiple parts, each of which is arranged with only a phase for modulating light of a single wavelength band, thereby simplifying the design of the metasurface. In this embodiment, identical reference numerals represent identical components with similar functions and are not further described.

[0121] In some embodiments, each pixel unit includes a target area 111s and a reference area 112s, and each metasurface unit includes a target portion 21a corresponding to the target area 111s and a reference portion 21b corresponding to the reference area 112s.

[0122] In this embodiment, the target portion 21a of each metasurface unit is opposite to the target area 111s of the corresponding pixel unit along the optical axis, and the reference portion 21b of each metasurface unit is opposite to the reference area 112s of the corresponding pixel unit along the optical axis. Figure 9 , the target portion 21a is opposite to the target area 111s along the optical axis, and the reference portion 21b is opposite to the reference area 112s along the optical axis. The area of ​​the target portion 21a can be exactly the same as that of the target area 111s [e.g. Figure 14 (b) embodiment], the area of ​​the target portion 21a may also be the same as that of the target region 111s [e.g. Figure 14 In the embodiment (a), the circle of the target portion 21a is inscribed in the target area 111s, as long as the target portion 21a and the target area 111s are opposite to each other along the optical axis. Similarly, the reference portion 21b and the reference area 112s are the same.

[0123] In some embodiments, a reference phase is arranged in the target portion 21a to route light of a reference wavelength band to the reference area 112s, and a target phase is arranged in the reference portion 21b to route light of a target wavelength band to the target area 111s.

[0124] In this embodiment, the reference phase (e.g., vortex phase) arranged within the target portion 21a modulates only one wavelength band of light (i.e., the reference wavelength band of light), thereby routing the reference wavelength band of light to the reference region 112s. Light of other wavelength bands (e.g., the target wavelength band of light) can directly pass through the target portion 21a and enter the target region 111s (i.e., the target pixel). The target phase (e.g., focus phase) arranged within the reference portion 21b modulates only one wavelength band of light (i.e., the target wavelength band of light), thereby routing the target wavelength band of light to the target region 111s. Light of other wavelength bands (e.g., the reference wavelength band of light) can directly pass through the reference portion 21b and enter the reference region 112s (i.e., the reference pixel).

[0125] Therefore, this embodiment can also route light of two wavelength bands to specific areas respectively, and the phase arrangement within each part of the metasurface unit only needs to consider one wavelength band, thereby simplifying the design difficulty of each part of the metasurface unit.

[0126] In some embodiments, the optoelectronic chip 10 includes a plurality of color pixel groups 100 arranged in an array, each color pixel group includes at least four pixel units, and two of the at least four pixel units sense light in the same wavelength band.

[0127] In this embodiment, four pixel units collectively constitute a color pixel group 100. Multiple color pixel groups 100, when arranged in an array along the X-axis and / or Y-axis, collectively constitute an optoelectronic chip 10, thereby meeting the imaging requirements of a color image sensor. Three of the four pixel units sense different target wavelengths, while another pixel unit senses the same target wavelength as one of the first three.

[0128] In this embodiment, the optoelectronic chip 10 further includes a fourth pixel unit 14, which includes a fourth target pixel 141 that senses light in a fourth target wavelength band and a fourth reference pixel 142 that senses light in a fourth reference wavelength band. The fourth target pixel 141 senses the same wavelength band as the second target pixel 121, i.e., the fourth target wavelength band is the same as the second target wavelength band, both sensing green (G) light. Furthermore, the fourth reference wavelength band is also the same as the second reference wavelength band. The metasurface 20 further includes a fourth metasurface unit 24 corresponding to the fourth pixel unit 14. The structure and function of the fourth metasurface unit 24 are the same as those of the second metasurface unit 22. Thus, the first metasurface unit 21, the second metasurface unit 22, the third metasurface unit 23, and the fourth metasurface unit 24 collectively form a color metasurface unit 200, which corresponds one-to-one to the color pixel group 100.

[0129] For example, Figure 3In any regular quadrilateral color pixel group 100, two green (G) pixels are arranged along one diagonal line of the regular quadrilateral, and red (R) pixels and blue (B) pixels are arranged along the other diagonal line, thereby forming a Bayer pattern arrangement.

[0130] In some embodiments, continue with reference to Figure 6 、 Figure 7 and Figure 8 As shown, a filter film (113, 123, 133) is provided on the light incident side of each target pixel (111, 121, 131), and the filter film is configured to transmit light corresponding to the target wavelength band.

[0131] In this embodiment, the filter film is configured as a bandpass filter, thereby filtering out light of other wavelengths and allowing only light of the target wavelength band to be transmitted to the target pixel, thereby reducing the impact of other stray light on the sensing of the target pixel.

[0132] According to another aspect of the present invention, a method for manufacturing an image sensor is further provided. The structure and function of the image sensor are as described above and will not be repeated here.

[0133] Coordinate Reference Figure 15 and Figure 16 As shown, the manufacturing method of the image sensor includes the following steps:

[0134] A photoelectric sensing device 1 is provided.

[0135] In this embodiment, Figure 15 In step (a), when providing the photoelectric sensor device 1 , the end surface of the pad 16 facing the light incident side of the substrate 15 is exposed outside the substrate 15 , so as to facilitate connection with other circuits or chips.

[0136] A nanostructure layer 250 is deposited on the light incident side of the substrate 15 , and the nanostructure layer 250 is etched for the first time so that the nanostructure layer 250 at least covers the light incident side of the optoelectronic chip 10 .

[0137] In this embodiment, Figure 15 In step (c), a nanostructure layer 250 is formed on the light incident side of the substrate 15 by a deposition process. The deposition process may be physical vapor deposition (PVD), chemical vapor deposition (CVD), atomic layer deposition (ALD), electroplating, chemical plating, or the like.

[0138] In this embodiment, Figure 15 In step (h), after the first etching of the nanostructure layer 250, the nanostructure layer 250 may cover only the light incident side of the optoelectronic chip 10. Alternatively, the etched nanostructure layer 250 may cover not only the light incident side of the optoelectronic chip 10 but also other areas of the light incident side of the substrate 15.

[0139] After the nanostructure layer 250 is etched for the second time, a metasurface 20 is formed on the light incident side of the optoelectronic chip 10 .

[0140] In this embodiment, Figure 16 In step (e), the nanostructure layer 250 is etched to form arrayed nanostructures 25 , thereby completing the fabrication of the metasurface 20 .

[0141] By depositing the nanostructure layer 250 on the light incident side of the substrate 15 and etching the nanostructure layer 250 twice to complete the production of the metasurface 20, there is no need to deposit the nanostructure layer 250 in the window formed by the photoresist layer, which removes the limitation on the deposition process temperature and avoids limiting the material selection of the nanostructure layer 250.

[0142] In some embodiments, as Figure 15 Step (f) and Figure 15 In step (g), after forming the first mask layer 40 on the nanostructure layer 250 , a first etching is performed.

[0143] In some embodiments, the material of the first mask layer 40 and / or the second mask layer 50 may be a metal material.

[0144] In this embodiment, the material of the first mask layer 40 can be a metal material, that is, a hard mask, such as metal chromium, nickel, etc. Therefore, it can achieve long-term etching without being easily consumed, avoid pattern distortion, and increase etching depth.

[0145] In this embodiment, the material of the first mask layer 40 may also be an organic material, such as photoresist, so that the process steps can be simplified and no additional hard mask deposition and removal is required.

[0146] In some embodiments, as Figure 16 Step (d) and Figure 16 In step (e), after forming the second mask layer 50 on the nanostructure layer 250 , a second etching is performed.

[0147] In this embodiment, the material of the second mask layer 50 can be a metal material, that is, a hard mask, such as metal chromium, nickel, etc. Therefore, it can achieve long-term etching without being easily consumed, avoid pattern distortion, and increase etching depth.

[0148] In this embodiment, the material of the second mask layer 50 may also be an organic material, such as photoresist, so as to simplify the process steps and eliminate the need for additional deposition and removal of a hard mask.

[0149] Moreover, the corresponding mask layer is set before each etching, that is, the number of mask layers corresponds to the number of etching times, which improves the accuracy of each etching and meets the high-precision processing requirements of metasurfaces and image sensors.

[0150] In other embodiments, the material of the first mask layer 40 and / or the second mask layer 50 may be an inorganic non-metallic material, i.e., a hard mask. Compared to organic materials (e.g., photoresist), inorganic non-metallic materials can also achieve long-term etching without being easily consumed, thus avoiding pattern distortion and increasing etching depth.

[0151] For example, the inorganic non-metallic material may be silicon dioxide, silicon nitride, silicon oxynitride, aluminum oxide, or the like.

[0152] In some embodiments, forming a first mask layer 40 on the nanostructure layer 250 specifically includes:

[0153] forming a first photoresist layer 60 on the nanostructure layer 250;

[0154] like Figure 15 (d) step of exposing and developing the first photoresist layer 60 to form a patterned first photoresist layer 60 , wherein a projection of the optoelectronic chip 10 on the substrate 15 is complementary to a projection of the patterned first photoresist layer 60 on the substrate 15 ;

[0155] like Figure 15 In step (e), a first mask layer 40 is formed on the patterned first photoresist layer 60 .

[0156] In this embodiment, Figure 15 In step (d), the projection of the optoelectronic chip 10 on the substrate 15 is complementary to the projection of the patterned first photoresist layer 60 on the substrate 15 . Specifically, the projection of the optoelectronic chip 10 on the substrate 15 and the projection of the patterned first photoresist layer 60 on the substrate 15 are combined to form a complete substrate 15 .

[0157] In this embodiment, since the projection of the optoelectronic chip 10 on the substrate 15 is complementary to the projection of the patterned first photoresist layer 60 on the substrate 15, after the first mask layer 40 is formed on the patterned first photoresist layer 60, the first mask layer 40 on the nanostructure layer 250 just covers only the light incident side of the optoelectronic chip 10.

[0158] In this embodiment, since the first mask layer 40 on the nanostructure layer 250 only covers the light incident side of the optoelectronic chip 10, after the nanostructure layer 250 is etched for the first time, the nanostructure layer 250 only covers the light incident side of the optoelectronic chip 10, and does not cover other areas of the light incident side of the substrate 15.

[0159] Thus, the end surface of the pad 16 facing the light incident side of the substrate 15 is exposed outside the substrate 15, which is convenient for connection with other circuits or chips, meeting the design requirements of common back-illuminated CMOS.

[0160] In this embodiment, the first photoresist layer 60 is formed on the nanostructure layer 250 by a spin coating process.

[0161] In this embodiment, the exposure process is performed using an electron beam lithography (EBL) system to create a photoresist pattern complementary to the desired nanopattern. During the development process, the conductive adhesive on the surface is first rinsed with deionized water, then immersed in a developer for development. After completion, the pattern is transferred to a fixer for fixing.

[0162] In other embodiments, the first mask layer 40 on the nanostructure layer 250 can cover not only the light incident side of the optoelectronic chip 10, but also other areas of the light incident side of the substrate 15, as long as the end face of the solder pad 16 facing the light incident side of the substrate 15 is exposed outside the substrate 15. For example, a window can be opened in the end face area of ​​the solder pad 16 facing the light incident side of the substrate 15, thereby reducing the etching area during the first etching.

[0163] In some other embodiments, the pad 16 may be disposed on the side of the substrate 15 away from the light incident side, so that the first mask layer 40 can cover the entire light incident side of the substrate 15 and the first etching is omitted.

[0164] In some embodiments, forming the second mask layer 50 on the nanostructure layer 250 specifically includes:

[0165] like Figure 16 In step (a), a second photoresist layer 70 is formed on the nanostructure layer 250 ;

[0166] like Figure 16 In step (b), the second photoresist layer 70 is exposed and developed to form a patterned second photoresist layer 70 , wherein a projection of the metasurface 20 on the substrate 15 is complementary to a projection of the patterned second photoresist layer 70 on the substrate 15 ;

[0167] like Figure 16 In step (c), a second mask layer 50 is formed on the patterned second photoresist layer 70 .

[0168] In this embodiment, combined with Figure 16 Step (b) and Figure 16 In step (e), the projection of the metasurface 20 on the substrate 15 is complementary to the projection of the patterned second photoresist layer 70 on the substrate 15 , specifically, the projection of the metasurface 20 on the substrate 15 and the projection of the patterned second photoresist layer 70 on the substrate 15 are combined to form a complete optoelectronic chip 10 .

[0169] In this embodiment, since the projection of the metasurface 20 on the substrate 15 is complementary to the projection of the patterned second photoresist layer 70 on the substrate 15 , the second mask layer 50 formed on the patterned second photoresist layer 70 covers each nanostructure 25 of the metasurface 20 .

[0170] In this embodiment, since the second mask layer 50 on the nanostructure layer 250 covers each nanostructure 25 of the metasurface 20, the desired nanostructure 25 is directly formed after the nanostructure layer 250 is etched for the second time, thereby achieving precise manufacturing of the metasurface 20.

[0171] In this embodiment, the second photoresist layer 70 is formed on the nanostructure layer 250 by a spin coating process.

[0172] In some embodiments, forming a mask layer (40, 50) on the nanostructure layer 250 specifically includes:

[0173] A mask layer (40, 50) is formed on the nanostructure layer 250 through a deposition process, and the material of the mask layer (40, 50) is a metal material or an inorganic non-metallic material.

[0174] In this embodiment, the mask layers (40, 50) are both formed on the structural layer 250 using a deposition process.

[0175] In this embodiment, the material of the mask layer (40, 50) is a metal material. Compared with a solution using a non-metal material (such as photoresist), the mask layer (40, 50) of this solution has a strong etching resistance and can increase the etching depth of the etching process.

[0176] For example, the metal material may be chromium or nickel. The deposition process adopts physical vapor deposition, such as sputtering process, and the target material is metal chromium.

[0177] For example, after depositing the mask layer (40, 50) on the patterned photoresist (60, 70), the photoresist (60, 70) is stripped (lift-off), thereby completing the production of the mask layer (40, 50). When stripping the photoresist (60, 70), an organic solvent such as N-methylpyrrolidone (NMP) or EKC can be used as a stripping solution.

[0178] In some embodiments, depositing the nanostructure layer 250 on the light incident side of the substrate 15 specifically includes:

[0179] After the dielectric layer 30 is deposited on the surface of the substrate 15 , the nanostructure layer 250 is deposited on the surface of the dielectric layer 30 .

[0180] In this embodiment, a dielectric layer 30 is deposited on the substrate 15 before depositing the nanostructured layer 250. The thickness of the dielectric layer 30 can be adjusted based on the desired modulation (e.g., focal length) of the metasurface 20. By using the dielectric layer 30 between the substrate 15 and the nanostructured layer 250, the desired relative distance between the metasurface 20 and the optoelectronic chip 10 can be achieved.

[0181] Compared with the solution of "not setting a dielectric layer", the design requirements of the relative distance between the metasurface 20 and the optoelectronic chip 10 are achieved by controlling the thickness of the dielectric layer 30. This can meet the distance requirements between the metasurface 20 and the optoelectronic chip 10 without changing the design and structure of the optoelectronic sensor device 1, and is applicable to all optoelectronic sensor devices 1.

[0182] In other embodiments, the dielectric layer can be omitted. In this case, the metasurface 20 is directly formed on the end face of the substrate 15. For example, the position requirements between the metasurface 20 and the optoelectronic chip 10 can be met by controlling the distance between the photosensitive surface of the optoelectronic chip 10 and the light incident surface of the substrate 15.

[0183] In some embodiments, after the nanostructure layer 250 is deposited, the nanostructure layer 250 and the dielectric layer 30 are first etched.

[0184] In this embodiment, combined with Figure 15 Step (f) and Figure 15 In step (g), when performing the first etching, the nanostructure layer 250 and the dielectric layer 30 need to be etched simultaneously.

[0185] In this embodiment, combined with Figure 16 Step (d) and Figure 16 In step (e), when performing the second etching, only the nanostructure layer 250 needs to be etched, and the dielectric layer 30 does not need to be etched.

[0186] In some embodiments, the refractive index of the dielectric layer 30 is lower than the refractive index of the nanostructure layer 250 .

[0187] In this embodiment, the refractive index of the dielectric layer 30 is lower than that of the nanostructure layer 250, thereby meeting the fabrication requirements of the metasurface 20. Depending on the materials of the dielectric layer 30 and the nanostructure layer 250, a plasma dry etching process can be selected for the first and second etchings.

[0188] For example, the dielectric layer 30 may be made of SiO 2 , and the nanostructure layer 250 may be made of TiO 2 or silicon nitride.

[0189] Exemplary, continue with reference Figure 15 and Figure 16 , the production steps of the entire embodiment are as follows:

[0190] like Figure 15 In step (a), a photoelectric sensor device 1 is provided. In the photoelectric sensor device 1 , the end surface of the pad 16 facing the light incident side of the substrate 15 is exposed outside the substrate 15 to facilitate connection with other circuits or chips.

[0191] like Figure 15 In step (b), a dielectric layer 30 is deposited on the light incident end face of the substrate 15. The dielectric layer 30 may be made of silicon dioxide, and the thickness of the dielectric layer 30 is between 1 and 20 μm.

[0192] like Figure 15 In step (c), a nanostructure layer 250 is deposited on the light incident end face of the dielectric layer 30. The material of the nanostructure layer 250 can be titanium dioxide or silicon nitride, and the thickness of the nanostructure layer 250 is between 800 nm and 1200 nm.

[0193] like Figure 15 In step (d), a first photoresist layer 60 is spin-coated on the nanostructure layer 250 , and the first photoresist layer 60 is exposed and developed to form a patterned first photoresist layer 60 .

[0194] like Figure 15 In step (e), the patterned first photoresist layer 60 is deposited to form a first mask layer 40 . The thickness of the first mask layer 40 is between 200 nm and 500 nm.

[0195] like Figure 15 In step (f), an organic solvent is used as a stripping solution to remove the first photoresist layer 60 and the first mask layer 40 covering the first photoresist layer 60, thereby forming the first mask layer 40 located on the end surface of the nanostructure layer 250. The organic solvent may be EKC or NMP.

[0196] like Figure 15 In step (g), a first etching is performed, that is, the dielectric layer 30 and the nanostructure layer 250 are etched by a plasma dry etching method until the end surface of the pad 16 facing the light incident side of the substrate 15 is exposed outside the substrate 15 again.

[0197] like Figure 15 In step (h), the first mask layer 40 located on the end surface of the nanostructure layer 250 is removed by using an acidic solvent.

[0198] like Figure 16 In step (a), a second photoresist layer 70 is spin-coated on the nanostructure layer 250 .

[0199] like Figure 16In step (b), the second photoresist layer 70 is exposed using electron beam lithography or deep ultraviolet lithography, and the exposed second photoresist layer 70 is removed by development to form a patterned second photoresist layer 70. The line width of the nanostructure 25 is between 50 nm and 350 nm.

[0200] like Figure 16 In step (c), the patterned second photoresist layer 70 is deposited to form a second mask layer 50 . The thickness of the second mask layer 50 is between 30 nm and 100 nm.

[0201] like Figure 16 In step (d), an organic solvent is used as a stripping solution to remove the second photoresist layer 70 and the second mask layer 50 covering the second photoresist layer 70, thereby forming the second mask layer 50 located on the end surface of the nanostructure layer 250. The organic solvent may be EKC or NMP.

[0202] like Figure 16 In step (e), a second etching is performed, that is, the nanostructure layer 250 is etched using a plasma dry etching method until the nanostructure 25 is formed.

[0203] like Figure 16 In step (f), an acidic solvent is used to remove the second mask layer 50 on the end surface of the nanostructure 25, and a protective layer 26 is formed on the dielectric layer 30, thereby completing the manufacture of the image sensor. Of course, the protective layer 26 may not be provided.

[0204] It should be understood that although this specification is described in terms of implementation methods, not every implementation method contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each implementation method can also be appropriately combined to form other implementation methods that can be understood by those skilled in the art.

[0205] The series of detailed descriptions listed above are only specific descriptions of feasible implementation methods of the present invention. They are not intended to limit the scope of protection of the present invention. Any equivalent implementation methods or changes that do not deviate from the technical spirit of the present invention should be included in the scope of protection of the present invention.

Claims

1. A method for manufacturing an image sensor, characterized in that: The steps include: A photoelectric sensor device is provided, comprising a photoelectric chip, a substrate for carrying the photoelectric chip, and a pad electrically connected to the photoelectric chip; depositing a nanostructured layer on the light incident side of the substrate; forming a first photoresist layer on the nanostructure layer; exposing and developing the first photoresist layer to form a patterned first photoresist layer, wherein a projection of the optoelectronic chip on the substrate is complementary to a projection of the patterned first photoresist layer on the substrate; forming a first mask layer on the patterned first photoresist layer; stripping the first photoresist layer to form a first mask layer on the end surface of the nanostructure layer; performing a first etching on the nanostructure layer so that the nanostructure layer at least covers the light incident side of the optoelectronic chip; removing the first mask layer on the end surface of the nanostructure layer by using an acidic solvent; After the nanostructure layer is etched a second time, a metasurface is formed on the light-entering side of the optoelectronic chip.

2. The method for manufacturing an image sensor according to claim 1, wherein: After forming a second mask layer on the nanostructure layer, a second etching is performed.

3. The method for manufacturing an image sensor according to claim 2, wherein: Forming a second mask layer on the nanostructure layer specifically includes: forming a second photoresist layer on the nanostructure layer; exposing and developing the second photoresist layer to form a patterned second photoresist layer, wherein a projection of the metasurface on the substrate is complementary to a projection of the patterned second photoresist layer on the substrate; A second mask layer is formed on the patterned second photoresist layer.

4. The method for manufacturing an image sensor according to claim 2, wherein: Forming a mask layer on the nanostructure layer specifically includes: A mask layer is formed on the nanostructure layer through a deposition process, and the material of the mask layer is a metal material or an inorganic non-metallic material.

5. The method for manufacturing an image sensor according to claim 1, wherein: Depositing a nanostructured layer on the light incident side of the substrate includes: After a dielectric layer is deposited on the surface of the substrate, a nanostructure layer is deposited on the surface of the dielectric layer.

6. The method for manufacturing an image sensor according to claim 5, wherein: After the nanostructure layer is deposited, the nanostructure layer and the dielectric layer are etched for the first time.

7. The method for manufacturing an image sensor according to claim 5, wherein: The refractive index of the dielectric layer is lower than that of the nanostructure layer.

8. The method for manufacturing an image sensor according to claim 1, wherein: The optoelectronic chip includes at least three pixel units, and the metasurface includes metasurface units corresponding one to one with the pixel units. Each pixel unit includes a target pixel for sensing a target band and a reference pixel for sensing a reference band. Different pixel units sense different target bands, and different pixel units sense the same reference band. Each metasurface unit routes the light of the target band to the pixel in the corresponding pixel unit that matches the target band, and routes the light of at least part of the reference band to the pixel in the corresponding pixel unit that matches the reference band.

9. The method for manufacturing an image sensor according to claim 8, wherein: All metasurface units are configured as metalenses or gratings; or, A portion of the metasurface units are configured as metalenses, and another portion of the metasurface units are configured as gratings.

10. An image sensor, characterized in that: The image sensor is manufactured by any one of the manufacturing methods described in claims 1 to 9.

Citation Information

Patent Citations

  • Image sensor, operating method of image sensor, and electronic device including image sensor

    CN115037887A

  • Image sensor, method of manufacturing image sensor, and electronic device including image sensor

    CN116137275A

  • CMOS (complementary metal oxide semiconductor) image sensor, preparation process thereof and electronic equipment

    CN116884983A