Inorganic-organic hybrid thin film memristor for simulating nerve synapse and nociceptor and preparation method of inorganic-organic hybrid thin film memristor
By using MLD/ALD technology to prepare inorganic-organic hybrid films in volatile memristors, forming a bilayer structure of titanium-based maleic acid and metal oxide, the problems of poor uniformity and compatibility of existing volatile memristor materials preparation methods are solved, efficient neural synaptic and nociceptor simulation is achieved, and highly compatible with CMOS processes.
Patent Information
- Application Number
- CN202510383685.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-28
- Publication Date
- 2025-06-27
AI Technical Summary
The existing volatile memristors have problems with poor uniformity of material preparation methods and poor compatibility with CMOS processes in simulating the functions of neurosynaptics and nociceptors, and there is a lack of research based on inorganic-organic hybrid films.
Inorganic-organic hybrid thin film memristors are prepared at lower temperatures by molecular layer/atomic layer deposition (MLD/ALD) technology. The resistance functional layer is formed through the double-layer structure of titanium-based maleic acid material and the metal oxide film to realize the device's synaptic bionic function and nociceptor characteristics.
The high uniformity of volatile memristors and good synaptic bionic function and nociceptor characteristics are achieved. The device performs excellently in simulating the dual functions of synapses and nociceptors, and is highly compatible with the CMOS process, suitable for large-scale integration.
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Abstract
Description
Technical Field
[0001] The present invention belongs to the cross - field of semiconductor microelectronic devices and artificial intelligence, and particularly relates to an inorganic - organic hybrid thin - film memristor simulating analog synapses and nociceptors and a preparation method thereof. Background Art
[0002] With the rapid development of neuromorphic computing, it has become possible to break through the inherent von Neumann bottleneck in the traditional decoupled architecture of storage and computing. Among various neuromorphic architectures, artificial neural networks (ANNs) based on memristors have become strong competitors in the field of neuromorphic computing due to their simple manufacturing process, fast switching speed, and good compatibility with CMOS technology. Memristors can be divided into two types: volatile and non - volatile, and the main difference lies in whether the device can retain memory information after removing the applied voltage. Compared with non - volatile memristors, volatile memristors have two unique advantages: First, volatile memristors simulate short - term memory (STM) and long - term memory (LTM) through current decay and saturation, and thus simulate the characteristics of brain nerve activities; Second, after applying an appropriate threshold voltage, volatile memristors can effectively trigger conductance changes, thus showing advantages in applications such as nociceptors and true random number generators. However, emerging research mainly focuses on inorganic - oxide - based volatile memristors, and there is little research on volatile memristors based on inorganic - organic hybrid thin films.
[0003] Memristors need to have non-linear resistance characteristics to simulate neural synapses, and need to be volatile and have multiple conductance states to simulate nociceptors. To improve the storage performance of volatile memristors and achieve the dual functions of neural synapse-like and nociceptor-like, optimizing the device structure and innovating the material system are particularly crucial. Due to the simple structure of memristors, many studies have focused on improving their storage performance by modifying the device design. For example, the bilayer structure can effectively control the concentration gradient of oxygen vacancies, thus stabilizing the formation and rupture of conductive filaments, and further improving the durability and repeatability of the device. In addition, inorganic-organic hybrid materials, due to their rich physical and chemical properties, adjustable structures, and flexible performance, can provide a good basis for the simulation of neural synapses and nociceptors when used as the functional layer of memristors. However, the current common preparation methods of inorganic-organic hybrid materials, such as sol-gel method, hydrothermal synthesis method, blending method, intercalation composite method, and LB film method, etc., have problems of poor uniformity and difficulty in compatibility with CMOS processes. Atomic layer deposition (ALD) technology has self-limiting and self-saturating characteristics, and can achieve high uniformity and conformal deposition of thin films on complex three-dimensional surfaces over a large area. As a branch of ALD, molecular layer deposition (MLD) can deposit polymers or inorganic-organic hybrid materials using organic molecules as precursors, as the functional layer of memristors. However, there is extremely little research on the preparation of inorganic-organic hybrid thin films for volatile memristors based on MLD technology. Summary of the Invention
[0004] The present invention provides an inorganic-organic hybrid thin film memristor for simulating neural synapses and nociceptors and a preparation method thereof. By using MLD / ALD (molecular layer / atomic layer deposition) technology, a volatile memristor is prepared at a relatively low temperature, and the prepared volatile memristor has excellent neural synapse biomimetic functions and nociceptor characteristics.
[0005] To achieve the above object, the present invention adopts the following technical solutions: An inorganic-organic hybrid thin film memristor for simulating neural synapses and nociceptors, the inorganic-organic hybrid thin film memristor being a volatile memristor, comprising: a substrate, a bottom electrode, a resistive switching functional layer, and a top electrode from bottom to top in sequence; the resistive switching functional layer is a bilayer structure composed of an inorganic-organic hybrid thin film and a metal oxide thin film; the inorganic-organic hybrid thin film is a titanium-based maleic acid material; the metal oxide thin film is Al2O3; Wherein, the thickness of the inorganic-organic hybrid thin film is 5-30 nm, and the thickness of the metal oxide thin film is 2-20 nm; the bottom electrode and the top electrode are TiN and Pt respectively, and the substrate is a semiconductor or an insulator.
[0006] The preparation method of the above-mentioned memristor comprises the following steps: Step 1: Prepare a bottom electrode on a substrate; Step 2: On the bottom electrode, grow a titanium-based maleic acid hybrid film at 140 - 280 °C by MLD technology; then use thermal ALD technology to deposit an Al2O3 film on the titanium-based maleic acid hybrid film at 80 - 300 °C to form a resistive switching functional layer with an inorganic-organic / inorganic bilayer stack structure; Step 3: Prepare a top electrode on the resistive switching functional layer to finally obtain an inorganic-organic hybrid film volatile memristor that simulates neural synapses and nociceptors.
[0007] In the above steps, the MLD technology cycle pulse parameters are set as 0.3 s TiCl4 / 4 s N2 / 2 s MA / 10 s N2, and the number of cycles is determined according to the required thickness; the ALD technology sequential pulses are 0.1 s TMA / 4 s N2 / 0.1 s H2O / 4 s N2.
[0008] Beneficial effects: The present invention provides an inorganic-organic hybrid film memristor that simulates neural synapses and nociceptors and a preparation method thereof, which has the following advantages compared with the prior art: 1. The present invention prepares a volatile memristor. The material system used is TiN and Pt as the bottom / top electrodes, and Ti-MA / Al2O3 as the functional layer. Since the concentration of oxygen vacancies in Ti-MA is higher than that in Al2O3, this difference forms a concentration gradient of oxygen vacancies in the bilayer structure, thereby promoting the migration of oxygen vacancies. When a negative bias voltage is applied, oxygen ions migrate towards the oxygen-absorbing TiN electrode to form TiO x N 1-x layer to prevent oxygen release from damaging the device; at negative voltage, TiN acts as an oxygen storage layer to ensure the stability of the conductive filament, and the device also switches from HRS to LRS; on the contrary, applying a positive bias voltage will cause oxygen ions to be released from the TiN electrode into Al2O3 and Ti-MA to fill the oxygen vacancies, and the conductive filament breaks, and the device switches back from LRS to HRS. In the absence of an external voltage, oxygen vacancies will naturally diffuse, causing the conductive filament to break spontaneously, and the device returns to its HRS state; realizing the dual functions of simulating neural synapses and nociceptors; 2. The inorganic-organic hybrid film volatile memristor of the present invention can successfully simulate the key functions of neural synapses, including paired-pulse facilitation (PPF), post-tetanic potentiation (PTP), the transition from short-term plasticity (STP) to long-term plasticity (LTP), long-term potentiation / depression (LT P / LT D ), learning and forgetting and relearning, classical conditioning, and spike-timing-dependent plasticity (STDP); 3. The volatile memristor of the present invention can also simulate the important characteristics of nociceptors, including threshold behavior, relaxation process, non-adaptive characteristics, sensitization characteristics (such as hyperalgesia and allodynia), and recovery process; 4. By using MLD to prepare inorganic-organic hybrid thin films, molecular-level composite can be achieved, combining the advantages of inorganic and organic materials; the metal oxide thin films prepared by ALD technology are combined with the inorganic-organic hybrid thin films, showing excellent resistive switching performance. The whole preparation process can be completed within the temperature range of 80-200°C, which is highly compatible with microelectronic processes and suitable for large-scale integration; 5. Through the innovative selection of resistive switching functional layer materials, the application potential of inorganic-organic hybrid materials in nociceptors is broadened. The hybrid materials have good designability and processability and can be widely applied in fields such as intelligent detection devices and bionic robots in the future, showing broad market prospects. Brief Description of the Drawings
[0009] Figure 1 is a schematic structural diagram of the memristor of the present invention; Figure 2 is a schematic diagram of the formation, fracture, and self-diffusion mechanism of oxygen vacancy conductive filaments of the memristor of the present invention; Figure 3 (a) is the I-V curve of the memristor in the present invention embodiment under the application of a DC voltage for 100 cycles of testing. The numbers correspond to the voltage scanning direction in the arrow direction; Figure 3 (b) is the multi-level resistance states of the memristor in the present invention embodiment caused by different on / off voltage scans. Each resistance state has experienced 2000 test cycles; Figure 4 is the change curve of the on-state current during the retention process of the memristor in the present invention embodiment at the read voltages of 0.5V and 0.1V. The retention loss is calculated as the ratio of the current change to the initial on-state current; Figure 5 is the variation diagram of the on / off voltage of the memristor in the present invention embodiment on 16 different device units; Figure 6 is the paired-pulse facilitation index diagram of the memristor in the present invention embodiment; Figure 7 is the schematic diagram of post-tetanic potentiation of the memristor in the present invention embodiment; Figure 8 is the schematic diagram of the transformation from short-term plasticity to long-term plasticity of the memristor in the present invention embodiment; Figure 9 is the schematic diagram of long-term potentiation and long-term depression of the memristor in the present invention embodiment; Figure 10It is a schematic diagram of the learning - forgetting - relearning process of the memristor in the embodiment of the present invention; Figure 11 It is a schematic diagram of spike - time - dependent plasticity of the memristor in the embodiment of the present invention; Figure 12 It is a schematic diagram of the memristor simulating the classical Pavlovian conditioning experiment in the embodiment of the present invention; Figure 13 It is a schematic diagram of the threshold behavior of the memristor in the embodiment of the present invention; Figure 14 It is a schematic diagram of the relaxation process of the memristor in the embodiment of the present invention; Figure 15 It is a schematic diagram of the non - adaptation characteristic of the memristor in the embodiment of the present invention; Figure 16 It is a schematic diagram of the sensitization phenomenon of the memristor in the embodiment of the present invention; Figure 17 It is a schematic diagram of the recovery process of the memristor in the embodiment of the present invention; Figure 18 It is a graph showing the variation of the operating voltage and response current with time during the on / off process of the memristor in the embodiment of the present invention. Detailed implementation manners
[0010] The present invention will be described in detail below with reference to the accompanying drawings and specific embodiments: Embodiment
[0011] A preparation method of an inorganic - organic hybrid thin - film (TiN / 6nm - Ti - MA / 4 nm - Al2O3 / Pt) memristor simulating neural synapses and nociceptors, comprising the following steps: Step 1, depositing the bottom electrode: First, ultrasonically clean the Si / SiO2 substrate in isopropyl alcohol, ethanol, and deionized water in sequence. Then, use TiCl4 and NH3 as precursors to deposit a bottom electrode TiN with a thickness of 10 nm by ALD at 400 °C. High - purity nitrogen (99.999%) is used as the carrier and purge gas, and the cyclic pulse parameters are set as 1 s TiCl4 / 5 s N2 / 3 s NH3 / 10 s N2, and the number of cycles is 300.
[0012] Step 2, growing the resistive switching functional layer: First, use maleic acid (MA) and TiCl4 precursors to deposit a 6-nm-thick Ti-MA by MLD at 160 °C. TiCl4 is kept at room temperature (RT), MA is heated to 135 °C, and high-purity nitrogen (99.999%) is used as the carrier and purge gas. The cyclic pulse parameters are set as 0.3 s TiCl4 / 4 s N2 / 2 s MA / 10 s N2, and the number of cycles is 50. Then, use trimethylaluminum (TMA, RT) and water (H2O, RT) as precursors to deposit a 4-nm-thick Al2O3 on Si / SiO2 / TiN / Ti-MA by thermal atomic layer deposition at 160 °C. The sequential pulses are 0.1 s TMA / 4 s N2 / 0.1 s H2O / 4 s N2; Step 3, depositing the top electrode: Use DC magnetron sputtering to sputter metal platinum (Pt) as the electrode. Sputter a top electrode with a diameter of 150 μm by using a mask plate, with a sputtering current of 30 mA, a sputtering time of 300 s, and a sputtering thickness of 40 nm. Scrape the edge of the device and coat it with silver paste to lead out the bottom electrode TiN for testing. The obtained device structure diagram is as Figure 1 shown, from bottom to top are the substrate, bottom electrode, resistive switching functional layer, and top electrode in sequence; the resistive switching functional layer is a bilayer structure composed of functional layer 1 and functional layer 2; functional layer 1 is a titanium-based maleic acid material; functional layer 2 is Al2O3; the obtained memristor is a volatile memristor.
[0013] Use a Keithly 4200 semiconductor parameter analyzer and a 4225-RPM pulse module to test the electrical properties of the above-prepared memristor. All voltage scans and pulse signals are applied to the Pt top electrode, and the TiN bottom electrode is grounded.
[0014] As Figure 2 shown, the formation mechanism of the volatile memristor follows the formation and rupture model of conductive filaments, which is driven by the migration and diffusion of oxygen vacancies. Since the concentration of oxygen vacancies in Ti-MA is higher than that in Al2O3, this difference forms a concentration gradient of oxygen vacancies in the bilayer structure, thus promoting the migration of oxygen vacancies. When a negative bias voltage is applied, oxygen ions migrate towards the oxygen-absorbing TiN electrode to form TiO x N 1-x layer to prevent the release of oxygen from damaging the device. At negative voltage, TiN acts as an oxygen storage layer to ensure the stability of the conductive filaments, and the device also switches from the HRS to the LRS. On the contrary, applying a positive bias voltage will cause oxygen ions to be released from the TiN electrode into Al2O3 and Ti-MA to fill the oxygen vacancies, resulting in the rupture of the conductive filaments, and the device switches back from the LRS to the HRS. In the absence of an external voltage, oxygen vacancies will naturally diffuse, causing the spontaneous rupture of the conductive filaments, and the device returns to its HRS state.
[0015] By applying a periodic voltage sweep to the Pt electrode, with the voltage ranging from 0 V → -3 V → 0 V → +2.5 V → 0 V, and conducting 100 consecutive DC ramp voltage tests, the I-V characteristics of the device were evaluated. The test results are as Figure 3 shown in (a), demonstrating typical bipolar resistive switching behavior. Due to the presence of internal defects in the Ti-MA layer, the memristor can form conductive filaments without the need for electroforming. The transition between the high resistance state (HRS) and the low resistance state (LRS) is achieved by applying an on voltage (V SET : -1.5 ± 0.4 V) and an off voltage (V RESET : 0.8 ± 0.2 V). The switching ratio of the device is approximately 10 3 . The I-V curves obtained from 100 repeated measurements indicate that the fabricated memristor has good repeatability.
[0016] At different V SET and V RESET voltages, a 0.5 V read voltage was applied to the memristor for multi-level resistance state testing. As shown in Figure 3 (b), the test results show that under the condition of V SET / V RESET being -2 V / +2 V, the device can stably maintain ten distinguishable resistance states during 2000 cycles, indicating its good endurance.
[0017] When in the HRS, the device remains stable, while it shows volatility when in the LRS. After applying V SET = -2 V, at read voltages of 0.5 V and 0.1 V, the retention time of the memristor was observed to reach 10 3 s (see Figure 4 ). By analyzing the current decay during this period and calculating the retention loss (RL) of the conduction current, at a relatively high conduction current (5 mA), RL reaches 73.37%, while at a lower conduction current, RL remains below 10%. Through this decay process, the observed current states can be divided into two categories: showing LTM at low conduction currents and STM at high conduction currents. This phenomenon verifies the potential of the above memristor in simulating brain memory functions.
[0018] As shown in Figure 5 , by testing the V SET and V RESET distributions among devices, the results show that the on and off operating voltages are -1.5 ± 0.5 V and 0.8 ± 0.5 V respectively, and the error range of the operating voltage is small, proving that the memristor of the present invention has reliable storage performance in terms of information writing, erasing, and reading.
[0019] According to the duration of synaptic weight changes, synaptic plasticity can be divided into short-term plasticity (STP) and long-term plasticity (LTP). Since the memristor of the present invention is volatile, its decay function can be used to simulate the characteristics of updating and erasing synaptic weights. To successfully use the memristor of the present invention to simulate PPF ( Figure 6 ), by applying a pair of pulses (-1 V, 1 μs) and adjusting the pulse interval (from 400 ns to 2400 ns), two current spikes can be measured and the PPF index can be calculated. At a pulse interval of 400 ns, the PPF index reaches 415%, and the fast relaxation time obtained by fitting is 930 ns, and the slow relaxation time is 3.79 μs.
[0020] To simulate the PTP phenomenon, it is achieved by shortening the pulse interval (i.e., increasing the pulse frequency). As Figure 7 shown, the change in current response gradually increases, indicating that the memristor of the present invention has a high dependence on spikes.
[0021] The transition from STP to LTP can be achieved through a continuous learning process. For this purpose, the memristor is trained by applying different numbers of pulses (-1 V, 10 μs), and the relaxation current is recorded at a read voltage of 0.1 V. As Figure 8 the test results show, the current change curve is similar to the Ebbing-Ossian forgetting curve. As the number of pulses increases, the relaxation time increases from 41 s to 366 s, and the synaptic weight change increases from 69.7% to 84.2%, verifying the transition from STP to LTP.
[0022] LTP can be further divided into potentiation (LT P ), and depression (LT D ). 40 potentiation pulses (-1.5 V, 10 μs) and 40 depression pulses (+1.5 V, 10 μs) are applied to the device, and the current is recorded at a read voltage of 0.1 V. As Figure 9 the test shows, the current increases or decreases with the stimulation of potentiation and depression pulses.
[0023] To simulate the learning-forgetting-relearning process of the brain ( Figure 10 ), a learning pulse with an amplitude of -2 V and a width of 10 ms is used. The forgetting behavior is simulated by reading the current after applying a pulse with an amplitude of 0.1 V and a width of 2 ms. Due to the volatility of the memristor of the present invention, the forgetting process occurs naturally. By repeatedly applying the learning pulse, the current response of the device gradually increases, and the repetition of the learning process improves the memory acquisition efficiency, ultimately achieving the transition from STM to LTM.
[0024] The dependence of spike-timing-dependent plasticity (STDP) was simulated by adjusting the sequential stimulation time of the pulse pair (i.e., spike time Δt). The pulse pair used was +1.2 V / -1.2 V, and the pulse width was 10 μs. When Δt>0, the presynaptic spike exceeded the postsynaptic spike, and long-term potentiation (LT) occurred P , and the synaptic weight increased; conversely, when Δt<0, the postsynaptic spike exceeded the presynaptic spike, and LT D occurred Figure 11 , and the synaptic weight decreased. As P shown, at a spike time of 15 μs, the synaptic weight under LT D increased to 31.2%, while the synaptic weight under LT
[0025] decreased to -29.3%. Figure 12 The memristor of the present invention can also simulate the phenomenon of conditioned reflex to replicate Pavlov's dog experiment (
[0026] ). In this experiment, the conditioned stimulus (CS) was a small bell sound, the unconditioned stimulus (US) was the stimulus of meat, and the current response of the memristor corresponded to the dog's response. In the initial stage, the small bell sound (CS) did not cause a response of the device, but after applying the stimulus of meat (US), the current response gradually increased. After 20 mixed stimuli of CS+US, the memristor began to generate a current response to the CS pulse, simulating the establishment of conditioned reflex. As the current response gradually weakened, the forgetting process was also simulated, which was consistent with the forgetting behavior in the biological system. Figure 13 shows that when the threshold current was set to 1 μA, when a pulse signal (-1 V, 50 ms) was applied, the current response generated by the device was 0.3 μA. As the pulse amplitude increased to -2 V, the current of the device response increased to 2.5 μA. When the pulse amplitude reached -1.6 V, the response current exceeded the threshold current, indicating that the artificial nociceptor was activated, which demonstrated that the memristor of the present invention could effectively mimic the threshold behavior of biological nociceptors.
[0027] After applying a damaging stimulus pulse (-2 V, 10 ms), the current was measured under a read pulse (0.5 V, 100 ms) ( Figure 14 ). The measured current gradually decreased with time, reflecting the typical relaxation process of a volatile memristor, simulating the decaying response of biological nociceptors to continuous stimuli. This decaying behavior further verified the advantage of the memristor of the present invention in simulating the dynamic characteristics of the sensory response system.
[0028] As Figure 15As shown, when 10 consecutive identical pulse stimuli (pulse amplitude ranging from -2 V to -1 V) are applied, the device maintains a stable response under the same external stimuli. This behavior mimics the "non-adapting" property of nociceptors, i.e., under repeated stimulation, the response of nociceptors does not decline, reflecting its stability.
[0029] The response of nociceptors in the injured state is significantly different from that in the normal state, and this phenomenon is called the sensitization property. Sensitization includes two types: hyperalgesia and allodynia. Hyperalgesia is manifested as an enhanced response of nociceptors to normal stimuli (even stimuli below the threshold); while allodynia is manifested as a strong response exceeding the threshold even to a weak external stimulus. To simulate these phenomena, the present invention successfully mimics the sensitization property by applying a train of pulses composed of normal stimulus pulses and injury pulses and adjusting the width and amplitude of the injury pulses. Figure 16 Figures 16(a) and (b) show that in the injured state, the current response induced by high-amplitude normal pulses (-1.6 V) is significantly higher than that under non-injured conditions, showing hyperalgesia; while low-amplitude normal pulses (-0.6 V) show allodynia.
[0030] When the external stimulus stops, the injured nociceptors gradually return to the normal state, and this phenomenon is called the recovery process. This recovery process is mimicked by adjusting the pulse interval of the injury pulses. As Figure 17 shown, when the pulse interval increases from 1 ms to 250 ms, the current response gradually decreases and finally returns to the normal state of non-injury.
[0031] To evaluate the energy consumption of the memristor of the present invention, pulses with an amplitude of -2 V and +2 V and a width of 280 ns are applied to achieve the on and off processes respectively. Figure 18 Figures 18(a) and (b) show that after 48 ns, the device transitions from the high resistance state (HRS) to the low resistance state (LRS) and returns to the high resistance state after 38 ns. The energy consumption of the on process is 147 pJ, and the energy consumption of the off process is 85 pJ. The low energy consumption property of the memristor of the present invention makes it suitable for 3D integration of crossbar structures without an additional heat dissipation system, especially suitable for neuromorphic computing applications. Example
[0032] A method for preparing an inorganic-organic hybrid thin film (TiN / 12 nm-Ti-MA / 8 nm-Al2O3 / Pt) memristor that mimics neural synapses and nociceptors, comprising the following steps: Step 1, depositing the bottom electrode: Deposit the bottom electrode TiN on the polyimide (PI) substrate by DC magnetron sputtering. The sputtering power is 100 W. Under room temperature and argon atmosphere, the gas pressure is maintained at 2 Pa. After sputtering for 15 min, the thickness of the bottom electrode TiN is 230 nm; Step 2, growing the resistive switching functional layer: First, deposit Ti-MA with a thickness of 12 nm by MLD using maleic acid (MA) and TiCl4 precursors at 140 °C. TiCl4 is kept at room temperature (RT), MA is heated to 135 °C, and high-purity nitrogen (99.999%) is used as the carrier and purge gas. The cyclic pulse parameters are set as 0.3 s TiCl4 / 4 s N2 / 2 s MA / 10 s N2, and the number of cycles is 90. Then, use trimethylaluminum (TMA, RT) and water (H2O, RT) as precursors to deposit 8 nm thick Al2O3 on PI / TiN / Ti-MA by thermal atomic layer deposition process at 100 °C. The sequential pulses are 0.1 s TMA / 4 s N2 / 0.1 s H2O / 4 s N2; Step 3, depositing the top electrode: Use DC magnetron sputtering to sputter metal platinum (Pt) as the electrode. By using a mask plate, sputter the top electrode with a diameter of 150 μm. The sputtering current is 30 mA, the sputtering time is 150 s, and the sputtering thickness is 20 nm. Scrape the edge of the device and coat it with silver paste to lead out the bottom electrode TiN for testing, and the obtained memristor is a volatile memristor. Example
[0033] A preparation method of an inorganic-organic hybrid thin film (TiN / 24 nm-Ti-MA / 16 nm-Al2O3 / Pt) memristor simulating neural synapses and nociceptors, comprising the following steps: Step 1, depositing the bottom electrode: First, ultrasonically clean the quartz glass substrate in isopropyl alcohol, ethanol, and deionized water in sequence. Then, deposit the bottom electrode TiN by PEALD at 400 °C using TiCl4 and NH3 plasma as precursors. High-purity nitrogen (99.999%) is used as the carrier and purge gas. The cyclic pulse parameters are set as 24 s NH3 plasma / 4 s N2 / 0.1 s TiCl4 / 4 s N2, the power of the plasma generator is 2500 W, and the number of cycles is 600. The thickness of the obtained TiN bottom electrode is 30 nm.
[0034] Step 2, growing the resistive switching functional layer: First, use maleic acid (MA) and TiCl4 precursors to deposit Ti-MA with a thickness of 24 nm at 200 °C by MLD. TiCl4 is maintained at room temperature (RT), MA is heated to 135 °C, high-purity nitrogen (99.999%) is used as the carrier and purge gas, the cyclic pulse parameters are set as 0.3 s TiCl4 / 4 s N2 / 2 s MA / 10 s N2, and the number of cycles is 500; then use trimethylaluminum (TMA, RT) and water (H2O, RT) as precursors to deposit 16 nm thick Al2O3 on quartz glass / TiN / Ti-MA at 300 °C by thermal atomic layer deposition process, and the sequential pulses are 0.1 s TMA / 4 s N2 / 0.1 s H2O / 4 s N2; Step 3, depositing the top electrode. Use DC magnetron sputtering to sputter metal platinum (Pt) as the electrode. Sputter a top electrode with a diameter of 150 μm by using a mask plate. The sputtering current is 30 mA, the sputtering time is 600 s, and the sputtering thickness is 80 nm. Scrape the edge of the device and coat it with silver paste to lead out the bottom electrode TiN for testing, and the obtained memristor is a volatile memristor.
[0035] The above are only the preferred embodiments of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and modifications can be made, and these improvements and modifications should also be regarded as the protection scope of the present invention.
Claims
1. An inorganic-organic hybrid thin film memristor that simulates neural synapses and nociceptors, characterized in that: The inorganic-organic hybrid thin film memristor is a volatile memristor, comprising: from bottom to top, a substrate, a bottom electrode, a resistive switching functional layer and a top electrode; the resistive switching functional layer is a double-layer structure consisting of an inorganic-organic hybrid film and a metal oxide film; the inorganic-organic hybrid film is a titanium-based maleic acid material; and the metal oxide film is Al2O3.
2. The inorganic-organic hybrid thin film memristor for simulating neural synapses and nociceptors according to claim 1, characterized in that: The thickness of the inorganic-organic hybrid film is 5-30 nm.
3. The inorganic-organic hybrid thin film memristor simulating neural synapses and nociceptors according to claim 1 or 2, characterized in that: The thickness of the metal oxide film is 2-20 nm.
4. The inorganic-organic hybrid thin film memristor for simulating neural synapses and nociceptors according to claim 1, characterized in that: The bottom electrode and the top electrode are TiN and Pt respectively.
5. The inorganic-organic hybrid thin film memristor for simulating neural synapses and nociceptors according to claim 1, characterized in that: The substrate is a semiconductor or an insulator.
6. A method for preparing an inorganic-organic hybrid thin film memristor that simulates neural synapses and nociceptors, characterized in that: The following steps are involved: Step 1: preparing a bottom electrode on a substrate; Step 2: On the bottom electrode, a titanium-based maleic acid hybrid film is grown by MLD technology; then an Al2O3 film is deposited on the titanium-based maleic acid hybrid film by thermal ALD technology to form a resistive switching functional layer of an inorganic-organic / inorganic double-layer stack structure; Step 3: Prepare a top electrode on the resistive functional layer to obtain an inorganic-organic hybrid thin film memristor that simulates neural synapses and nociceptors.
7. The method for preparing the inorganic-organic hybrid thin film memristor for simulating neural synapses and nociceptors according to claim 6, characterized in that: The temperature for growing titanium-based maleic acid hybrid films using MLD technology is 140℃-280℃.
8. The method for preparing the inorganic-organic hybrid thin film memristor for simulating neural synapses and nociceptors according to claim 6 or 7, characterized in that: The MLD technique cycle pulse parameters were set to 0.3s TiCl4 / 4s N2 / 2s MA / 10s N2.
9. The method for preparing the inorganic-organic hybrid thin film memristor for simulating neural synapses and nociceptors according to claim 6, characterized in that: The temperature of thermal ALD technology for depositing Al2O3 film on titanium-based maleic acid hybrid film is 80-300℃.
10. The method for preparing the inorganic-organic hybrid thin film memristor for simulating neural synapses and nociceptors according to claim 6 or 9, characterized in that: The ALD technique sequence pulse is 0.1s TMA / 4s N2 / 0.1s H2O / 4s N2.