Preparation process of silicon-glass structure sensor

Abstract

The invention provides a preparation process of a silicon-glass structure sensor. The preparation process comprises the following steps: oxidizing an SOI (Silicon On Insulator) silicon wafer, etching an induction cavity on a thin silicon layer, manufacturing a deep etching region and an electrode region, carrying out anodic bonding, carrying out deep silicon etching, preparing a packaging structure, arranging a blind hole at the bottom of a bonding structure, removing an oxide layer and packaging. The invention also provides a sensor with a silicon-glass structure, the sensor with the silicon-glass structure comprises an SOI silicon wafer, substrate glass and a packaging structure, the packaging structure comprises packaging glass which is arranged above the SOI silicon wafer and completely covers the capacitance cavity, and a baffle block which is arranged on the packaging glass and is positioned in the capacitance cavity; according to the preparation process and the sensor, the test capacitor cavity is separated from the test medium cavity, and mutual interference and influence are avoided in the test process.

Description

Technical Field

[0001] The present invention relates to the technical field of sensors, and in particular to a preparation process of a silicon-glass structure sensor. Background Art

[0002] Due to the good mechanical properties of silicon materials, with the maturity of semiconductor processes, there is a means of making sensors with silicon materials. First, the silicon piezoresistive pressure sensor was researched and made. The silicon piezoresistive pressure sensor has the characteristics of small size, simple structure and manufacturing process, and high sensing sensitivity. The disadvantage is that the anti-interference ability of the sensor is poor and the temperature influence is large. The capacitive pressure sensor made by bonding silicon and glass not only has the characteristics of small size, simple structure and manufacturing process, and high sensing sensitivity like the silicon piezoresistive pressure sensor, but also has good structural stability, high strength, strong anti-interference ability, good measurement stability, small temperature influence, ideal zero-pressure characteristics and overload protection.

[0003] There is a defect in the manufacture of existing silicon and glass bonded pressure sensors, that is, the test capacitance cavity is connected to the test medium cavity, resulting in the test capacitance value being related to the medium composition, so it is not applicable in some test occasions.

[0004] In view of this, the inventor of the present invention specifically designed a preparation process of a silicon-glass structure sensor, and this case was thus generated. Summary of the Invention

[0005] The present invention aims to solve at least one of the technical problems existing in the prior art. For this purpose, the present invention provides a preparation process of a silicon-glass structure sensor, which separates the test capacitance cavity (capacitance cavity) from the test medium cavity (induction cavity). During the test process, they do not interfere with each other, overcoming the defects brought by the current silicon and glass bonded pressure sensors.

[0006] The present invention also provides a silicon-glass structure sensor.

[0007] According to the preparation process of a silicon-glass structure sensor provided by the present invention, the following steps are included: Step 1, oxidation of the SOI silicon wafer: The SOI silicon wafer has a thick silicon layer, a silicon wafer oxide layer and a thin silicon layer from top to bottom. A first oxide layer is provided on the surface of the thick silicon layer, and a second oxide layer is provided on the surface of the thin silicon layer; Step 2, etching the induction cavity on the thin silicon layer: An induction cavity is etched on the surface of the thin silicon layer and on the side far from the silicon wafer oxide layer; Step 3, making a deep etching area and an electrode area: A deep etching cavity area and an electrode area are provided on the first oxide layer; Step 4, anodic bonding: In a ultra-clean environment, align the substrate glass with the induction cavity on the SOI wafer, and perform bonding using a bonding process with heating and applying electrostatic force to form a bonding structure; Step 5, fabricating the capacitance cavity and electrode positions: Perform deep etching on the SOI wafer within the deep etching region and the electrode region until reaching the silicon wafer oxide layer to form the capacitance cavity and electrode positions respectively; Step 6, preparing the encapsulation structure: Open holes on the encapsulation glass, and bond stoppers at the positions of the holes on the encapsulation glass; Step 7, setting blind holes at the bottom of the bonding structure: Drill holes on the surface of the bonding structure facing the induction cavity on the substrate glass to form blind holes. The blind holes connect the induction cavity with the outside of the sensor, which can be used to introduce air, and the number of blind holes is greater than or equal to 1; Step 8, removing the oxide layer: Use BOE solution to remove the remaining first oxide layer on the surface of the thick silicon layer and the silicon wafer oxide layer in the capacitance cavity; Step 9, encapsulation: Align the stopper with the capacitance cavity and place the stopper into the capacitance cavity. After the surface of the encapsulation structure is bonded to the surface of the thick silicon layer, the dimension between the bottom of the stopper and the bottom of the capacitance cavity is less than 10 μm after bonding.

[0008] The preparation process of the present invention separates the test capacitance cavity from the test dielectric cavity, and they do not interfere with each other during the test process.

[0009] In some embodiments of the present invention, the preparation process processes several sensors using a whole wafer. After preparation, cutting is performed in two steps. During the first cutting, it is not cut through completely, only part of the encapsulation glass needs to be cut to the electrode position. During the second cutting, it is cut through completely, and cutting is performed in two directions, horizontal and vertical. After cutting, several sensors are formed, and the encapsulation glass above the electrode position drops off.

[0010] In some embodiments of the present invention, it further includes Step 10 of respectively arranging the first electrode and the second electrode on the stopper and the thin silicon layer.

[0011] In some embodiments of the present invention, in Step 1, the SOI wafer is placed in an oxidation furnace at 1000 °C or higher than 1000 °C for oxidation, so that a first oxide layer is formed on the surface of the thick silicon layer and a second oxide layer is formed on the surface of the thin silicon layer. The thicknesses of the first oxide layer and the second oxide layer are 500 - 1000 nm; and cleaning is performed before oxidation. The cleaning includes the following steps: Put the SOI wafer into Solution No. 3, boil for 15 - 20 min, and then rinse with deionized water; Put the SOI wafer into Solution No. 1, boil for 15 min, and then rinse with deionized water; Put the SOI wafer into Solution No. 2, boil for 15 min, rinse with deionized water and then dry with nitrogen; Among them, the No. 3 liquid is a mixed solution of hydrogen peroxide and sulfuric acid, and the mixing ratio is: 1:3 or 1:4; the No. 2 liquid is a mixed solution of ammonia water, hydrogen peroxide, and deionized water, and the mixing ratio is: 1:1:5; the No. 1 liquid is a mixed solution of hydrochloric acid, hydrogen peroxide, and deionized water, and the mixing ratio is 1:1:5.

[0012] In some embodiments of the present invention, in step 2, the following steps are included: Step 21, after coating photoresist on the surface of the second oxide layer, spin-coat and pre-bake, then perform photolithography exposure and develop to form a shape with the size of the horizontal cross-section of the induction cavity, which is the induction cavity photolithography pattern. Coat photoresist on the surface of the first oxide layer, and finally post-bake; Step 22, use BOE solution to remove the second oxide layer within the induction cavity photolithography pattern; Step 23, remove the remaining photoresist on the surface of the second oxide layer and the photoresist on the surface of the first oxide layer; Step 24, etch an induction cavity on the thin silicon layer and within the induction cavity photolithography pattern.

[0013] In some embodiments of the present invention, in step 21, the photoresist is coated with a tackifier and 5214-E respectively. When spin-coating, first spin at a speed of 500 rpm for 3 - 5 seconds, then spin at a speed of 1500 - 3000 rpm for 60 - 90 s. The temperature of the hot plate for pre-baking is 85 - 96 °C, and bake for 4 - 5 min. Post-bake is carried out in an oven at 120 - 130 °C for 15 min.

[0014] In some embodiments of the present invention, in step 23, the following method is used to remove the remaining photoresist: Acetone ultrasonic treatment for 3 min; Alcohol ultrasonic treatment for 3 min; Put the SOI wafer into the No. 3 liquid, boil for 15 - 20 min, rinse with deionized water and then dry with nitrogen; In some embodiments of the present invention, in step 24, prepare a mixed solution of TMAH solution and ammonium persulfate, and heat the mixed solution to 60 °C; put the SOI wafer into the mixed solution for 20 - 30 min, and an induction cavity can be etched on the thin silicon layer; the ratio of the TMAH solution to ammonium persulfate is 100:2.5.

[0015] In some embodiments of the present invention, in step 3, the following steps are included: Step 31, after coating photoresist on the surface of the first oxide layer, spin-coat and pre-bake, then perform photolithography exposure and develop to form a deep etching cavity photolithography pattern and an electrode photolithography pattern, and finally post-bake; Step 32: Remove the first oxide layer within the deep etching cavity lithography pattern and the electrode lithography pattern, as well as the remaining second oxide layer on the surface of the thin silicon layer. Step 33: Remove the remaining photoresist on the surface of the first oxide layer.

[0016] In some embodiments of the present invention, in step 31, the photoresist is coated with a tackifier and 5214-E respectively. When spin-coating, first spin at a speed of 500 rpm for 3 - 5 seconds, then spin at a speed of 1500 - 3000 rpm for 60 - 90 seconds. The temperature of the hot plate for pre-baking is 85 - 96 °C, and bake for 4 - 5 minutes. Post-baking is carried out in an oven at 120 - 130 °C for 15 minutes.

[0017] In some embodiments of the present invention, in step 33, the photoresist is removed in the following manner: soak in acetone for 3 minutes, soak in alcohol for 3 minutes and then rinse with deionized water; put the bonding structure into solution No. 3, boil for 15 - 20 minutes, rinse with deionized water and then dry with nitrogen.

[0018] In some embodiments of the present invention, in step 4, in a super-clean environment, align the substrate glass with the induction cavity on the SOI wafer, and make the surface of the thin silicon layer contact the surface of the substrate glass. Then, perform bonding in an environment with a heating temperature of 350 °C to 600 °C and an applied static voltage of 600 - 1200 volts.

[0019] In some embodiments of the present invention, in step 5, prepare a mixed solution of TMAH solution and ammonium persulfate, and heat the mixed solution to 90 °C; put the sample after bonding in step 4 into the mixed solution for deep silicon etching, and deeply etch the thick silicon layer in the deep etching area and the electrode area to the surface of the silicon wafer oxide layer to form a capacitance cavity and an electrode position respectively; the ratio of the TMAH solution to ammonium persulfate is 100:2.5.

[0020] In some embodiments of the present invention, step 6 includes the following steps: Step 61: Punch holes in the encapsulation glass at preset positions by laser or ultrasonic means to form hole positions for subsequent leads. Step 62: Prepare a stopper. The stopper uses double-polished silicon oxide. First, remove the oxide layer on one side, then thin it by dry etching or wet etching. After thinning to adapt to the depth of the capacitance cavity, remove the other oxide layer and cut it to a certain length and width to ensure that the stopper can completely cover the hole positions. Step 63: Anodically bond the encapsulation glass to the polished surface on the back of the stopper, and the stopper needs to completely seal the hole positions on the encapsulation glass.

[0021] In some embodiments of the present invention, in step 7, the blind hole is located inside the sensing cavity and outside the capacitance cavity, the number of blind holes is greater than or equal to one, and the blind holes are formed by laser drilling.

[0022] In some embodiments of the present invention, in step 9, in a super-clean environment, the stopper is placed into the capacitance cavity, and the surface of the encapsulation structure is brought into contact with the surface of the thick silicon layer, and then bonding is performed in an environment with a heating temperature of 350°C to 600°C and an applied static voltage of 600 to 1200 volts.

[0023] A sensor with a silicon-glass structure provided by the present invention can be fabricated using a fabrication process. The sensor includes: An SOI silicon wafer, with a sensing cavity provided on the lower surface of the SOI silicon wafer and a capacitance cavity provided on the upper surface; A substrate glass, which is disposed below the SOI silicon wafer and completely covers the sensing cavity; An encapsulation structure, which is disposed above the SOI silicon wafer; The encapsulation structure includes an encapsulation glass disposed above the SOI silicon wafer and completely covering the capacitance cavity, a stopper disposed on the encapsulation glass and located inside the capacitance cavity, and the distance between the bottom surface of the stopper and the bottom of the capacitance cavity is less than 10 μm; Hole positions are formed on the encapsulation glass, and the stopper is disposed corresponding to the hole positions and completely covers the hole positions. Blind holes are formed on the substrate glass and penetrate through the sensing cavity and extend to the SOI silicon wafer. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The drawings described herein are used to provide a further understanding of the present invention, and constitute a part of the present invention. The schematic embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation to the present invention.

[0025] Among them: Figure 1 is a schematic structural diagram of the sensor of the present invention; Figure 2 is an exploded view of the sensor of the present invention Figure 1 ; Figure 3 is an exploded view of the sensor of the present invention Figure 2 ; Figure 4 is a cross-sectional view of the sensor of the present invention; Figure 5 is a flowchart of the fabrication process of the present invention; Figure 6 is a schematic diagram of cutting in the fabrication process of the present invention Figure 1 ; Figure 7 is a schematic diagram of cutting in the fabrication process of the present inventionFigure 2 。

[0026] Label description: 10. SOI wafer; 11. Thick silicon layer; 12. Silicon wafer oxide layer; 13. Thin silicon layer; 101. Induction cavity; 20. Substrate glass; 30. Encapsulation structure; 31. Encapsulation glass; 311. Hole position; 32. Stopper; 40. Blind hole. Specific implementation manners

[0027] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention clearer and more understandable, the present invention will be further described in detail below with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention. Embodiment 1

[0028] Please refer to Figures 1 to 7 , which is a preparation process of a silicon-glass structure sensor as Embodiment 1 of the present invention, and includes the following steps: Step 1, oxidation of the SOI wafer: Specifically, please refer to Figure 5 , the SOI wafer has a thick silicon layer, a silicon wafer oxide layer and a thin silicon layer from top to bottom, a first oxide layer is provided on the surface of the thick silicon layer, and a second oxide layer is provided on the surface of the thin silicon layer. For specific details, please refer to Figure 5 (a) therein; Step 2, etching an induction cavity on the thin silicon layer: An induction cavity is etched on the surface of the thin silicon layer and on the side far from the silicon wafer oxide layer; Step 3, fabricating a deep etching region and an electrode region: A deep etching cavity region and an electrode region are provided on the first oxide layer; Step 4, anodic bonding: In a super-clean environment, the substrate glass is aligned with the induction cavity on the SOI wafer, and a bonding process of heating and applying static electricity is used for bonding to form a bonding structure; Step 5, fabricating a capacitor cavity and electrode positions: Deep etching is performed on the SOI wafer within the deep etching region and the electrode region until reaching the silicon wafer oxide layer to form a capacitor cavity and electrode positions respectively; Step 6, preparing an encapsulation structure: A hole position is opened on the encapsulation glass, and a stopper is bonded at the hole position on the encapsulation glass; Step 7, setting a blind hole at the bottom of the bonding structure: A blind hole is drilled on the surface of the bonding structure facing the induction cavity on the substrate glass to communicate the induction cavity with the outside of the sensor, which can be used to introduce air. At the same time, two or more blind holes can be provided, and when there are debris inside, they can be blown out to improve the measurement accuracy of the sensor; Step 8, removing the oxide layer: The remaining first oxide layer on the surface of the thick silicon layer and the silicon wafer oxide layer in the capacitor cavity are removed by using BOE solution; Step 9, Encapsulation: The stopper corresponds to the capacitor cavity and is placed into the capacitor cavity. After the surface of the encapsulation structure is attached to the surface of the thick silicon layer, bonding is performed. Step 10, The first electrode and the second electrode are respectively disposed on the stopper and the thin silicon layer. The first electrode and the second electrode can be formed by metal sputtering process. Among them, the first electrode is disposed on the stopper and located within the hole position, and the second electrode is directly disposed on the thin silicon layer at the electrode position.

[0029] In the above preparation process, the test capacitor cavity (capacitor cavity) is separated from the test dielectric cavity (induction cavity). During the test process, they do not interfere with each other, overcoming the defects brought by the current silicon and glass bonded pressure sensors.

[0030] For details, please refer to Figure 5 、 6 、7. This preparation process processes several sensors on a whole wafer. After preparation, cutting is performed. The cutting is carried out in two times. During the first cutting, it cannot be completely cut off. Only part of the encapsulation glass needs to be cut off to the electrode position. For details, please refer to Figure 5 in (s) and Figure 6 , during the second cutting, it is completely cut off, and the cutting is carried out in two directions, namely horizontally and vertically. For details, please refer to Figure 7 , after cutting, several sensors are formed, and the encapsulation glass located above the electrode position drops off.

[0031] For details, please refer to Figure 5 in (a). In step 1, the SOI silicon wafer is placed in an oxidation furnace at 1000 °C or higher than 1000 °C for oxidation, so that a first oxide layer is formed on the surface of the thick silicon layer and a second oxide layer is formed on the surface of the thin silicon layer. The thickness of the first oxide layer and the second oxide layer is 500 - 1000 nm; and cleaning is performed before oxidation. The cleaning includes the following steps: The SOI silicon wafer is placed in the No. 3 liquid, boiled for 15 - 20 min, and then rinsed with deionized water; The SOI silicon wafer is placed in the No. 1 liquid, boiled for 15 min, and then rinsed with deionized water; The SOI silicon wafer is placed in the No. 2 liquid, boiled for 15 min, rinsed with deionized water and then dried with nitrogen; Among them, the No. 3 liquid is a mixed liquid of hydrogen peroxide and sulfuric acid, and the mixing ratio is: 1:3 or 1:4; the No. 2 liquid is a mixed liquid of ammonia water, hydrogen peroxide and deionized water, and the mixing ratio is: 1:1:5; the No. 1 liquid is a mixed liquid of hydrochloric acid, hydrogen peroxide and deionized water, and the mixing ratio is 1:1:5.

[0032] For details, please refer to Figure 5 , in step 2, it includes the following steps: Step 21: After coating photoresist on the surface of the second oxide layer, spin-coat the photoresist and perform pre-baking. For details, please refer to Figure 5 in (b). Then, perform photolithographic exposure and develop to form a shape with the horizontal cross-sectional size of the induction cavity. For details, please refer to Figure 5 in (c). This shape is the photolithographic pattern of the induction cavity (the photolithographic pattern of the induction cavity can be understood as an area for facilitating the subsequent formation of the induction cavity). Coat photoresist on the surface of the first oxide layer, and finally perform post-baking. For details, please refer to Figure 5 in (d). Specifically, in Step 21, the photoresist is coated with a tackifier and 5214-E respectively. When spin-coating, first spin at 500 rpm for 3 - 5 seconds, then spin at 1500 - 3000 rpm for 60 - 90 s. The temperature of the hot plate for pre-baking is 85 - 96 °C, and bake for 4 - 5 min. Post-baking is performed in an oven at 120 - 130 °C for 15 min; Step 22: Use BOE solution to remove the second oxide layer within the photolithographic pattern of the induction cavity. For details, please refer to Figure 5 in (e); Step 23: Remove the remaining photoresist on the surface of the second oxide layer and the photoresist on the surface of the first oxide layer. For details, please refer to Figure 5 in (f). The remaining photoresist is removed specifically in the following way: ultrasonic cleaning with acetone for 3 min; ultrasonic cleaning with alcohol for 3 min; put the SOI wafer into solution No. 3, boil for 15 - 20 min, rinse with deionized water and then dry with nitrogen; Step 24: Etch an induction cavity on the thin silicon layer within the photolithographic pattern of the induction cavity. For details, please refer to Figure 5 in (g). Specifically, prepare a mixed solution of TMAH solution and ammonium persulfate, and heat the mixed solution to 60 °C; put the SOI wafer into the mixed solution for 20 - 30 min, and an induction cavity can be etched on the thin silicon layer. The ratio of the TMAH solution to ammonium persulfate is 100:2.5.

[0033] For details, please refer to Figure 5 , in Step 3, it includes the following steps: Step 31: After coating photoresist on the surface of the first oxide layer, spin-coat the photoresist and perform pre-baking. For details, please refer to Figure 5 in (h). Then, perform photolithographic exposure and develop to form the photolithographic pattern of the deep etching cavity and the photolithographic pattern of the electrode, and finally perform post-baking. For details, please refer to Figure 5 in (i). Specifically, the photoresist is coated with a tackifier and 5214-E respectively. When spin-coating, first spin at 500 rpm for 3 - 5 seconds, then spin at 1500 - 3000 rpm for 60 - 90 s. The temperature of the hot plate for pre-baking is 85 - 96 °C, and bake for 4 - 5 min. Post-baking is performed in an oven at 120 - 130 °C for 15 min; Step 32, remove the first oxide layer within the deep etching cavity lithography pattern and the electrode lithography pattern, as well as the remaining second oxide layer on the surface of the thin silicon layer. For details, please refer to Figure 5 in (j); Step 33, remove the remaining photoresist on the surface of the first oxide layer. For details, please refer to Figure 5 in (k); Specifically, the following method is used to remove the photoresist: soak in acetone for 3 minutes, soak in alcohol for 3 minutes and then rinse with deionized water; place the bonding structure in Solution No. 3, boil for 15 - 20 minutes, rinse with deionized water and then dry with nitrogen.

[0034] For details, please refer to Figure 5 in (l). In step 4, align the substrate glass with the induction cavity on the SOI wafer in a super clean environment, and make the surface of the thin silicon layer contact the surface of the substrate glass. Then, perform bonding under the conditions of a heating temperature of 350°C to 600°C and an applied static voltage of 600 - 1200 volts.

[0035] In step 5, prepare a mixed solution of TMAH solution and ammonium persulfate, and heat the mixed solution to 90°C; place the sample bonded in step 4 into the mixed solution for deep silicon etching, and deeply etch the thick silicon layer in the deep etching area and the electrode area to the surface of the silicon wafer oxide layer to form a capacitance cavity and an electrode position respectively. For details, please refer to Figure 5 in (m); The ratio of the TMAH solution to ammonium persulfate is 100:2.5.

[0036] For details, please refer to Figure 5 , in step 6, it includes the following steps: Step 61, punch holes in the encapsulation glass at preset positions by laser or ultrasonic method to form hole positions for subsequent leads. For details, please refer to Figure 5 in (n); Step 62, prepare the stopper. The stopper uses double-polished silicon oxide. First, remove the oxide layer on one side, and then thin it by dry etching or wet etching. After thinning to adapt to the depth of the capacitance cavity, remove the other oxide layer and cut it to a certain length and width to ensure that the stopper can completely cover the hole position. For details, please refer to Figure 5 in (o); Step 63, perform anodic bonding on the polished surface of the back of the encapsulation glass and the stopper, and the stopper needs to completely seal the hole position on the encapsulation glass. For details, please refer to Figure 5 in (p).

[0037] For details, please refer to Figure 5 in (q). In step 7, the blind holes are located inside the induction cavity and outside the capacitance cavity. The number of blind holes is greater than or equal to one, and the blind holes are punched by laser.

[0038] For details, please refer toFigure 5 In (q), in step 9, in a super clean environment, the stopper is placed in the capacitor cavity, and the surface of the encapsulation structure is in contact with the surface of the thick silicon layer, and then bonding is performed in an environment with a heating temperature of 350°C to 600°C and an applied electrostatic voltage of 600 to 1200 volts. Embodiment 2

[0039] Specifically, refer to Figures 1 to 4 , a sensor with a silicon-glass structure, which can be fabricated using the fabrication process in Embodiment 1. The sensor includes an SOI silicon wafer 10, a substrate glass 20, and an encapsulation structure 30. An induction cavity 101 is provided on the lower surface of the SOI silicon wafer 10, and a capacitor cavity is provided on the upper surface; the substrate glass 20 is disposed below the SOI silicon wafer 10 and completely covers the induction cavity 101; the encapsulation structure 30 is disposed above the SOI silicon wafer 10; the encapsulation structure 30 includes an encapsulation glass 31 disposed above the SOI silicon wafer 10 and completely covering the capacitor cavity, a stopper 32 disposed on the encapsulation glass 31 and located within the capacitor cavity, and the distance between the bottom surface of the stopper 32 and the bottom of the capacitor cavity is less than 10 μm; a hole position 311 is provided on the encapsulation glass 31, and the stopper 32 corresponds to the hole position 311 and completely covers the hole position 311. A blind hole 40 is provided on the substrate glass 20 and penetrates through the induction cavity and extends to the SOI silicon wafer 10.

[0040] In summary, the fabrication process and the sensor of the present invention separate the test capacitor cavity from the test medium cavity, and during the test, they do not interfere with each other.

[0041] The present invention has been described exemplarily above in conjunction with the accompanying drawings. Obviously, the specific implementation of the present invention is not limited by the above methods. As long as various non-substantial improvements are made using the method concept and technical solution of the present invention, or the concept and technical solution of the present invention are directly applied to other occasions without improvement, they are all within the protection scope of the present invention.

Claims

1. A process for preparing a silicon-glass structure sensor, characterized in that: The following steps are involved: Step 1, SOI silicon wafer oxidation: The SOI silicon wafer has a thick silicon layer, a silicon wafer oxide layer and a thin silicon layer from top to bottom, a first oxide layer is arranged on the surface of the thick silicon layer, and a second oxide layer is arranged on the surface of the thin silicon layer; Step 2, etching a sensing cavity on the thin silicon layer: etching a sensing cavity on the surface of the thin silicon layer and away from the side of the silicon wafer oxide layer; Step 3, making a deep etching region and an electrode region: setting a deep etching cavity region and an electrode region on the first oxide layer; Step 4, anodic bonding: In an ultra-quiet environment, align the substrate glass with the induction cavity on the SOI silicon wafer, and use a heating and static bonding process to bond to form a bonding structure; Step 5, making a capacitor cavity and an electrode site: performing deep etching on the silicon wafer oxide layer in the deep etching area and the electrode area on the SOI silicon wafer to form a capacitor cavity and an electrode site respectively; Step 6, preparing a packaging structure: opening a hole on the packaging glass, and bonding a stopper on the packaging glass and at the hole; Step 7, setting a blind hole at the bottom of the bonding structure: drilling a hole on the surface of the bonding structure located on the substrate glass toward the sensing cavity to form a blind hole, wherein the blind hole connects the sensing cavity with the outside of the sensor; Step 8, removing the oxide layer: using BOE solution to remove the remaining first oxide layer on the surface of the thick silicon layer and the oxide layer of the silicon wafer in the capacitor cavity; Step 9, packaging: the stopper corresponds to the capacitor cavity and is placed in the capacitor cavity, and the surface of the packaging structure is bonded to the surface of the thick silicon layer after being adhered.

2. The process for preparing a sensor with a silicon-glass structure according to claim 1, characterized in that: The preparation process uses a whole wafer to process several sensors. After the preparation is completed, the wafer is cut in two steps. During the first cutting, the wafer cannot be cut off, and only part of the packaging glass needs to be cut off to the electrode position. During the second cutting, all the sensors are cut off from both the horizontal and vertical directions. After cutting, several sensors are formed, and the packaging glass above the electrode position falls off.

3. The process for preparing a silicon-glass structure sensor according to claim 1, characterized in that: In step 1, the SOI silicon wafer is placed in an oxidation furnace at 1000° C. or above for oxidation, so that a first oxide layer is formed on the surface of the thick silicon layer and a second oxide layer is formed on the surface of the thin silicon layer, wherein the thickness of the first oxide layer and the second oxide layer is 500-1000 nm.

4. The process for preparing a sensor with a silicon-glass structure according to claim 1, characterized in that: The step 2 includes the following steps: Step 21, after coating the surface of the second oxide layer with photoresist, performing coating and pre-baking, and then performing photolithography exposure and developing to obtain a shape of the horizontal cross-section size of the sensing cavity, which is the photolithography pattern of the sensing cavity, coating the surface of the first oxide layer with photoresist, and finally performing post-baking; Step 22, using a BOE solution to remove the second oxide layer in the photolithographic pattern of the sensing cavity; Step 23, removing the remaining photoresist on the surface of the second oxide layer and the photoresist on the surface of the first oxide layer; Step 24, etching a sensing cavity on the thin silicon layer and within the sensing cavity photolithography pattern.

5. The process for preparing a sensor with a silicon-glass structure according to claim 1, characterized in that: The step 3 includes the following steps: Step 31, after coating the surface of the first oxide layer with photoresist, performing coating and pre-baking, then performing photolithography exposure, developing a deep etch cavity photolithography pattern and an electrode photolithography pattern, and finally performing post-baking; Step 32, removing the first oxide layer in the deep etch cavity photolithography pattern, the electrode photolithography pattern, and the second oxide layer remaining on the surface of the thin silicon layer; Step 33, removing the remaining photoresist on the surface of the first oxide layer.

6. The process for preparing a sensor with a silicon-glass structure according to claim 1, characterized in that: In step 4, the substrate glass is aligned with the induction cavity on the SOI silicon wafer in an ultra-quiet environment, and the surface of the thin silicon layer is brought into contact with the surface of the substrate glass, and then bonding is performed under a heating temperature of 350° C. to 600° C. and an electrostatic voltage of 600 to 1200 volts.

7. The process for preparing a silicon-glass structure sensor according to claim 1, characterized in that: In the step 5, a mixture of TMAH solution and ammonium persulfate is prepared, and the mixture is heated to 90° C. The sample bonded in step 4 is placed in the mixture for deep silicon etching, and the thick silicon layer in the deep etching area and the electrode area is deeply etched to the surface of the silicon wafer oxide layer to form a capacitor cavity and an electrode site respectively; The ratio of the TMAH solution to ammonium persulfate is 100:2.

5.

8. The process for preparing a sensor with a silicon-glass structure according to claim 1, characterized in that: The step 6 includes the following steps: Step 61, using laser or ultrasonic method to punch holes in the packaging glass at preset positions to form holes in preparation for subsequent lead wires; Step 62, block preparation, the block is made of double-polished silicon oxide, first remove the oxide layer on one side, then use dry etching or wet etching to thin it, after thinning to a depth suitable for the capacitor cavity, remove the other oxide layer and cut it to a certain length and width to ensure that the block can completely cover the hole; Step 63, anodically bonding the packaging glass to the polished surface on the back of the stopper, and the stopper needs to completely seal the hole on the packaging glass.

9. The process for preparing a sensor with a silicon-glass structure according to claim 1, characterized in that: In step 7, the blind holes are located inside the sensing cavity and outside the capacitor cavity, the number of the blind holes is greater than or equal to one, and the blind holes are punched by laser; In step 9, in an ultra-quiet environment, the block is placed in the capacitor cavity, and the surface of the packaging structure is in contact with the surface of the thick silicon layer, and then bonding is performed under a heating temperature of 350°C to 600°C and an electrostatic voltage of 600 to 1200 volts.

10. A sensor of silicon-glass structure, characterized in that: include: An SOI silicon wafer, wherein a sensing cavity is arranged on the lower surface of the SOI silicon wafer, and a capacitor cavity is arranged on the upper surface; Substrate glass, the substrate glass is arranged below the SOI silicon wafer and completely covers the sensing cavity; A packaging structure, wherein the packaging structure is arranged above the SOI silicon wafer; The packaging structure includes a packaging glass disposed above the SOI silicon wafer and completely covering the capacitor cavity, and a stopper disposed on the packaging glass and located in the capacitor cavity, wherein the distance between the bottom surface of the stopper and the bottom of the capacitor cavity is less than 10 μm; A hole is formed on the packaging glass, and the stopper is arranged corresponding to the hole and completely covers the hole. A blind hole is formed on the substrate glass and passes through the sensing cavity and extends to the SOI silicon wafer.

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