Double-line compatible multi-key detection and single-bus storage medium detection device and detection method

Abstract

The invention relates to a double-wire compatible multi-key detection and single-bus storage medium detection device and method, and the device comprises a main control MCU and a key detection and storage medium circuit U2, the key detection and storage medium circuit U2 is installed in equipment or consumables, the main control MCU controls a single bus to communicate with a 1-wire storage medium through a second pin GPIO2, and the single bus is connected with the 1-wire storage medium through a second pin GPIO2. Whether the equipment consumables are inserted or not can be identified through the response of the reset signal, and the type of the equipment consumables is distinguished by reading and writing data information in the storage medium. According to the invention, multi-key single-key and multi-key combined pressing state detection is realized by using a small amount of MCU resources. In addition, a storage medium can be edited while key detection is realized, and the method can be applied to plugging and type information identification of external equipment and consumables.

Description

Technical Field

[0001] The present invention relates to the field of detection of devices / consumables; in particular, it relates to a dual-line compatible multi-button detection and single-bus storage medium editable detection device and detection method. Background Art

[0002] Currently, the main methods for realizing multi-button detection are as follows:

[0003] 1. Independent button detection

[0004] Principle: The detection of each button occupies one GPIO pin of the single-chip microcomputer. When the button is not pressed, the pin level is pulled to a high level through a pull-up resistor; when the button is pressed, the pin level is pulled to a low level, thereby determining whether the button is pressed. The operation of each button does not affect the state of other I / Os. The disadvantage of independent button detection is that when the number of buttons is large, a large amount of MCU pin resources will be wasted.

[0005] 2. Matrix button detection (matrix keyboard)

[0006] Principle: The buttons are arranged in rows and columns. Each row shares one row line, and each column shares one column line. By scanning the level states of the rows and columns, it is determined which button is pressed. When the MCU pins are limited, the utilization rate of I / O ports can be greatly improved, saving resources. For example, 16 buttons only need 8 IO ports for detection. The disadvantages of matrix button detection are as follows: Compared with independent buttons, the programming complexity is slightly higher, and the IO resources are also relatively more. Existing technologies for multi-buttons require a lot of IO resources and are not compatible with storage media. Adding a storage medium requires adding communication lines.

[0007] 3. External interrupt detection method

[0008] Connect the button to the external interrupt pin of the single-chip microcomputer, and use the edge signal generated by the button press to trigger the interrupt, so as to detect the button action in the interrupt service program. This method has high efficiency and does not require continuous detection of whether the button is pressed in the main loop. However, this method requires the single-chip microcomputer to have enough external interrupt interfaces for use, and the interrupt service program needs to be simple and clear to avoid occupying too much time resources.

[0009] 4. ADC voltage division detection method

[0010] Using the principle of series resistance voltage division, multiple keys are respectively connected to the ADC pins of the single-chip microcomputer. When different keys are pressed, the voltage at the point connected to the ADC pin will change with the change of the resistance participating in the voltage division. By detecting the voltage value of the ADC pin, it can be determined which key is pressed. This method only requires one ADC interface of the single-chip microcomputer to identify multiple keys, greatly saving GPIO resources. However, this method needs to consider the influence of factors such as the accuracy of the ADC, the error of the resistance, and the temperature drift on the key detection. Moreover, if there is poor internal contact in the key, the key positions may be misaligned. In addition, the jitter generated by the key may also cause certain recognition errors.

[0011] CN 10446103A discloses an MCU keyboard circuit capable of processing multiple keys pressed simultaneously and its implementation method. It converts the different voltages at point A after the keys are pressed into different frequencies, and the MCU calculates the voltage frequency through pulse counting to determine which key or keys are pressed. It has high requirements for the accuracy of the V / F converter and the calculation accuracy of the MCU, and is basically evolved from the above methods 3 and 4. Summary of the Invention

[0012] The object of the present invention is to provide a two-wire compatible multi-key detection and single-bus storage medium detection device and detection method. After being built into an external device / consumable, it can detect the single-key and combined-key pressing conditions of multiple keys (cooperating with the structural design of the keys to meet the multi-functional / status detection requirements of the consumable), identify the access status of the device / consumable, and realize the type identification of the device / consumable by reading and writing the storage medium.

[0013] The present invention is realized through the following technical solutions: A two-wire compatible multi-key detection and single-bus storage medium detection device, characterized in that: it includes a main control MCU and a key detection and storage medium circuit U2;

[0014] At least three GPIO pins are included on the main control MCU, namely the first pin GPIO1, the third pin GPIO3, and the second pin GPIO2 with ADC function on the main control MCU. Among them, a 1k resistor R7 is also provided between the first pin GPIO1 and the second pin GPIO2;

[0015] The storage medium circuit U2 includes a MOS transistor, a 1-wire bus, a diode D5, a diode D6, a diode D7, a diode D8, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R6, a key K1, a key K2, a key K3, and a key K4;

[0016] The second pin GPIO2 is connected to the 1-wire bus through the first line, the third pin GPIO3 is connected to the 1-wire bus through the second line, and a MOS tube is provided on the second line, wherein the source of the MOS tube is connected to the third pin GPIO3, the drain of the MOS tube is connected to the 1-wire bus, the gate of the MOS tube is connected to the resistor R6 through the fifth branch line, and the other end of the resistor R6 is connected to the first line;

[0017] Four branch lines are also provided between the first line and the second line. The first branch line is provided with a diode D5, a resistor R11, and a button K1 in sequence from the first line to the second line; the second branch line is provided with a diode D6, a resistor R8, and a button K2 in sequence from the first line to the second line; the third branch line is provided with a diode D7, a resistor R9, and a button K3 in sequence from the first line to the second line; the fourth branch line is provided with a diode D8, a resistor R10, and a button K4 in sequence from the first line to the second line; wherein the cathode of the diode D5 is connected to the resistor R11, the cathode of the diode D6 is connected to the resistor R8, the anode of the diode D7 is connected to the resistor R9, and the anode of the diode D8 is connected to the resistor R10; a sixth branch line is provided on the first pin GPIO1 and connected to the second pin GPIO2, and the resistor R7 is provided on the sixth branch line.

[0018] A detection method for a dual-line compatible multi-key detection and single-bus storage medium detection device comprises the following steps:

[0019] S1: First ensure that the storage medium circuit U2 is correctly connected to the main control MCU, and then initialize and power on the main control MCU;

[0020] S2: The first pin GPIO1 outputs a high level to enable the pull-up resistor R7; the third pin GPIO3 outputs a low level to serve as a ground; the second pin GPIO2 outputs a high level to power the 1-wire memory chip; and the memory chip detection timing is performed;

[0021] S3: according to the communication protocol timing of the 1-wire bus, a reset signal is sent through the second pin GPIO2;

[0022] S4: If the reset signal is responded, the confirmation result shows that there is a 1-wire storage chip, that is, the device consumables are connected, the main control MCU executes the device consumables connection event processing, and then proceeds to S5; if the reset signal is not responded, that is, there is no 1-wire chip, if the current record status is that there is a 1-wire chip, then the device consumables are unplugged at this time, the main control MCU executes the device consumables unplugging event processing, and then enters S6;

[0023] S5: Read and write storage medium data information, the main control MCU executes the device consumption, and then enters S6;

[0024] S6: Configure the second pin GPIO2 as an ADC function and enter the key detection timing sequence;

[0025] S7: Output a high level on the first pin GPIO1 and a low level on the third pin GPIO3 to detect the states of keys K1 and K2. When no key is pressed, read the ADC value 4095. When key K1 is pressed, resistors R7 and R11 are in series for voltage division, and the read ADC value is ADC_K1. When key K2 is pressed, resistors R7 and R8 are in series for voltage division, and the read ADC value is ADC_K2. When both key K1 and key K2 are pressed, resistor R7 is in series with the parallel combination of resistors R8 and R11 for voltage division, and the read ADC value is ADC_KEY12;

[0026] S8: Output a low level on the first pin GPIO1 and a high level on the third pin GPIO3 to detect the states of keys K3 and K4. When no key is pressed, read the ADC value 0. When key K3 is pressed, resistors R7 and R9 are in series for voltage division, and the read ADC value is ADC_K3. When key K4 is pressed, resistors R7 and R10 are in series for voltage division, and the read ADC value is ADC_K4. When both key K3 and key K4 are pressed, resistor R7 is in series with the parallel combination of resistors R9 and R10 for voltage division, and the read ADC value is ADC_KEY34;

[0027] S9: Repeat S2 - S8 in a loop to perform storage chip and key detection, and the main control MCU processes logical events according to the detection results.

[0028] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0029] 1. Utilize a small amount of MCU resources to achieve the detection of single - key and multi - key combination pressing states of multiple keys.

[0030] 2. While implementing key detection, it is possible to edit the storage medium, and it can be applied to the plug - in and type information recognition of external devices and consumables. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 It is a circuit design diagram of a dual - line compatible multi - key detection and single - bus storage medium detection device;

[0032] Figure 2 It is Figure 1 The working flow chart of the said detection device; DETAILED DESCRIPTION OF THE EMBODIMENTS

[0033] The following makes a detailed description of the present invention in conjunction with the drawings:

[0034] As Figure 1Shown: A dual-line compatible multi-button detection and single-bus storage medium detection device, characterized in that it includes a main control MCU and a button detection and storage medium circuit U2;

[0035] The main control MCU has at least 3 GPIO pins, namely the first pin GPIO1, the third pin GPIO3, and the second pin GPIO2 with ADC function on the main control MCU. Among them, there is also a 1k resistor R7 between the first pin GPIO1 and the second pin GPIO2;

[0036] The storage medium circuit U2 includes a MOS tube, a 1-wire bus, diodes D5, D6, D7, D8, resistors R8, R9, R10, R11, R6, buttons K1, K2, K3, and K4;

[0037] The second pin GPIO2 is connected to the 1-wire bus through the first line, and the third pin GPIO3 is connected to the 1-wire bus through the second line, and a MOS tube is provided on the second line. Among them, the source of the MOS tube is connected to the third pin GPIO3, the drain of the MOS tube is connected to the 1-wire bus, and the gate of the MOS tube is connected to the resistor R6 through the fifth branch line, and the other end of the resistor R6 is connected to the first line;

[0038] There are also four branch lines between the first line and the second line. On the first branch line, in the direction from the first line to the second line, there are sequentially a diode D5, a resistor R11, and a button K1; on the second branch line, in the direction from the first line to the second line, there are sequentially a diode D6, a resistor R8, and a button K2; on the third branch line, in the direction from the first line to the second line, there are sequentially a diode D7, a resistor R9, and a button K3; on the fourth branch line, in the direction from the first line to the second line, there are sequentially a diode D8, a resistor R10, and a button K4; among them, the negative pole of the diode D5 is connected to the resistor R11, the negative pole of the diode D6 is connected to the resistor R8, the positive pole of the diode D7 is connected to the resistor R9, and the positive pole of the diode D8 is connected to the resistor R10; there is a sixth branch line on the first pin GPIO1 connected to the second pin GPIO2, and the resistor R7 is arranged on the sixth branch line.

[0039] The present invention includes a main control MCU and a button detection and storage medium circuit U2. The button detection and storage medium circuit U2 is installed in the device or consumable. The main control MCU controls the single bus to communicate with the 1-wire storage medium through the second pin GPIO2. By the response of the reset signal, it can be identified whether the device consumable is inserted, and the type of the device consumable is distinguished by reading and writing the data information in the storage medium.

[0040] When GPIO2 is configured in ADC mode, the main control MCU sends a test pulse through GPIO3 and reads the ADC value to determine the key press status of KEY1~KEY4.

[0041] Specifically, in the present invention, the diodes connected to key K1 and key K2 have the same direction, and the series resistors R11 and R8 have different resistances; the diodes connected to key K3 and key K4 have the same direction, and the series resistors R9 and R10 have different resistances; the resistances of resistor R11 and resistor R9 are the same, the resistances of resistor R8 and resistor R10 are the same, and the resistances of resistor R6, resistor R8, and resistor R9 are all different.

[0042] In addition, the directions of diode D5 and diode D6 are different from those of diode D7 and diode D8.

[0043] In the current actual products, R7, R11, and R9 all use resistors with a resistance value of 1K; R8 and R10 use resistors with a resistance value of 1.5K, and R6 uses a resistor with a resistance value of 100R.

[0044] Such as Figure 2 shown: A detection method for a dual-line compatible multi-button detection and single-bus storage medium detection device includes the following steps:

[0045] S1: First, ensure that the storage medium circuit U2 is correctly connected to the main control MCU (that is, the storage medium circuit U2 can be installed in the device or consumable according to the actual application requirements), and then initialize and power on the main control MCU;

[0046] The storage medium circuit U2 is made into an independent component, which can be installed in any device consumable matching external structure according to needs, or can be used without installation. As long as the overall connection between U2 and the MCU is made, it can be that the MCU and U2 are directly PCB board-mounted on a main board, or the MCU is arranged on the main board and connected to U2 using an external wire harness.

[0047] S2: The first pin GPIO1 outputs a high level to enable the pull-up resistor R7; the third pin GPIO3 outputs a low level to ground; the second pin GPIO2 outputs a high level to supply power to the 1-wire storage chip; perform the storage chip detection timing;

[0048] S3: According to the communication protocol timing of the 1-wire bus, send a reset signal through the second pin GPIO2;

[0049] S4: The reset signal has an acknowledgement, confirming that there is a 1-wire memory chip, i.e., the identification device consumable is connected. The main control MCU executes the event processing for the connection of the device consumable and proceeds to S5; if the reset signal has no acknowledgement, i.e., there is no 1-wire chip, and if the current recorded state is that there is a 1-wire chip, then at this time the identification device consumable is pulled out, and the main control MCU executes the event processing for the removal of the device consumable, and then enters S6;

[0050] S5: Read and write the data information of the storage medium. The main control MCU executes the device consumption, and then enters S6;

[0051] S6: Configure the second pin GPIO2 as the ADC function and enter the key detection timing;

[0052] S7: The first pin GPIO1 outputs a high level, and the third pin GPIO3 outputs a low level to detect the states of keys K1 and K2; when no key is pressed, read the ADC value of 4095; when key K1 is pressed, resistors R7 and R11 are in series for voltage division, and the read ADC value is ADC_K1; when key K2 is pressed, resistors R7 and R8 are in series for voltage division, and the read ADC value is ADC_K2; when keys K1 and K2 are pressed simultaneously, resistor R7 is in series with the parallel combination of resistors R8 and R11 for voltage division, and the read ADC value is ADC_KEY12;

[0053] S8: The first pin GPIO1 outputs a low level, and the third pin GPIO3 outputs a high level to detect the states of keys K3 and K4: when no key is pressed, read the ADC value of 0; when key K3 is pressed, resistors R7 and R9 are in series for voltage division, and the read ADC value is ADC_K3; when key K4 is pressed, resistors R7 and R10 are in series for voltage division, and the read ADC value is ADC_K4; when keys K3 and K4 are pressed simultaneously, resistor R7 is in series with the parallel combination of R9 and R10 for voltage division, and the read ADC value is ADC_KEY34;

[0054] S9: Repeat the loop of S2 to S8 to detect the storage chip and keys. The main control MCU performs logical event processing based on the detection results.

[0055] Compared with CN 10446103A, the key detection part of the present invention is an evolution based on ADC voltage division. The ADC cooperates with a diode. Utilizing the conductivity of the diode in different directions, the keys are connected bidirectionally, which can increase the voltage value (i.e., reduce the accuracy requirement of the ADC), and can be compatible with the application of the storage medium without adding lines on the basis of keyboard detection.

[0056] The applications here can be designed according to requirements, including but not limited to performing key detections at different gears in ultrasonic scalpel consumables or used for detecting the closed state of the jaw.

[0057] Finally, it should be noted that the above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A dual-line compatible multi-key detection and single-bus storage medium detection device, characterized in that: Including main control MCU and key detection and storage medium circuit U2; The main control MCU includes at least three GPIO pins, which are respectively set as the first pin GPIO1, the third pin GPIO3 and the second pin GPIO2 with ADC function on the main control MCU, wherein a 1k resistor R7 is further provided between the first pin GPIO1 and the second pin GPIO2; The storage medium circuit U2 includes a MOS tube, a storage medium chip supporting 1-wire communication, a diode D5, a diode D6, a diode D7, a diode D8, a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R6, a button K1, a button K2, a button K3 and a button K4; The second pin GPIO2 is connected to the 1-wire bus through the first line, the third pin GPIO3 is connected to the 1-wire bus through the second line, and a MOS tube is provided on the second line, wherein the source of the MOS tube is connected to the third pin GPIO3, the drain of the MOS tube is connected to the 1-wire bus, the gate of the MOS tube is connected to the resistor R6 through the fifth branch line, and the other end of the resistor R6 is connected to the first line; Four branch lines are also provided between the first line and the second line. The first branch line is provided with a diode D5, a resistor R11, and a button K1 in sequence from the first line to the second line; the second branch line is provided with a diode D6, a resistor R8, and a button K2 in sequence from the first line to the second line; the third branch line is provided with a diode D7, a resistor R9, and a button K3 in sequence from the first line to the second line; the fourth branch line is provided with a diode D8, a resistor R10, and a button K4 in sequence from the first line to the second line; wherein the cathode of the diode D5 is connected to the resistor R11, the cathode of the diode D6 is connected to the resistor R8, the anode of the diode D7 is connected to the resistor R9, and the anode of the diode D8 is connected to the resistor R10; a sixth branch line is provided on the first pin GPIO1 and connected to the second pin GPIO2, and the resistor R7 is provided on the sixth branch line.

2. The dual-line compatible multi-key detection and single-bus storage medium detection device according to claim 1, characterized in that: The diodes connected to buttons K1 and K2 are in the same direction, and the resistance values ​​of the series resistors R11 and R8 are different; the diodes connected to buttons K3 and K4 are in the same direction, and the resistance values ​​of the series resistors R9 and R10 are different; the resistance values ​​of the resistors R11 and R9 are the same, the resistance values ​​of the resistors R8 and R10 are the same, and the resistance values ​​of the resistors R6, R8, and R9 are all different.

3. The dual-line compatible multi-key detection and single-bus storage medium detection device according to claim 1, characterized in that: The directions of the diodes D5 and D6 are different from the directions of the diodes D7 and D8.

4. A detection method for a dual-line compatible multi-key detection and single-bus storage medium detection device according to any one of claims 1 to 3, characterized in that: The steps include: S1: First, ensure that the storage medium circuit U2 is correctly connected to the main control MCU, and then initialize and power on the main control MCU; S2: The first pin GPIO1 outputs a high level to enable the pull-up resistor R7; the third pin GPIO3 outputs a low level to serve as a ground; the second pin GPIO2 outputs a high level to power the 1-wire memory chip; and the memory chip detection timing is performed; S3: according to the communication protocol timing of the 1-wire bus, a reset signal is sent through the second pin GPIO2; S4: If the reset signal is responded, the confirmation result shows that there is a 1-wire storage chip, that is, the device consumables are connected, the main control MCU executes the device consumables connection event processing, and then proceeds to S5; if the reset signal is not responded, that is, there is no 1-wire chip, if the current record status is that there is a 1-wire chip, then the device consumables are unplugged at this time, the main control MCU executes the device consumables unplugging event processing, and then enters S6; S5: Read and write storage medium data information, the main control MCU executes the device consumption, and then enters S6; S6: The second pin GPIO2 is configured as ADC function and enters the key detection sequence; S7: The first pin GPIO1 outputs a high level, and the third pin GPIO3 outputs a low level to detect the status of buttons K1 and K2; when no button is pressed, the ADC value 4095 is read; when button K1 is pressed, resistors R7 and R11 are connected in series to divide the voltage, and the ADC value is ADC_K1; when button K2 is pressed, resistors R7 and R8 are connected in series to divide the voltage, and the ADC value is ADC_K2; when buttons K1 and K2 are pressed at the same time, resistor R7 is connected in parallel with resistors R8 and R11 to divide the voltage, and the ADC value is ADC_KEY12; S8: The first pin GPIO1 outputs a low level, and the third pin GPIO3 outputs a high level, and the status of buttons K3 and K4 are detected: when no button is pressed, the ADC value is read as 0; when button K3 is pressed, resistors R7 and R9 are connected in series to divide the voltage, and the ADC value is read as ADC_K3; when button K4 is pressed, resistors R7 and R10 are connected in series to divide the voltage, and the ADC value is read as ADC_K4; when buttons K3 and K4 are pressed at the same time, resistors R7, R9 and R10 are connected in parallel to divide the voltage, and the ADC value is read as ADC_KEY34; S9: Repeat S2~S8 to perform storage chip and button detection, and the main control MCU performs logic event processing according to the detection results.

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