Gain simulation method and gain simulation device of bipolar transistor

Abstract

The invention provides a gain simulation method and a gain simulation device for a bipolar transistor, and belongs to the field of electrical property simulation of semiconductor devices. The method comprises the following steps: calling a simulation command in a simulation tool, and applying voltage to a base electrode of the bipolar transistor, so that an emitter junction of the bipolar transistor is positively biased; setting a scanning mode as a quasi-quiescent current scanning mode, and applying current which is gradually increased and flows from a collector electrode and a base electrode of the bipolar transistor to an emitter electrode of the bipolar transistor to the emitter electrode of the bipolar transistor; performing current scanning in a quasi-quiescent current scanning mode to obtain a base current and a collector current of the bipolar transistor; and according to the base current and the collector current of the bipolar transistor, a curve that the gain of the bipolar transistor changes along with the base voltage is obtained. A current scanning mode of emitter sink current is adopted in the simulation tool, gain simulation of the bipolar transistor is achieved, the simulation efficiency is high, and the simulation result is more accurate.

Description

Technical Field

[0001] The present invention relates to the field of electrical characteristic simulation of semiconductor devices, and more particularly to a method and apparatus for simulating the gain of a bipolar transistor. Background Art

[0002] The gain value of a bipolar transistor (i.e., a triode) is an important indicator for measuring the current amplification ability of the bipolar transistor. The gain of a bipolar transistor is the ratio of the current in the collector to the current in the base. In the simulation test stage, the existing method for obtaining the gain of a bipolar transistor is to use the sweep voltage method in a simulation tool to obtain the collector current and the base current. For example, for an NPN bipolar transistor, a sweep voltage of 1.5V is applied to the collector, and then, in the sweep voltage mode, the base is swept from 0V to 1.5V, so as to obtain the collector current Ic and the base current Ib. Finally, by calculation, a curve of the gain β of the bipolar transistor changing with the base voltage is obtained, from which the maximum gain and the corresponding base voltage value can be extracted.

[0003] The existing method has the following disadvantages:

[0004] (1) Ignoring the current control characteristic. A bipolar transistor is essentially a current-controlled device. Although the sweep voltage method can obtain some output characteristics, it focuses more on the influence of voltage on current and ignores the current control relationship between currents. The gain of a bipolar transistor is the ratio of the current in the collector to the current in the base. The sweep voltage method masks this current control relationship to a certain extent.

[0005] (2) It may produce the Early effect. The Early effect, also known as the base-width modulation effect, refers to the phenomenon that when the collector-emitter voltage of a bipolar transistor changes, the base-collector depletion width (the size of the depletion region) also changes accordingly. Due to the influence of high voltage, when the collector voltage is relatively high, the Early effect will occur, resulting in a decrease in the gain value. In the sweep voltage method, the collector voltage is fixed. If the voltage is relatively high, the gain value in the low-current region may be overestimated. The Early effect will affect the output characteristics of the bipolar transistor, thereby affecting the accuracy of the gain value.

[0006] (3) It cannot directly reflect the dynamic characteristics. The sweep voltage method mainly obtains the static output characteristics of the bipolar transistor and cannot directly reflect the dynamic characteristics of the bipolar transistor, such as frequency response, noise, etc. The sweep voltage method cannot meet the application scenarios that require studying the performance of the bipolar transistor in a dynamic circuit.

[0007] In summary, the existing method of obtaining the gain of a bipolar transistor using the scanning voltage method ignores the current control characteristics, cannot directly reflect the dynamic characteristics, and may also produce the Early effect, affecting the accuracy of the gain value. Summary of the Invention

[0008] To solve the above technical deficiencies, the present invention provides a gain simulation method and a gain simulation device for a bipolar transistor. The method uses the sink current method for simulation testing. By controlling the emitter current, the base current and the collector current are obtained, and a more accurate gain value of the bipolar transistor is obtained, which can better reflect the current amplification ability of the bipolar transistor and can avoid the influence of the Early effect.

[0009] The gain simulation method for a bipolar transistor provided by the present invention includes:

[0010] Call the solve simulation command in the Sdevice simulation tool, apply a voltage to the base of the bipolar transistor to forward bias the emitter junction of the bipolar transistor;

[0011] Set the scanning mode to the quasi-static current scanning mode, and apply a gradually increasing current flowing from the collector and base of the bipolar transistor to the emitter to the emitter of the bipolar transistor;

[0012] Perform current scanning in the quasi-static current scanning mode to obtain the base current and the collector current of the bipolar transistor; wherein, the base current increases with the increase of the emitter current, and the base voltage increases with the increase of the base current;

[0013] According to the base current and the collector current of the bipolar transistor, obtain the curve of the gain of the bipolar transistor changing with the base voltage.

[0014] In the embodiment of the present invention, the bipolar transistor is an NPN bipolar transistor.

[0015] In the embodiment of the present invention, the method further includes: setting coupling parameters before applying the base voltage to the base of the bipolar transistor, and the coupling parameters include: the number of iterations, the Poisson equation, the electron continuity equation, and the hole continuity equation.

[0016] In the embodiment of the present invention, the method further includes: after applying the base voltage to the base of the bipolar transistor, coupling and solving the Poisson equation, the electron continuity equation, and the hole continuity equation.

[0017] In the embodiment of the present invention, the method further includes: after applying a gradually increasing current flowing from the collector and base of the bipolar transistor to the emitter to the emitter of the bipolar transistor, coupling and solving the Poisson equation, the electron continuity equation, and the hole continuity equation again.

[0018] In an embodiment of the present invention, obtaining a curve of the gain of a bipolar transistor varying with the base voltage according to the base current and the collector current of the bipolar transistor includes:

[0019] Calculating the ratio of the collector current to the base current of the bipolar transistor as the gain of the bipolar transistor, and obtaining a gain curve according to the collector current curve and the base current curve, where the abscissa of the gain curve is the base voltage and the ordinate is the gain value.

[0020] The present invention also provides a gain simulation device for a bipolar transistor. The device includes an Sdevice simulation tool, and the Sdevice simulation tool is used for:

[0021] When calling the solve simulation command, applying a voltage to the base of the bipolar transistor to forward bias the emitter junction of the bipolar transistor;

[0022] Setting the scanning mode to a quasi-static current scanning mode, and applying a gradually increasing current flowing from the collector and the base of the bipolar transistor to the emitter to the emitter of the bipolar transistor;

[0023] Performing current scanning in the quasi-static current scanning mode to obtain the base current and the collector current of the bipolar transistor; wherein, the base current increases as the emitter current increases, and the base voltage increases as the base current increases;

[0024] Obtaining a curve of the gain of the bipolar transistor varying with the base voltage according to the base current and the collector current of the bipolar transistor.

[0025] The present invention also provides a test method for a bipolar transistor, and this method includes the above-mentioned gain simulation method for the bipolar transistor.

[0026] The present invention adopts a current scanning mode of "sinking current" at the emitter in the simulation tool to implement the gain simulation of the bipolar transistor, with high simulation efficiency, more accurate simulation results, being applicable to bipolar transistors in various working modes, having stronger versatility, and being convenient for analyzing the characteristics of the low-current region of the bipolar transistor, and more accurately reflecting the current amplification ability of the bipolar transistor.

[0027] Other features and advantages of the technical solution of the present invention will be described in detail in the following specific implementation section. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The schematic embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation to the present invention. In the drawings:

[0029] Figure 1 It is a flowchart of the gain simulation method for a bipolar transistor provided by an embodiment of the present invention. Detailed implementation manners

[0030] In order to make the technical solutions and advantages in the embodiments of the present invention clearer and more understandable, the following further details the exemplary embodiments of the present invention with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than an exhaustive list of all embodiments. It should be noted that, without conflict, the embodiments in the present invention and the features in the embodiments can be combined with each other.

[0031] As introduced in the background art, the existing method for obtaining the gain of a bipolar transistor is to use the sweep voltage method in a simulation tool to obtain the collector current and the base current. For example, for an NPN bipolar transistor, a sweep voltage of 1.5 V is applied to the collector, and then, in the sweep voltage mode, the base is swept from 0 V to 1.5 V, so as to obtain the collector current Ic and the base current Ib. Finally, through calculation, the curve of the gain β of the bipolar transistor changing with the base voltage is obtained, from which the maximum gain and the corresponding base voltage value can be extracted. The existing method for obtaining the gain of a bipolar transistor using the sweep voltage method ignores the current control characteristics, cannot directly reflect the dynamic characteristics, and may also produce the Early effect, affecting the accuracy of the gain value.

[0032] To solve the above problems, an embodiment of the present invention provides a gain simulation method for a bipolar transistor, which calls a simulation command in a simulation tool, applies a voltage to the base of the bipolar transistor to make the emitter junction of the bipolar transistor forward-biased; sets the sweep mode to the quasi-static current sweep mode, and applies a gradually increasing current flowing from the collector and the base of the bipolar transistor to the emitter to the emitter of the bipolar transistor; performs current sweep in the quasi-static current sweep mode to obtain the base current and the collector current of the bipolar transistor; and obtains the gain curve of the bipolar transistor according to the base current and the collector current of the bipolar transistor. The present invention adopts the current sweep mode of "sinking current" at the emitter in the simulation tool to realize the gain simulation of the bipolar transistor, with high simulation efficiency, more accurate simulation results, applicable to bipolar transistors in various working modes, stronger versatility, and convenient for analyzing the characteristics of the low-current region of the bipolar transistor, and more accurately reflecting the current amplification ability of the bipolar transistor.

[0033] Figure 1 It is a flowchart of the gain simulation method for a bipolar transistor provided by an embodiment of the present invention. As Figure 1 shown, the gain simulation method for a bipolar transistor provided in this embodiment includes the following steps:

[0034] S101. Call the solve simulation command in the Sdevice simulation tool, apply a voltage to the base of the bipolar transistor to forward bias the emitter junction of the bipolar transistor.

[0035] S102. Set the scan mode to the quasi-static current scan mode, and apply a gradually increasing current flowing from the collector and base of the bipolar transistor to the emitter to the emitter of the bipolar transistor.

[0036] S103. Conduct a current scan in the quasi-static current scan mode to obtain the base current and collector current of the bipolar transistor.

[0037] S104. Obtain the curve of the gain of the bipolar transistor changing with the base voltage according to the base current and collector current of the bipolar transistor.

[0038] In a specific embodiment, before the above step S101, first call the solve simulation command in the Sdevice simulation tool and set the coupling parameters, such as the number of iterations, Poisson's equation, electron continuity equation, and hole continuity equation, etc.

[0039] In a specific embodiment, in the above step S101, taking an NPN bipolar transistor as an example, apply a voltage of 0.7V to the base of the bipolar transistor. Since the forward conduction voltage of the silicon-based PN junction is about 0.7V, applying a fixed voltage of 0.7V to the base can ensure that the emitter junction is forward biased.

[0040] In a specific embodiment, after the above step S101, that is, after applying a voltage to the base of the bipolar transistor, couple and solve Poisson's equation, electron continuity equation, and hole continuity equation.

[0041] In a specific embodiment, in the above step S102, apply a negative current from 0A to -0.6A to the emitter of the bipolar transistor. A negative current means that the current flows from the base or collector to the emitter, and a positive current means that the current flows from the emitter to the base or collector.

[0042] In a specific embodiment, after the above step S102, that is, after applying a gradually increasing current flowing from the collector and base of the bipolar transistor to the emitter to the emitter of the bipolar transistor, couple and solve Poisson's equation, electron continuity equation, and hole continuity equation again.

[0043] In a specific embodiment, in the above step S103, during the current scanning process, the current of the emitter is scanned from 0 A to -0.6 A, and the base current curve and the collector current curve will be scanned at the base and the collector. According to the working principle of the triode, the base current will increase as the emitter current increases, and the base voltage will also increase as the base current increases, that is, the base voltage is variable. By scanning the "sinking current" of the emitter, the situation where current is scanned at the emitter is simulated, and at this time, currents will also be scanned at the base and the collector. Since a voltage of 0.7 V is applied to the base in step S101, the forward bias voltage at the base is greater than 0.7 V at this time, and the base voltage has increased.

[0044] In a specific embodiment, in the above step S104, the ratio of the collector current to the base current of the bipolar transistor is calculated as the gain of the bipolar transistor, and the gain curve can be obtained according to the collector current curve and the base current curve. Taking an NPN bipolar transistor as an example, a voltage of 0.7 V is applied to the base. Then the scanning mode is changed to the quasi-static current scanning mode, and the emitter can be scanned from 0 amperes to -0.6 amperes or higher. In the current scanning mode, the base current Ib and the collector current Ic can be obtained. According to the formula β = Ic / Ib, dividing the base current curve by the collector current curve can obtain the curve of the gain of the bipolar transistor changing with the base voltage. The abscissa of this gain curve is the base voltage, and the ordinate is the gain value, from which the maximum gain and the corresponding base voltage value can be extracted.

[0045] In the sentaurus TCAD simulation software, part of the code of the solve simulation command in its Sdevice simulation tool is as follows:

[0046]

[0047] In the embodiment of the present invention, the scanning current mode of "sinking current" of the emitter is adopted to realize the gain simulation of the bipolar transistor. Compared with the prior art, it has the following advantages:

[0048] (1) The simulation method is more direct and accurate: In the case of forward bias of the emitter junction, by using the method of sinking current to the emitter, the emitter current Ie is scanned from 0 amperes to -0.6 amperes, and the collector current Ic and the base current Ib can be simulated. The sinking current method can more accurately control the emitter current, so as to directly scan and measure the base current and the collector current. This method reduces the error caused by voltage scanning, making the calculation of the gain value more reliable.

[0049] (2) It has stronger versatility: The sinking current method is applicable to bipolar transistors in various working modes, including the saturation region, the cut-off region, and the amplification region.

[0050] 3) Facilitate the analysis of the characteristics in the low-current region and accurately extract the gain of a bipolar transistor at low emitter currents: In the low-current region, the gain value of a bipolar transistor may change. The sink current method can accurately extract the gain values at different currents by gradually increasing the base current, thereby analyzing the characteristics in the low-current region.

[0051] 4) Closer to the actual working state and reflect the current amplification ability of a bipolar transistor: The sink current method directly simulates the working state of a bipolar transistor in an amplifier circuit and can more accurately reflect the current amplification ability of a bipolar transistor.

[0052] 5) Improve the simulation efficiency: Compared with the traditional scanning voltage method, the sink current method can reach the steady-state solution faster, thereby improving the simulation efficiency and shortening the simulation time. In actual simulations, through comparison, it is found that under the same simulation hardware conditions and when simulating an NPN-type device with the same structure, the simulation time required by the existing technical solution is about 29 minutes, while the technical solution of the present invention only requires 17 minutes.

[0053] The embodiment of the present invention also provides a gain simulation device for a bipolar transistor (such as Sentaurus TCAD). The device includes an Sdevice simulation tool. The Sdevice simulation tool is used to apply a voltage to the base of the bipolar transistor when calling the solve simulation command, so that the emitter junction of the bipolar transistor is forward-biased; set the scanning mode to the quasi-static current scanning mode, and apply a gradually increasing current flowing from the collector and base of the bipolar transistor to the emitter to the emitter of the bipolar transistor; perform current scanning in the quasi-static current scanning mode to obtain the base current and collector current of the bipolar transistor; and obtain the curve of the gain of the bipolar transistor changing with the base voltage according to the base current and collector current of the bipolar transistor.

[0054] In a specific embodiment, first call the solve simulation command in the Sdevice simulation tool and set the coupling parameters, such as the number of iterations, Poisson's equation, electron continuity equation, and hole continuity equation. Then apply a voltage to the base of the bipolar transistor. Taking an NPN-type bipolar transistor as an example, apply a voltage of 0.7V to the base of the bipolar transistor. Since the forward conduction voltage of a silicon-based PN junction is about 0.7V, applying a fixed voltage of 0.7V to the base can ensure that the emitter junction is forward-biased.

[0055] In a specific embodiment, after applying a voltage to the base of the bipolar transistor, solve the Poisson equation, electron continuity equation, and hole continuity equation by coupling. Apply a negative current from 0A to -0.6A (the current flowing from the base or collector to the emitter) to the emitter of the bipolar transistor, and then solve the Poisson equation, electron continuity equation, and hole continuity equation by coupling again.

[0056] In a specific embodiment, during the current scanning process, the current of the emitter is scanned from 0 A to -0.6 A, and the base current curve and the collector current curve will be scanned at the base and the collector. According to the working principle of the triode, the base current increases as the emitter current increases, and the base voltage also increases as the base current increases, that is, the base voltage is variable. By scanning the "sinking current" of the emitter to simulate the situation where a current is scanned at the emitter, currents will also be scanned at the base and the collector at this time. Since a voltage of 0.7 V is applied to the base in step S101, the forward bias voltage at the base is greater than 0.7 V at this time, and the base voltage increases.

[0057] In a specific embodiment, the Sdevice simulation tool can obtain the base current Ib and the collector current Ic in the quasi-static current scanning mode. According to the formula β = Ic / Ib, dividing the base current curve by the collector current curve can obtain the curve of the gain of the bipolar transistor changing with the base voltage. The abscissa of this gain curve is the base voltage, and the ordinate is the gain value. The maximum gain and the corresponding base voltage value can be extracted therefrom.

[0058] The embodiment of the present invention also provides a WAT (Wafer Acceptance Test) test method for a bipolar transistor, and this method includes the above-mentioned gain simulation method of the bipolar transistor. Before the chip composed of bipolar transistors leaves the factory, in the simulation software, for each electrode of the chip, the current scanning mode of emitter sinking current is adopted to obtain the gain of the bipolar transistor at different currents, so as to analyze the characteristics of the bipolar transistor in the chip in working modes such as the saturation region, the cut-off region, and the amplification region.

[0059] The embodiment of the present invention also provides a computer device, which includes a memory and a processor. The memory stores a computer program, and the processor is used to execute the computer program to implement the above-mentioned gain simulation method of the bipolar transistor.

[0060] The embodiment of the present invention also provides a computer program product, which includes a computer program. When the computer program is executed by a processor, it implements the above-mentioned gain simulation method of the bipolar transistor.

[0061] Those skilled in the art should understand that the embodiments of the present invention can be provided as a method, a system, or a computer program product. Therefore, the present invention can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present invention can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code. The solutions in the embodiments of the present invention can be implemented in various computer languages. For example, object-oriented programming languages such as Java and interpreted scripting languages such as JavaScript, etc.

[0062] The present invention is described with reference to the flowcharts and / or block diagrams of methods, apparatuses (systems), and computer program products according to embodiments of the present invention. It should be understood that each flow and / or block in the flowchart and / or block diagram, and the combination of flows and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, such that the instructions executed by the processor of the computer or other programmable data processing devices generate means for implementing the functions specified in Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks.

[0063] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, such that the instructions stored in the computer-readable memory generate a manufactured article including instruction means that implement the functions specified in Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks.

[0064] These computer program instructions can also be loaded onto a computer or other programmable data processing device, such that a series of operation steps are executed on the computer or other programmable device to generate a computer-implemented process, so that the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks.

[0065] Although the preferred embodiments of the present invention have been described, additional changes and modifications can be made to these embodiments by those skilled in the art once they learn of the basic inventive concept. Therefore, the appended claims are intended to be construed to include the preferred embodiments as well as all changes and modifications that fall within the scope of the present invention. Obviously, those skilled in the art can make various changes and variations to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention is also intended to include these modifications and variations.

Claims

1. A gain simulation method for a bipolar transistor, characterized in that: include: Call a simulation command in a simulation tool, apply a voltage to the base of the bipolar transistor, so that the emitter junction of the bipolar transistor is forward biased; The scanning mode is set to a quasi-static current scanning mode, and a gradually increasing current flowing from the collector and the base of the bipolar transistor to the emitter is applied to the emitter of the bipolar transistor; Performing current scanning in a quasi-static current scanning mode to obtain the base current and collector current of the bipolar transistor; wherein the base current increases with the increase of the emitter current, and the base voltage increases with the increase of the base current; According to the base current and collector current of the bipolar transistor, a curve showing that the gain of the bipolar transistor varies with the base voltage is obtained.

2. The gain simulation method of a bipolar transistor according to claim 1, characterized in that: The bipolar transistor is an NPN bipolar transistor.

3. The gain simulation method of a bipolar transistor according to claim 1, characterized in that: The method further includes: setting coupling parameters before applying a base voltage to the base of the bipolar transistor, wherein the coupling parameters include: the number of iterations, the Poisson equation, the electron continuity equation, and the hole continuity equation.

4. The gain simulation method of a bipolar transistor according to claim 3, characterized in that: The method further includes: after applying a base voltage to the base of the bipolar transistor, coupling and solving the Poisson equation, the electron continuity equation and the hole continuity equation.

5. The gain simulation method of a bipolar transistor according to claim 4, characterized in that: The method further includes: after the emitter of the bipolar transistor applies a gradually increasing current flowing from the collector and base of the bipolar transistor to the emitter, again coupling and solving the Poisson equation, the electron continuity equation and the hole continuity equation.

6. The gain simulation method of a bipolar transistor according to claim 1, characterized in that: The method of obtaining a curve showing a change in gain of the bipolar transistor with respect to base voltage according to the base current and collector current of the bipolar transistor comprises: The ratio of the collector current to the base current of the bipolar transistor is calculated as the gain of the bipolar transistor, and a gain curve is obtained according to the collector current curve and the base current curve. The abscissa of the gain curve is the base voltage, and the ordinate is the gain value.

7. A gain simulation device for a bipolar transistor, characterized in that: The apparatus comprises a simulation tool, wherein the simulation tool is used to: When the simulation command is called, a voltage is applied to the base of the bipolar transistor so that the emitter junction of the bipolar transistor is forward biased; The scanning mode is set to a quasi-static current scanning mode, and a gradually increasing current flowing from the collector and the base of the bipolar transistor to the emitter is applied to the emitter of the bipolar transistor; Performing current scanning in a quasi-static current scanning mode to obtain the base current and collector current of the bipolar transistor; wherein the base current increases with the increase of the emitter current, and the base voltage increases with the increase of the base current; According to the base current and collector current of the bipolar transistor, a curve showing that the gain of the bipolar transistor varies with the base voltage is obtained.

8. A method for testing a bipolar transistor, characterized in that: The method comprises the gain simulation method of a bipolar transistor as claimed in any one of claims 1 to 6.

9. A computer device, characterized in that: include: a memory storing a computer program; A processor, configured to execute the computer program to implement the gain simulation method for a bipolar transistor according to any one of claims 1 to 6.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the computer program implements the gain simulation method of the bipolar transistor according to any one of claims 1 to 6.

Images