Bus equalization method in power-on static state

Abstract

The invention discloses a bus equalization method in a power-on static state, which is applied to an inverter system, and comprises the following steps: constructing a symmetric compensation network between positive and negative buses and a bus midpoint, and carrying out equalization compensation on half-bus impedance of the positive and negative buses through the symmetric compensation network, or balancing compensation is carried out on the half-bus voltage of the positive and negative buses. The method has the beneficial effects that by compensating the half-bus voltage or the half-bus impedance of the positive and negative buses, the bus voltage can be balanced in a static state when the inverter is powered on and is not started. And moreover, various equalization modes are realized, elements added to the inverter system in various modes are few, the cost is low, and the realization mode is relatively simple.

Description

Technical Field

[0001] This application relates to the technical field of inverters, and particularly to a bus equalization method in the power-on static state. Background Art

[0002] Most existing inverters have a non-isolated structure. There are common systems where the bus negative is grounded with the power supply, and there are also power supply floating ground systems. Before the inverter is powered on and not yet started, the bus may be unbalanced. Since the inverter is in a non-started state, it is not possible to inject zero-sequence current through the DC / AC device to achieve the balance of the bus voltage. Therefore, when the inverter is not started, the bus equalization is actually a static equalization, mainly determined by the impedance network of the system. In addition, the failure of the DC / DC device may also cause the bus imbalance during the starting process of the system. When the inverter is starting, if the bus voltage is in an unbalanced state, it may cause the inverter not to start normally. Summary of the Invention

[0003] One of the purposes of this application is to provide a bus equalization method in the power-on static state that can solve at least one defect in the above background art.

[0004] To achieve at least one of the above purposes, the technical solution adopted in this application is: a bus equalization method in the power-on static state, applied to an inverter system, including the following steps: constructing a symmetric compensation network between the bus and the bus midpoint, and performing equalization compensation on the half-bus impedance of the positive and negative buses, or performing equalization compensation on the half-bus voltage of the positive and negative buses through the symmetric compensation network.

[0005] Preferably, the symmetric compensation network adopts an impedance network, and the impedance network is suitable for increasing the positive half-bus impedance, or simultaneously reducing the positive half-bus impedance and the negative half-bus impedance.

[0006] Preferably, the impedance network includes a compensation resistor connected in parallel between the positive bus and the bus midpoint, and the resistance value of the compensation resistor is equal to the impedance value of the bus midpoint.

[0007] Preferably, when the inverter system takes power with a floating ground power supply, the negative bus is connected to the signal ground through a control switch; when the impedance network is working, the control switch is in a closed conduction state; when the symmetric compensation network is not working, the control switch is in an open circuit state.

[0008] Preferably, the impedance network adopts an insulation impedance detection unit equipped in the inverter system; the insulation impedance detection unit includes a pair of measuring resistors and a first bidirectional switch; the branch formed by the series connection of the measuring resistors is connected in parallel to the positive and negative buses, and the series midpoint of the measuring resistors is connected to the bus midpoint and the ground through the first bidirectional switch; when performing insulation impedance detection, the first bidirectional switch conducts the series midpoint of the measuring resistors to the ground; when performing bus equalization, the first bidirectional switch conducts the series midpoint of the measuring resistors to the bus midpoint.

[0009] Preferably, the impedance network includes a compensation resistor and an insulation impedance detection unit equipped in the inverter system; the compensation resistor is connected in parallel between the positive bus and the bus midpoint; the insulation impedance detection unit includes a pair of measuring resistors and a first bidirectional switch; the branch formed by the series connection of the measuring resistors is connected in parallel to the positive and negative buses, and the series midpoint of the measuring resistors is connected to the bus midpoint and the ground through the first bidirectional switch; the specific process of the symmetric compensation network for equalizing the bus is as follows: calculate the voltage deviation between the positive and negative buses, and compare the calculated result with the set voltage deviation threshold value; if the calculated voltage deviation is less than the set voltage deviation threshold value, the first bidirectional switch conducts the series midpoint of the measuring resistors to the ground; otherwise, the first bidirectional switch conducts the series midpoint of the measuring resistors to the bus midpoint.

[0010] Preferably, the symmetric compensation network adopts a power supply network, and the power supply network is suitable for compensating the voltage of one of the half buses so that the voltages of the positive and negative buses are kept balanced.

[0011] Preferably, the power supply network adopts a PID unit equipped in the inverter system; the PID unit includes a PID power supply and a second bidirectional switch; one end of the PID power supply is connected to the bus midpoint, and the other end of the PID power supply is respectively connected to the negative bus and the ground through the second bidirectional switch; when performing PID suppression, the second bidirectional switch conducts the PID power supply to the ground; when performing bus equalization, the second bidirectional switch conducts the PID power supply to the negative bus, and then adjusts the voltage of the negative half bus to be equal to the voltage of the positive half bus through the PID power supply.

[0012] Preferably, the symmetric compensation network adopts a compensation selection network including a power supply network and an impedance network; the compensation selection network is suitable for selectively accessing the power supply network and the impedance network according to the voltage deviation between the positive and negative buses, and then performing equalization compensation on the half bus voltage or half bus impedance of the positive and negative buses.

[0013] Preferably, the impedance network adopts an insulation impedance detection unit equipped in the inverter system, and the power network adopts a PID unit equipped in the inverter system; the insulation impedance detection unit includes a pair of measuring resistors and a first bidirectional switch; the branch formed by the series connection of the measuring resistors is connected in parallel to the positive and negative buses, and the series connection midpoint of the measuring resistors is connected to the bus midpoint and the ground through the first bidirectional switch; the PID unit includes a PID power supply and a second bidirectional switch; one end of the PID power supply is connected to the bus midpoint, and the other end of the PID power supply is respectively connected to the negative bus and the ground through the second bidirectional switch; the specific process of the symmetric compensation network for balancing the bus is as follows: calculate the voltage deviation between the positive and negative buses, and compare the calculated result with a set first voltage deviation threshold value and a second voltage deviation threshold value; wherein, the first voltage deviation threshold value is less than the second voltage deviation threshold value; when the calculated voltage deviation is less than the set first voltage deviation threshold value, the first bidirectional switch conducts the series connection midpoint of the measuring resistors to the ground, and at the same time the second bidirectional switch conducts the PID power supply to the ground; when the calculated voltage deviation is greater than the set second voltage deviation threshold value, the first bidirectional switch conducts the series connection midpoint of the measuring resistors to the ground, and at the same time the second bidirectional switch conducts the PID power supply to the negative bus; when the calculated voltage deviation is between the first voltage deviation threshold value and the second voltage deviation threshold value, if the voltage deviation calculated at the previous moment is less than the set first voltage deviation threshold value, the first bidirectional switch conducts the series connection midpoint of the measuring resistors to the bus midpoint, and at the same time the second bidirectional switch conducts the PID power supply to the ground; otherwise the first bidirectional switch conducts the series connection midpoint of the measuring resistors to the ground, and at the same time the second bidirectional switch conducts the PID power supply to the negative bus.

[0014] Compared with the prior art, the beneficial effects of the present application are as follows: By compensating the half-bus voltage or half-bus impedance of the positive and negative buses, the balance of the bus voltage can be achieved in the static state when the inverter is powered on but not started. And there are various ways to achieve the balance. Each way adds few components to the inverter system, has low cost, and the implementation method is relatively simple. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a schematic diagram of the working process of the present application.

[0016] Figure 2 It is a schematic diagram of the architecture of a typical photovoltaic system in the prior art.

[0017] Figure 3 It is a schematic diagram of the architecture when the bus and the signal are completely isolated during power taking of the system.

[0018] Figure 4 Schematic diagram of the architecture where the bus and signal share the same ground when the system takes power.

[0019] Figure 5 Schematic diagram of the photovoltaic system architecture where the negative bus and signal share the same ground in this application.

[0020] Figure 6 In this application Figure 5 Schematic diagram of the equivalent circuit corresponding to the architecture shown.

[0021] Figure 7 In this application Figure 5 Schematic diagram of the architecture that uses a compensation resistor as a symmetric compensation network in the architecture shown.

[0022] Figure 8 In this application Figure 7 Schematic diagram of the equivalent circuit corresponding to the architecture shown.

[0023] Figure 9 In this application Figure 5 Schematic diagram of the architecture that uses an insulation impedance detection unit as a symmetric compensation network in the architecture shown.

[0024] Figure 10 In this application Figure 9 Schematic diagram of the equivalent circuit corresponding to the architecture shown.

[0025] Figure 11 In this application Figure 5 Schematic diagram of the architecture that simultaneously uses a compensation resistor and an insulation impedance detection unit as a symmetric compensation network in the architecture shown.

[0026] Figure 12 In this application Figure 11 Schematic diagram of the working process of the architecture shown.

[0027] Figure 13 Schematic diagram of the photovoltaic system architecture where the negative bus and signal are isolated in this application.

[0028] Figure 14 In this application Figure 13 Schematic diagram of the equivalent circuit corresponding to the architecture shown.

[0029] Figure 15 In this application Figure 13 Schematic diagram of the architecture that uses a compensation resistor as a symmetric compensation network in the architecture shown.

[0030] Figure 16 In this application Figure 13 Schematic diagram of the architecture that uses an insulation impedance detection unit as a symmetric compensation network in the architecture shown.

[0031] Figure 17 In this applicationFigure 13 The schematic diagram of the architecture that uses a PID unit as a symmetric compensation network in the shown architecture.

[0032] Figure 18 This application is in Figure 13 The schematic diagram of the architecture that simultaneously uses an insulation impedance detection unit and a PID unit as a symmetric compensation network in the shown architecture.

[0033] Figure 19 This application is Figure 18 The schematic diagram of the working process of the shown architecture. Specific embodiments

[0034] Next, in combination with specific embodiments, the present application will be further described. It should be noted that in the description of this specification, the reference terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. mean that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic expressions of the above terms should not be understood as necessarily referring to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, those skilled in the art can combine and combine the different embodiments or examples described in this specification.

[0035] In the description of the present application, it should be noted that for orientation terms, if there are terms such as "center", "horizontal", "vertical", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc., indicating the orientation and position relationship is based on the orientation or position relationship shown in the drawings. It is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and should not be understood as limiting the specific protection scope of the present application.

[0036] It should be noted that the terms "first", "second", etc. in the description and claims of the present application are used to distinguish similar objects, and do not necessarily have to be used to describe a specific order or sequence.

[0037] In this application, unless otherwise clearly defined or limited, terms such as "installed", "connected", "joined", "fixed", etc. shall be understood in a broad sense. For example, it can be a connection, a detachable connection, or integrated; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two components or the interaction relationship between two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0038] In this application, unless otherwise clearly defined or limited, the first feature being "on" or "under" the second feature may include the direct contact between the first and second features, or may include the situation where the first and second features are not in direct contact but in contact through other features between them. Moreover, the first feature being "above", "over" and "on top of" the second feature includes that the first feature is directly above and obliquely above the second feature, or merely indicates that the horizontal height of the first feature is higher than that of the second feature. The first feature being "under", "beneath" and "underneath" the second feature includes that the first feature is directly below and obliquely below the second feature, or merely indicates that the horizontal height of the first feature is lower than that of the second feature.

[0039] The terms "comprising" and "having" and any variations thereof in the description and claims of this application are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that comprises a series of steps or units does not necessarily have to be limited to those steps or units clearly listed, but may include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0040] One preferred embodiment of this application, as Figure 1 shown, a bus equalization method in the power-on static state, applied to an inverter system, includes the following steps: constructing a symmetric compensation network between the positive and negative buses and the bus midpoint, and performing equalization compensation on the half-bus impedance of the positive and negative buses, or performing equalization compensation on the half-bus voltage of the positive and negative buses through the symmetric compensation network.

[0041] It can be understood that in the case where the inverter is powered on but not started, through the following analysis of the inverter architecture, it can be known that the balance of the bus voltage of the inverter system mainly depends on whether the impedances of the positive and negative half-buses are balanced. When the bus voltage is unbalanced, it is mainly due to the existence of the bus midpoint impedance that causes the imbalance of the positive and negative half-bus impedances. Therefore, an impedance network for equalizing the half-bus impedance of the positive and negative buses can be constructed as a symmetric compensation network. Of course, for the imbalance of the bus voltage, the most direct method can be used to compensate the half-bus voltage of the positive and negative buses, so as to achieve the balance of the bus voltage; that is, a power supply network for equalizing the half-bus voltage of the positive and negative buses is constructed as a symmetric compensation network.

[0042] It should be noted that there are various types of inverter systems to which the busbar balancing method of the present application can be applied, such as photovoltaic power generation systems, photovoltaic energy storage systems, and other forms of new energy power generation systems, etc.; for the convenience of understanding, the present application will take a photovoltaic system as an example for detailed description.

[0043] As Figure 2 shown, it is a schematic diagram of the architecture of a typical photovoltaic system in the prior art. The overall adopts a multi-string architecture. Each group of PV units is connected to the busbar through the corresponding DC / DC unit, and then is connected to the grid through the DC / AC unit. In this system, the power is generally taken from the busbar; the power-taking methods of the system can be mainly divided into two types; one is as Figure 3 shown. After taking power from the busbar, a galvanic isolation type DC / DC unit is passed through to obtain a weak power source, and then the weak electrical signal ground is not connected to the negative busbar; the other is as Figure 4 shown. After taking power from the busbar, a galvanic isolation type DC / DC unit is passed through to obtain a weak power source, and then the weak electrical signal ground is connected to the negative busbar. There are certain differences in the busbar balancing methods based on the above two power-taking methods. For the convenience of understanding, the busbar balancing processes under the above two power-taking methods will be described in detail through two embodiments below.

[0044] Embodiment 1: The scenario where the signal is grounded with the negative busbar.

[0045] For the convenience of understanding this embodiment, the busbar imbalance situation in the corresponding scenario of this embodiment can be analyzed first.

[0046] As Figure 5 shown, it is a schematic diagram of the architecture of a photovoltaic system where the negative busbar is grounded with the signal; among them, the number of PV units is n, which are respectively marked as PV#1 to PV#n. The measurement resistors corresponding to PV#1 are R PV1+ and R PV1- . Similarly, it can be known that the measurement resistors corresponding to PV#n are R PVn+ and R PVn- . For the busbar, generally, the impedance of the total busbar and the voltage of the half busbar are measured; among them, the measurement resistors of the total busbar are R dc+ and R dc1- , and the measurement resistors of the negative busbar are R NP and R dc2- .

[0047] The above measurement resistors are all connected to the signal ground. The equivalent simplified circuit in the static state is as Figure 6 shown. It can be seen from Figure 6 that the signal ground GND is connected to the negative busbar Bus-, then the measurement resistors R PV1- connected to the negative busbar Bus-,..., RPVn- , R dc1- and R dc2- will all be bypassed and will not have any impact on the system voltage equalization. Additionally, the measuring resistors R PV1+ , ……, R PVn+ and R dc+ connected across the positive and negative buses will also not affect the balance at the midpoint of the bus. Furthermore, what truly determines the bus equalization is the impedance connected at the midpoint of the bus, i.e., the measuring resistor R NP .

[0048] In this embodiment, in order to suppress the impact of the midpoint impedance R NP of the bus on the midpoint equalization of the bus, an impedance network can be used as a symmetric compensation network for half-bus impedance equalization compensation. There are multiple ways to achieve half-bus impedance equalization. For example, the impedance of the positive half-bus can be increased, or the impedance of both the positive half-bus and the negative half-bus can be decreased simultaneously. For the convenience of understanding, specific examples will be described in detail below.

[0049] Example 1: As Figure 7 shown, since the negative bus is grounded with the signal, the midpoint impedance R NP is connected between the midpoint of the bus and the negative bus; then the impedance network can include a compensation resistor R NP ´ connected in parallel between the positive bus and the midpoint of the bus, and the resistance value of the compensation resistor R NP ´ is equal to the value of the midpoint impedance R NP .

[0050] It can be understood that after adding the compensation resistor R NP ´, as can be seen from the equivalent simplified circuit diagram shown in Figure 8 , the impedances between the positive bus and the midpoint of the bus and between the midpoint of the bus and the negative bus are symmetrically equal, and at this time the bus voltage is theoretically in an equalized state.

[0051] Example 2: Since an insulation impedance detection unit is generally equipped in the inverter system to detect the insulation impedance of the inverter system; then the insulation impedance network corresponding to the insulation impedance detection unit can be used for the midpoint balance of the bus. As Figure 9 shown, the insulation impedance detection unit includes measuring resistors R1 and R2 and a first bidirectional switch S1; the branch formed by the series connection of the measuring resistors R1 and R2 is connected in parallel across the positive and negative buses, and the series midpoint of the measuring resistors R1 and R2 is connected to the midpoint of the bus and the ground through the first bidirectional switch S1; that is, a contact 1 is connected at the midpoint of the bus and a contact 2 is connected at the ground position.

[0052] When the inverter system performs insulation impedance detection, the first bidirectional switch S1 can connect to contact 2, thereby conducting the series midpoint of the measuring resistors R1 and R2 to the ground, so as to realize the insulation impedance detection of the inverter system. When bus equalization is carried out, the first bidirectional switch S1 can connect to contact 1, thereby conducting the series midpoint of the measuring resistors R1 and R2 to the bus midpoint, so as to reduce the half-bus impedance corresponding to the positive and negative buses to suppress the imbalance degree of the bus midpoint.

[0053] It can be understood that the specific structure and working principle of the first bidirectional switch S1 are well-known technologies to those skilled in the art, so they will not be elaborated in detail here. When the first bidirectional switch S1 connects to contact 1, Figure 9 the corresponding architecture can be simplified to the equivalent circuit as Figure 10 shown. It can be Figure 10 seen that the measuring resistor R1 is connected in parallel between the positive bus and the bus midpoint, and the measuring resistor R2 is connected in parallel between the bus midpoint and the negative bus. Those skilled in the art should know that in the insulation impedance network, the resistance values of the measuring resistors R1 and R2 are much smaller than the bus midpoint impedance R NP . This makes the equalization of the bus midpoint determined by the measuring resistors R1 and R2.

[0054] Specifically, at this time, the measuring resistor R2 is in a parallel state with the bus midpoint impedance R NP ; since the resistance value of the measuring resistor R2 is much smaller than the bus midpoint impedance R NP , then according to the knowledge of parallel resistors, the total resistance value after the parallel connection of the measuring resistors between the negative bus and the bus midpoint is significantly reduced to approach the measuring resistor R2. Since the resistance values of the measuring resistors R1 and R2 are generally equal, the half-bus impedance can be reduced through the insulation impedance network including the measuring resistors R1 and R2, and the reduced positive and negative half-bus impedances tend to be the same, so as to realize the equalization of the bus voltage well.

[0055] Example 3: Its essence can be regarded as a combination of Example 1 and Example 2. As Figure 11 shown, the impedance network includes a compensation resistor R NP ´ and an insulation impedance detection unit equipped in the inverter system; the compensation resistor R NP ´ is connected in parallel between the positive bus and the bus midpoint; the insulation impedance detection unit includes measuring resistors R1 and R2 and the first bidirectional switch S1. The branch formed by the series connection of the measuring resistors R1 and R2 is connected in parallel between the positive and negative buses, and the series midpoint of the measuring resistors R1 and R2 is connected to the bus midpoint and the ground through the first bidirectional switch S1.

[0056] Based on the above architecture, as Figure 12As shown, the specific process of the symmetric compensation network for balancing the bus is as follows: First, calculate the voltage deviation ΔV of the positive and negative buses, ΔV = |V dc+ -V dc- |; where V dc+ represents the positive half-bus voltage, and V dc- represents the negative half-bus voltage. Then compare the calculated voltage deviation ΔV with the set voltage deviation threshold value V th . If the calculated voltage deviation ΔV is less than the set voltage deviation threshold value V th , it indicates that the imbalance degree of the bus voltage is relatively low at this time, and only the compensation resistor R NP ´ is needed to achieve balanced compensation; since the compensation resistor R NP ´ is already in an impedance balanced state, the first bidirectional switch S1 can conduct the series midpoint of the measuring resistors R1 and R2 to the ground at this time, so that the insulation impedance network operates in insulation impedance detection. If the calculated voltage deviation ΔV is greater than or equal to the set voltage deviation threshold value V th , it indicates that the imbalance degree of the bus voltage is relatively high at this time, and the compensation resistor R NP ´ and the insulation impedance network are required to jointly achieve rapid balancing of the bus voltage; since the compensation resistor R NP ´ is already in an impedance balanced state, the first bidirectional switch S1 can conduct the series midpoint of the measuring resistors R1 and R2 to the bus midpoint at this time.

[0057] Embodiment 2: A scenario where the signal is not grounded with the negative bus, that is, the inverter takes power in a floating power supply manner.

[0058] As Figure 13 shown, it is a schematic diagram of the photovoltaic system architecture where the negative bus is not grounded with the signal; the difference between this architecture and that of Embodiment 1 is that the signal ground is not connected to the negative bus, so the specific structure of the architecture will not be elaborated here.

[0059] Based on Figure 13 the architecture shown, the equivalent simplified circuit in the static state is as Figure 14 shown. As Figure 14 can be seen, only the diode corresponding to the PV unit with the highest PV voltage will conduct. Assuming that the voltage of PV#1 is the highest, the diode connected to the positive output terminal PV1+ of PV#1 will conduct. Therefore, the impedance between the positive bus Bus+ and the signal ground GND is R PV1+ / / R dc+ , and the impedance between the negative bus Bus- and the signal ground GND is R PV1- / / … / / R PVn- / / R dc1- / / R dc2-It can be seen that the static impedances of the positive bus and the negative bus are inconsistent, which easily leads to static imbalance of the bus voltage.

[0060] To suppress the influence of impedance mismatch on the voltage balance at the midpoint of the bus, an impedance network can be used as a symmetric compensation network for half-bus impedance balance compensation, or a power network can be used as a symmetric compensation network for half-bus voltage balance compensation. For ease of understanding, the following will be described in detail through specific examples.

[0061] Example 4: As Figure 15 shown, the negative bus is connected to the signal ground through the control switch S2. At the same time, the symmetric compensation network uses an impedance network, and the impedance network includes a compensation resistor R NP ´ connected in parallel between the positive bus and the midpoint of the bus. The resistance value of the compensation resistor R NP ´ is equal to the impedance R NP of the midpoint of the bus.

[0062] It can be understood that the specific structure and working principle of the control switch S2 are well-known technologies to those skilled in the art, so they will not be elaborated in detail here. When static balance of the bus is required, the control switch S2 can be closed so that the power supply of the inverter system changes from floating ground to the scenario where the signal is common to the negative bus in Example 1. At this time, whether the midpoint of the bus of the inverter system is balanced depends on the impedance R NP of the midpoint of the bus. Furthermore, the impedance balance of the positive and negative half-buses can be achieved through the compensation resistor R NP ´. After the static balance of the bus is completed and the inverter is started, the control switch S2 can be opened and disconnected. Thereafter, the voltage balance of the bus can be achieved through zero-sequence injection.

[0063] Example 5: The symmetric compensation network uses an impedance network. Since an insulation impedance detection unit is generally equipped in the inverter system to detect the insulation impedance of the inverter system, the insulation impedance network corresponding to the insulation impedance detection unit can be used for midpoint balance of the bus. As Figure 16 shown, the insulation impedance detection unit includes measuring resistors R1 and R2 and a first bidirectional switch S1. The branch formed by the series connection of the measuring resistors R1 and R2 is connected in parallel to the positive and negative buses. The series midpoint of the measuring resistors R1 and R2 is connected to the midpoint of the bus and the ground through the first bidirectional switch S1, that is, a contact 1 is connected at the midpoint position of the bus, and a contact 2 is connected at the ground position.

[0064] When the inverter system performs insulation impedance detection, the first bidirectional switch S1 can connect to contact 2, thereby conducting the series midpoint of the measuring resistors R1 and R2 to the ground, so as to realize the insulation impedance detection of the inverter system. When bus equalization is carried out, the first bidirectional switch S1 can connect to contact 1, thereby conducting the series midpoint of the measuring resistors R1 and R2 to the bus midpoint, so as to reduce the half-bus impedance corresponding to the positive and negative buses to suppress the imbalance degree of the bus midpoint.

[0065] It can be understood that when the first bidirectional switch S1 connects to contact 1, the measuring resistors R1 and R2 are respectively connected in parallel to the positive half-bus and the negative half-bus. Since the resistance values of the measuring resistors R1 and R2 are much smaller than the resistance value of the measuring resistor of the inverter system, the equalization of the bus midpoint will be determined by the measuring resistors R1 and R2. Specifically, according to the knowledge of resistor parallel connection, the total resistance value after the measuring resistor between the positive bus and the bus midpoint is connected in parallel is significantly reduced to approach the measuring resistor R1. The total resistance value after the measuring resistor between the negative bus and the bus midpoint is connected in parallel is significantly reduced to approach the measuring resistor R2. Since the resistance values of the measuring resistors R1 and R2 are generally equal, the half-bus impedance can be reduced through the insulation impedance network including the measuring resistors R1 and R2, and the reduced positive and negative half-bus impedances tend to be the same, so that the balance of the bus voltage can be well realized.

[0066] Example 6: The symmetric compensation network adopts a power supply network, and the power supply network can compensate one of the half-bus voltages to keep the positive and negative bus voltages balanced.

[0067] It can be understood that there are various specific structures of the power supply network that can realize half-bus voltage compensation; since adding an additional power supply network may affect the normal operation of the inverter system and increase the cost of the inverter system at the same time. Considering that a PID unit is generally equipped in the photovoltaic system to suppress the PID effect, the PID unit can suppress the PID effect by applying a reverse bias voltage; therefore, the PID unit equipped in the inverter system can be used as the power supply network to balance the static bus midpoint voltage.

[0068] Specifically, such as Figure 17As shown, the PID unit includes a PID power supply and a second bidirectional switch S3; one end of the PID power supply is connected to the midpoint of the bus, and the other end of the PID power supply is connected to the negative bus and the ground respectively through the second bidirectional switch S3; that is, a contact 1 is connected at the position of the negative bus, and a contact 2 is connected at the position of the ground. When the inverter system performs PID suppression, the second bidirectional switch S3 is connected to the contact 2, so that the PID power supply is conducted to the ground to achieve the suppression of the PID effect. When performing bus balancing, the second bidirectional switch S3 is connected to the contact 1, so that the PID power supply is conducted to the negative bus; at this time, the PID power supply is connected in parallel between the negative bus and the midpoint of the bus, and then the output of the PID power supply can be controlled according to the positive half-bus voltage, so that the negative half-bus voltage is adjusted to be equal to the positive half-bus voltage through the PID power supply.

[0069] Example 7: The symmetric compensation network adopts a compensation selection network including a power network and an impedance network, that is, Example 7 can be regarded as a combination of Example 5 and Example 6. The compensation selection network can selectively access the power network and the impedance network according to the voltage deviation between the positive and negative buses, and then perform balanced compensation on the half-bus voltage or half-bus impedance of the positive and negative buses.

[0070] Specifically, as Figure 18 shown, the impedance network adopts an insulation impedance detection unit equipped in the inverter system, and the power network adopts a PID unit equipped in the inverter system. The insulation impedance detection unit includes measuring resistors R1 and R2 and a first bidirectional switch S1; the branch formed by the series connection of the measuring resistors R1 and R2 is connected in parallel to the positive and negative buses, and the series midpoint of the measuring resistors R1 and R2 is connected to the midpoint of the bus and the ground through the first bidirectional switch S1. The PID unit includes a PID power supply and a second bidirectional switch S3; one end of the PID power supply is connected to the midpoint of the bus, and the other end of the PID power supply is connected to the negative bus and the ground respectively through the second bidirectional switch S3.

[0071] Based on the above architecture, as Figure 19 shown, the specific process of the symmetric compensation network for balancing the bus is as follows: First, calculate the voltage deviation ΔV between the positive and negative buses, ΔV = |V dc+ -V dc- |; where, V dc+ represents the positive half-bus voltage, and V dc- represents the negative half-bus voltage. Then compare the calculated voltage deviation ΔV with the set first voltage deviation threshold V th1 and the second voltage deviation threshold V th2 ; where, the first voltage deviation threshold V th1 is less than the second voltage deviation threshold V th2 .

[0072] When the calculated voltage deviation ΔV is less than the set first voltage deviation threshold value V th1 , the first bidirectional switch S1 conducts the series midpoint of the measuring resistors R1 and R2 to the ground, and at the same time, the second bidirectional switch S3 conducts the PID power supply to the ground. At this time, the insulation impedance network operates in the insulation impedance detection mode, and at the same time, the PID power supply operates in the PID effect suppression mode, that is, neither the insulation impedance network nor the PID power supply acts on the bus balance at this time.

[0073] When the calculated voltage deviation ΔV is greater than the set second voltage deviation threshold value V th2 , the first bidirectional switch S1 conducts the series midpoint of the measuring resistors R1 and R2 to the ground, and at the same time, the second bidirectional switch S3 conducts the PID power supply to the negative bus. At this time, the insulation impedance network operates in the insulation impedance detection mode, and at the same time, the PID power supply equalizes the voltage at the midpoint of the bus; the equalization process of the PID power supply for the voltage at the midpoint of the bus can refer to Example 6 above.

[0074] When the calculated voltage deviation ΔV is between the first voltage deviation threshold value V th1 and the second voltage deviation threshold value V th2 , a hysteresis selection method can be adopted. That is, calculate the voltage deviation at the previous moment. If the voltage deviation ΔV calculated at the previous moment is less than the set first voltage deviation threshold value V th1 , at this time, the first bidirectional switch S1 conducts the series midpoint of the measuring resistors R1 and R2 to the midpoint of the bus, and at the same time, the second bidirectional switch S3 conducts the PID power supply to the ground; so that the insulation impedance network equalizes the voltage at the midpoint of the bus, and at the same time, the PID power supply operates in the PID effect suppression mode; the equalization process of the insulation impedance network for the voltage at the midpoint of the bus can refer to Example 5 above. If the voltage deviation ΔV calculated at the previous moment is greater than the set second voltage deviation threshold value V th2 , at this time, the first bidirectional switch S1 conducts the series midpoint of the measuring resistors R1 and R2 to the ground, and at the same time, the second bidirectional switch S3 conducts the PID power supply to the negative bus; so that the insulation impedance network operates in the insulation impedance detection mode, and at the same time, the PID power supply equalizes the voltage at the midpoint of the bus; the equalization process of the PID power supply for the voltage at the midpoint of the bus can refer to Example 6 above.

[0075] The above describes the basic principle, main features and advantages of this application. Those skilled in the art should understand that this application is not limited by the above embodiments. What is described in the above embodiments and the specification is only the principle of this application. Without departing from the spirit and scope of this application, this application will have various changes and improvements, and these changes and improvements all fall within the scope of this application claimed. The scope of protection required by this application is defined by the appended claims and their equivalents.

Claims

1. A bus bar equalization method in the power-on static state, which is applied to an inverter system, and is characterized in that, The method includes the following steps: constructing a symmetric compensation network between the positive and negative buses and the midpoint of the buses, and performing balanced compensation on the half-bus impedance of the positive and negative buses or on the half-bus voltage of the positive and negative buses through the symmetric compensation network.

2. The bus equalization method in the power-on static state according to claim 1, characterized in that, The symmetric compensation network adopts an impedance network, and the impedance network is suitable for increasing the positive half-bus impedance or simultaneously reducing the positive half-bus impedance and the negative half-bus impedance.

3. The bus equalization method in the power-on static state according to claim 2, wherein The impedance network includes a compensation resistor connected in parallel between the positive bus and the midpoint of the buses, and the resistance value of the compensation resistor is equal to the impedance value of the midpoint of the buses.

4. The bus equalization method under power-on static state according to claim 3, wherein, When the power supply of the inverter system adopts a floating power supply system, the negative bus is connected to the signal ground through a control switch. When the impedance network is working, the control switch is in a closed and conducting state; when the symmetric compensation network is not working, the control switch is in an open and open state.

5. The bus equalization method under power-on static state according to claim 2, characterized in that, The impedance network adopts an insulation impedance detection unit equipped in the inverter system. The insulation impedance detection unit includes a pair of measuring resistors and a first bidirectional switch; the branch formed by the series connection of the measuring resistors is connected in parallel to the positive and negative buses, and the series midpoint of the measuring resistors is connected to the midpoint of the buses and the ground through the first bidirectional switch. When performing insulation impedance detection, the first bidirectional switch conducts the series midpoint of the measuring resistors to the ground; when performing bus balancing, the first bidirectional switch conducts the series midpoint of the measuring resistors to the midpoint of the buses.

6. The bus equalization method in the power-on static state according to claim 2, characterized in that, The impedance network includes a compensation resistor and an insulation impedance detection unit equipped in the inverter system. The compensation resistor is connected in parallel between the positive bus and the midpoint of the buses. The insulation impedance detection unit includes a pair of measuring resistors and a first bidirectional switch; the branch formed by the series connection of the measuring resistors is connected in parallel to the positive and negative buses, and the series midpoint of the measuring resistors is connected to the midpoint of the buses and the ground through the first bidirectional switch. The specific process of the symmetric compensation network for balancing the buses is as follows: Calculating the voltage deviation between the positive and negative buses and comparing the calculated result with a set voltage deviation threshold value. If the calculated voltage deviation is less than the set voltage deviation threshold value, the first bidirectional switch conducts the series midpoint of the measuring resistors to the ground. Otherwise, the first bidirectional switch conducts the series midpoint of the measuring resistors to the midpoint of the buses.

7. The bus balance method in the power-on static state according to claim 1, characterized in that, The symmetric compensation network adopts a power supply network, and the power supply network is suitable for compensating the voltage of one of the half-buses so that the positive and negative bus voltages are kept balanced.

8. The bus bar equalization method under power-on static state according to claim 7, characterized in that The power supply network adopts a PID unit equipped in the inverter system. The PID unit includes a PID power supply and a second bidirectional switch; one end of the PID power supply is connected to the midpoint of the buses, and the other end of the PID power supply is connected to the negative bus and the ground respectively through the second bidirectional switch. When performing PID suppression, the second bidirectional switch conducts the PID power supply to the ground. When performing bus balancing, the second bidirectional switch conducts the PID power supply to the negative bus, and then adjusts the negative half-bus voltage to be equal to the positive half-bus voltage through the PID power supply.

9. The bus equalization method under power-on static state according to claim 1, characterized in that, The symmetric compensation network adopts a compensation selection network including a power network and an impedance network; The compensation selection network is adapted to selectively connect the power network and the impedance network according to the voltage deviation between the positive and negative busbars, so as to perform balanced compensation on the half-busbar voltage or half-busbar impedance of the positive and negative busbars.

10. The bus balance method in the power-on static state according to claim 9, characterized in that, The impedance network adopts an insulation impedance detection unit equipped in the inverter system, and the power network adopts a PID unit equipped in the inverter system; The insulation impedance detection unit includes a pair of measuring resistors and a first bidirectional switch; the branch formed by the series connection of the measuring resistors is connected in parallel to the positive and negative busbars, and the series midpoint of the measuring resistors is connected to the busbar midpoint and the ground through the first bidirectional switch; The PID unit includes a PID power supply and a second bidirectional switch; one end of the PID power supply is connected to the busbar midpoint, and the other end of the PID power supply is respectively connected to the negative busbar and the ground through the second bidirectional switch; The specific process of the symmetric compensation network for balancing the busbar is as follows: Calculate the voltage deviation between the positive and negative busbars, and compare the calculated result with a set first voltage deviation threshold value and a second voltage deviation threshold value; among them, the first voltage deviation threshold value is less than the second voltage deviation threshold value; When the calculated voltage deviation is less than the set first voltage deviation threshold value, the first bidirectional switch conducts the series midpoint of the measuring resistors to the ground, and at the same time the second bidirectional switch conducts the PID power supply to the ground; When the calculated voltage deviation is greater than the set second voltage deviation threshold value, the first bidirectional switch conducts the series midpoint of the measuring resistors to the ground, and at the same time the second bidirectional switch conducts the PID power supply to the negative busbar; When the calculated voltage deviation is between the first voltage deviation threshold value and the second voltage deviation threshold value, if the voltage deviation calculated at the previous moment is less than the set first voltage deviation threshold value, the first bidirectional switch conducts the series midpoint of the measuring resistors to the busbar midpoint, and at the same time the second bidirectional switch conducts the PID power supply to the ground; Otherwise, the first bidirectional switch conducts the series midpoint of the measuring resistors to the ground, and at the same time the second bidirectional switch conducts the PID power supply to the negative busbar.

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