High breakdown voltage rectification chip and preparation method thereof

Abstract

The invention relates to the technical field of semiconductors, and particularly discloses a high-breakdown-voltage rectification chip and a preparation method thereof.The high-breakdown-voltage rectification chip comprises a silicon substrate, an AlN layer, a GaN layer and an AlGaN layer which are sequentially stacked from bottom to top; the AlGaN layer is further provided with a Schottky contact metal electrode, a p-AlN layer, an Al2O3 layer and an ohmic contact metal electrode which are sequentially adjacently arranged in the horizontal direction, and the Schottky contact metal electrode covers the top of the p-AlN layer and is connected with one side of the Al2O3 layer; according to the high-breakdown-voltage rectification chip, the Schottky contact metal electrode covers the top of the p-AlN layer and is connected with one side of the Al2O3 layer, and the layout mode is beneficial for forming uniform electric field distribution, dispersing the electric field, relieving the crowding phenomenon of the electric field and improving the breakdown voltage of the chip.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a high breakdown voltage rectifier chip and a preparation method thereof. Background Art

[0002] Among the third-generation semiconductor materials, gallium nitride (GaN) is significantly superior to traditional silicon and gallium arsenide materials due to its wide bandgap characteristics of 3.4eV, high critical breakdown electric field (theoretical value of 8MV / cm) and excellent electron mobility (up to 900cm² / V·s at room temperature). Its wide bandgap characteristics make the intrinsic carrier concentration extremely low, which can achieve ultra-low leakage current. At the same time, it has strong chemical stability and outstanding radiation resistance, providing an ideal material basis for high-frequency and high-power devices.

[0003] However, the current breakdown voltage of GaN Schottky diodes is generally low, which largely restricts their performance and application expansion in high-power applications. Especially in application scenarios with high requirements for breakdown voltage, such as when used as a voltage rectifier chip, the performance of existing GaN Schottky diodes is often difficult to meet the requirements. Therefore, how to improve the breakdown voltage of GaN Schottky diodes has become a key issue that needs to be solved by technicians in this field.

[0004] There is currently no effective technical solution to the above problems. Summary of the invention

[0005] The purpose of the present application is to provide a high breakdown voltage rectifier chip and a preparation method thereof, so as to improve the breakdown voltage of a gallium nitride Schottky diode used as a voltage rectifier chip.

[0006] In the first aspect, the present application provides a high breakdown voltage rectifier chip, comprising a silicon substrate, an AlN layer, a GaN layer and an AlGaN layer stacked in sequence from bottom to top, the AlGaN layer is also provided with a Schottky contact metal electrode, a p-AlN layer, an Al2O3 layer and an ohmic contact metal electrode arranged adjacent to each other in sequence along a horizontal direction, wherein the Schottky contact metal electrode covers the top of the p-AlN layer and is connected to one side of the Al2O3 layer.

[0007] The high breakdown voltage rectifier chip of the present application is provided with a Schottky contact metal electrode, a p-AlN layer, an Al2O3 layer and an ohmic contact metal electrode which are adjacent to each other in sequence on the AlGaN layer, and the Schottky contact metal electrode covers the top of the p-AlN layer and is connected to one side of the Al2O3 layer. This layout method helps to form a uniform electric field distribution, disperse the electric field, alleviate the electric field crowding phenomenon, and improve the breakdown voltage of the chip.

[0008] The described high breakdown voltage rectifier chip, wherein the thickness of the AlN layer is 1-2 μm, the thickness of the GaN layer is 2-4 μm, and the thickness of the AlGaN layer is 20-30 nm.

[0009] By designing the thickness ranges of the AlN layer, GaN layer, and AlGaN layer in this example, it is possible to ensure that the prepared high breakdown voltage rectifier chip has excellent performance, achieving a balance between device performance and production efficiency, ensuring that the prepared high breakdown voltage rectifier chip has excellent performance, realizing high breakdown voltage and low leakage current, and meeting the requirements of high-power applications.

[0010] The described high breakdown voltage rectifier chip, wherein the length of the p-AlN layer in the horizontal direction is 8-10 μm, and the thickness is 15-25 nm.

[0011] In this example, the length of the p-AlN layer in the above horizontal direction is designed to be 8-10 μm, which can ensure that the size of the p-AlN layer matches the electric field interaction region, effectively control the electric field distribution, avoid the problem that the length is too short to fully cover the region where the electric field is prone to concentration, and at the same time avoid the problems of introducing unnecessary resistance or increasing process complexity due to too long a length.

[0012] The described high breakdown voltage rectifier chip, wherein the ohmic contact metal electrode is composed of one or more layers of Cr, Ti, Al, Au, Ag, Pt, Ni laminated together.

[0013] The described high breakdown voltage rectifier chip, wherein the Schottky contact metal electrode is composed of one or two layers of Ni and Au laminated together.

[0014] The described high breakdown voltage rectifier chip, wherein the length of the ohmic contact metal electrode in the horizontal direction is 8-10 μm, and the thickness is 30-35 nm.

[0015] The described high breakdown voltage rectifier chip, wherein the length of the part of the Schottky contact metal electrode covering the p-AlN layer in the horizontal direction is 8-10 μm, and the thickness is 10-15 nm, and the length of the part of the Schottky contact metal electrode not covering the p-AlN layer in the horizontal direction is 8-10 μm, and the thickness is 30-35 nm.

[0016] The described high breakdown voltage rectifier chip, wherein the length of the Al2O3 layer in the horizontal direction is 10-15 μm.

[0017] The described high breakdown voltage rectifier chip, wherein the top surfaces of the Schottky contact metal electrode, the Al2O3 layer, and the ohmic contact metal electrode are flush.

[0018] In a second aspect, the present application also provides a method for manufacturing a high breakdown voltage rectifier chip, the method comprising the following steps: S1. Prepare a silicon substrate, and sequentially grow an AlN layer, a GaN layer, and an AlGaN layer upward on the silicon substrate; S2. Grow a p-AlN layer on the AlGaN layer; S3. Deposit an Al2O3 layer on the AlGaN layer and connect it to one side of the p-AlN layer; S4. Fabricate an ohmic contact metal electrode on the AlGaN layer, and connect the ohmic contact metal electrode to the side of the Al2O3 layer facing away from the p-AlN layer; S5. Fabricate a Schottky contact metal electrode on the AlGaN layer, connect the Schottky contact metal electrode to the other side of the p-AlN layer and cover the top of the p-AlN layer, and connect it to the Al2O3 layer.

[0019] The high breakdown voltage rectifier chip obtained by the method for manufacturing a high breakdown voltage rectifier chip of the present application is provided with a Schottky contact metal electrode, a p-AlN layer, an Al2O3 layer, and an ohmic contact metal electrode that are sequentially adjacent on the AlGaN layer, and the Schottky contact metal electrode covers the top of the p-AlN layer and is connected to one side of the Al2O3 layer. This layout helps to form a uniform electric field distribution, disperse the electric field, relieve the electric field congestion phenomenon, and improve the breakdown voltage of the chip.

[0020] As can be seen from the above, the present application provides a high breakdown voltage rectifier chip and a method for manufacturing the same. Among them, the high breakdown voltage rectifier chip is provided with a Schottky contact metal electrode, a p-AlN layer, an Al2O3 layer, and an ohmic contact metal electrode that are sequentially adjacent on the AlGaN layer, and the Schottky contact metal electrode covers the top of the p-AlN layer and is connected to one side of the Al2O3 layer. This layout helps to form a uniform electric field distribution, disperse the electric field, relieve the electric field congestion phenomenon, and improve the breakdown voltage of the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a schematic structural diagram of a high breakdown voltage rectifier chip provided by an embodiment of the present application.

[0022] Figure 2 It is a flowchart of a method for manufacturing a high breakdown voltage rectifier chip provided by an embodiment of the present application.

[0023] Figure 3 It is a flow effect diagram of a method for manufacturing a high breakdown voltage rectifier chip provided by an embodiment of the present application.

[0024] Reference numerals: 1, silicon substrate; 2, AlN layer; 3, GaN layer; 4, AlGaN layer; 5, Schottky contact metal electrode; 6, p-AlN layer; 7, Al2O3 layer; 8, ohmic contact metal electrode. Detailed implementation manners

[0025] The following details the implementation manners of the present invention. Examples of the implementation manners are shown in the drawings, where the same or similar reference numerals indicate the same or similar elements or elements with the same or similar functions throughout. The implementation manners described below with reference to the drawings are exemplary and are only used to explain the present invention and should not be construed as a limitation of the present invention.

[0026] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. This is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of the present invention. In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the said features. In the description of the present invention, "a plurality" means two or more unless otherwise specifically defined.

[0027] In the description of the present invention, it should be noted that unless otherwise clearly specified and defined, the terms "mounted", "connected", "coupled" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection, an electrical connection, or a connection that can communicate with each other; it may be directly connected, or indirectly connected through an intermediate medium, and it may be the internal communication of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0028] In the present invention, unless otherwise clearly defined and limited, the first feature being "on" or "under" the second feature may include direct contact between the first and second features, or may include indirect contact between the first and second features through additional features therebetween. Moreover, the first feature being "above", "over" and "on top of" the second feature includes the first feature being directly above and obliquely above the second feature, or merely indicating that the horizontal height of the first feature is higher than that of the second feature. The first feature being "under", "beneath" and "underneath" the second feature includes the first feature being directly below and obliquely below the second feature, or merely indicating that the horizontal height of the first feature is lower than that of the second feature.

[0029] The following disclosure provides many different embodiments or examples for implementing different structures of the present invention. To simplify the disclosure of the present invention, components and settings of specific examples are described below. Of course, they are merely examples and are not intended to limit the present invention. In addition, the present invention may repeat reference numerals and / or reference letters in different examples. Such repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between various embodiments and / or settings discussed. In addition, the present invention provides examples of various specific processes and materials, but those of ordinary skill in the art may be aware of the application of other processes and / or the use of other materials.

[0030] In a first aspect, please refer to Figure 1 , some embodiments of the present application provide a high breakdown voltage rectifier chip, including a silicon substrate 1, an AlN layer 2, a GaN layer 3, and an AlGaN layer 4 stacked in sequence from bottom to top. The AlGaN layer 4 is further provided with a Schottky contact metal electrode 5, a p-AlN layer 6, an Al2O3 layer 7, and an ohmic contact metal electrode 8 adjacently arranged in sequence along a horizontal direction. Among them, the Schottky contact metal electrode 5 covers the top of the p-AlN layer 6 and is connected to one side of the Al2O3 layer 7.

[0031] Specifically, for the high breakdown voltage rectifier chip, the silicon substrate 1 is used as a support structure, and the AlN layer 2, the GaN layer 3, and the AlGaN layer 4 are sequentially grown thereon to form a thin film stack structure. Among them, the silicon substrate 1 is preferably a high-resistance silicon substrate.

[0032] More specifically, in this thin film stack structure, the AlN layer 2 serves as a transition layer to improve the growth quality of the GaN layer 3 on the silicon substrate 1. The GaN layer 3 is the active layer of the device, and the AlGaN layer 4 can provide a two-dimensional electron gas.

[0033] More specifically, a Schottky contact metal electrode 5, a p-AlN layer 6, an Al2O3 layer 7, and an ohmic contact metal electrode 8 are fabricated adjacent to each other along the horizontal direction on the surface of the AlGaN layer 4. Among them, the introduction of the p-AlN layer 6 realizes the optimization of the internal electric field distribution of the chip, thereby alleviating the electric field crowding phenomenon. Specifically, when the high breakdown voltage rectifier chip works, the electric field is easily concentrated in the edge region of the Schottky contact metal electrode 5, resulting in electric field crowding and reducing the breakdown voltage of the device. The high breakdown voltage rectifier chip of the embodiment of the present application introduces a p-AlN layer 6 covered by the Schottky contact metal electrode 5 at the top as a transition layer between the edge region of the ohmic contact metal electrode 8 and the AlGaN layer 4. The p-type doped AlN layer 2 can deplete the electrons on the surface of the AlGaN layer 4, form a depletion region, change the barrier height and electric field distribution, and can effectively regulate the electric field distribution. Secondly, the Schottky contact metal electrode 5 covers the top of the p-AlN layer 6, increasing the Schottky contact area and reducing the contact resistance. In addition, the high breakdown voltage rectifier chip of the embodiment of the present application further sets an Al2O3 layer 7 as the isolation between the Schottky contact metal electrode 5 and the ohmic contact metal electrode 8, which can further reduce the formation of leakage current.

[0034] The high breakdown voltage rectifier chip of the embodiment of the present application arranges the Schottky contact metal electrode 5, the p-AlN layer 6, the Al2O3 layer 7, and the ohmic contact metal electrode 8 adjacent to each other in sequence on the AlGaN layer 4, and makes the Schottky contact metal electrode 5 cover the top of the p-AlN layer 6 and connect to one side of the Al2O3 layer 7. This layout helps to form a uniform electric field distribution, disperse the electric field, alleviate the electric field crowding phenomenon, and improve the breakdown voltage of the chip.

[0035] It should be noted that Figure 1 and Figure 3 are only used to show the connection relationship of the layer structure and are not used to show the thickness relationship of the layer structure.

[0036] In some preferred embodiments, the thickness of the AlN layer 2 is 1 - 2 μm, the thickness of the GaN layer 3 is 2 - 4 μm, and the thickness of the AlGaN layer 4 is 20 - 30 nm.

[0037] Specifically, the thickness of the AlN layer 2 is designed to be 1-2 μm. As a transition layer between the silicon substrate 1 and the GaN layer 3, the AlN layer 2 can effectively play a buffering role, ensuring the quality of the subsequent epitaxial growth of the GaN layer 3, and thus improving the device performance; the thickness of the GaN layer 3 is designed to be 2-4 μm. As the core functional layer of the device, the GaN layer 3 can balance the material growth cost and efficiency while ensuring the device performance; the thickness of the GaN layer 3 is designed to be 2-4 μm. As the core functional layer of the device, the GaN layer 3 can balance the material growth cost and efficiency while ensuring the device performance; the thickness of the AlGaN layer 4 is designed to be 20-30 nm, which can ensure the two-dimensional electron gas concentration while avoiding the decline of material quality caused by excessive stress.

[0038] More specifically, thus, by designing the thickness ranges of the AlN layer 2, the GaN layer 3, and the AlGaN layer 4, it can be ensured that the prepared high breakdown voltage rectifier chip has excellent performance, can achieve a balance between ensuring device performance and production efficiency, ensure that the prepared high breakdown voltage rectifier chip has excellent performance, realize high breakdown voltage and low leakage current, and meet the requirements of high-power applications.

[0039] In some preferred embodiments, the thickness of the Al2O3 layer 7 is 30-35 nm.

[0040] In some preferred embodiments, the length of the p-AlN layer 6 in the above horizontal direction is 8-10 μm, and the thickness is 15-25 nm.

[0041] Specifically, the length of the p-AlN layer 6 in the above horizontal direction is designed to be 8-10 μm, which can ensure that the size of the p-AlN layer 6 matches the electric field interaction region, realize the effective control of the electric field distribution, avoid the problem that the length is too short to fully cover the region where the electric field is prone to concentration, and at the same time avoid the problem that the length is too long to introduce unnecessary resistance or increase the process complexity.

[0042] More specifically, the thickness of the p-AlN layer 6 is designed to be 15-25 nm to ensure the desired doping concentration and depletion region width in the p-AlN layer 6, and thus realize effective electric field modulation, avoiding that the thickness is too small to provide enough doping to effectively modulate the electric field, and also avoiding that the thickness is too large may lead to an increase in series resistance or other adverse effects. Therefore, the thickness range of 15-25 nm can minimize the impact on other performance parameters of the device while ensuring the electric field modulation effect.

[0043] More specifically, in the embodiment of the present application, the thickness of the p-AlN layer 6 is preferably 20 nm.

[0044] In some preferred embodiments, the material of the ohmic contact metal electrode 8 is formed by laminating one or more of Cr, Ti, Al, Au, Ag, Pt, and Ni.

[0045] Specifically, these materials or laminated combinations have the characteristic of forming good ohmic contact with semiconductor materials. By selecting these materials as the ohmic contact metal electrode 8, the contact resistance can be effectively reduced, and the effective injection and extraction of current can be ensured. Thus, the overall performance and working efficiency of the rectifier chip can be improved. Among them, a single-layer or multi-layer laminated structure can be flexibly selected according to actual needs.

[0046] In some preferred embodiments, the Schottky contact metal electrode 5 is formed by laminating one or two of Ni and Au.

[0047] Specifically, the high work function of Ni (4.6 eV) can form a relatively high Schottky barrier, effectively suppressing reverse leakage current and increasing the breakdown voltage. In the bilayer laminated structure of Ni and Au, Au as the top metal not only enhances conductivity but also protects the underlying metal (such as Ni) from environmental erosion through its oxidation resistance, thereby maintaining the stability of the electrode. This laminated design takes into account both electrical performance and process reliability, and is particularly suitable for the long-term stable operation requirements of high-frequency and high-power devices.

[0048] In some preferred embodiments, the length of the ohmic contact metal electrode 8 in the above horizontal direction is 8 - 10 μm, and the thickness is 30 - 35 nm.

[0049] Specifically, the length dimension of the ohmic contact metal electrode 8 is designed within the range of 8 - 10 μm, which can ensure the effective transmission of current and reduce the contact resistance. Its thickness dimension is designed within the range of 30 - 35 nm, which can provide sufficient metal volume for current conduction and ensure the mechanical stability of the metal electrode, preventing delamination or failure.

[0050] In some preferred embodiments, the length of the part of the Schottky contact metal electrode 5 covering the p-AlN layer 6 in the above horizontal direction is 8 - 10 μm, and the thickness is 10 - 15 nm. The length of the part of the Schottky contact metal not covering the p-AlN layer 6 in the above horizontal direction is 8 - 10 μm, and the thickness is 30 - 35 nm.

[0051] Specifically, the length of the portion of the Schottky contact metal electrode 5 covering the p-AlN layer 6 in the horizontal direction is equal to the length of the p-AlN layer 6 in the horizontal direction, and this length dimension accurately controls the electric field distribution above the p-AlN layer 6; the thickness of the portion of the Schottky contact metal electrode 5 covering the p-AlN layer 6 is designed to be 10-15nm, so its thickness is less than or equal to the thickness of the p-AlN layer 6, and the thinner thickness helps to achieve a specific electric field modulation effect in this area.

[0052] More specifically, the thickness of the portion of the Schottky contact metal not covering the p-AlN layer 6 is designed to be 30-35 nm. This relatively thick thickness is intended to improve the conductivity and contact reliability of the Schottky contact metal and ensure effective current diffusion and stable transmission.

[0053] More specifically, the sizes of different areas of the Schottky contact metal are finely defined, thereby more effectively optimizing the electric field distribution, alleviating the electric field crowding phenomenon, and thereby improving the overall performance of the high breakdown voltage rectifier chip.

[0054] In some preferred embodiments, the length of the Al2O3 layer 7 in the horizontal direction is 10-15 μm.

[0055] Specifically, the Al2O3 layer 7 is an insulating layer used to isolate the Schottky contact metal electrode 5 and the ohmic contact metal electrode 8, and is mainly used to disperse the electric field, thereby reducing the electric field concentration at the edge of the Schottky contact metal electrode 5. Its length is designed to be 10-15μm to ensure sufficient insulation performance, so that the electric field concentration problem can be effectively alleviated.

[0056] In some preferred embodiments, the top surfaces of the Schottky contact metal electrode 5 , the Al 2 O 3 layer 7 and the ohmic contact metal electrode 8 are flush.

[0057] Specifically, the flush top surfaces of the above three can make the top surface of the high breakdown voltage rectifier chip in the embodiment of the present application flat, and can avoid the generation of obvious steps at the junction of the Schottky contact metal electrode 5, the Al2O3 layer 7 and the ohmic contact metal electrode 8, so as to eliminate the tip effect, thereby solving the problem of excessive concentration of electric field lines caused by the tip effect and reducing the breakdown voltage of the device, thereby improving the uniformity of the electric field distribution of the device and improving the overall breakdown voltage performance of the device.

[0058] Second, please refer to Figure 2 and Figure 3 Some embodiments of the present application also provide a method for preparing a high breakdown voltage rectifier chip, the method comprising the following steps: S1, preparing a silicon substrate 1, and sequentially growing an AlN layer 2, a GaN layer 3 and an AlGaN layer 4 upward on the silicon substrate 1; S2, growing a p-AlN layer 6 on the AlGaN layer 4; S3, depositing an Al2O3 layer 7 on the AlGaN layer 4 to connect to one side of the p-AlN layer 6; S4, manufacturing an ohmic contact metal electrode 8 on the AlGaN layer 4, wherein the ohmic contact metal electrode 8 is connected to a side of the Al2O3 layer 7 away from the p-AlN layer 6; S5. A Schottky contact metal electrode 5 is fabricated on the AlGaN layer 4. The Schottky contact metal electrode 5 is connected to the other side of the p-AlN layer 6 and covers the top of the p-AlN layer 6, and is connected to the Al2O3 layer 7.

[0059] The high breakdown voltage rectifier chip manufactured by the preparation method of the embodiment of the present application is provided with a Schottky contact metal electrode 5, a p-AlN layer 6, an Al2O3 layer 7 and an ohmic contact metal electrode 8 which are adjacent to each other in sequence on the AlGaN layer 4, and the Schottky contact metal electrode 5 covers the top of the p-AlN layer 6 and is connected to one side of the Al2O3 layer 7. This layout method helps to form a uniform electric field distribution, disperse the electric field, alleviate the electric field crowding phenomenon, and improve the breakdown voltage of the chip.

[0060] In some preferred embodiments, in step S1 , the AlN layer 2 , the GaN layer 3 and the AlGaN layer 4 are formed by deposition and growth based on MOCVD equipment.

[0061] In some preferred embodiments, in step S2 , the p-AlN layer 6 is formed by deposition growth based on MOCVD equipment.

[0062] In some preferred embodiments, in step S3, the Al2O3 layer 7 is formed based on electron beam evaporation deposition.

[0063] In some preferred embodiments, in step S4, the ohmic contact metal electrode 8 is deposited based on electron beam evaporation and annealed in a N2 atmosphere at 850°C for 30 seconds.

[0064] In some preferred embodiments, in step S5, the Schottky contact metal electrode 5 is fabricated by photolithography and electron beam evaporation deposition.

[0065] In some preferred embodiments, in step S5 , the Schottky contact metal electrode 5 is directly deposited on the AlGaN layer 4 and the p-AlN layer 6 .

[0066] In some preferred embodiments, the AlGaN layer 4 is in direct contact with the GaN layer 3 to form a van der Waals heterojunction.

[0067] In some preferred embodiments, the method for preparing the high breakdown voltage rectifier chip according to the embodiments of the present application is used to prepare the high breakdown voltage rectifier chip provided in the first aspect above.

[0068] To more clearly describe the step flow of the method for preparing the high breakdown voltage rectifier chip according to the embodiments of the present application, the following description will be made in conjunction with some specific embodiments.

[0069] Embodiment 1 The method for preparing the high breakdown voltage rectifier chip provided in this embodiment includes the following steps: (1) Take an epitaxial high-resistance silicon substrate with a thickness of 500 μm, and use MOCVD equipment to grow an AlN layer 2, a GaN layer, and an AlGaN layer on the high-resistance silicon substrate to obtain an epitaxial wafer; wherein, the thickness of the AlN layer 2 is 1 μm, the thickness of the GaN layer 3 is 2 μm, and the thickness of the AlGaN layer 4 is 25 nm; (2) Grow a p-AlN layer 6 with a length of 8 μm and a thickness of 20 μm on the AlGaN layer 4 through MOCVD equipment.

[0070] (3) Electron beam evaporate and deposit an Al2O3 layer 7 on the AlGaN layer 4 that is connected to one side of the p-AlN layer 6; (4) Electron beam evaporate and deposit an ohmic contact metal electrode at the ohmic contact. Its structure is a multi-metal layer composed of 3 nm Ti, 6 nm Al, 6 nm Ni, and 20 nm Au stacked in sequence from bottom to top. Then, anneal for 30 seconds in an N2 atmosphere at 850 °C to prepare an ohmic contact metal electrode 8 with a length of 9 μm; (5) Prepare a Schottky contact metal electrode 5 through photolithography and electron beam evaporation at the Schottky contact. The left part of its structure (the part not covering the p-AlN layer 6) is a double-metal layer composed of 9 nm Ni and 26 nm Au stacked from bottom to top, with a length of 9 μm and a thickness of 35 nm. The right part of its structure (the part covering the p-AlN layer 6) is a double-metal layer composed of 3 nm Ni and 12 nm Au stacked from bottom to top, with a length of 9 μm.

[0071] Embodiment 2 The method for preparing the high breakdown voltage rectifier chip provided in this embodiment includes the following steps: (1) Take an epitaxial high-resistance silicon substrate with a thickness of 500 μm, and use MOCVD equipment to grow an AlN layer 2, a GaN layer, and an AlGaN layer on the high-resistance silicon substrate to obtain an epitaxial wafer; wherein, the thickness of the AlN layer 2 is 1 μm, the thickness of the GaN layer 3 is 2 μm, and the thickness of the AlGaN layer 4 is 25 nm; (2) Grow a p-AlN layer 6 with a length of 8 μm and a thickness of 20 μm on the AlGaN layer 4 through MOCVD equipment.

[0072] (3) An Al2O3 layer 7 connected to one side of the p-AlN layer 6 is formed by electron beam evaporation and deposition on the AlGaN layer 4; (4) An ohmic contact metal electrode is deposited by electron beam evaporation at the ohmic contact. Its structure is a multi-metal layer composed of 3 nm Ti, 6 nm Al, 6 nm Ni, and 20 nm Au stacked in sequence from bottom to top. Then, it is annealed for 30 seconds in an N2 atmosphere at 850 °C to prepare an ohmic contact metal electrode 8. The length of the ohmic contact metal electrode 8 is 9 μm; (5) A Schottky contact metal electrode 5 is prepared by photolithography and electron beam evaporation at the Schottky contact. The structure of its left part (the part not covering the p-AlN layer 6) is a double-metal layer composed of 8 nm Ni and 27 nm Au stacked from bottom to top, with a length of 9 μm and a thickness of 35 nm. The structure of its right part (the part covering the p-AlN layer 6) is a double-metal layer composed of 4 nm Ni and 11 nm Au stacked from bottom to top, with a length of 9 μm.

[0073] In the description of this specification, the description with reference to terms such as "one embodiment", "certain embodiments", "schematic embodiments", "examples", "specific examples", or "some examples", etc. means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.

[0074] The above are only some embodiments of the present invention. For those of ordinary skill in the art, without departing from the inventive concept of the present invention, several modifications and improvements can still be made, and these all belong to the protection scope of the present invention.

Claims

1. A high breakdown voltage rectifier chip, characterized in that: It includes a silicon substrate, an AlN layer, a GaN layer and an AlGaN layer stacked in sequence from bottom to top, the AlGaN layer is also provided with a Schottky contact metal electrode, a p-AlN layer, an Al2O3 layer and an ohmic contact metal electrode arranged adjacent to each other in sequence along a horizontal direction, wherein the Schottky contact metal electrode covers the top of the p-AlN layer and is connected to one side of the Al2O3 layer.

2. The high breakdown voltage rectifier chip according to claim 1, characterized in that: The thickness of the AlN layer is 1-2 μm, the thickness of the GaN layer is 2-4 μm, and the thickness of the AlGaN layer is 20-30 nm.

3. The high breakdown voltage rectifier chip according to claim 1, characterized in that: The p-AlN layer has a length of 8-10 μm in the horizontal direction and a thickness of 15-25 nm.

4. The high breakdown voltage rectifier chip according to claim 1, characterized in that: The ohmic contact metal electrode is formed by stacking one or more of Cr, Ti, Al, Au, Ag, Pt, and Ni.

5. The high breakdown voltage rectifier chip according to claim 1, characterized in that: The Schottky contact metal electrode is formed by stacking one or two of Ni and Au.

6. The high breakdown voltage rectifier chip according to claim 1, characterized in that: The ohmic contact metal electrode has a length of 8-10 μm in the horizontal direction and a thickness of 30-35 nm.

7. The high breakdown voltage rectifier chip according to claim 1, characterized in that: The length of the portion of the Schottky contact metal electrode covering the p-AlN layer in the horizontal direction is 8-10 μm and the thickness is 10-15 nm, and the length of the portion of the Schottky contact metal electrode not covering the p-AlN layer in the horizontal direction is 8-10 μm and the thickness is 30-35 nm.

8. The high breakdown voltage rectifier chip according to claim 1, characterized in that: The length of the Al2O3 layer in the horizontal direction is 10-15 μm.

9. The high breakdown voltage rectifier chip according to claim 1, characterized in that: The top surfaces of the Schottky contact metal electrode, the Al2O3 layer and the ohmic contact metal electrode are flush.

10. A method for preparing a high breakdown voltage rectifier chip, characterized in that: The method comprises the following steps: S1, preparing a silicon substrate, and sequentially growing an AlN layer, a GaN layer and an AlGaN layer upward on the silicon substrate; S2, growing a p-AlN layer on the AlGaN layer; S3, depositing an Al2O3 layer on the AlGaN layer to connect to one side of the p-AlN layer; S4, making an ohmic contact metal electrode on the AlGaN layer, wherein the ohmic contact metal electrode is connected to a side of the Al2O3 layer away from the p-AlN layer; S5. Fabricate a Schottky contact metal electrode on the AlGaN layer, wherein the Schottky contact metal electrode is connected to the other side of the p-AlN layer and covers the top of the p-AlN layer, and is connected to the Al2O3 layer.

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