Manufacturing method of GaN HEMT device
Through the local annealing method, only the source and drain metal layers are treated at high temperature to avoid thermal diffusion of the gate metal layer, solving the problem of increasing forward leakage of the gate and improving the performance and reliability of GaN HEMT devices.
Patent Information
- Application Number
- CN202311831540.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-27
- Publication Date
- 2025-07-01
AI Technical Summary
In the prior art, during the manufacturing process of GaN HEMT devices, the gate metal layer exposed to a high temperature environment causes heat diffusion, increasing the gate forward leakage and reducing device performance.
The local annealing method is adopted to perform high-temperature annealing on the source metal layer and the drain metal layer. The gate metal layer is not affected by heat. The heat is isolated by using a high-thermal resistance layer or laser annealing method to prevent the gate metal layer from diffusing to the PGaN cap layer.
It effectively reduces the forward leakage level of the gate and improves the performance and reliability of the device.
Smart Images
Figure CN120239291A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of semiconductor technology and relates to a manufacturing method of a GaN HEMT device. Background Art
[0002] Gallium nitride high electron mobility transistors (GaN HEMTs) have high breakdown electric fields and low on-resistances, and at the same time, have great application prospects in radio frequency, microwave, and power conversion circuits. Among them, the P-type gate technology is the main method for realizing enhancement-mode GaN HEMT devices, which has the advantages of strong process controllability and large-scale repeatable production, and is the mainstream technology adopted by commercial products. As Figure 1 shown, it is a schematic structural diagram of a P-type gate GaN HEMT device. There is a high-concentration two-dimensional electron gas (2DEG) naturally at the interface between the GaN channel layer 3 and the AlGaN barrier layer 4. A PGaN cap layer 5 is formed on the AlGaN barrier layer 4 to deplete the 2DEG in the gate region, realizing a normally-off (enhancement-mode) device. Among them, the gate metal layer 6 is located on the PGaN cap layer 5, and the source metal layer 8 and the drain metal layer 9 are located on the AlGaN barrier layer 4 and are disposed on both sides of the PGaN cap layer 5.
[0003] During the manufacturing process, the first-gate process is usually adopted to manufacture low-voltage GaN HEMT devices, that is, the gate contact structure is completed first, and then the patterning and annealing processes of the source-drain ohmic contacts are carried out. As Figure 2 shown, through the annealing process, the source metal layer 8 thermally diffuses into the AlGaN barrier layer 4 to reduce the interface contact resistance and form an ohmic structure, and the drain metal layer 9 thermally diffuses into the AlGaN barrier layer 4 to reduce the interface contact resistance and form an ohmic structure. However, during annealing, the gate metal layer 6 is exposed to a high-temperature environment, resulting in the diffusion of the gate metal layer 6 into the PGaN cap layer 5, causing an increase in the forward leakage current of the gate and limiting the device performance.
[0004] Therefore, how to provide a manufacturing method of a GaN HEMT device to reduce the forward leakage current of the gate and improve the device performance has become a technical problem that needs to be solved urgently by those skilled in the art. Summary of the Invention
[0005] In view of the above-mentioned disadvantages of the prior art, the purpose of the present invention is to provide a manufacturing method of a GaN HEMT device to solve the problems of increased forward leakage current of the gate and low device performance in the prior art.
[0006] To achieve the above purpose and other related purposes, the present invention provides a manufacturing method of a GaN HEMT device, including the following steps:
[0007] Provide a substrate, on which a GaN channel layer and an AlGaN barrier layer are stacked from bottom to top. Among them, a PGaN cap layer is formed on the AlGaN barrier layer, and a gate metal layer is formed on the PGaN cap layer;
[0008] Form a source metal layer and a drain metal layer on the AlGaN barrier layer. In the horizontal direction, the source metal layer and the drain metal layer are respectively disposed on both sides of the PGaN cap layer;
[0009] Perform local annealing. During the annealing process, the source metal layer and the drain metal layer are within the annealing temperature range, so that an ohmic contact is formed between the source metal layer and the AlGaN barrier layer, and an ohmic contact is formed between the drain metal layer and the AlGaN barrier layer, and the gate metal layer is not within the annealing temperature range.
[0010] Optionally, rapid thermal annealing is used for annealing. Before annealing, it further includes the step of forming a high thermal resistance layer on the AlGaN barrier layer. The high thermal resistance layer covers the gate metal layer, and the high thermal resistance layer does not cover the source metal layer and the drain metal layer. Among them, the thermal conductivity of the high thermal resistance layer does not exceed 30 W / (m·K).
[0011] Optionally, the material of the high thermal resistance layer includes SiO2. The step of forming the high thermal resistance layer includes:
[0012] Form a high thermal resistance material layer on the AlGaN barrier layer by deposition method. The high thermal resistance material layer covers the gate metal layer, the source metal layer and the drain metal layer;
[0013] Pattern the high thermal resistance material layer by etching method to form the high thermal resistance layer.
[0014] Optionally, laser annealing is used for annealing. A patterned mask is provided between the laser light source and the electrode metal layer. The mask includes an absorption area and a penetrable area. The projection of the absorption area on the substrate covers the gate metal layer, and the projection of the penetrable area on the substrate covers the source metal layer and the drain metal layer.
[0015] Optionally, the material of the absorption area includes Cr, and the material of the penetrable area includes SiO2.
[0016] Optionally, before forming the source metal layer and the drain metal layer, it further includes the step of forming a passivation layer. The passivation layer covers the exposed surface of the AlGaN barrier layer. Among them, the source metal layer penetrates through the passivation layer and is electrically connected to the AlGaN barrier layer, and the drain metal layer penetrates through the passivation layer and is electrically connected to the AlGaN barrier layer.
[0017] Optionally, the material of the passivation layer includes SiN.
[0018] Optionally, the annealing temperature range is 500 to 900 degrees Celsius.
[0019] Optionally, a buffer layer is formed between the substrate and the GaN channel layer.
[0020] Optionally, the substrate includes a silicon substrate, a silicon carbide substrate, or a sapphire substrate.
[0021] As described above, in the manufacturing method of the GaN HEMT device of the present invention, local annealing is performed during annealing, and the source metal layer and the drain metal layer regions are annealed to achieve source ohmic contact and drain ohmic contact, while the gate metal layer region is not annealed, which can effectively reduce the thermal diffusion of the gate metal layer to the PGaN cap layer, thereby reducing the forward leakage level of the gate and improving the device performance and reliability. Description of the Drawings
[0022] Figure 1 It shows a schematic structural diagram of a P-type gate GaN HEMT device.
[0023] Figure 2 It shows a schematic diagram of the P-type gate GaN HEMT device after high-temperature annealing.
[0024] Figure 3 It shows a process flow chart of the manufacturing method of the GaN HEMT device of the present invention.
[0025] Figure 4 It shows a schematic diagram of forming a gate metal layer on the PGaN cap layer in the first embodiment of the present invention.
[0026] Figure 5 It shows a schematic diagram of forming a source metal layer and a drain metal layer in the first embodiment of the present invention.
[0027] Figure 6 It shows a schematic diagram of forming a high thermal resistance layer in the first embodiment of the present invention.
[0028] Figure 7 It shows a schematic diagram of high-temperature annealing in the first embodiment of the present invention.
[0029] Figure 8 It shows a schematic diagram of high-temperature annealing in the second embodiment of the present invention.
[0030] Description of Component Labels
[0031] 1 Substrate
[0032] 2 Buffer layer
[0033] 3 GaN channel layer
[0034] 4 AlGaN barrier layer
[0035] 5 PGaN cap layer
[0036] 6 Gate metal layer
[0037] 7 Passivation layer
[0038] 8 Source metal layer
[0039] 9 Drain metal layer
[0040] 10 High thermal resistance layer
[0041] 11 Laser light source
[0042] 12 Photomask
[0043] 1200 Absorption region
[0044] 1201 Penetrable region
[0045] Steps S1 to S3 Specific implementation manners
[0046] The following uses specific specific examples to illustrate the implementation manners of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
[0047] Please refer to Figures 1 to 8 . It should be noted that the drawings provided in this embodiment only illustrate the basic concept of the present invention in a schematic manner. Therefore, only the components related to the present invention are shown in the drawings, rather than being drawn according to the number, shape, and size of the components in actual implementation. The types, quantities, and proportions of the components in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.
[0048] Example 1
[0049] This embodiment provides a manufacturing method of a GaN HEMT device. Please refer to Figure 3 , which shows the process flow chart of the manufacturing method of the GaN HEMT device, including the following steps:
[0050] S1: Provide a substrate, on which a GaN channel layer and an AlGaN barrier layer are stacked from bottom to top. Among them, a PGaN cap layer is formed on the AlGaN barrier layer, and a gate metal layer is formed on the PGaN cap layer;
[0051] S2: Form a source metal layer and a drain metal layer on the AlGaN barrier layer. Horizontally, the source metal layer and the drain metal layer are disposed on both sides of the PGaN cap layer.
[0052] S3: Perform local annealing. During the annealing process, the source metal layer and the drain metal layer are within the annealing temperature range, so that an ohmic contact is formed between the source metal layer and the AlGaN barrier layer, and an ohmic contact is formed between the drain metal layer and the AlGaN barrier layer. The gate metal layer is not within the annealing temperature range.
[0053] First, please refer to Figure 4 , and perform step S1: Provide a substrate 1, on which a GaN channel layer 3 and an AlGaN barrier layer 4 are stacked from bottom to top. Among them, a PGaN cap layer 5 is formed on the AlGaN barrier layer 4, and a gate metal layer 6 is formed on the PGaN cap layer 5.
[0054] As an example, the substrate 1 can be a silicon substrate, a silicon carbide substrate, a sapphire substrate or any other suitable substrate; specifically, in this embodiment, the substrate 1 uses a silicon substrate.
[0055] As an example, a buffer layer 2 is provided between the substrate 1 and the GaN channel layer 3, which is used to reduce the problem of crystal mismatch between the GaN channel layer 3 and the substrate 1 and improve the quality of the GaN channel layer 3; specifically, in this embodiment, the buffer layer 2 uses a GaN buffer layer.
[0056] As an example, a high-concentration 2DEG naturally exists at the interface between the GaN channel layer 3 and the AlGaN barrier layer 4, and the PGaN cap layer 5 depletes the 2DEG in the gate region.
[0057] Next, please refer to Figure 5 , and perform step S2: Form a source metal layer 8 and a drain metal layer 9 on the AlGaN barrier layer 4. Horizontally, the source metal layer 8 and the drain metal layer 9 are disposed on both sides of the PGaN cap layer 5.
[0058] As an example, before forming the source metal layer 8 and the drain metal layer 9, a step of forming a passivation layer 7 is further included. The passivation layer 7 covers the exposed surface of the AlGaN barrier layer 4. Of course, the passivation layer 7 can also cover the exposed surfaces of the gate metal layer 6 and the PGaN cap layer 5. The material of the passivation layer 7 includes SiN, and the passivation layer 7 can passivate the surface defects of the AlGaN barrier layer 4 and reduce the interface leakage current.
[0059] As an example, the passivation layer 7 is etched to form a first opening and a second opening. The first opening is for the source metal layer 8 to penetrate through the passivation layer 7 and be electrically connected to the AlGaN barrier layer 4, and the second opening is for the drain metal layer 9 to penetrate through the passivation layer 7 and be electrically connected to the AlGaN barrier layer 4.
[0060] Next, please refer to Figures 6 to 7 , and perform step S3: perform local annealing. During the annealing process, the source metal layer 8 and the drain metal layer 9 are within the annealing temperature range, so that an ohmic contact is formed between the source metal layer 8 and the AlGaN barrier layer 4, and an ohmic contact is formed between the drain metal layer 9 and the AlGaN barrier layer 4. The gate metal layer 6 is not within the annealing temperature range.
[0061] As an example, in this embodiment, rapid thermal annealing is used for annealing, and the annealing temperature range is 500 - 900 °C. As Figure 6 stated, before annealing, it further includes the step of forming a high thermal resistance layer 10. The high thermal resistance layer 10 covers the gate metal layer 6, and the high thermal resistance layer 10 does not cover the source metal layer 8 and the drain metal layer 9. Specifically, the step of forming the high thermal resistance layer 10 includes:
[0062] (1) A high thermal resistance material layer is formed on the AlGaN barrier layer 10 by a deposition method. The high thermal resistance material layer covers the gate metal layer 6, the source metal layer 8, and the drain metal layer 9;
[0063] (2) The high thermal resistance material layer is patterned by an etching method to form the high thermal resistance layer 10, that is, the high thermal resistance material layer covering the regions of the source metal layer 8 and the drain metal layer 9 is etched away.
[0064] As an example, the thermal conductivity of the high thermal resistance layer 10 does not exceed 30 W / (m·K) to avoid excessive temperature of the gate metal layer 6 and thermal diffusion during subsequent high-temperature annealing. Preferably, the thermal conductivity of the high thermal resistance layer 10 does not exceed 10 W / (m·K). The smaller the thermal conductivity of the high thermal resistance layer 10, the better the thermal insulation effect on the gate metal layer 6 during the annealing process. Specifically, in this embodiment, the material of the high thermal resistance layer 10 includes SiO2. Since the passivation layer 7 is formed on the gate metal layer 6, the high thermal resistance layer 10 covers the passivation layer 7 outside the gate metal layer 6.
[0065] As an example, please refer to Figure 7, which is shown as a schematic diagram of local annealing. Since the source metal layer 8 and the drain metal layer 9 are directly exposed to a high-temperature environment, they will diffuse into the AlGaN barrier layer 4, reducing the contact resistance of the contact surface. That is, the source metal layer 8 and the AlGaN barrier layer 4 are annealed at high temperature to form an ohmic contact, and the drain metal layer 9 and the AlGaN barrier layer 4 are annealed at high temperature to form an ohmic contact.
[0066] As an example, since the high thermal resistance layer 10 is formed in the gate metal layer 6 region, the high thermal resistance layer 10 blocks the heat transfer to the gate metal layer 6, and the gate metal layer 6 will not cause thermal diffusion to the PGaN cap layer 5, reducing the forward leakage of the gate and improving the device performance.
[0067] As described above, in the manufacturing method of the GaN HEMT device of the present invention, local annealing is achieved during annealing. The source metal layer and the drain metal layer regions are annealed to achieve source ohmic contact and drain ohmic contact, and the gate metal layer region is not annealed, which can effectively reduce the thermal diffusion of the gate metal layer to the PGaN cap layer, thereby reducing the forward leakage level of the gate and improving the device performance and reliability.
[0068] Embodiment 2
[0069] This embodiment provides a manufacturing method of a GaN HEMT device. Please refer to Figure 8 , which is shown as a schematic diagram of local annealing in this embodiment. The difference from Embodiment 1 is that laser annealing is used for annealing. A patterned mask 12 is provided between the laser light source 11 and the electrode metal layer. The mask 12 includes an absorption region 1200 and a transmissive region 1201. The projection of the absorption region 1200 on the substrate 1 covers the gate metal layer 6, and the projection of the transmissive region 1201 on the substrate 1 covers the source metal layer 8 and the drain metal layer 9.
[0070] As an example, the material of the absorption region 1200 includes Cr, and the material of the transmissive region 1201 includes SiO2. When the laser emitted by the laser light source 11 passes through the transmissive region 1201, it can pass through the transmissive region 1201 to reach the source metal layer 8 and the source metal layer 9, and perform high-temperature annealing on the source metal layer 8 and the drain metal layer 9, so that the source metal layer 8 thermally diffuses into the AlGaN barrier layer 4, reducing the interface contact resistance to form an ohmic structure, and the drain metal layer 9 thermally diffuses into the AlGaN barrier layer 4, reducing the interface contact resistance to form an ohmic structure.
[0071] As an example, the laser emitted by the laser light source 11 is absorbed when passing through the absorption region 1200, and the laser cannot reach the gate metal layer 6. The gate metal layer 6 will not generate thermal diffusion to the PGaN cap layer 5, reducing the forward leakage current of the gate and improving the device performance.
[0072] In summary, in the manufacturing method of the GaN HEMT device of the present invention, local annealing is achieved during annealing. The source metal layer and the drain metal layer regions are annealed to achieve source ohmic contact and drain ohmic contact, and the gate metal layer region is not annealed, which can effectively reduce the thermal diffusion of the gate metal layer to the PGaN cap layer, thereby reducing the forward leakage current level of the gate and improving the device performance and reliability. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.
[0073] The above embodiments are only illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes completed by those with ordinary knowledge in the technical field without departing from the spirit and technical idea disclosed by the present invention should still be covered by the claims of the present invention.
Claims
1. A manufacturing method of a GaN HEMT device, characterized in that, It includes the following steps: Provide a substrate, on which a GaN channel layer and an AlGaN barrier layer are stacked from bottom to top. Among them, a PGaN cap layer is formed on the AlGaN barrier layer, and a gate metal layer is formed on the PGaN cap layer; Form a source metal layer and a drain metal layer on the AlGaN barrier layer. In the horizontal direction, the source metal layer and the drain metal layer are respectively disposed on both sides of the PGaN cap layer; Perform local annealing. During the annealing process, the source metal layer and the drain metal layer are within the annealing temperature range, so that an ohmic contact is formed between the source metal layer and the AlGaN barrier layer, and an ohmic contact is formed between the drain metal layer and the AlGaN barrier layer, and the gate metal layer is not within the annealing temperature range.
2. The manufacturing method of the GaN HEMT device according to claim 1, wherein: Use rapid thermal annealing for annealing. Before annealing, it also includes the step of forming a high thermal resistance layer on the AlGaN barrier layer. The high thermal resistance layer covers the gate metal layer, and the high thermal resistance layer does not cover the source metal layer and the drain metal layer. Among them, the thermal conductivity of the high thermal resistance layer does not exceed 30 W / (m·K).
3. The manufacturing method of the GaN HEMT device according to claim 2, wherein The material of the high thermal resistance layer includes SiO2. The step of forming the high thermal resistance layer includes: Use a deposition method to form a high thermal resistance material layer on the AlGaN barrier layer. The high thermal resistance material layer covers the gate metal layer, the source metal layer and the drain metal layer; Use an etching method to pattern the high thermal resistance material layer to form the high thermal resistance layer.
4. The manufacturing method of the GaN HEMT device according to claim 1, characterized in that: Use laser annealing for annealing. A patterned mask is provided between the laser light source and the electrode metal layer. The mask includes an absorption area and a transmissive area. The projection of the absorption area on the substrate covers the gate metal layer, and the projection of the transmissive area on the substrate covers the source metal layer and the drain metal layer.
5. The manufacturing method of the GaN HEMT device according to claim 4, characterized in that: The material of the absorption area includes Cr, and the material of the transmissive area includes SiO2.
6. The manufacturing method of the GaN HEMT device according to claim 1, characterized in that: Before forming the source metal layer and the drain metal layer, it also includes the step of forming a passivation layer. The passivation layer covers the exposed surface of the AlGaN barrier layer. Among them, the source metal layer penetrates through the passivation layer and is electrically connected to the AlGaN barrier layer, and the drain metal layer penetrates through the passivation layer and is electrically connected to the AlGaN barrier layer.
7. The manufacturing method of the GaN HEMT device according to claim 6, characterized in that: The material of the passivation layer includes SiN.
8. The manufacturing method of the GaN HEMT device according to claim 1, characterized in that: The annealing temperature range is 500 to 900 degrees Celsius.
9. The manufacturing method of the GaN HEMT device according to claim 1, characterized in that: A buffer layer is formed between the substrate and the GaN channel layer.
10. The manufacturing method of the GaN HEMT device according to claim 1, characterized in that: The substrate includes a silicon substrate, a silicon carbide substrate or a sapphire substrate.