Hybrid joint structure and display panel

By adopting hybrid bonding structure and dynamic grain offset compensation technology in the display panel, the problems of unevenness and chip displacement during the assembly process are solved, and higher display uniformity and reliability are achieved.

CN120239384APending Publication Date: 2025-07-01IND TECH RES INST
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Patent Information

Application Number
CN202311830837.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-12-27
Publication Date
2025-07-01

AI Technical Summary

Technical Problem

Existing amplified reality and hybrid reality display devices face problems such as unevenness and chip displacement during assembly, resulting in uneven display and poor reliability.

Method used

Using a hybrid bonding structure, including the first and second dielectric layers and conductors containing the silver bonding interface, the correct electrical connection between the chip and the rewiring structure is ensured through dynamic grain offset compensation technology, and the bonding stability is enhanced using a silver metal layer.

Benefits of technology

Improve the flatness and reliability of the display panel, improve the display uneven problem, and improve the reliability of the display device.

✦ Generated by Eureka AI based on patent content.

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Abstract

A hybrid bonding structure includes a first dielectric layer, a plurality of first conductors, a second dielectric layer, and a plurality of second conductors. The first conductor is embedded in the first dielectric layer, the second dielectric layer is jointed with the first dielectric layer, the second conductor is embedded in the second dielectric layer, the second conductor is jointed with the first conductor, and a joint interface of the second conductor and the first conductor is a silver-containing joint interface.
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Description

Technical Field

[0001] The present invention relates to a display panel. Background Art

[0002] In response to the applications of Augmented Reality (AR) and Mixed Reality (MR), the demand for ultra-high-resolution display panels using micro-LED chips is increasing day by day. At present, advanced display devices applied to AR and MR often face problems such as unevenness and chip displacement during assembly, which in turn lead to problems such as display Mura and poor reliability. Summary of the Invention

[0003] Embodiments of the present invention provide a hybrid bonding structure and a display panel.

[0004] A hybrid bonding structure according to an embodiment of the present invention includes a first dielectric layer, a plurality of first conductors, a second dielectric layer, and a plurality of second conductors. The first conductors are embedded in the first dielectric layer, the second dielectric layer is bonded to the first dielectric layer, and the second conductors are embedded in the second dielectric layer, wherein the second conductors are bonded to the first conductors, and the bonding interface between the second conductors and the first conductors is a silver-containing bonding interface.

[0005] Another display panel according to an embodiment of the present invention includes a hybrid bonding structure, a first redistribution layer structure, a second redistribution layer structure, a plurality of light-emitting chips, and a plurality of driving chips. The first redistribution layer structure and the second redistribution layer structure are respectively located on opposite sides of the hybrid bonding structure, and the first redistribution layer structure is electrically connected to the second redistribution layer structure through the hybrid bonding structure. The driving chips are electrically connected to the light-emitting chips through at least one of the first redistribution layer structure and the second redistribution layer structure.

[0006] Another display panel according to an embodiment of the present invention includes a redistribution layer structure, a plurality of light-emitting chips, a plurality of driving chips, and a carrier substrate. The light-emitting chips are embedded in the redistribution layer structure, and the driving chips are disposed on the redistribution layer structure, wherein the driving chips are electrically connected to the light-emitting chips through the redistribution layer structure, and the driving chips are located between the redistribution layer structure and the carrier substrate. Brief Description of the Drawings

[0007] Reading the following detailed description in conjunction with the accompanying drawings can best understand various aspects of the present invention. It should be noted that, according to the standard practice in the industry, various features are not drawn to scale. In fact, for the sake of clarity of the discussion, the sizes of various features can be arbitrarily increased or decreased.

[0008] Figure 1 is a schematic cross-sectional view of a display panel according to a first embodiment of the present invention;

[0009] Figure 2 Schematic cross-sectional view of the display panel according to the second embodiment of the present invention;

[0010] Figure 3 Schematic cross-sectional view of the display panel according to the third embodiment of the present invention;

[0011] Figure 4 Schematic cross-sectional view of the display panel according to the fourth embodiment of the present invention;

[0012] Figure 5 Schematic cross-sectional view of the display panel according to the fifth embodiment of the present invention;

[0013] Figure 6 Schematic cross-sectional view of the display panel according to the sixth embodiment of the present invention;

[0014] Figure 7 Schematic cross-sectional view of the display panel according to the seventh embodiment of the present invention;

[0015] Figure 8 Schematic cross-sectional view of the display panel according to the eighth embodiment of the present invention;

[0016] Figure 9 Schematic cross-sectional view of the display panel according to the ninth embodiment of the present invention;

[0017] Figure 10 Schematic cross-sectional view of the display panel according to the tenth embodiment of the present invention;

[0018] Figure 11 Schematic cross-sectional view of the display panel according to the eleventh embodiment of the present invention;

[0019] Figure 12 Schematic cross-sectional view of the display panel according to the twelfth embodiment of the present invention;

[0020] Figure 13 Schematic cross-sectional view of the display panel according to the thirteenth embodiment of the present invention;

[0021] Figure 14 Schematic cross-sectional view of the display panel according to the fourteenth embodiment of the present invention;

[0022] Figure 15 Schematic cross-sectional view of the display panel according to the fifteenth embodiment of the present invention;

[0023] Figure 16 Schematic cross-sectional view of the hybrid bonding structure of the embodiment of the present invention before the formation of the hybrid bonding interface;

[0024] Figure 17 Schematic cross-sectional view of the display panel according to the sixteenth embodiment of the present invention;

[0025] Figure 18 Schematic cross-sectional view of the display panel according to the seventeenth embodiment of the present invention;

[0026] Figure 19 Schematic cross-sectional view of the display panel according to the eighteenth embodiment of the present invention. Detailed implementation manners

[0027] Examples are listed below and described in detail with reference to the accompanying drawings. However, the provided examples are not intended to limit the scope covered by the present invention. In addition, the drawings are for illustrative purposes only and are not drawn to the original size. For ease of understanding, the same components will be denoted by the same reference numerals in the following description. Additionally, terms such as "comprising", "including", "having", etc. used herein are open-ended terms, that is, "including but not limited to". Furthermore, the directional terms mentioned in the text, such as "upper", "lower", etc., are only for reference to the direction of the drawings and are not used to limit the present invention. In addition, the quantities and shapes mentioned in the specification are only used to specifically illustrate the present invention for ease of understanding its content and are not used to limit the present invention.

[0028] Figure 1 Schematic cross-sectional view of the display panel 100A according to the first embodiment of the present invention.

[0029] Please refer to Figure 1 , the display panel 100A of this embodiment includes a hybrid bonding structure 110, a first rewiring structure 120, a second rewiring structure 130, a plurality of light-emitting chips 140, and a plurality of driving chips 150. The first rewiring structure 120 and the second rewiring structure 130 are respectively located on opposite sides of the hybrid bonding structure 110, and the first rewiring structure 120 is electrically connected to the second rewiring structure 130 through the hybrid bonding structure 110. In addition, the driving chips 150 are electrically connected to the light-emitting chips 140 through the first rewiring structure 120, the hybrid bonding structure 110, and the second rewiring structure 130.

[0030] In this embodiment, the light-emitting chip 140 includes a plurality of first light-emitting chips 140a and a plurality of second light-emitting chips 140b, and the driving chip 150 includes at least one first driving chip 150a and at least one second driving chip 150b. The first light-emitting chip 140a and the first driving chip 150a are embedded in the first redistribution structure 120, and the first driving chip 150a can be electrically connected to the first light-emitting chip 140a through the first redistribution structure 120. The second light-emitting chip 140b and the second driving chip 150b are embedded in the second redistribution structure 130, and the second driving chip 150b can be electrically connected to the second light-emitting chip 140b through the second redistribution structure 130. In some feasible embodiments, in addition to being electrically connected to the first light-emitting chip 140a, the first driving chip 150a can also be electrically connected to the second light-emitting chip 140b through the first redistribution structure 120, the hybrid bonding structure 110, and the second redistribution structure 130. In addition to being electrically connected to the second light-emitting chip 140b, the second driving chip 150b can also be electrically connected to the first light-emitting chip 140a through the first redistribution structure 120, the hybrid bonding structure 110, and the second redistribution structure 130. In other feasible embodiments, one of the first driving chip 150a and the second driving chip 150b can be omitted. In other words, the display panel 100A can only have the first driving chip 150a or the second driving chip 150b to control the first light-emitting chip 140a and the second light-emitting chip 140b. As Figure 1 shown, in this embodiment, the display panel 100A including the first light-emitting chip 140a and the second light-emitting chip 140b has a dual-sided display function.

[0031] In some embodiments, the hybrid bonding structure 110 includes a first dielectric layer 112, a plurality of first conductors 114 embedded in the first dielectric layer 112, a second dielectric layer 116, and a plurality of second conductors 118 embedded in the second dielectric layer 116. The second dielectric layer 116 is bonded to the first dielectric layer 112, the second conductors 118 are bonded to the first conductors 114, and the bonding interface 110a between the second conductors 118 and the first conductors 114 is a silver-containing bonding interface. For example, the main materials of the second conductors 118 and the first conductors 114 include copper or other suitable conductive materials, the materials of the first dielectric layer 112 and the second dielectric layer 116 include silicon dioxide or other suitable dielectric materials, and the bonding interface 110a between the second conductors 118 and the first conductors 114 includes a copper-silver alloy bonding interface. The presence of silver metal not only does not affect the bonding between the first dielectric layer 112 and the second dielectric layer 116, but also helps the bonding between the second conductors 118 and the first conductors 114 which are both made of copper metal. As mentioned above, the copper-silver alloy generated during the bonding process of the second conductors 118 and the first conductors 114 helps to improve the bonding stability between the second conductors 118 and the first conductors 114.

[0032] In this embodiment, the elongation of the first dielectric layer 112 of the hybrid bonding structure 110 is about between 10% and 85%, the Young's modulus of the first dielectric layer 112 of the hybrid bonding structure 110 is about between 2.5% and 3.2%, and the tensile strength of the first dielectric layer 112 of the hybrid bonding structure 110 is greater than 110 MPa. In addition, the elongation of the hybrid bonding structure 110 with the second dielectric layer 116 is about between 10% and 85%, the Young's modulus of the second dielectric layer 116 of the hybrid bonding structure 110 is about between 2.5% and 3.2%, and the tensile strength of the second dielectric layer 116 of the hybrid bonding structure 110 is greater than 110 MPa.

[0033] In this embodiment, as Figure 1 and Figure 16As shown, the fabrication of the lower half of the display panel 100A includes the following steps. First, the first light-emitting chip 140a and the first driving chip 150a are placed on the carrier substrate. Next, a first redistribution structure 120 is formed on the carrier substrate, where the first redistribution structure 120 covers the first light-emitting chip 140a and the first driving chip 150a and is electrically connected to the first light-emitting chip 140a and the first driving chip 150a. After that, a first bonding structure is formed on the first redistribution structure 120, and the first bonding structure includes a first dielectric layer 112 and a first conductor 114 passing through the first dielectric layer 112, where a silver metal layer 115a can be plated on the surface of the first conductor 114. Considering that the placement of the first light-emitting chip 140a and the first driving chip 150a is before the fabrication of the first redistribution structure 120, the present embodiment can use the Dynamic Die shift Correction (DDC) technology to ensure that the first redistribution structure 120 can be correctly electrically connected to the first light-emitting chip 140a and the first driving chip 150a. For example, when the minimum line width of the circuit is 2 micrometers, the offset of the circuit can be made less than 50 micrometers and the offset of the rotation angle can be made less than 0.3 degrees through the offset compensation technology.

[0034] In the present embodiment, the fabrication of the upper half of the display panel 100A includes the following steps. First, the second light-emitting chip 140b and the second driving chip 150b are placed on the carrier substrate. Next, a second redistribution structure 130 is formed on the carrier substrate, where the second redistribution structure 130 covers the second light-emitting chip 140b and the second driving chip 150b and is electrically connected to the second light-emitting chip 140b and the second driving chip 150b. After that, a second bonding structure is formed on the second redistribution structure 130, and the second bonding structure includes a second dielectric layer 116 and a second conductor 118 passing through the second dielectric layer 116, where another silver metal layer 115b can be plated on the surface of the second conductor 114. Considering that the placement of the second light-emitting chip 140b and the second driving chip 150b is before the fabrication of the second redistribution structure 130, the present embodiment can use the dynamic grain offset compensation technology to ensure that the second redistribution structure 130 can be correctly electrically connected to the second light-emitting chip 140b and the second driving chip 150b.

[0035] As Figure 16As shown, the silver metal layer 115a will have different average thicknesses in different regions (i.e., Region One, Region Two, Region Three, and Region Four), where Region One, Region Two, Region Three, and Region Four are defined by the lateral distance from the center of the first conductor 114. The lateral dimension of the first conductor 114 is A. Region One refers to the region where the lateral distance from the center of the first conductor 114 is between 0 and 0.5A. Region Two refers to the region where the lateral distance from the center of the first conductor 114 is between 0.5A and 0.75A. Region Three refers to the region where the lateral distance from the center of the first conductor 114 is between 0.75A and 1A. Region Four refers to the region where the lateral distance from the center of the first conductor 114 is greater than 1A. For example, the average thickness of the silver metal layer 115a in Region One is B, the average thickness of the silver metal layer 115a in Region Two is 0.63B, the average thickness of the silver metal layer 115a in Region Three is 0.56B, and the average thickness of the silver metal layer 115a in Region Four is 0.34B. Similarly, the silver metal layer 115b will have different average thicknesses in different regions (i.e., Region One, Region Two, Region Three, and Region Four), where Region One, Region Two, Region Three, and Region Four are defined by the lateral distance from the center of the second conductor 118. The lateral dimension of the second conductor 118 is A. Region One refers to the region where the lateral distance from the center of the second conductor 118 is between 0 and 0.5A. Region Two refers to the region where the lateral distance from the center of the second conductor 118 is between 0.5A and 0.75A. Region Three refers to the region where the lateral distance from the center of the second conductor 118 is between 0.75A and 1A. Region Four refers to the region where the lateral distance from the center of the second conductor 118 is greater than 1A. For example, the average thickness of the silver metal layer 115b in Region One is B, the average thickness of the silver metal layer 115b in Region Two is 0.63B, the average thickness of the silver metal layer 115b in Region Three is 0.56B, and the average thickness of the silver metal layer 115b in Region Four is 0.34B.

[0036] Align and bond the lower half and the upper half of the aforementioned display panel 100A to enable the first conductor 114 and the second conductor 118 to be bonded to each other through the silver metal layer 115a and the silver metal layer 115b (i.e., metal-to-metal bonding), and enable the first dielectric layer 112 and the second dielectric layer 116 to be bonded to each other (i.e., dielectric layer-to-dielectric layer bonding). In addition, after the lower half and the upper half of the display panel 100A are bonded to each other, the total thickness of the silver metal layer 115a and the silver metal layer 115b will change. For example, the total thickness of the silver metal layer 115a and the silver metal layer 115b in Region One, Region Two, and Region Three is approximately 1.5B, and the total thickness of the silver metal layer 115a and the silver metal layer 115b in Region Four is approximately 0.51B.

[0037] In some embodiments, active components and / or passive components can be fabricated in the hybrid bonding structure 110 by a thin-film process, and the passive components and / or active components cooperate with the first driving chip 150a and the second driving chip 150b to drive the first light-emitting chip 140a and the second light-emitting chip 140b for display. In addition, a metal barrier layer can be fabricated during the fabrication of the first redistribution structure 120 and / or the second redistribution structure 130 to prevent the conductors (such as metal lines) in the first redistribution structure 120 and / or the second redistribution structure 130 from affecting the subsequent thin-film process for forming active components and / or passive components.

[0038] Figure 2 FIG. is a cross-sectional schematic diagram of a display panel 100B according to a second embodiment of the present invention. Please refer to Figure 1 and Figure 2 , the display panel 100B of this embodiment is similar to the display panel 100A of the first embodiment, but the main difference between the two is that: the light-emitting chip 140 in the display panel 100B is embedded in the first redistribution structure 120, the driving chip 150 is embedded in the second redistribution structure 130, and the driving chip 150 is electrically connected to the light-emitting chip 140 through the second redistribution structure 130, the hybrid bonding structure 110, and the first redistribution structure 120. In other words, in this embodiment, the display panel 100B including the light-emitting chip 140 only has the function of single-sided display.

[0039] Figure 3 FIG. is a cross-sectional schematic diagram of a display panel 100C according to a third embodiment of the present invention. Please refer to Figure 3 the left half of, first, the light-emitting chip 140 is placed on the carrier C. Then, a redistribution structure 125 is formed on the carrier C, where the redistribution structure 125 covers the light-emitting chip 140 and is electrically connected to the light-emitting chip 140. After that, the driving chip 150 is placed on the redistribution structure 125, and the driving chip 150 is electrically connected to the redistribution structure 125. In addition to placing the driving chip 150, a passive component 155 can be selectively placed on the redistribution structure 125, and the passive component 155 is electrically connected to the redistribution structure 125, and the passive component 155 cooperates with the driving chip 150 to drive the light-emitting chip 140 for display. Considering that the placement of the light-emitting chip 140 is before the fabrication of the redistribution structure 125, this embodiment can use a dynamic die shift compensation technique to ensure that the redistribution structure 125 can be correctly electrically connected to the light-emitting chip 140.

[0040] Please refer to Figure 3The right half part, then, a carrier substrate 160 is provided, and an adhesive layer 165 is provided between the redistribution structure 125 and the carrier substrate 160, so that the redistribution structure 125, the light-emitting chips 140, the driving chips 150, and the passive components 155 formed on the carrier board C are transferred onto the carrier substrate 160. After the above transfer process, the adhesive layer 165 will cover the driving chips 150 and the passive components 155. Then, the de-bonding process of the carrier board C can be selectively performed to separate the redistribution structure 125 and the light-emitting chips 140 from the carrier board C.

[0041] As Figure 3 As shown in the right half part, the display panel 100C of this embodiment includes a redistribution structure 125, a plurality of light-emitting chips 140, a plurality of driving chips 150, and a carrier substrate 160. The light-emitting chips 140 are embedded in the redistribution structure 125, and the driving chips 150 are disposed on the redistribution structure 125, wherein the driving chips 150 are electrically connected to the light-emitting chips 140 through the redistribution structure 125, and the driving chips 150 are located between the redistribution structure 125 and the carrier substrate 160. In this embodiment, the driving chips 150 can be located above the light-emitting chips 140, and the carrier substrate 160 can include a printed circuit board, a semiconductor wafer, a glass substrate, a ceramic substrate, etc.

[0042] Figure 4 It is a cross-sectional schematic diagram of a display panel 100D according to the fourth embodiment of the present invention. Please refer to Figure 3 And Figure 4 This embodiment of the display panel 100D is similar to the display panel 100C of the third embodiment, but the main difference between the two is that: the display panel 100D further includes a stress compensation layer 170, and the stress compensation layer 170 is disposed between the driving chips 150 and the carrier substrate 160 or between the adhesive layer 165 and the carrier substrate 160.

[0043] In this embodiment, the stress compensation layer 170 can be used to improve the warpage of the display panel 100D. It should be noted that the stress compensation layer 170 can also be applied to the display panels of other embodiments of the present invention.

[0044] Figure 5 It is a cross-sectional schematic diagram of a display panel 100E according to the fifth embodiment of the present invention. Please refer to Figure 3 And Figure 5 This embodiment of the display panel 100E is similar to the display panel 100C of the third embodiment, but the main difference between the two is that: the forms of the carrier substrate 160' and the adhesive layer 165' in the display panel 100E are different.

[0045] As Figure 5As shown, the carrier substrate 160’ includes a groove 162, and the driving chip 150 and the passive components 155 are located within the groove 162. The carrier substrate 160’ is adhered to the redistribution structure 125 through an adhesive layer 165’. In addition, the driving chip 150 and the passive components 155 maintain a specific distance from the carrier substrate 160’. In other words, the carrier substrate 160’ does not contact the driving chip 150 and the passive components 155.

[0046] Figure 6 FIG. is a cross-sectional schematic diagram of a display panel 100F according to the sixth embodiment of the present invention. Please refer to Figure 2 and Figure 6 , the display panel 100F of this embodiment is similar to the display panel 100B of the second embodiment, but the main difference between the two is that: in the display panel 100F, the light-emitting chip 140 is embedded in the first redistribution structure 120, and the driving chip 150 is disposed on the second redistribution structure 130, and the light-emitting chip 140 is electrically connected to the driving chip 150 through the first redistribution structure 120, the hybrid bonding structure 110, and the second redistribution structure 130. In addition, the forms of the carrier substrate 160’ and the adhesive layer 165’ in the display panel 100F are similar to those of the carrier substrate 160’ and the adhesive layer 165’ in the display panel 100E, so they will not be repeated here.

[0047] Figure 7 FIG. is a cross-sectional schematic diagram of a display panel 100G according to the seventh embodiment of the present invention. Please refer to Figure 1 and Figure 7 , the display panel 100G of this embodiment is similar to the display panel 100A of the first embodiment, but the main difference between the two is that: the light-emitting chip 140 and the driving chip 150 are embedded in the first redistribution structure 120, the light-emitting chip 140 is electrically connected to the driving chip 150 through the first redistribution structure 120, the passive components 155 and / or the active components 157 are embedded in the second redistribution structure 130, and the passive components 155 and / or the active components 157 are electrically connected to the second redistribution structure 130. The aforementioned passive components 155 and / or active components 157 can be regarded as electronic components in the form of chips. In this example, the passive components 155 and / or active components 157 cooperate with the driving chip 150 to drive the light-emitting chip 140 for display.

[0048] As Figure 7As shown, the display panel 100G may further include a stress compensation layer 170, and the stress compensation layer 170 is disposed between the second rewiring structure 130 and the carrier film 180. In this embodiment, the stress compensation layer 170 can be used to improve the warping of the display panel 100G, and the carrier film 180 is a flexible material layer, and the material of the carrier film 180 includes a polyimide film or other flexible dielectric materials. It should be noted that the combination of the stress compensation layer 170 and the carrier film 180 can also be applied to the display panels of other embodiments of the present invention.

[0049] Figure 8 FIG. is a cross-sectional schematic view of a display panel 100H according to the eighth embodiment of the present invention. Please refer to Figure 1 and Figure 8 , the display panel 100H of this embodiment is similar to the display panel 100A of the first embodiment, but the main difference between the two is that: the first dielectric layer 112 has a plurality of grooves 112a, the second dielectric layer 116 has a plurality of protrusions 116a, and the protrusions 116a are embedded in the grooves 112a. In addition, from Figure 8 it can be seen that the bonding interface 110a is a serrated bonding interface, and this serrated bonding interface can effectively increase the bonding area between the first dielectric layer 112 and the second dielectric layer 116.

[0050] Figure 9 FIG. is a cross-sectional schematic view of a display panel 100I according to the ninth embodiment of the present invention. Please refer to Figure 7 and Figure 9 , the display panel 100I of this embodiment is similar to the display panel 100G of the seventh embodiment, but the main difference between the two is that: the carrier film 180 in the display panel 100I is disposed on the lower surface of the first rewiring structure 120.

[0051] Please refer to Figure 9For the left half, the fabrication of the lower half of the display panel 100I includes the following steps. First, the light-emitting chips 140 and the driving chips 150 are placed on the carrier substrate C on which the carrier film 180 has been formed. Here, the light-emitting chips 140 and the driving chips 150 are placed on the surface of the carrier film 180. The carrier film 180 is a flexible material layer, and the material of the carrier film 180 includes polyimide film or other flexible dielectric materials. Then, a first rewiring structure 120 is formed on the carrier substrate C, where the first rewiring structure 120 covers the light-emitting chips 140, the driving chips 150 and is electrically connected to the light-emitting chips 140, the driving chips 150. After that, a first bonding structure is formed on the first rewiring structure 120, and the first bonding structure includes a first dielectric layer 112 and a first conductor 114 passing through the first dielectric layer 112. Here, the first dielectric layer 112 includes a photosensitive polyimide film. As Figure 9 shown, the light-emitting chips 140 are electrically connected to the driving chips 150 through the first rewiring structure 120. Considering that the placement of the light-emitting chips 140 and the driving chips 150 is before the fabrication of the first rewiring structure 120, the dynamic die shift compensation technology can be used in this embodiment to ensure that the first rewiring structure 120 can be correctly electrically connected to the light-emitting chips 140 and the first driving chips 150.

[0052] In this embodiment, the fabrication of the upper half of the display panel 100I includes the following steps. First, a second rewiring structure 130, passive components 155 and / or active components 157 are formed on another carrier substrate (not shown), where the passive components 155 and / or active components 157 are embedded in the second rewiring structure 130, and the passive components 155 and / or active components 157 are electrically connected to the second rewiring structure 130. In some embodiments, the passive components 155 and / or active components 157 can be formed by a thin-film process during the fabrication of the second rewiring structure 130, or chip-type passive components 155 and / or active components 157 are placed in the second rewiring structure 130 during the fabrication of the second rewiring structure 130. Then, a second bonding structure is formed on the second rewiring structure 130, and the second bonding structure includes a second dielectric layer 116 and a second conductor 118 passing through the second dielectric layer 116. Here, the second dielectric layer 116 includes a photosensitive polyimide film.

[0053] Align and bond the lower half and the upper half of the aforementioned display panel 100I to bond the first conductor 114 and the second conductor 118 to each other (i.e., metal-to-metal bonding), and to bond the first dielectric layer 112 and the second dielectric layer 116 to each other (i.e., dielectric layer-to-dielectric layer bonding). In some embodiments, the passive components 155 and / or the active components 157 located in the second rewiring structure 130 cooperate with the driving chip 150 to drive the light-emitting chip 140 for display.

[0054] Please refer to Figure 9 the right half of

[0055] Figure 10 is a cross-sectional schematic diagram of a display panel 100J according to the tenth embodiment of the present invention. Please refer to Figure 1 and Figure 10 In this embodiment, the display panel 100J is similar to the display panel 100A of the first embodiment, but the main difference between the two is that: the display panel 100J further includes a first substrate S1 disposed on the lower surface of the first rewiring structure 120 and a second substrate S2 disposed on the upper surface of the second rewiring structure 130, wherein the first rewiring structure 120 and the second rewiring structure 130 are located between the first substrate S1 and the second substrate S2. In addition, the first substrate S1 has a groove R1 for accommodating the first light-emitting chip 140a and the driving chip 150, and the second substrate S2 has a groove R2 for accommodating the second light-emitting chip 140b, and the first light-emitting chip 140a and the second light-emitting chip 140b are electrically connected to the driving chip 150 through the first rewiring structure 120, the hybrid bonding structure 110, and the second rewiring structure 130, respectively. In some embodiments, the first substrate S1 and the second substrate S2 include glass substrates, and the grooves R1 and R2 in the first substrate S1 and the second substrate S2 help to reduce the overall thickness of the display panel 100J.

[0056] Figure 11 is a cross-sectional schematic diagram of a display panel 100K according to the eleventh embodiment of the present invention. Please refer to Figure 1 and Figure 11 In this embodiment, the display panel 100K is similar to the display panel 100A of the first embodiment, but the main difference between the two is that: in the display panel 100K, the width of the first rewiring structure 120 is greater than the width of the second rewiring structure 130. In addition, the first rewiring structure 120 is disposed on the carrier C', and the display panel 100K further includes a connecting wire 190 and a driving chip 150', wherein the first rewiring structure 120 is electrically connected to the driving chip 150' on the carrier C' through the connecting wire 190.

[0057] Figure 12 Schematic cross-sectional view of a display panel 100L according to the twelfth embodiment of the present invention. Please refer to Figure 1 and Figure 12 , the display panel 100L of this embodiment is similar to the display panel 100A of the first embodiment, but the main difference between the two is that: the display panel 100L of this embodiment further includes a carrier plate C', a substrate S, an arc-shaped connection wire 190', and a driving chip 150'. Among them, the substrate S is disposed on the carrier plate C', the first rewiring structure 120 is disposed on the substrate S, the first rewiring structure 120 is electrically connected to the driving chip 150' on the carrier plate C' through the connection wire 190', and the connection wire 190' is, for example, an arc-shaped gold bonding wire formed by a wire bonder. In addition, in the display panel 100L, the width of the first rewiring structure 120 is greater than the width of the second rewiring structure 130.

[0058] Figure 13 Schematic cross-sectional view of a display panel 100M according to the thirteenth embodiment of the present invention. Please refer to Figure 12 and Figure 13 , the display panel 100M of this embodiment is similar to the display panel 100L of the twelfth embodiment, but the main difference between the two is that: the display panel 100M of this embodiment further includes conductive throughvias 195 penetrating the substrate S and a connection conductor 190". Among them, the substrate S is disposed above the carrier plate C', the first rewiring structure 120 is disposed on the substrate S, and the first rewiring structure 120 is electrically connected to the driving chip 150' on the carrier plate C' through the conductive throughvias 195 penetrating the substrate S, the connection conductor 190", and the connection wire 190'. The connection conductor 190" is, for example, a conductive bump, a solder ball, or other types of conductive terminals.

[0059] Figure 14 Schematic cross-sectional view of a display panel 100N according to the fourteenth embodiment of the present invention. Please refer to Figure 13 and Figure 14 , the display panel 100N of this embodiment is similar to the display panel 100M of the thirteenth embodiment, but the main difference between the two is that: in the display panel 100N of this embodiment, a partial region (for example, the X region) of the connection wire 190' extends along the sidewalls of the substrate S and the first rewiring structure 120. In addition, in the display panel 100N, the width of the first rewiring structure 120 is greater than the width of the second rewiring structure 130.

[0060] Figure 15Schematic cross-sectional view of the display panel 100O according to the fifteenth embodiment of the present invention. Please refer to Figure 15 , please refer to Figure 13 and Figure 15 , the display panel 100O of this embodiment is similar to the display panel 100M of the thirteenth embodiment, but the main difference between the two is that: in the display panel 100O of this embodiment, a partial region (e.g., X region) of the connection wire 190' extends along the sidewalls of the substrate S and the first rewiring structure 120, and a partial region (e.g., Y region) of the connection wire 190' extends along the bottom surface of the substrate S to be electrically connected to the connection conductor 190".

[0061] Figure 17 Schematic cross-sectional view of the display panel according to the sixteenth embodiment of the present invention. Please refer to Figure 1 and Figure 17 , the display panel 100P of this embodiment is similar to the display panel 100A of the first embodiment, but the main difference between the two is that: in the display panel 100P of this embodiment, the first rewiring structure 120 may further include active components 157 embedded therein.

[0062] Figure 18 Schematic cross-sectional view of the display panel according to the seventeenth embodiment of the present invention. Please refer to Figure 18 , the display panel 100Q of this embodiment is similar to the display panel 100N of the fourteenth embodiment, but the main difference between the two is that: the display panel 100Q of this embodiment does not have a carrier C', and the driving chip 150' is disposed on the bottom surface of the substrate S to be electrically connected to the first rewiring structure 120 through the conductive vias 195 of the substrate S. In addition, in the display panel 100N of this embodiment, the first rewiring structure 120 may further include active components 157 embedded therein.

[0063] Figure 19 Schematic cross-sectional view of the display panel according to the eighteenth embodiment of the present invention. Please refer to Figure 19 , the display panel 100R of this embodiment is similar to the display panel 100O of the fifteenth embodiment, but the main difference between the two is that: the display panel 100R of this embodiment does not have a carrier C', and the driving chip 150' is disposed on the bottom surface of the substrate S to be electrically connected to the first rewiring structure 120 through the connection wire 190'. In addition, in the display panel 100R of this embodiment, the first rewiring structure 120 may further include active components 157 embedded therein.

[0064] In the above embodiments of the present invention, in the display panel fabricated by the hybrid bonding process, the light-emitting chips, driving chips, and active components and / or passive components that operate together with the active components can be arranged on the same side or opposite sides of the hybrid bonding interface according to design requirements, thereby making the arrangement positions of these components in the display panel more flexible. In addition, since the hybrid bonding structure has better flatness, the display panel fabricated by the hybrid bonding process can improve problems such as display unevenness and reliability.

[0065] The foregoing has outlined features of several embodiments so that those skilled in the art may better understand the various aspects of the present invention. Those skilled in the art should understand that they can readily use the present invention as a basis for designing or modifying other processes and structures to achieve the same purposes and / or realize the same advantages as the embodiments described herein. Those skilled in the art should also recognize that these equivalent structures do not depart from the spirit and scope of the present invention, and that they can make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present invention.

Claims

1. A hybrid bonding structure, characterized in that, Comprising: A first dielectric layer; A plurality of first conductors embedded in the first dielectric layer; A second dielectric layer joined to the first dielectric layer; And A plurality of second conductors embedded in the second dielectric layer, wherein the plurality of second conductors are joined to the plurality of first conductors, and the joining interface between the plurality of second conductors and the plurality of first conductors is a silver-containing joining interface.

2. The hybrid bonding structure according to claim 1, wherein The joining interface includes a copper-silver alloy joining interface.

3. The hybrid bonding structure according to claim 1, wherein, The plurality of first conductors penetrate through the first dielectric layer, the plurality of second conductors penetrate through the second dielectric layer, the elongation rate of the first dielectric layer is about between 10% and 85%, the Young's modulus of the first dielectric layer is about between 2.5% and 3.2%, the tensile strength of the first dielectric layer is greater than 110 MPa, the elongation rate of the second dielectric layer is about between 10% and 85%, the Young's modulus of the second dielectric layer is about between 2.5% and 3.2%, and the tensile strength of the second dielectric layer is greater than 110 MPa.

4. The hybrid bonding structure according to claim 1, wherein Further comprising: A first redistribution structure disposed on the outer surface of the first dielectric layer; And A second redistribution structure disposed on the outer surface of the second dielectric layer, wherein the first redistribution structure is electrically connected to the second redistribution structure through the plurality of first conductors and the plurality of second conductors.

5. The hybrid bonding structure according to claim 4, characterized in that, Further comprising: A first chip embedded in the first redistribution structure and electrically connected to the first redistribution structure.

6. The hybrid bonding structure according to claim 5, wherein, Further comprising: A second chip embedded in the second redistribution structure and electrically connected to the second redistribution structure, wherein the first chip and the second chip are respectively located on opposite sides of the joining interface.

7. The hybrid bonding structure according to claim 5, wherein Further comprising: A second chip disposed on the second redistribution structure and electrically connected to the second redistribution structure, wherein the first chip and the second chip are respectively located on opposite sides of the joining interface.

8. The hybrid bonding structure according to claim 1, characterized in that, The first dielectric layer has a plurality of protrusions, the second dielectric layer has a plurality of grooves, and the plurality of protrusions are embedded in the plurality of grooves.

9. A display panel, characterized in that, Comprising: A hybrid joining structure; A first redistribution structure; A second redistribution structure, wherein the first redistribution structure and the second redistribution structure are respectively located on opposite sides of the hybrid joining structure, and the first redistribution structure is electrically connected to the second redistribution structure through the hybrid joining structure; A plurality of light-emitting chips; And A plurality of driving chips, wherein the plurality of driving chips are electrically connected to the plurality of light-emitting chips through at least one of the first redistribution structure and the second redistribution structure.

10. The display panel according to claim 9, wherein, The plurality of light-emitting chips include a plurality of first light-emitting chips and a plurality of second light-emitting chips, the plurality of driving chips include a plurality of first driving chips and a plurality of second driving chips, the plurality of first light-emitting chips and the plurality of first driving chips are embedded in the first redistribution structure, and the plurality of second light-emitting chips and the plurality of second driving chips are embedded in the second redistribution structure.

11. The display panel according to claim 10, wherein, The hybrid joining structure includes: A first dielectric layer; A plurality of first conductors embedded in the first dielectric layer; A second dielectric layer joined to the first dielectric layer; and A plurality of second conductors are embedded in the second dielectric layer, wherein the plurality of second conductors are joined to the plurality of first conductors. The first dielectric layer has a plurality of protrusions, the second dielectric layer has a plurality of grooves, the plurality of protrusions are embedded in the plurality of grooves, and the joining interface between the plurality of second conductors and the plurality of first conductors is a silver-containing joining interface.

12. The display panel according to claim 9, wherein The plurality of light-emitting chips are embedded in the first redistribution structure, and the plurality of driving chips are embedded in the second redistribution structure.

13. The display panel according to claim 9, wherein, The plurality of light-emitting chips are embedded in the first redistribution structure, the plurality of driving chips are disposed on the second redistribution structure, and the plurality of light-emitting chips are electrically connected to the plurality of driving chips through the first redistribution structure, the hybrid bonding structure, and the second redistribution structure.

14. The display panel according to claim 9, wherein The plurality of light-emitting chips and the plurality of driving chips are embedded in the first redistribution structure, and the plurality of light-emitting chips are electrically connected to the plurality of driving chips at least through the first redistribution structure.

15. The display panel according to claim 9, wherein Further comprising: A flexible material layer is disposed on the first redistribution structure.

16. The display panel according to claim 9, wherein Further comprising: A first substrate is disposed on the first redistribution structure; And A second substrate is disposed on the second redistribution structure, wherein the first redistribution structure and the second redistribution structure are located between the first substrate and the second substrate.

17. The display panel according to claim 9, characterized in that, The width of the first redistribution structure is greater than or equal to the width of the second redistribution structure.

18. A display panel, characterized in that, Comprising: A redistribution structure; A plurality of light-emitting chips are embedded in the redistribution structure; A plurality of driving chips are disposed on the redistribution structure, wherein the plurality of driving chips are electrically connected to the plurality of light-emitting chips through the redistribution structure; And A carrier substrate, wherein the plurality of driving chips are located between the redistribution structure and the carrier substrate.

19. The display panel according to claim 18, wherein Further comprising a stress compensation layer disposed between the plurality of driving chips and the carrier substrate.

20. The display panel according to claim 18, characterized in that, The carrier substrate includes grooves, and the plurality of driving chips are located in the grooves.