Information integration system for domestic optical measurement equipment

Abstract

The invention relates to a localized optical measurement equipment information integration system, belongs to the technical field of data processing, and solves the problems of unstable connectors, limited chip resources, non-localization of equipment and the like of the current information integration system. The system comprises a core control module, a peripheral function module and a hardware interface module, the core control module is composed of a GD32F450 microcontroller and a PG2L100H FPGA, and the GD32F450 microcontroller and the PG2L100H FPGA perform high-speed data transmission through an SPI so as to process data exchanged between systems of optical measurement equipment in real time and realize functions of data communication, optical fiber communication, data monitoring and timing terminal. According to the invention, the functions of each unit are integrated into the GD32F450 microcontroller and the PG2L100H FPGA, so that the workload of debugging personnel is reduced, the domestic GD32F450 microcontroller and the PG2L100H FPGA are utilized, the requirements of equipment on chip localization are met, and the system stability is higher.

Description

Technical Field

[0001] The present invention relates to the technical field of data processing, and particularly to a domestic optical measurement equipment information integration system. Background Art

[0002] During the operation of optical measurement equipment, all systems of the equipment are performing real-time data interaction to achieve the purpose of fully automatic tracking or semi-automatic tracking. The information integration system is to process the data exchanged in real time between systems, including receiving operation control commands, performing optoelectronic data conversion and restoration, etc.

[0003] In the current information integration system for real-time data interaction of photoelectric theodolites, the ARM9 series chip kernel relied on by the data communication system is old and has too small a memory, and the official website has announced its discontinuation of production; the MSP430 relied on by the time synchronization terminal system also has problems such as small storage capacity and limited development resources; moreover, the chips used in each subsystem are not domestic, which is contrary to the requirements of current military equipment. Therefore, it is imperative to replace each chip in the information integration system. In addition, the current information integration board uses two boards, the top board and the bottom board, connected by a QTE connector. The connector of this method has also been found to be unstable during project debugging and use, and replacing the connection method is also an urgent problem to be improved. Summary of the Invention

[0004] In view of the problems of unstable connectors, limited chip resources, and non-domestic equipment existing in the current information integration system, the present invention provides a domestic optical measurement equipment information integration system, which is a multi-channel high-speed information integration system based on domestic FPGA + ARM. The system has a high degree of integration, uses multiple optical fibers and multiple serial ports for data interaction, and can process the data exchanged in real time between the optical measurement equipment systems.

[0005] To solve the above technical problems, the present invention adopts the following technical solutions:

[0006] A domestic optical measurement equipment information integration system, the system comprising:

[0007] Core Control Module: It consists of a GD32F450 microcontroller and a PG2L100H FPGA. The corresponding pins SCK, MISO, MOSI, and NSS of the two are connected to achieve high-speed data transmission through SPI to process the data exchanged in real time among various systems of the optical measurement device. Among them, the GD32F450 microcontroller serves as the SPI master, and the PG2L100H FPGA serves as the SPI slave. The core control module has the functions of data communication, optical fiber communication, data monitoring, and time synchronization terminal, and can process high-speed image data, encoder real-time data, dimming and focusing data, and trigger signals in the optical measurement device, including performing optoelectronic conversion, electro-optical conversion, data segmentation and recombination processing, and adopting the connection methods of multiple optical fibers and serial communication.

[0008] Peripheral Function Modules: Include:

[0009] Power Supply Voltage Stabilization Module: It consists of a GM1203 linear voltage regulator and a BL8034 converter, provides a stable voltage output, and integrates overvoltage protection, overcurrent protection, and short-circuit protection functions.

[0010] Clock Management Module: Adopts a BT0507 temperature-compensated crystal oscillator to provide an accurate external clock signal for the PG2L100H FPGA.

[0011] AC Acquisition Module: Based on the MS5182N chip, it realizes the digital conversion of the input analog signal for processing by the core control module.

[0012] Signal Conversion Module: Based on the SIT3490 chip, it mutually converts the communication signals of the 422 standard and the TTL level signals, and based on the SIT3232 chip, it mutually converts the communication signals of the 232 standard and the TTL level signals.

[0013] Network Communication Module: The SR8201F chip and the YT8521SH-CA chip jointly provide network connection and data transmission capabilities to achieve efficient data interchange, and based on UDP, it realizes unicast and multicast functions.

[0014] Time Synchronization Module: Integrates AC encoding and decoding, automatic adjustment of amplifier gain, DC encoding and decoding, GPS / BD decoding, and PTP timing functions.

[0015] Hardware Interface Module: Include:

[0016] Signal Strobe Plug: Controls the on / off of the signal path through circuit and software design.

[0017] Analog Quantity Acquisition Interface: Converts the input external continuously changing physical quantity into a digital signal.

[0018] Digital quantity acquisition interface: It acquires digital signals with only two states and is used to monitor the operating status of optical measurement equipment and the switch status of each system.

[0019] Dip switch interface: Different binary codes are set by toggling the position of the switch to quickly configure the system signal gating function.

[0020] SFP optical module interface: Realizes the functions of transmitting and receiving optical signals and supports high-speed data transmission.

[0021] Data communication indicator light: Displays the status of data communication through different colors, blinking frequencies, or combinations of colors and blinking frequencies.

[0022] The beneficial effects of the present invention are as follows: Compared with the existing technical solutions, the domesticated optical measurement equipment information integration system proposed by the present invention replaces the chips used on the board, improves the storage capacity, and solves the problem of limited chip resources. The functions that originally required five chips on the board are integrated into two chips by the present invention, that is, integrated into the GD32F450 microcontroller and the PG2L100H FPGA, reducing the workload of the debugging personnel. By using the domesticated GD32F450 microcontroller and PG2L100H FPGA, the requirements for chip domestication in the equipment are met. The original QTE connector, which would have unstable connections when the operation and use are not standardized, is also replaced by the data interaction method of multiple optical fibers and multiple serial ports, enhancing the stability of the system. Description of the Drawings

[0023] Figure 1 It is the principle block diagram of a domesticated optical measurement equipment information integration system according to an embodiment of the present invention.

[0024] Figure 2 It is the hardware design block diagram of a domesticated optical measurement equipment information integration system according to an embodiment of the present invention. Detailed Embodiment

[0025] The technical solution of the present invention will be described in detail below in conjunction with the drawings and preferred embodiments.

[0026] The present invention provides a domesticated optical measurement equipment information integration system, which mainly includes a core control module, a peripheral function module, and a hardware interface module. The hardware design principle of this system is as follows:

[0027] This system can be divided into a data communication unit, a time synchronization terminal unit, an optical fiber communication unit, and a data monitoring unit. The devices in each unit meet the requirements of domesticating military equipment. Figure 1The system principle block diagram is shown as follows. The data communication unit is implemented by the GD32F450 microcontroller of GigaDevice based on the ARM Cortex-M4 core. This microcontroller features low power consumption, high integration, high reliability, and ease of use. It integrates more on-chip resources and interface peripherals. The peripheral interface resources include 8 USARTs, 6 SPIs, 3 fast I2Cs, 2 I2Ss, 2 CAN2.0Bs, 1 SDIO interface, and 1 10 / 100M Ethernet controller. The functions of the time synchronization terminal unit, fiber optic communication unit, and data monitoring unit are implemented by the PG2L100H FPGA of Unisoc. The PG2L100H FPGA provides 100K LUT4 logic resources, supports 8-channel 6.6Gbps high-speed Serdes interfaces, and has rich IO and on-chip clock resources.

[0028] 1. Core control module.

[0029] In the domestic optical measurement equipment information integration system, the GD32F450 microcontroller and the PG2L100H FPGA are the core control chips. High-speed data transmission is achieved between them through SPI by connecting the corresponding pins SCK, MISO, MOSI, and NSS. Here, the GD32F450 microcontroller acts as the SPI master, and the PG2L100H FPGA acts as the SPI slave.

[0030] SPI (Serial Peripheral Interface) is a synchronous serial communication interface featuring high speed and full-duplex communication. In this system, the GD32F450 microcontroller configures its SPI-related registers to enable the SPI clock, set an appropriate baud rate and data length to ensure the accuracy and efficiency of data transmission. When the GD32F450 microcontroller sends data to the PG2L100H FPGA, the master loads the data into the shift register and then, under the control of the clock signal SCK, sends the data bit by bit through the MOSI pin to the slave. After receiving the clock signal, the PG2L100H FPGA synchronously reads the data and stores it in the internal receive buffer. Conversely, when the PG2L100H FPGA sends data to the GD32F450 microcontroller, the data is transmitted back to the master through the MISO pin, and the GD32F450 microcontroller also receives the data synchronously with the clock signal.

[0031] The NSS pin is used for the chip select signal. When the GD32F450 microcontroller wants to communicate with the PG2L100H FPGA, the NSS pin is pulled low to select the slave device PG2L100H FPGA and start data transmission. During the transmission process, SPI can achieve continuous data transmission, improving data throughput. At the same time, by reasonably setting the baud rate, it can adapt to different application scenarios and data transmission requirements. For example, in cases with high real-time requirements, a higher baud rate can be selected to speed up data transmission; while in a noise-sensitive environment, the baud rate can be appropriately reduced to improve data stability. In addition, to ensure the reliability of SPI transmission, error detection and correction mechanisms are added in the software. The transmitted data is verified through methods such as checksum and cyclic redundancy check (CRC), and once an error is found, timely reporting measures are taken.

[0032] As an SPI slave, after receiving the instructions from the master, the PG2L100H FPGA can quickly respond and perform data transmission. It can provide the required data or execute specific operations according to the requirements of the master. This master-slave SPI communication architecture enables the system to efficiently perform data interaction and meet the system's requirements for data transmission.

[0033] The GD32F450 microcontroller is a high-performance microcontroller. It has powerful processing capabilities, with a maximum main frequency of up to 200MHz, capable of quickly processing various complex tasks and algorithms. It is internally integrated with rich peripheral resources, such as multiple SPI, I2C, UART and other communication interfaces, facilitating data transmission and communication with other devices; it also has a large number of GPIO pins to meet the connection needs of various external devices. Its Flash storage capacity ranges from 256K to 3072K, which can be used to store programs and data; the SRAM capacity is 256K to 512K, providing sufficient memory space for program operation. The PG2L100H FPGA is an FPGA (Field Programmable Gate Array) chip. As a mid-to-high-end series FPGA in the Ziguang Tongchuang Logos2 series, it has high flexibility and programmability, with relatively high performance and stability. The Flash chip of the PG2L100H FPGA uses GD25Q, which has flexible programming and erasing functions. The memory is divided into multiple sectors and blocks, which can be independently erased and programmed, improving efficiency and facilitating data update and modification, and is suitable for applications that require frequent partial data updates. The chip has fast programming and erasing speeds, which can reduce the data writing time and quickly clear the old data for writing new data, ensuring timely firmware update in devices with frequent firmware updates.

[0034] The GD32F450 microcontroller and the PG2L100H FPGA together implement the system core control module, which has the functions of data communication, optical fiber communication, data monitoring, and time synchronization terminal. Data communication and optical fiber communication mainly process high-speed image data, encoder real-time data, dimming and focusing data, trigger signals, etc. in the optical measurement system, including optoelectronic conversion, electro-optical conversion, data segmentation and recombination, etc. Among them, the PG2L100H FPGA realizes optoelectronic conversion and electro-optical conversion of data through GTX high-speed serdes, and the synchronization code control and data stream control in the conversion process are completed using private protocols.

[0035] 2. Peripheral function modules.

[0036] Power supply voltage stabilization module: The power supply voltage stabilization module is mainly composed of GM1203 and BL8034 chips. Among them, GM1203, as a linear voltage regulator, has high precision and stability, and its small size is conducive to the miniaturized design of the board, and it can provide stable power for other devices on the board. BL8034 converts a higher input voltage into a lower output voltage, with a higher conversion efficiency, which can reduce energy loss and improve the utilization efficiency of the power supply. The power supply voltage stabilization module can effectively suppress and adjust the power supply voltage fluctuations input by the power supply module, output a stable voltage, and meet the voltage accuracy and stability requirements of different components in the system. At the same time, it also provides functions such as overvoltage protection, overcurrent protection, and short-circuit protection to prevent abnormal voltages and currents from damaging the system, providing a reliable guarantee for the stable operation and high efficiency of the system.

[0037] Clock management module: The clock management module uses a temperature-compensated crystal oscillator. For example, a temperature-compensated crystal oscillator with the model number BT0507 can be used. Its size is 7.00x5.00mm, and its height is 1.90mm. The BT0507 temperature-compensated crystal oscillator has high frequency stability and can maintain stable working performance under relatively harsh environmental conditions, providing an accurate external clock signal for the PG2L100H FPGA, and this accurate clock signal is used to provide a synchronization beat for the processors, memories, and other synchronous logic circuits in the system. After frequency division, frequency multiplication, and phase adjustment of the clock signal, the clock requirements of different components can be met. Manage multiple clock sources, realize clock switching and selection, and improve the reliability and flexibility of the system.

[0038] Serial port transceiver module: Provides a physical connection channel that conforms to serial communication electrical standards (such as RS-422 / RS-485 / TTL) for the system to realize serial data transmission with external devices.

[0039] AC Acquisition Module: The AC acquisition module uses the MS5182N chip, which can accurately acquire AC signals. It has a 16-bit no-loss-of-code resolution and can perform precise digital conversion on the input analog signals for the core control module to process. The MS5182N chip has high sampling accuracy and sampling speed, and can quickly and accurately obtain the characteristic parameters of AC signals, such as voltage amplitude, frequency, phase, etc. In this system, when receiving the AC code of the B code, this chip is used to sample and record the accessed AC code for subsequent time code decoding.

[0040] Digital Quantity Acquisition Module: The digital quantity acquisition module is responsible for acquiring digital signals with only two states (such as on / off, high / low), and transmitting the acquired digital signals to the core control module for the core control module to monitor the operating status of the optical measurement equipment, the switch status of each system, etc.

[0041] Digital-to-Analog Conversion Module: The digital-to-analog conversion module is implemented using the GD32F450 microcontroller. The ADC clock and the corresponding GPIO clock are enabled, and the ADC input pins are configured as analog input mode. The working mode is independent mode, the resolution is 12 bits and the data is right-aligned, and the ADC conversion channel and sampling time are configured. Then, the ADC is enabled and calibrated, the ADC conversion is triggered by software, and wait for the conversion completion flag bit to be set, indicating the end of the conversion. Read the conversion result to obtain the corresponding value of the analog signal.

[0042] Signal Conversion Module: The signal conversion module uses two chips, the SIT3490 chip and the SIT3232 chip, for signal conversion. The SIT3490 chip is used as a 422-TTL conversion device, which can convert the communication signals of the 422 standard and the TTL level signals to each other, while the SIT3232 chip is a 232-TTL conversion device, mainly used to convert the communication signals of the 232 standard and the TTL level signals to each other to ensure communication with other digital devices on the board. The signal conversion module has good signal conversion performance and compatibility, ensuring the accurate transmission of signals between different standards.

[0043] Network communication module: The SR8201F chip and the YT8521SH-CA chip are the main chips of the network communication module. The SR8201F chip supports multiple interfaces, has strong compatibility, and can automatically adapt to different network connection methods. The YT8521SH-CA chip complies with multiple Ethernet standards, adopts advanced DSP technology and analog front-end, and ensures stable and accurate data transmission through various functional technologies. Its interfaces are rich and flexible, adapt to a wide operating temperature range, and use QFN48 packaging to ensure reliability and stability. These two chips jointly provide the network communication module with efficient, stable, and reliable network connection and data transmission capabilities. The network communication module can utilize its characteristic of fast data transmission to achieve efficient data exchange. It can quickly send small data packets, can implement unicast and multicast functions based on UDP, and send data to multiple receivers simultaneously, improving the efficiency of information dissemination. Moreover, it can perform simple encapsulation and decapsulation of UDP data packets, process the header information of the data packets, and extract key data content.

[0044] Time synchronization module: The time synchronization module has multiple important functions. It includes an AC encoding and decoding module, which can encode AC signals to convert them into a digital format suitable for system transmission and processing, and can decode the received encoded AC signals to restore the original AC signals. When receiving AC code decoding, the MS324 chip and the MS8923 chip are used to amplify the AC signals, amplifying the weak AC signals to an appropriate amplitude for subsequent processing and analysis. In addition, the time synchronization module also includes an automatic gain module, which can monitor the intensity change of the input signal in real time and automatically adjust the gain of the amplifier to keep the output signal within a certain amplitude range to avoid distortion and misjudgment caused by the signal being too strong or too weak. When sending AC code encoding, the MS5620 chip is used for DA conversion. This chip can convert digital signals into analog signals and has high conversion accuracy and resolution, and can accurately convert digital signals into corresponding analog voltage or current signals. The time synchronization module also includes a DC encoding and decoding module, which can encode DC signals to achieve digital transmission and processing and decode the digital DC signals to restore the original DC signals. At the same time, the time synchronization module also includes a GPS / BD decoding module. The GPS / BD decoding module can receive navigation signals from the GPS and Beidou satellite systems through the GPS / BD data receiving module, and extract information such as position and time after demodulation and decoding to provide data support for positioning and timing applications. In addition, the time synchronization module also includes a PTP timing module. The PTP timing module accesses the PTP time through the network interface and times other systems, so this system also has SNMP network management functions.

[0045] SFP optical communication module: It is used to transmit servo fiber data, serial port fiber data, two-way high-speed image fiber data, and PTP optical port data to the core control module to achieve fiber communication of the system.

[0046] 3. Hardware interface module (external electrical interface).

[0047] Signal selection plug: Through circuit design and software design, it can selectively conduct or block different signal paths to achieve precise control of signal flow, making it convenient to directly observe the observation signal during debugging.

[0048] Analog quantity acquisition interface: used to convert external continuously changing physical quantities, such as voltage, current, temperature, pressure and other analog signals, into digital signals after entering the core control chip so that the system can process, analyze and store them.

[0049] Switch quantity acquisition interface: mainly used to collect digital signals with only two states (such as on / off, high / low), used to monitor the operating status of the equipment, the switch status of each system, etc.

[0050] Dip switch interface: Set different binary codes by toggling the position of the switch to quickly configure the system signal gating function.

[0051] SFP optical module interface: realizes the sending and receiving functions of optical signals, supports high-speed data transmission, has the advantages of small size and hot plugging, and is commonly used in optical fiber communication networks.

[0052] Data communication indicator light: Through different colors, flashing frequencies or combinations, it intuitively displays the status of data communication, such as whether it is transmitting, the transmission speed, whether there is a fault, etc.

[0053] Fiber optic communication indicator light: uses different colors, flashing frequencies or combinations to intuitively display the status of fiber optic communication, such as whether it is transmitting, the transmission speed, whether there is a fault, etc.

[0054] PTP network data interface, used to read PTP time data from the outside.

[0055] PTP network configuration interface, used to manage, monitor, and configure the PTP function of the system.

[0056] PTP control interface, used to transmit the PTP time data of the system timing to other systems.

[0057] The network communication interface is used to provide the core control module with network connection and fast data transmission capabilities to achieve efficient data exchange.

[0058] B code transceiver interface, used to receive the AC code of B code.

[0059] The GPS / BD data interface board is used to transmit navigation signals from the GPS and BeiDou satellite systems to the core control module.

[0060] A high-precision temperature-compensated crystal oscillator is used to provide an accurate clock signal for the core control module.

[0061] The power supply input plug: It is used to transmit the electrical energy of the external power supply into the system and provide the voltage and current required for the operation of all electronic components in the system.

[0062] The power supply module is used to supply power to the entire system.

[0063] Compared with the existing technical solutions, the domestic optical measurement equipment information integration system proposed by the present invention replaces the chips used on the board, improves the storage capacity, and solves the problem of limited chip resources. The functions originally realized by five chips on the original board are integrated into two chips, namely, the GD32F450 microcontroller and the PG2L100H FPGA in the present invention, reducing the workload of the debugging personnel. By using the domestic GD32F450 microcontroller and PG2L100H FPGA, the requirement for chip localization in the equipment is met. The original QTE connector, which would have unstable connections when the operation and use are not standardized, is also replaced by the data interaction method of multiple optical fibers and multiple serial ports, enhancing the stability of the system.

[0064] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0065] The above-described embodiments only represent several implementation manners of the present invention. The description is relatively specific and detailed, but it should not be construed as a limitation on the scope of the invention patent. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can still be made, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the present invention patent should be subject to the appended claims.

Claims

1. A domestic optical measurement equipment information integration system, characterized in that, It includes a core control module, a peripheral function module, and a hardware interface module; Core control module: It consists of a GD32F450 microcontroller and a PG2L100H FPGA. The corresponding pins SCK, MISO, MOSI, and NSS of the two are connected to achieve high-speed data transmission through SPI to process the data exchanged in real time between various systems of the optical measurement device. Among them, the GD32F450 microcontroller serves as the SPI master, and the PG2L100H FPGA serves as the SPI slave; the core control module has the functions of data communication, optical fiber communication, data monitoring, and time synchronization terminal, and can process high-speed image data, encoder real-time data, dimming and focusing data, and trigger signals in the optical measurement device, including performing optoelectronic conversion, electro-optical conversion, and data segmentation and recombination processing, and adopting the connection methods of multiple optical fibers and serial communication; Peripheral function module: It includes: Power supply voltage stabilization module: It consists of a GM1203 linear voltage regulator and a BL8034 converter, provides a stable voltage output, and integrates overvoltage protection, overcurrent protection, and short-circuit protection functions; Clock management module: It uses a BT0507 temperature-compensated crystal oscillator to provide an accurate external clock signal for the PG2L100H FPGA; AC acquisition module: It is based on the MS5182N chip to realize the digital conversion of the input analog signal for the core control module to process; Digital input module: It is responsible for collecting digital signals with only two states and transmitting the collected digital signals to the core control module; Digital-to-analog conversion module: It is realized by using the GD32F450 microcontroller, and the ADC conversion is triggered by software to obtain the corresponding value of the analog signal; Signal conversion module: It is based on the SIT3490 chip to mutually convert the communication signals of the 422 standard and the TTL level signals, and based on the SIT3232 chip to mutually convert the communication signals of the 232 standard and the TTL level signals; Network communication module: It is jointly provided with network connection and data transmission capabilities by the SR8201F chip and the YT8521SH-CA chip to realize efficient data interchange, and realizes unicast and multicast functions based on UDP; Time synchronization module: It integrates AC encoding and decoding, automatic adjustment of amplifier gain, DC encoding and decoding, GPS / BD decoding, and PTP timing functions; Hardware interface module: It includes: Signal selection plug: Controls the on and off of the signal path through circuit and software design; Analog quantity acquisition interface: Converts the input external continuously changing physical quantity into a digital signal; Digital input interface: Collects digital signals with only two states, and is used to monitor the operating state of the optical measurement device and the switch states of each system; Dip switch interface: Sets different binary codes by toggling the position of the switch to quickly configure the system signal selection function; SFP optical module interface: Realizes the functions of transmitting and receiving optical signals and supports high-speed data transmission; Data communication indicator: Displays the status of data communication through different colors, blinking frequencies, or combinations of colors and blinking frequencies.

2. The information integration system of a domestic optical measurement device according to claim 1, wherein When the GD32F450 microcontroller sends data to the PG2L100H FPGA, the master loads the data into the shift register, and then sends the data bit by bit to the slave through the MOSI pin under the control of the clock signal SCK; after receiving the clock signal, the PG2L100H FPGA synchronously reads the data and stores it in the internal receive buffer; When the PG2L100H FPGA sends data to the GD32F450 microcontroller, the data is transmitted back to the master through the MISO pin, and the GD32F450 microcontroller receives the data in synchronization with the clock signal.

3. The domestic optical measurement equipment information integration system according to claim 1 or 2, characterized in that PG2L100H FPGA uses GTX high-speed serdes to achieve photoelectric conversion and electro-optical conversion of data. The synchronization code control and data flow control in the conversion process are completed using private protocols.

4. An integrated information system for domestic optical measurement equipment according to claim 1 or 2, characterized in that, The network communication module simply encapsulates and decapsulates the UDP data packet, processes the header information of the data packet, and extracts key data content.

5. The domestic optical measurement equipment information integration system according to claim 1 or 2, characterized in that, The timing module includes an AC codec module, which encodes the AC signal to convert it into a digital format suitable for system transmission and processing, and can decode the received encoded AC signal to restore the original AC signal.

6. The integrated information system of domestic optical measurement equipment according to claim 5, characterized in that, The AC codec module uses the MS324 chip and the MS8923 chip to amplify the AC signal when receiving AC code decoding, and uses the MS5620 chip to perform DA conversion when sending AC code encoding.

7. The domestic optical measurement equipment information integration system according to claim 1 or 2, characterized in that, The timing module includes a DC encoding and decoding module, which encodes the DC signal to realize digital transmission and processing and decodes the digitized DC signal to restore the original DC signal.

8. The integrated information system of domestic optical measurement equipment according to claim 1 or 2, characterized in that The timing module includes a GPS / BD decoding module, which receives navigation signals from the GPS and Beidou satellite systems, extracts position and time information after demodulation and decoding, and provides data support for positioning and timing applications.

9. The integrated information system of domestic optical measurement equipment according to claim 1 or 2, characterized in that, The external continuously changing physical quantity is any one of a voltage analog signal, a current analog signal, a temperature analog signal, and a pressure analog signal.

10. A domestic optical measurement equipment information integration system according to claim 1 or 2, characterized in that The data communication status is any one of whether the data is being transmitted, the transmission speed, and whether there is a fault.

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