Industrial capacitor degradation prediction method and related equipment

Abstract

The invention provides an industrial capacitor degradation prediction method and related equipment, and the method comprises the steps: carrying out a capacitance test through carrying a capacitance automatic test system, obtaining the capacitance test data for training, training an improved long-short-term memory network based on the capacitance test data for training, and obtaining a capacitor degradation prediction model; and carrying out capacitance test on the to-be-predicted target capacitor by using the capacitance automatic test system to obtain capacitance test data of the to-be-predicted target capacitor, and inputting the capacitance test data of the to-be-predicted target capacitor into the capacitor degradation prediction model to carry out degradation prediction. Obtaining a capacitance value prediction result of the to-be-predicted target capacitor in a future period of time and time for reaching a threshold value; the improved long short-term memory network comprises a modal decomposition module, an optimization module and a long short-term memory network module which are connected in sequence. And the degradation prediction precision of the industrial capacitor can be improved.

Description

Technical Field

[0001] The present invention relates to the technical field of capacitor degradation prediction, and particularly relates to an industrial capacitor degradation prediction method and related equipment. Background Art

[0002] With the rapid development of industrial automation and intelligent manufacturing, the performance requirements for electronic components are getting higher and higher, especially the accuracy and reliability requirements for key components such as capacitors are extremely strict; in the production and application process of industrial capacitors, accurate prediction of capacitance values is crucial for reflecting capacitor degradation, ensuring circuit performance and safe operation.

[0003] In recent years, data-driven life prediction methods have become mainstream. A historical database is established by monitoring data for the entire operation process of capacitors through a test device, and a corresponding prediction model is established through this historical database. Then, combined with the monitoring data of the actual operation of capacitors, their degradation prediction is completed. However, current capacitance test devices, although capable of automated operation, can only test a limited number of capacitors at a time, are bulky and unable to analyze long-term attenuation, have high data costs, and limited prediction accuracy. Summary of the Invention

[0004] The present invention provides an industrial capacitor degradation prediction method and related equipment, aiming to improve the degradation prediction accuracy of industrial capacitors.

[0005] To achieve the above object, the present invention provides an industrial capacitor degradation prediction method, including: Step 1, load a capacitance automated test system, perform capacitance tests in the capacitance automated test system through the AC impedance method and the constant current source charging method to obtain training capacitance test data. The training capacitance test data includes time stamps, environmental stress values, capacitor models, batches, capacitance test values, and test correction values; Step 2, train an improved long short-term memory network based on the training capacitance test data to obtain a capacitor degradation prediction model; Step 3, use the capacitance automated test system to perform capacitance tests on the target capacitor to be predicted, obtain the capacitance test data of the target capacitor to be predicted, and input the capacitance test data of the target capacitor to be predicted into the capacitor degradation prediction model for degradation prediction to obtain the capacitance prediction result of the target capacitor to be predicted in a future period of time and the time to reach the threshold; The improved long short-term memory network includes a modal decomposition module, an optimization module, and a long short-term memory network module connected in sequence.

[0006] Furthermore, the capacitance automated test system includes: A capacitance value test subsystem for completing the measurement of the capacitance value of the capacitor to obtain a capacitance value test value; An aging test subsystem for completing the aging test of capacitors and obtaining aging test values; A monitoring subsystem for monitoring the temperature data, voltage data, and current data of the capacitance value test subsystem and the aging test subsystem; An automated test cloud platform for obtaining all data information from the capacitance value test subsystem, the aging test subsystem, and the monitoring subsystem and processing it to obtain capacitance value test data for training.

[0007] Furthermore, both the capacitance value test subsystem and the aging test subsystem include: Test software running on an industrial control computer for implementing functions such as command and data interaction, data storage, parameter configuration, and test calibration; A test fixture installed in a test chamber with different ambient temperatures for installing capacitors; A tester for executing the output of excitation signal electrical stress, collecting all capacitance test values in the test fixture, the temperature value of the operating environment of the test fixture, and working state parameters. The tester is electrically connected to the industrial control computer and the test fixture.

[0008] Furthermore, the tester includes multiple test boards, and each test board includes: The first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, the seventh switch, the eighth switch, the ninth switch, and the tenth switch; The first resistor, the second resistor, the third resistor, the fourth resistor, and the fifth resistor; An amplifier, a constant voltage source, a constant current source, a digital-to-analog converter, and a first capacitor; The first end of the constant voltage source and the first end of the constant current source are both grounded; The first end of the first switch is connected to the second end of the constant voltage source, and the first end of the second switch is connected to the second end of the constant current source. The second end of the first switch and the second end of the second switch are both connected to the first end of the first resistor; The second end of the first resistor is respectively connected to the first end of the amplifier, the first end of the seventh switch, the first end of the eighth switch, and the first end of the ninth switch; The second end of the seventh switch is connected to the first end of the second resistor, and the second end of the second resistor is grounded; The second end of the eighth switch is connected to the first end of the first capacitor, and the second end of the first capacitor is grounded; The second terminal of the ninth switch is respectively connected to the second terminal of the sixth switch and the first terminal of the capacitor to be tested on the test fixture. The first terminal of the sixth switch is respectively connected to the second terminal of the fifth switch, the second terminal of the fourth switch, and the second terminal of the third switch. The first terminals of the third switch and the fourth switch are respectively connected to the positive and negative poles of the mains power supply terminal. The first terminal of the fifth switch is connected to the output terminal of the rechargeable battery; The second terminal and the third terminal of the amplifier are both connected to the first input terminal of the digital-to-analog converter; The fourth terminal of the amplifier is respectively connected to the second terminal of the tenth switch and the first terminal of the fifth resistor. The second terminal of the fifth resistor is connected to the third terminal of the tenth switch and grounded. The fifth terminal of the amplifier is respectively connected to the first terminal of the third resistor and the first terminal of the fourth resistor. The second terminal of the third resistor and the sixth terminal of the amplifier are both connected to the second input terminal of the digital-to-analog converter. The second terminal of the fourth resistor is grounded; The first terminal of the tenth switch is connected to the second terminal of the capacitor to be tested on the test fixture; The data transmission terminal of the digital-to-analog converter is electrically connected to the data transmission terminal of the industrial control computer.

[0009] Furthermore, before step 2, it further includes: Using the 3σ criterion combined with a moving sliding window to detect and process outliers in the training capacitance test data, and obtaining the processed training capacitance test data.

[0010] Furthermore, step 2 includes: Inputting the processed training capacitance test data into the variational mode decomposition module for variational mode decomposition to obtain multi-modal components. Based on the multi-modal components, introducing the particle swarm optimization algorithm to optimize the parameter combination of the mode decomposition module, and obtaining the trained mode decomposition module; Inputting the multi-modal components and the parameters of the long short-term memory network module into the optimization module, and using the improved whale optimization algorithm to optimize the best parameter combination of the long short-term memory network module; Adjusting the parameters of the long short-term memory network module according to the best parameter combination to obtain the trained long short-term memory network module; Based on the trained mode decomposition module and the trained long short-term memory network module, a capacitor degradation prediction model is obtained.

[0011] Furthermore, the parameters of the long short-term memory network module include: The number of hidden layer nodes, batch size, learning rate, number of iterations, dropout rate.

[0012] The present invention also provides an industrial capacitor degradation prediction device, including: A test module, used to carry a capacitance automatic test system, perform capacitance tests in the capacitance automatic test system through the AC impedance method and the constant current source charging method, and obtain training capacitance value test data. The training capacitance value test data includes a timestamp, an environmental stress value, a capacitance model, a batch number, a capacitance test value, and a test correction value; A training module, used to train the improved long short-term memory network based on the training capacitance value test data to obtain a capacitor degradation prediction model; A prediction module, used to perform capacitance tests on the target capacitor to be predicted by using the capacitance automatic test system, obtain the capacitance value test data of the target capacitor to be predicted, and input the capacitance value test data of the target capacitor to be predicted into the capacitor degradation prediction model for degradation prediction, so as to obtain the capacitance value prediction result of the target capacitor to be predicted in a future period of time and the time to reach the threshold; The improved long short-term memory network includes a modal decomposition module, an optimization module, and a long short-term memory network module connected in sequence.

[0013] The present invention also provides a terminal device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the industrial capacitor degradation prediction method is implemented.

[0014] The present invention also provides a computer-readable storage medium storing a computer program, and when the computer program is executed by a processor, the industrial capacitor degradation prediction method is implemented.

[0015] The above solution of the present invention has the following beneficial effects: In the present invention, a capacitance automatic test system is carried, and capacitance tests are performed in the capacitance automatic test system based on the AC impedance method and the constant current source charging method to obtain capacitance test data for training. Based on the capacitance test data for training, the improved long short-term memory network is trained to obtain a capacitor degradation prediction model. The capacitance of the target capacitor to be predicted is tested by using the capacitance automatic test system to obtain the capacitance test data of the target capacitor to be predicted, and the capacitance test data of the target capacitor to be predicted is input into the capacitor degradation prediction model for degradation prediction, so as to obtain the capacitance prediction result of the target capacitor to be predicted in a future period of time and the time to reach the threshold value. The improved long short-term memory network includes a modal decomposition module, an optimization module, and a long short-term memory network module that are connected in sequence. Compared with the prior art, in the present invention, the capacitance automatic test system carried is used to perform capacitance tests to obtain capacitance test data, realizing the automatic capacitance measurement of multiple types and wide ranges of capacitances, supporting long-term stable operation and high-precision data acquisition. The capacitance of the target capacitor to be predicted is tested by using the capacitance automatic test system to obtain the capacitance test data of the target capacitor to be predicted, and the capacitance test data of the target capacitor to be predicted is input into the capacitor degradation prediction model for degradation prediction, which helps to improve the degradation prediction accuracy of industrial capacitors.

[0016] Other beneficial effects of the present invention will be described in detail in the subsequent specific implementation part. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is a schematic flowchart of an embodiment of the present invention; Figure 2 is an architecture diagram of the capacitance automatic test system in an embodiment of the present invention; Figure 3 is an architecture diagram of the test subsystem in an embodiment of the present invention; Figure 4 is a circuit schematic diagram of the test board in an embodiment of the present invention; Figure 5 is a training flowchart of the modal decomposition module in an embodiment of the present invention; Figure 6 is a training flowchart of the long short-term memory network module in an embodiment of the present invention; Figure 7 is a structural schematic diagram of the industrial capacitor degradation prediction device in an embodiment of the present invention; Figure 8 is a structural schematic diagram of the terminal device in an embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0018] To make the technical problems, technical solutions and advantages to be solved by the present invention clearer, the following will be described in detail with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are some but not all of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0019] In the description of the present invention, it should be noted that the terms "first", "second", and "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.

[0020] In the description of the present invention, it should be noted that unless otherwise clearly specified and defined, the terms "installed", "connected", and "coupled" should be understood in a broad sense. For example, it can be a locking connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the communication inside two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations.

[0021] In addition, the technical features involved in different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0022] The present invention provides an industrial capacitor degradation prediction method and related equipment for existing problems.

[0023] As Figure 1 shown, an embodiment of the present invention provides an industrial capacitor degradation prediction method, including: Step 1, a capacitance automatic test system is carried, and capacitance tests are performed in the capacitance automatic test system by the AC impedance method and the constant current source charging method to obtain training capacitance value test data, where the training capacitance value test data includes a timestamp, an environmental stress value, a capacitance model, a batch, a capacitance test value, and a test correction value; Step 2, the improved long short-term memory network is trained based on the training capacitance value test data to obtain a capacitor degradation prediction model; Step 3, the capacitance of the target capacitor to be predicted is tested by using the capacitance automatic test system to obtain the capacitance value test data of the target capacitor to be predicted, and the capacitance value test data of the target capacitor to be predicted is input into the capacitor degradation prediction model for degradation prediction to obtain the capacitance prediction result of the target capacitor to be predicted in a future period of time and the time to reach the threshold; The improved long short-term memory network includes a modal decomposition module, an optimization module, and a long short-term memory network module connected in sequence.

[0024] Specifically, asFigure 2 As shown in the figure, the capacitance automatic test system includes: A capacitance value test subsystem for measuring the capacitance value of a capacitor to obtain a capacitance value test result; An aging test subsystem for performing an aging test on the capacitor to obtain an aging test result; A monitoring subsystem for monitoring the temperature data, voltage data, and current data of the capacitance value test subsystem and the aging test subsystem; An automatic test cloud platform for obtaining all data information from the capacitance value test subsystem, the aging test subsystem, and the monitoring subsystem and processing it to obtain capacitance value test data for training.

[0025] In the embodiment of the present invention, the monitoring subsystem is composed of various sensors, such as a temperature sensor for monitoring the temperature of the capacitance value test subsystem and the aging test subsystem, a voltage sensor for monitoring the voltage of the capacitance automatic test system, and a current sensor for monitoring the current of the capacitance automatic test system, etc.

[0026] In the embodiment of the present invention, the automatic test cloud platform obtains all data information from the capacitance value test subsystem, the aging test subsystem, and the monitoring subsystem, and completes storage, analysis, comparison, prediction, statistics, and monitoring processing in the cloud server. The cloud server used is a conventional cloud server. The embodiment of the present invention does not involve improving the internal algorithm thereof. Therefore, using it to store, analyze, compare, predict, and statistically monitor data is a function possessed by a conventional cloud server. Therefore, for its specific processing process, the embodiment of the present invention will not be elaborated one by one.

[0027] Specifically, as Figure 3 shown, both the capacitance value test subsystem and the aging test subsystem include: Test software running on an industrial control computer for implementing functions such as command, data interaction, data storage, parameter configuration, and test calibration; A test fixture installed in a test chamber at different ambient temperatures for mounting the capacitor; A tester for outputting an excitation signal electrical stress, collecting all capacitance test values in the test fixture, the temperature value of the operating environment of the test fixture, and the working state parameters. The tester is electrically connected to the industrial control computer and the test fixture.

[0028] In the embodiment of the present invention, the test software runs on the industrial control computer as a human-computer interaction module, and conducts command, data interaction, data storage, tester parameter configuration, test calibration, etc. with the tester through Ethernet.

[0029] In the embodiment of the present invention, the test tooling consists of 3 test boards, and all 3 test boards are connected to the tester. Each test board can carry a maximum of 80 capacitors to be tested. The 3 test boards are fixed and encapsulated as a whole test tooling with a hollow mesh metal shell and are set in test chambers with different ambient temperatures. The test chambers include a normal temperature (25°C) ambient temperature test chamber, a low temperature (-40°C) ambient temperature test chamber, a high temperature (60°C) ambient temperature test chamber, and an accelerated (80°C) ambient temperature test chamber.

[0030] In the embodiment of the present invention, the outside of the tester uses a metal chassis to encapsulate and fix each component. The test software runs on the industrial control computer, and corresponding aging electrical stresses (such as 3.3V, 5V, etc.) are automatically applied according to the withstand voltage level of the capacitor (such as 25V or ≥50V).

[0031] Specifically, as Figure 4 shown, the tester includes multiple test boards. Each test board adopts a pluggable design for easy maintenance and replacement. Each test board includes: The first switch K1, the second switch K2, the third switch K3, the fourth switch K4, the fifth switch K5, the sixth switch K6, the seventh switch K7, the eighth switch K8, the ninth switch K9, and the tenth switch K10; The first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, and the fifth resistor R5; The amplifier U3, the constant voltage source U1, the constant current source U2, the digital-to-analog converter, and the first capacitor C1; The first end of the constant voltage source U1 and the first end of the constant current source U2 are both grounded; The first end of the first switch K1 is connected to the second end of the constant voltage source U1, and the first end of the second switch K2 is connected to the second end of the constant current source U2. The second end of the first switch K1 and the second end of the second switch K2 are both connected to the first end of the first resistor R1; The second end of the first resistor R1 is respectively connected to the first end of the amplifier U3, the first end of the seventh switch K7, the first end of the eighth switch K8, and the first end of the ninth switch K9; The second end of the seventh switch K7 is connected to the first end of the second resistor R2, and the second end of the second resistor R2 is grounded; The second end of the eighth switch K8 is connected to the first end of the first capacitor C1, and the second end of the first capacitor C1 is grounded; The second terminal of the ninth switch K9 is respectively connected to the second terminal of the sixth switch K6 and the first terminal of the capacitor to be tested on the test fixture. The first terminal of the sixth switch K6 is respectively connected to the second terminal of the fifth switch K5, the second terminal of the fourth switch K4, and the second terminal of the third switch K3. The first terminals of the third switch K3 and the fourth switch K4 are respectively connected to the positive and negative electrodes of the mains power supply terminal. The first terminal of the fifth switch K5 is connected to the output terminal of the rechargeable battery; The second terminal and the third terminal of the amplifier U3 are both connected to the first input terminal of the digital-to-analog converter; The fourth terminal of the amplifier U3 is respectively connected to the second terminal of the tenth switch K10 and the first terminal of the fifth resistor R5. The second terminal of the fifth resistor R5 is connected to the third terminal of the tenth switch K10 and grounded. The fifth terminal of the amplifier U3 is respectively connected to the first terminal of the third resistor R3 and the first terminal of the fourth resistor R4. The second terminal of the third resistor R3 and the sixth terminal of the amplifier U3 are both connected to the second input terminal of the digital-to-analog converter. The second terminal of the fourth resistor R4 is grounded; The first terminal of the tenth switch K10 is connected to the second terminal of the capacitor to be tested on the test fixture; The data transmission terminal of the digital-to-analog converter is electrically connected to the data transmission terminal of the industrial control computer.

[0032] It should be noted that the digital-to-analog converter adopted in the embodiment of the present invention is a 24-bit digital-to-analog converter.

[0033] In the embodiment of the present invention, the capacitance automatic test system automatically switches to the measurement mode every 4 hours, triggers the tester to collect the capacitance value. The test software sends instructions through the Modbus TCP protocol, reads the capacitance value collected by the tester, and stores the capacitance value in the MySQL database in real time, supporting queries according to conditions such as model, batch, time, etc. The automatic test cloud platform extracts the capacitance test data from the MySQL database and stores it as a csv file. The csv file includes timestamp, environmental stress, capacitance model, batch, capacitance test value, and test correction value.

[0034] The embodiment of the present invention combines with the Figure 4 shown test board to illustrate the specific principle and steps of the AC impedance method. The specific principle includes: When the first switch K1 is opened, the second switch K2 is closed, the seventh switch K7 and the eighth switch K8 are opened, the ninth switch K9 is closed, and the tenth switch K10 is switched to the capacitance value measurement terminal, the circuit is in the capacitance measurement state.

[0035] Let the output voltage of the constant voltage source be , the first resistor be R1, the equivalent impedance of the circuit be Z, and the capacitive reactance of the capacitor be , then there is ; In the formula, ; In the formula, is the current in the circuit, and there is ; In the formula, then is the voltage across the first resistor.

[0036] Also, because ; Therefore ; Among them, represents the frequency, represents the capacitance value of the capacitance under test.

[0037] During measurement, first, the eighth switch K8 and the ninth switch K9 are opened, the seventh switch K7 is closed, and the tenth switch K10 is switched to the capacitance value measurement terminal. At this time, the output voltage of the constant voltage source measured is ; then the seventh switch K7 and the eighth switch K8 are opened, the ninth switch K9 is closed, and when the circuit is stable, the voltage across the first resistor is obtained, and the current is calculated using the above formula; according to the measured voltage , the equivalent impedance Z of the circuit is obtained using the above formula; the capacitive reactance of the capacitance under test is obtained using the above formula; finally, the capacitance value of the capacitance under test is obtained using the above formula.

[0038] Specifically, before step 2, it further includes: Adopting the 3σ criterion combined with a moving sliding window to perform outlier detection and processing on the training capacitance value test data to obtain the processed training capacitance value test data.

[0039] Most preferably, adopting the 3σ criterion combined with a moving sliding window to perform outlier detection and processing on the training capacitance value test data to obtain the processed training capacitance value test data, including: Dividing the training capacitance value test data into multiple windows through the moving sliding window technology, and performing 3σ criterion outlier rejection on each window to obtain the cleaned data; Dividing the training set and the test set through the rolling window division method and the principle of non-reversible time series; Through scale change, the training set and test set data are respectively subjected to data normalization processing and scaled to between [0,1].

[0040] Since the collected capacitance test data for training contains a large amount of noise and spikes, and these abnormal data will interfere with the algorithm training process, it is necessary to perform outlier processing on the original data. According to the characteristic that the industrial capacitance data distribution conforms to the time series change, the 3σ criterion combined with the moving sliding window technology is used for the outlier detection of industrial capacitance data.

[0041] It should be noted that the 3σ criterion mentioned in the embodiments of the present invention means that first assume that a set of detection data only contains random errors, calculate and process it to obtain the standard deviation, determine an interval according to a certain probability, and consider that any error exceeding this interval does not belong to random error but gross error, and the data containing this error should be excluded; The 3σ criterion is: The probability that the numerical distribution is in ( , ) is 0.6827; The probability that the numerical distribution is in ( , ) is 0.9545; The probability that the numerical distribution is in ( , ) is 0.9973; It can be considered that the actual value almost all falls within the interval ( , ), and the possibility of exceeding this range is only less than 0.3%. Therefore, the interval ( , ) is recognized as the confidence interval; the moving sliding window technology can capture the changes in the data within a local range and is suitable for dealing with short-term fluctuations in the time series; by combining the 3σ criterion with the moving sliding window technology, the outlier detection range can be dynamically adjusted to adapt to the changes in the data. The effect is the best when the number of windows is set to 7 and the confidence interval is recognized as ( , ), where represents the standard deviation, and represents the mean.

[0042] Specifically, the embodiments of the present invention divide the training test data into a training set and a test set according to a ratio of 8:2. The training set is used to train the capacitor degradation prediction model to obtain the best parameters, and the test set is used to evaluate the prediction effect of the model, so as to improve its prediction ability and accuracy on unknown data when the model is applied to the actual environment.

[0043] Specifically, the embodiments of the present invention scale the data to the interval [0,1] through the min_max normalization technology, and the calculation formula is: ; Among them, Indicates the new sequence after normalization, is the original input sequence, and are the minimum and maximum values of the input sequence respectively.

[0044] Most preferably, step 2 includes: Input the processed training capacitance test data into the variational mode decomposition module for variational mode decomposition to obtain multi-modal components. Based on the multi-modal components, introduce the particle swarm optimization algorithm to optimize the parameter combination of the mode decomposition module, and obtain the trained mode decomposition module; Input the multi-modal components and the parameters of the long short-term memory network module into the optimization module, and use the improved whale optimization algorithm to optimize the best parameter combination of the long short-term memory network module; Adjust the parameters of the long short-term memory network module according to the best parameter combination to obtain the trained long short-term memory network module; Based on the trained mode decomposition module and the trained long short-term memory network module, obtain the capacitor degradation prediction model.

[0045] Specifically, the parameters of the mode decomposition module include the number of modes and the penalty factor.

[0046] As Figure 5 shown, the specific steps for optimizing the parameter combination of the mode decomposition module based on multi-modal components by introducing the particle swarm optimization algorithm in the embodiments of the present invention are: Initial configuration of the parameters of the mode decomposition module; generally set the noise tolerance and the DC component coefficient to 0 (applicable to non-stationary signal processing), set the initial value of the center frequency to 1 (the initial value of 1 means that all random values will be evenly distributed), and set the convergence criterion threshold to 1×10e-7 to ensure that the decomposition accuracy is met; Construction of the parameter system of the optimization algorithm; define the search space dimension , the particle swarm size , the position vector and the velocity vector are constrained between the lower limit and the upper limit , the inertia weight adopts a linear decreasing strategy, decreasing from 0.9 to 0.4, the learning factor , constitute the acceleration factor matrix, and the maximum number of iterations ; Multi-objective optimization iteration process; establish a fitness function based on minimizing the envelope entropy and maximizing the modal overlap degree, calculate the fitness value, and update the individual optimal solution Pbest and the global optimal solution Gbest; Apply the obtained parameter combination to the mode decomposition module.

[0047] Specifically, the modal decomposition module can decompose the original signal into several components with different bandwidths and center frequencies. By constructing a variational model, is decomposed into intrinsic mode functions . The th intrinsic mode function is: ; In the formula, is the envelope amplitude, and is the instantaneous phase; Specifically, the particle swarm optimization algorithm searches for the optimal solution by moving a group of particles (referred to as a "swarm") in the solution space.

[0048] The velocity update formula of the particle is: ; The position update formula is: ; Among them, is the velocity of particle at time ; is the position of particle at time ; is the inertia weight, which is used to control the movement inertia of the particle; and are learning factors, which are used to control the step size of the particle moving towards pbest and gbest; and are random numbers between [0, 1], which are used to increase the randomness of the search; is the individual best position of particle ; is the global best position.

[0049] Specifically, the parameters of the long short-term memory network module include: The number of hidden layer nodes, batch size, learning rate, number of iterations, dropout rate.

[0050] As Figure 6 shown, the specific steps for the embodiment of the present invention to optimize the best parameter combination of the long short-term memory network module using the improved whale optimization algorithm include: Initialize the algorithm control parameters, and define the hyperparameter feasible region according to the architecture characteristics of the long short-term memory network module; Generate an initial population set within the hyperparameter feasible region, and each individual corresponds to a set of configuration parameters of the long short-term memory network module; Calculate the MAE index of each candidate parameter in the long short-term memory network module under each population parameter, construct the fitness function, implement the elitist retention strategy, and select the current optimal individual to participate in the global exploration; Adopt an improved position update strategy, continuously iterate for parameter optimization, and update the network parameters; Loop and execute the model evaluation - parameter update process until the termination condition is met; Extract the optimal hyperparameter combination, including key parameters such as the number of hidden layer nodes, batch size, learning rate, number of iterations, dropout rate, etc.; Based on the optimized hyperparameter configuration, the long short-term memory network module.

[0051] Most preferably, the long short-term memory network module includes the following network layers: Input layer: The dimension of the input vector is 3, that is, the capacitance data of the past 3 days; LSTM layer: Iteratively update the input information; Dropout layer: Randomly discard the output information; Fully connected layer: Integrate the features extracted by the previous layers; Output layer: The output dimension is 1, that is, the capacitance value of the next day.

[0052] Among them, the number of layers and the number of neurons in the LSTM layer are determined by parameter tuning, and the output of the last LSTM layer is connected to the output vector through the fully connected layer.

[0053] It should be noted that in parameter selection, the Adam algorithm is selected as the optimization algorithm of the model, and the root mean square error (RMSE) is used as the loss function to conduct experimental analysis on the number of hidden layer nodes (hidden size), batch size, learning rate, and number of iterations (epoch), and finally determine the optimal parameters; It should be noted that the mean absolute percentage error MAPE is selected as the evaluation index.

[0054] The value range of MAPE is [0, +∞], and the smaller its value indicates the higher the accuracy of the prediction model. The calculation formula is: ; The formula means to divide the absolute value of the difference between each actual value and the predicted value by the actual value , then convert these ratios into percentages, and finally calculate the average value. Among them, represents the number of samples.

[0055] In the embodiment of the present invention, by equipping with a capacitance automatic test system, capacitance testing is carried out in the capacitance automatic test system based on the alternating current impedance method and the constant current source charging method to obtain capacitance test data for training. Based on the capacitance test data for training, the improved long short-term memory network is trained to obtain a capacitor degradation prediction model. The capacitance of the target capacitor to be predicted is tested by using the capacitance automatic test system to obtain the capacitance test data of the target capacitor to be predicted, and the capacitance test data of the target capacitor to be predicted is input into the capacitor degradation prediction model for degradation prediction, so as to obtain the capacitance prediction result of the target capacitor to be predicted in a future period of time and the time to reach the threshold value. The improved long short-term memory network includes a modal decomposition module, an optimization module and a long short-term memory network module connected in sequence. Compared with the prior art, in the embodiment of the present invention, the capacitance automatic test system is used for capacitance testing to obtain capacitance test data, realizing automatic capacitance measurement of multiple types and wide range of capacitances, supporting long-term stable operation and high-precision data acquisition. The capacitance of the target capacitor to be predicted is tested by using the capacitance automatic test system to obtain the capacitance test data of the target capacitor to be predicted, and the capacitance test data of the target capacitor to be predicted is input into the capacitor degradation prediction model for degradation prediction, which helps to improve the degradation prediction accuracy of industrial capacitors.

[0056] Corresponding to the industrial capacitor degradation prediction method described in the above embodiment, as Figure 7 shown, the present invention also provides an industrial capacitor degradation prediction device 100, which includes: A test module 101, configured to equip with a capacitance automatic test system, and perform capacitance testing in the capacitance automatic test system by using the alternating current impedance method and the constant current source charging method to obtain capacitance test data for training, where the capacitance test data for training includes a timestamp, an environmental stress value, a capacitance model, a batch number, a capacitance test value and a test correction value; A training module 102, configured to train the improved long short-term memory network based on the capacitance test data for training to obtain a capacitor degradation prediction model; A prediction module 103, configured to use the capacitance automatic test system to test the capacitance of the target capacitor to be predicted to obtain the capacitance test data of the target capacitor to be predicted, and input the capacitance test data of the target capacitor to be predicted into the capacitor degradation prediction model for degradation prediction, so as to obtain the capacitance prediction result of the target capacitor to be predicted in a future period of time and the time to reach the threshold value; The improved long short-term memory network includes a modal decomposition module, an optimization module and a long short-term memory network module connected in sequence.

[0057] It should be noted that, regarding the information interaction, execution process, etc. between the above-mentioned devices / units, since they are based on the same concept as the method embodiments of the present application, for their specific functions and the technical effects brought about, reference can be specifically made to the method embodiment part, and details will not be elaborated here.

[0058] Those skilled in the art can clearly understand that, for the convenience and simplicity of description, only the above-mentioned division of each functional unit and module is used as an example for illustration. In actual applications, the above-mentioned functions can be allocated to different functional units and modules according to needs, that is, the internal structure of the device is divided into different functional units or modules to complete all or part of the functions described above. Each functional unit and module in the embodiments can be integrated into a processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of a software functional unit. In addition, the specific names of each functional unit and module are only for the convenience of mutual distinction and do not limit the protection scope of the present application. The specific working processes of the units and modules in the above-mentioned system can refer to the corresponding processes in the foregoing method embodiments, and details will not be elaborated here.

[0059] The embodiment of the present invention also provides a terminal device, such as Figure 8 shown. The terminal device D10 in this embodiment includes: at least one processor D100 ( Figure 8 only one processor is shown in the figure), a memory D101, and a computer program D102 stored in the memory D101 and executable on the at least one processor D100. When the processor D100 executes the computer program D102, the above-mentioned industrial capacitor degradation prediction method is implemented.

[0060] The terminal device D10 can be a computing device such as a desktop computer, a notebook, a palm computer, a server, a server cluster, and a cloud server. The terminal device may include, but is not limited to, a processor D100 and a memory D101. Those skilled in the art can understand that Figure 8 merely examples of the terminal device D10 are given and do not constitute a limitation on the terminal device D10. It may include more or fewer components than shown in the figure, or combine some components, or different components. For example, it may also include input / output devices, network access devices, etc.

[0061] The so-called processor D100 may be a central processing unit (CPU, Central Processing Unit), and the processor D100 may also be other general-purpose processors, digital signal processors (DSP, Digital Signal Processor), application specific integrated circuits (ASIC, Application Specific Integrated Circuit), field-programmable gate arrays (FPGA, Field-Programmable Gate Array), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc.

[0062] In some embodiments, the memory D101 may be an internal storage unit of the terminal device D10, such as the hard disk or memory of the terminal device D10. In other embodiments, the memory D101 may also be an external storage device of the terminal device D10, such as a plug-in hard disk, a smart media card (SMC, SmartMedia Card), a secure digital (SD, Secure Digital) card, a flash card (Flash Card), etc. equipped on the terminal device D10. Further, the memory D101 may also include both the internal storage unit and the external storage device of the terminal device D10. The memory D101 is used to store an operating system, application programs, a boot loader (BootLoader), data, and other programs, such as the program code of the computer program, etc. The memory D101 may also be used to temporarily store data that has been output or is to be output.

[0063] It should be noted that, for the content such as information interaction and execution process between the above-mentioned devices / units, since it is based on the same concept as the method embodiment of the present application, for its specific functions and the technical effects brought, please refer to the method embodiment part for details, and will not be elaborated here.

[0064] Those skilled in the art can clearly understand that, for the convenience and brevity of description, only the above-mentioned division of each functional unit and module is used as an example. In actual applications, the above functions can be allocated to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. Each functional unit and module in the embodiment can be integrated into a processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above integrated unit can be implemented in the form of hardware or in the form of a software functional unit. In addition, the specific names of each functional unit and module are only for the convenience of mutual distinction and do not limit the protection scope of this application. The specific working process of the units and modules in the above system can refer to the corresponding process in the foregoing method embodiment and will not be elaborated herein.

[0065] An embodiment of the present invention further provides a computer-readable storage medium. The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, it implements the industrial capacitor degradation prediction method.

[0066] If the above integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, to implement all or part of the processes in the above embodiment methods of this application, a computer program can be used to instruct the relevant hardware to complete. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by a processor, the steps of the above various method embodiments can be implemented. Among them, the computer program includes computer program code, and the computer program code can be in the form of source code, object code, executable file or some intermediate form, etc. The computer-readable medium can at least include: any entity or device that can carry the computer program code to the construction device / terminal device, recording medium, computer memory, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), electrical carrier signal, telecommunication signal, and software distribution medium. For example, a USB flash drive, a mobile hard disk, a magnetic disk or an optical disc, etc.

[0067] The above is the preferred embodiment of the present invention. It should be noted that for those of ordinary skill in the art, without departing from the principle described in this invention, several improvements and refinements can be made, and these improvements and refinements should also be regarded as the protection scope of this invention.

Claims

1. An industrial capacitor degradation prediction method, characterized in that, Including: Step 1: Equip with a capacitor automatic test system, and perform capacitor tests in the capacitor automatic test system through the AC impedance method and the constant current source charging method to obtain training capacitance test data. The training capacitance test data includes a timestamp, an environmental stress value, a capacitor model, a batch number, a capacitor test value, and a test correction value. Step 2: Train the improved long short-term memory network based on the training capacitance test data to obtain a capacitor degradation prediction model. Step 3: Use the capacitor automatic test system to perform capacitor tests on the target capacitor to be predicted, obtain the capacitance test data of the target capacitor to be predicted, and input the capacitance test data of the target capacitor to be predicted into the capacitor degradation prediction model for degradation prediction, so as to obtain the capacitance prediction result of the target capacitor to be predicted in a future period of time and the time to reach the threshold. The improved long short-term memory network includes a modal decomposition module, an optimization module, and a long short-term memory network module connected in sequence.

2. The industrial capacitor degradation prediction method according to claim 1, wherein The capacitor automatic test system includes: A capacitance value test subsystem for measuring the capacitance value of a capacitor to obtain a capacitance value test value. An aging test subsystem for performing aging tests on capacitors to obtain aging test values. A monitoring subsystem for monitoring the temperature data, voltage data, and current data of the capacitance value test subsystem and the aging test subsystem. An automatic test cloud platform for obtaining all data information from the capacitance value test subsystem, the aging test subsystem, and the monitoring subsystem and processing them to obtain training capacitance test data.

3. The industrial capacitor degradation prediction method according to claim 2, characterized in that Both the capacitance value test subsystem and the aging test subsystem include: Test software running on an industrial control computer for implementing functions such as command, data interaction, data storage, parameter configuration, and test correction. A test fixture installed in a test chamber at different environmental temperatures for installing capacitors. A tester for outputting excitation signal electrical stress, collecting all capacitance test values in the test fixture, the temperature value of the environment in which the test fixture operates, and working state parameters. The tester is electrically connected to the industrial control computer and the test fixture.

4. The method for predicting the degradation of an industrial capacitor according to claim 3, wherein The tester includes multiple test boards, and each test board includes: A first switch, a second switch, a third switch, a fourth switch, a fifth switch, a sixth switch, a seventh switch, an eighth switch, a ninth switch, and a tenth switch. A first resistor, a second resistor, a third resistor, a fourth resistor, and a fifth resistor. An amplifier, a constant voltage source, a constant current source, a digital-to-analog converter, and a first capacitor. The first ends of the constant voltage source and the constant current source are both grounded. The first end of the first switch is connected to the second end of the constant voltage source, the first end of the second switch is connected to the second end of the constant current source, and the second ends of the first switch and the second switch are both connected to the first end of the first resistor. The second end of the first resistor is respectively connected to the first end of the amplifier, the first end of the seventh switch, the first end of the eighth switch, and the first end of the ninth switch. The second terminal of the seventh switch is connected to the first terminal of the second resistor, and the second terminal of the second resistor is grounded; The second terminal of the eighth switch is connected to the first terminal of the first capacitor, and the second terminal of the first capacitor is grounded; The second terminal of the ninth switch is respectively connected to the second terminal of the sixth switch and the first terminal of the capacitor to be tested on the test fixture. The first terminal of the sixth switch is respectively connected to the second terminal of the fifth switch, the second terminal of the fourth switch, and the second terminal of the third switch. The first terminals of the third switch and the fourth switch are respectively connected to the positive and negative poles of the mains power supply terminal. The first terminal of the fifth switch is connected to the output terminal of the rechargeable battery; The second terminal and the third terminal of the amplifier are both connected to the first input terminal of the digital-to-analog converter; The fourth terminal of the amplifier is respectively connected to the second terminal of the tenth switch and the first terminal of the fifth resistor. The second terminal of the fifth resistor is connected to the third terminal of the tenth switch and grounded. The fifth terminal of the amplifier is respectively connected to the first terminal of the third resistor and the first terminal of the fourth resistor. The second terminal of the third resistor and the sixth terminal of the amplifier are both connected to the second input terminal of the digital-to-analog converter. The second terminal of the fourth resistor is grounded; The first terminal of the tenth switch is connected to the second terminal of the capacitor to be tested on the test fixture; The data transmission terminal of the digital-to-analog converter is electrically connected to the data transmission terminal of the industrial control computer.

5. The industrial capacitor degradation prediction method according to claim 4, characterized in that, Before step 2, it further includes: Using the 3σ criterion combined with a moving sliding window to detect and process outliers in the training capacitance value test data, and obtaining the processed training capacitance value test data.

6. The industrial capacitor degradation prediction method according to claim 5, characterized in that, The said step 2 includes: Inputting the processed training capacitance value test data into the variational mode decomposition module for variational mode decomposition to obtain multi-modal components. Based on the multi-modal components, introducing the particle swarm optimization algorithm to optimize the parameter combination of the mode decomposition module, and obtaining the trained mode decomposition module; Inputting the multi-modal components and the parameters of the long short-term memory network module into the optimization module, and using the improved whale optimization algorithm to optimize the best parameter combination of the long short-term memory network module; Adjusting the parameters of the long short-term memory network module according to the best parameter combination to obtain the trained long short-term memory network module; Based on the trained mode decomposition module and the trained long short-term memory network module, a capacitor degradation prediction model is obtained.

7. The industrial capacitor degradation prediction method according to claim 6, characterized in that, The parameters of the long short-term memory network module include: The number of hidden layer nodes, batch size, learning rate, number of iterations, dropout rate.

8. An industrial capacitor degradation prediction device, characterized in that, It includes: A test module, used to carry a capacitance automatic test system, and perform capacitance tests in the capacitance automatic test system through the AC impedance method and the constant current source charging method to obtain training capacitance value test data. The training capacitance value test data includes timestamp, environmental stress value, capacitance model, batch number, capacitance test value, and test correction value; A training module, used to train the improved long short-term memory network based on the training capacitance value test data to obtain a capacitor degradation prediction model; A prediction module, configured to use the capacitance automated test system to perform capacitance tests on the target capacitor to be predicted, obtain capacitance test data of the target capacitor to be predicted, and input the capacitance test data of the target capacitor to be predicted into the capacitor degradation prediction model for degradation prediction, so as to obtain a capacitance prediction result of the target capacitor to be predicted in a future period of time and the time to reach the threshold; The improved long short-term memory network includes a modal decomposition module, an optimization module, and a long short-term memory network module that are connected in sequence.

9. A terminal device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the industrial capacitor degradation prediction method according to any one of claims 1 to 7.

10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the industrial capacitor degradation prediction method according to any one of claims 1 to 7.

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