Common point processing method, system and device for CRPR algorithm and medium

Abstract

The invention provides a common point processing method, system and device for a CRPR algorithm and a medium. The method comprises the steps of obtaining a preset CRPR threshold value; traversing the target clock tree, propagating the CRPR mark and delay information in the traversing process, and meanwhile, performing the following processing on the traversed current node: if the current node is a first potential CRPR common point, taking the current node as a target CRPR common point, and generating a corresponding CRPR mark; if the current node is the potential CRPR common point but not the first potential CRPR common point, obtaining a CRPR increment between the current node and the last target CRPR common point; when the CRPR increment is greater than a CRPR threshold value, taking the current node as a target CRPR common point, and generating a corresponding CRPR mark; and when the CRPR increment is not greater than the CRPR threshold, not taking the current node as a target CRPR common point, and not generating a corresponding CRPR mark. According to the invention, the time consumption and memory overhead of the CRPR algorithm can be improved.

Description

Technical Field

[0001] The present invention relates to the field of clock tree processing and calculation, and particularly to a common point processing method, system, device and medium for the CRPR algorithm. Background Art

[0002] In the design of very large scale integrated circuits (VLSIs), static timing analysis (STA) is the core means to verify the timing performance of chips. With the wide application of advanced processes, the impact of on-chip variations (OCVs) on timing has become increasingly significant. To characterize the OCV effect, STA tools need to apply different delay scaling factors to the launch and capture paths of the clock tree respectively. When the launch and capture paths share the same clock path segment, the difference in OCV scaling factors will result in the same path being assigned two different delay values, thus causing overly pessimistic results in timing checks. To eliminate this pessimism, a clock reconvergence pessimism removal (CRPR) algorithm needs to be introduced. Its core is to identify the common points of the clock path and eliminate redundant pessimistic calculations of the shared path.

[0003] However, the CRPR algorithm needs to record and propagate the possible common points in the clock path during the calculation process. When the clock tree is relatively complex, storing and processing the common point tags will consume a large amount of memory and time. Summary of the Invention

[0004] Aiming at the deficiencies of the above-mentioned prior art, the present invention provides a common point processing method, system, device and medium for the CRPR algorithm to improve the time consumption and memory overhead of the CRPR algorithm.

[0005] To achieve the above object, the present invention adopts the following technical solutions:

[0006] In the first aspect, the present invention provides a common point processing method for the CRPR algorithm, including:

[0007] Obtain a preset CRPR threshold;

[0008] Traverse the target clock tree and propagate the CRPR tag and delay information during the traversal process, and at the same time perform the following processing on the currently traversed node:

[0009] Determine whether the current node is a potential CRPR common point. If not, do not use the current node as the target CRPR common point and do not generate the corresponding CRPR mark. If so, further determine whether the current node is the first potential CRPR common point;

[0010] If the current node is the first potential CRPR common point, use the current node as the target CRPR common point and generate the corresponding CRPR mark;

[0011] If the current node is a potential CRPR common point but not the first potential CRPR common point, obtain the CRPR increment between the current node and the previous target CRPR common point;

[0012] When the CRPR increment is greater than the CRPR threshold, use the current node as the target CRPR common point and generate the corresponding CRPR mark;

[0013] When the CRPR increment is not greater than the CRPR threshold, do not use the current node as the target CRPR common point and do not generate the corresponding CRPR mark.

[0014] Further, the determination of whether the current node is a potential CRPR common point includes:

[0015] Determine whether the current node is a driving pin and has at least two fan-outs. If so, determine that the current node is a potential CRPR common point. If not, determine that the current node is not a potential CRPR common point.

[0016] Further, the obtaining of the CRPR increment between the current node and the previous target CRPR common point includes:

[0017] Determine the previous target CRPR common point;

[0018] Obtain the CRPR value of the previous target CRPR common point by obtaining the difference between the maximum delay and the minimum delay propagated to the previous target CRPR common point;

[0019] Obtain the CRPR value of the current node by obtaining the difference between the maximum delay and the minimum delay propagated to the current node;

[0020] Obtain the CRPR increment by obtaining the difference between the CRPR value of the current node and the CRPR value of the previous target CRPR common point.

[0021] Further, the determination of the previous target CRPR common point includes:

[0022] Obtain the previous CRPR mark propagated to the current node, and determine the previous target CRPR common point according to the previous CRPR mark.

[0023] Further, traversing the target clock tree includes: traversing the target clock tree using a breadth-first search algorithm.

[0024] In a second aspect, the present invention provides a common point processing system for a CRPR algorithm, including:

[0025] A threshold acquisition module for acquiring a preset CRPR threshold;

[0026] A processing module for traversing the target clock tree and propagating CRPR marks and delay information during the traversal, and simultaneously performing the following processing on the currently traversed node:

[0027] Judge whether the current node is a potential CRPR common point. If not, do not use the current node as the target CRPR common point and do not generate a corresponding CRPR mark. If so, then judge whether the current node is the first potential CRPR common point;

[0028] If the current node is the first potential CRPR common point, use the current node as the target CRPR common point and generate a corresponding CRPR mark;

[0029] If the current node is a potential CRPR common point but not the first potential CRPR common point, obtain the CRPR increment between the current node and the previous target CRPR common point;

[0030] When the CRPR increment is greater than the CRPR threshold, use the current node as the target CRPR common point and generate a corresponding CRPR mark;

[0031] When the CRPR increment is not greater than the CRPR threshold, do not use the current node as the target CRPR common point and do not generate a corresponding CRPR mark.

[0032] Further, the process by which the processing module judges whether the current node is a potential CRPR common point is as follows:

[0033] Judge whether the current node is a driving pin and has at least two fan-outs. If so, determine that the current node is a potential CRPR common point. If not, determine that the current node is not a potential CRPR common point.

[0034] Further, the process by which the processing module obtains the CRPR increment between the current node and the previous target CRPR common point is as follows:

[0035] Determine the previous target CRPR common point;

[0036] Obtain the CRPR value of the previous target CRPR common point by acquiring the difference between the maximum delay and the minimum delay propagated to the previous target CRPR common point;

[0037] Obtain the CRPR value of the current node by acquiring the difference between the maximum delay and the minimum delay propagated to the current node;

[0038] Obtain the CRPR increment by acquiring the difference between the CRPR value of the current node and the CRPR value of the previous target CRPR common point.

[0039] In a third aspect, the present invention provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, the steps of the common point processing method described above are implemented.

[0040] In a fourth aspect, the present invention provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the common point processing described above are implemented.

[0041] By adopting the above technical solutions, the present invention has the following beneficial effects:

[0042] The present invention reduces the number of generated and propagated CRPR marks by merging adjacent common points with smaller CRPR increments, thereby reducing the running time and memory consumption of timing analysis; at the same time, by setting a CRPR threshold to control the precision loss, the precision loss of the timing analysis result can be within an acceptable range. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 It is a flowchart of the common point processing method for the CRPR algorithm in the present invention;

[0044] Figure 2 It is a hardware architecture diagram of the electronic device in the present invention. DETAILED DESCRIPTION

[0045] In order to make the objectives, technical solutions and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0046] The terms used in this invention are for the purpose of describing specific embodiments only and are not intended to limit the disclosure. The singular forms "a", "the", and "said" used in this disclosure and the appended claims are also intended to include the plural forms unless the context clearly dictates otherwise. It should also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0047] As described above, the CRPR algorithm needs to record and propagate the possible common points in the clock path during the calculation process. When the clock tree is relatively complex, storing and processing the common point markers will consume a large amount of memory and time.

[0048] In view of this, the present invention provides a common point processing method, system, device, and medium for the CRPR algorithm to improve the time consumption and memory overhead of the CRPR algorithm.

[0049] Embodiment 1

[0050] This embodiment provides a common point processing method for the CRPR algorithm. As Figure 1 shown, the method specifically includes the following steps:

[0051] S1. Obtain a preset CRPR threshold.

[0052] In this embodiment, the CRPR threshold is preset by the user according to the design requirements and the acceptable error range. Through this threshold, a trade-off between accuracy and efficiency can be allowed, which is applicable to scenarios with different requirements. For example, if the user has very strict requirements for timing, a smaller threshold can be set to maintain higher accuracy; conversely, a larger threshold can be set to improve efficiency.

[0053] S2. Traverse the target clock tree and propagate the CRPR markers and delay information during the traversal process, and at the same time perform the following processing on each currently traversed node:

[0054] S21. Determine whether the current node is a potential CRPR common point. If so, execute step S22; otherwise, execute step S26.

[0055] In this embodiment, it is determined whether the current node is a potential CRPR common point by judging whether the current node is a driving pin and has at least two fanouts. Specifically, if the current node is a driving pin and has at least two fanouts, the current node is considered a potential CRPR common point; otherwise, the current node is considered not to be a potential CRPR common point.

[0056] It should be understood that if the current node has at least two fanouts, it means that the clock signal bifurcates and grows a tree from this node.

[0057] S22. If the current node is a potential CRPR common point, then continue to determine whether the current node is the first potential CRPR common point. If so, execute step S23; otherwise, execute step S24.

[0058] S23. Take the current node as the target CRPR common point and generate a CRPR tag corresponding to the current node. This CRPR tag indicates that the current node is the target CRPR common point that needs to be recorded and propagated.

[0059] S24. If the current node is a potential CRPR common point but not the first potential CRPR common point, then obtain the CRPR increment between the current node and the previous target CRPR common point. Specifically, obtain it through the following steps S241 - S244:

[0060] S241. Determine the previous target CRPR common point.

[0061] Specifically, since the traversal process will propagate the CRPR tag, the previous CRPR tag propagated to the current node can be obtained, and the node corresponding to the previous CRPR tag can be determined as the previous target CRPR common point. Among them, the "previous CRPR tag" represents the most recently generated CRPR tag.

[0062] S242. By obtaining the difference between the maximum delay and the minimum delay propagated to the previous target CRPR common point (the delay information will be propagated during the traversal process), obtain the CRPR value of the previous target CRPR common point. The CRPR value represents the maximum delay difference of the current node.

[0063] S243. By obtaining the difference between the maximum delay and the minimum delay propagated to the current node, obtain the CRPR value of the current node.

[0064] S244. By obtaining the difference between the CRPR value of the current node and the CRPR value of the previous target CRPR common point, the CRPR increment of the current node relative to the previous target CRPR common point can be obtained.

[0065] S25. Determine whether the CRPR increment is greater than a preset CRPR threshold. If it is greater, execute step S23 to generate a CRPR tag corresponding to the current node; otherwise, execute step S26.

[0066] S26. Do not take the current node as the target CRPR common point and do not generate the corresponding CRPR tag.

[0067] Specifically, if the current node is not a potential CRPR common point, or the CRPR increment of the current node relative to the previous target CRPR common point is not greater than the preset CRPR threshold, no corresponding CRPR mark is generated, that is, it is equivalent to merging with the previous target CRPR common point.

[0068] For example, assume there are nodes A, B, and C in the clock tree. A is the target CRPR common point, B and C are potential common points. The CRPR increment from A to B is 0.05 ns, and the CRPR increment from B to C is 0.03 ns. The set CRPR threshold is 0.04 ns. Then, the CRPR increment of B, 0.05, exceeds the threshold, so B generates a new mark; the CRPR increment of C, 0.03, is less than the threshold, so C does not generate a new mark and is equivalent to being merged into B. In this way, the original three common points become two, reducing one mark and saving resources of B.

[0069] In this embodiment, by merging adjacent common points with smaller CRPR increments, the number of generated and propagated CRPR marks is reduced, thereby reducing the running time and memory consumption of the timing analysis; at the same time, by controlling the precision loss through the set CRPR threshold, the precision loss of the timing analysis result can also be within the allowable range.

[0070] In a preferred embodiment, when traversing the target clock tree in step S2, the breadth-first search algorithm is used to traverse the target clock tree.

[0071] Embodiment 2

[0072] This embodiment provides a common point processing system for the CRPR algorithm, which specifically includes a threshold acquisition module and a processing module.

[0073] In this embodiment, the threshold acquisition module is used to acquire the preset CRPR threshold.

[0074] Specifically, the CRPR threshold is preset by the user according to the design requirements and the acceptable error range. For example, if the user has very strict requirements for timing, a smaller threshold can be set to maintain higher precision; conversely, a larger threshold can be set to improve efficiency.

[0075] In this embodiment, the processing module is used to traverse the target clock tree (preferably using the breadth-first search algorithm) and propagate CRPR marks and delay information during the traversal process, and at the same time, the following processing is performed on the currently traversed node one by one:

[0076] Judge whether the current node is a potential CRPR common point. If not, the current node is not taken as the target CRPR common point and no corresponding CRPR mark is generated. If so, then judge whether the current node is the first potential CRPR common point;

[0077] If the current node is the first potential CRPR common point, then use the current node as the target CRPR common point and generate the corresponding CRPR mark;

[0078] If the current node is a potential CRPR common point but not the first potential CRPR common point, then obtain the CRPR increment between the current node and the previous target CRPR common point;

[0079] When the CRPR increment is greater than the CRPR threshold, then use the current node as the target CRPR common point and generate the corresponding CRPR mark;

[0080] When the CRPR increment is not greater than the CRPR threshold, then do not use the current node as the target CRPR common point and do not generate the corresponding CRPR mark.

[0081] In an implementable manner, the process by which the processing module determines whether the current node is a potential CRPR common point is as follows:

[0082] Determine whether the current node is a driving pin and has at least two fan-outs. If so, determine that the current node is a potential CRPR common point. If not, determine that the current node is not a potential CRPR common point.

[0083] In an implementable manner, the process by which the processing module obtains the CRPR increment between the current node and the previous target CRPR common point is as follows:

[0084] Determine the previous target CRPR common point, specifically by obtaining the previous CRPR mark propagated to the current node and determining the previous target CRPR common point based on the previous CRPR mark;

[0085] Obtain the CRPR value of the previous target CRPR common point by obtaining the difference between the maximum delay and the minimum delay propagated to the previous target CRPR common point;

[0086] Obtain the CRPR value of the current node by obtaining the difference between the maximum delay and the minimum delay propagated to the current node;

[0087] Obtain the CRPR increment by obtaining the difference between the CRPR value of the current node and the CRPR value of the previous target CRPR common point.

[0088] In this embodiment, by merging adjacent common points with smaller CRPR increments, the number of generated and propagated CRPR marks is reduced, thereby reducing the running time and memory consumption of the timing analysis; at the same time, by controlling the precision loss through the set CRPR threshold, the precision loss of the timing analysis result can also be within the allowable range.

[0089] Embodiment 3

[0090] This embodiment provides an electronic device, which can be presented in the form of a computing device (for example, it can be a server device), including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, the steps of the common point processing method provided in Embodiment 1 can be implemented.

[0091] Figure 2 The hardware structure diagram of this embodiment is shown, as Figure 2 shown, the electronic device 30 specifically includes:

[0092] At least one processor 31, at least one memory 32, and a bus 33 for connecting different system components (including the processor 31 and the memory 32), where:

[0093] The bus 33 includes a data bus, an address bus, and a control bus.

[0094] The memory 32 includes volatile memory, such as random access memory (RAM) 321 and / or cache memory 322, and may further include read-only memory (ROM) 323.

[0095] The memory 32 further includes a program / utilities 325 having a set (at least one) of program modules 324. Such program modules 324 include but are not limited to: an operating system, one or more application programs, other program modules, and program data. Each or some combination of these examples may include the implementation of a network environment.

[0096] The processor 31 executes various functional applications and data processing by running the computer program stored in the memory 32, such as the steps of the common point processing method provided in Embodiment 1 of the present invention.

[0097] The electronic device 30 can further communicate with one or more external devices 34 (such as a keyboard, a pointing device, etc.). Such communication can be carried out through an input / output (I / O) interface 35. And, the electronic device 30 can also communicate with one or more networks (such as a local area network (LAN), a wide area network (WAN), and / or a public network, such as the Internet) through a network adapter 36. The network adapter 36 communicates with other modules of the electronic device 30 through the bus 33. It should be understood that although not shown in the figure, other hardware and / or software modules can be used in combination with the electronic device 30, including but not limited to: microcode, device drivers, redundant processors, external disk drive arrays, RAID (disk array) systems, tape drives, and data backup storage systems, etc.

[0098] It should be noted that although several units / modules or sub-units / modules of the electronic device are mentioned in the above detailed description, this division is merely exemplary and not mandatory. In fact, according to the embodiments of the present application, the features and functions of two or more units / modules described above can be embodied in one unit / modules. Conversely, the features and functions of one unit / modules described above can be further divided and embodied by multiple units / modules.

[0099] Embodiment 4

[0100] This embodiment provides a computer-readable storage medium, on which a computer program is stored. When the program is executed by a processor, the steps of the common point processing method provided in Embodiment 1 are implemented.

[0101] Among them, the more specific forms that the readable storage medium can adopt may include, but are not limited to: portable disks, hard disks, random access memories, read-only memories, erasable programmable read-only memories, optical storage devices, magnetic storage devices, or any suitable combination of the above.

[0102] In a possible implementation manner, the present invention can also be implemented in the form of a program product, which includes program code. When the program product runs on a terminal device, the program code is used to cause the terminal device to execute the steps of the common point processing method provided in Embodiment 1.

[0103] Among them, the program code for executing the present invention can be written in any combination of one or more programming languages. The program code can be executed entirely on the user device, partially on the user device, executed as an independent software package, partially on the user device and partially on a remote device, or entirely on a remote device.

[0104] Although the specific implementation manners of the present invention are described above, those skilled in the art should understand that this is only an example. The protection scope of the present invention is defined by the appended claims. Without departing from the principles and essence of the present invention, those skilled in the art can make various changes or modifications to these implementation manners, but these changes and modifications all fall within the protection scope of the present invention.

Claims

1. A common point processing method for the CRPR algorithm, characterized in that, including: Obtain a preset CRPR threshold; Traverse the target clock tree and propagate CRPR tags and delay information during the traversal. At the same time, perform the following processing on the currently traversed node: Determine whether the current node is a potential CRPR common point. If not, do not use the current node as the target CRPR common point and do not generate a corresponding CRPR tag. If so, then determine whether the current node is the first potential CRPR common point; If the current node is the first potential CRPR common point, use the current node as the target CRPR common point and generate a corresponding CRPR tag; If the current node is a potential CRPR common point but not the first potential CRPR common point, obtain the CRPR increment between the current node and the previous target CRPR common point; When the CRPR increment is greater than the CRPR threshold, use the current node as the target CRPR common point and generate a corresponding CRPR tag; When the CRPR increment is not greater than the CRPR threshold, do not use the current node as the target CRPR common point and do not generate a corresponding CRPR tag.

2. The common point processing method according to claim 1, characterized in that, The determination of whether the current node is a potential CRPR common point includes: Determine whether the current node is a driving pin and has at least two fan-outs. If so, determine that the current node is a potential CRPR common point. If not, determine that the current node is not a potential CRPR common point.

3. The common point processing method according to claim 1, characterized in that The obtaining of the CRPR increment between the current node and the previous target CRPR common point includes: Determine the previous target CRPR common point; Obtain the CRPR value of the previous target CRPR common point by obtaining the difference between the maximum delay and the minimum delay propagated to the previous target CRPR common point; Obtain the CRPR value of the current node by obtaining the difference between the maximum delay and the minimum delay propagated to the current node; Obtain the CRPR increment by obtaining the difference between the CRPR value of the current node and the CRPR value of the previous target CRPR common point.

4. The common point processing method according to claim 1, characterized in that, The determination of the previous target CRPR common point includes: Obtain the previous CRPR tag propagated to the current node and determine the previous target CRPR common point according to the previous CRPR tag.

5. The common point processing method according to claim 1, characterized in that, The traversal of the target clock tree includes: traversing the target clock tree using a breadth-first search algorithm.

6. A common point processing system for the CRPR algorithm, characterized in that, including: A threshold acquisition module for obtaining a preset CRPR threshold; A processing module for traversing the target clock tree and propagating CRPR tags and delay information during the traversal. At the same time, perform the following processing on the currently traversed node: Determine whether the current node is a potential CRPR common point. If not, do not use the current node as the target CRPR common point and do not generate a corresponding CRPR tag. If so, then determine whether the current node is the first potential CRPR common point; If the current node is the first potential CRPR common point, then use the current node as the target CRPR common point and generate a corresponding CRPR mark; If the current node is a potential CRPR common point but not the first potential CRPR common point, then obtain the CRPR increment between the current node and the previous target CRPR common point; When the CRPR increment is greater than the CRPR threshold, then use the current node as the target CRPR common point and generate a corresponding CRPR mark; When the CRPR increment is not greater than the CRPR threshold, then do not use the current node as the target CRPR common point and do not generate a corresponding CRPR mark.

7. The common point processing system according to claim 1, wherein The process by which the processing module determines whether the current node is a potential CRPR common point is as follows: Determine whether the current node is a driving pin and has at least two fan-outs. If so, determine that the current node is a potential CRPR common point; if not, determine that the current node is not a potential CRPR common point.

8. The common point processing system according to claim 1, wherein The process by which the processing module obtains the CRPR increment between the current node and the previous target CRPR common point is as follows: Determine the previous target CRPR common point; Obtain the CRPR value of the previous target CRPR common point by obtaining the difference between the maximum delay and the minimum delay propagated to the previous target CRPR common point; Obtain the CRPR value of the current node by obtaining the difference between the maximum delay and the minimum delay propagated to the current node; Obtain the CRPR increment by obtaining the difference between the CRPR value of the current node and the CRPR value of the previous target CRPR common point.

9. An electronic device, comprising a memory, a processor, and a computer program stored on the memory and capable of running on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the common point processing method according to any one of claims 1-5.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the common point processing method according to any one of claims 1 to 5.

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