One-time programmable device, one-time programmable memory and memory chip

Through the combined structure of magnetic tunnel junction and spin orbit moment layer, the short circuit and circuit breaking mechanisms are used to realize one-time write of data "0" and "1", which solves the problem that data "1" is easily erased in MRAM, and improves the reliability of data storage and read stability.

CN120260639APending Publication Date: 2025-07-04BEIHANG UNIV
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Patent Information

Application Number
CN202510226764.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-02-27
Publication Date
2025-07-04

AI Technical Summary

Technical Problem

In the prior art, magnetic random access memory (MRAM) has the risk that data "1" is easily erased and reprogrammed in a one-time programmable memory, resulting in insufficient data storage reliability.

Method used

The combined structure of magnetic tunnel junction and spin track moment layer is adopted, and the data "0" and "1" can be written through short circuit and circuit breaker mechanisms are used to write data "0" in the short circuit situation, and the spin track moment layer writes data "1" in the open circuit situation, and the failure of the spin track moment layer is accelerated through the corner structure and narrow parts.

Benefits of technology

It improves the reliability and read stability of data storage, ensures that data is not easily erased after writing, and enhances the reliability and read accuracy of data storage.

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Abstract

The invention provides a one-time programmable device, a one-time programmable memory and a memory chip, the one-time programmable device comprises a magnetic tunnel junction and a spin-orbit moment layer, the magnetic tunnel junction is used for realizing one-time writing of a first bit under the condition of short circuit, and the spin-orbit moment layer is used for realizing one-time writing of a second bit under the condition of short circuit. The spin-orbit moment layer is used to enable a one-time write of a second bit in the event of an open circuit, the spin-orbit moment layer being asymmetric with respect to a plane passing through the magnetic tunnel junction. The invention provides a one-time programmable device, a one-time programmable memory and a memory chip. The reliability of data storage of the one-time programmable device is improved.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and particularly to a one-time programmable device, a one-time programmable memory, a storage chip, and a data writing method for a one-time programmable device. Background Art

[0002] One-Time Programming (OTP) refers to an electronic programming technology that allows users to program a memory or other types of non-volatile storage devices once. Once the programming is completed, the data is permanently stored and cannot be erased or changed.

[0003] In terms of hardware security, an encryption key or authentication information can be stored in a one-time programmable memory to prevent information from being tampered with. In the prior art, a Magnetic Random Access Memory (MRAM) can be used as a storage medium for OTP. For example, a part of a Spin Transfer Torque Magnetic Random Access Memory (STT-MRAM) array can be divided into MTJ-OTP to store data with extremely high reliability requirements. The basic unit structure of STT-MRAM is a Magnetic Tunnel Junction (MTJ). During the one-time programming process, data "0" can be written by breaking down the MTJ, while the writing of data "1" is similar to the writing of data "1" in a reprogrammable memory, so there is a risk that data "1" can be erased and reprogrammed. Therefore, how to improve the reliability of data storage in a one-time programmable device has become the main problem to be solved in this field. Summary of the Invention

[0004] In view of the problems in the prior art, embodiments of the present invention provide a one-time programmable device, a one-time programmable memory, a storage chip, and a data writing method for a one-time programmable device, which can at least partially solve the problems existing in the prior art.

[0005] In a first aspect, the present invention provides a one-time programmable device, including a magnetic tunnel junction and a spin orbit torque layer. The magnetic tunnel junction is used to achieve one-time writing of a first bit in a short-circuit situation, and the spin orbit torque layer is used to achieve one-time writing of a second bit in an open-circuit situation. The spin orbit torque layer is asymmetric with respect to a plane passing through the magnetic tunnel junction.

[0006] Further, the spin orbit torque layer includes a corner structure.

[0007] Further, the spin-orbit torque layer includes two corner structures, the two corner structures are located on both sides of the magnetic tunnel junction, and the distance between the two corner structures is less than a preset multiple of the width of the magnetic tunnel junction.

[0008] Further, the spin-orbit torque layer includes a narrow portion.

[0009] Further, there are two magnetic tunnel junctions, the spin-orbit torque layer includes a first region and a second region corresponding to the two magnetic tunnel junctions, and the first region and the second region are respectively used to achieve one-time writing of the second bit in the case of an open circuit.

[0010] Further, the first region includes a narrow portion and / or a corner structure, and the second region includes a narrow portion and / or a corner structure.

[0011] Further, the magnetic tunnel junction is replaced by a metal or a half-metal, and the channel where the metal or the half-metal is located coincides with the channel where the spin-orbit torque layer is located.

[0012] In a second aspect, the present invention provides a one-time programmable memory, including a plurality of memory cells, and each memory cell includes the one-time programmable device described in any of the above embodiments.

[0013] In a third aspect, the present invention provides a memory chip, including the one-time programmable memory described in the above embodiments of the claims.

[0014] In a fourth aspect, the present invention provides a data writing method for a one-time programmable device, which is applied to the one-time programmable device described in any of the above embodiments, and includes:

[0015] Applying a first current to the magnetic tunnel junction to short-circuit the magnetic tunnel junction to achieve one-time writing of the first bit; and / or

[0016] Applying a second current to the spin-orbit torque layer to open the spin-orbit torque layer to achieve one-time writing of the second bit.

[0017] In a fifth aspect, the present invention provides a computer device, including a memory, a processor, and a computer program stored on the memory, and the processor executes the program to implement the data writing method for the one-time programmable device described in the above embodiments.

[0018] In a sixth aspect, the present invention provides a computer-readable storage medium, and the computer-readable storage medium stores a computer program / instructions, and when the computer program / instructions are executed by a processor, the data writing method for the one-time programmable device described in the above embodiments is implemented.

[0019] In a seventh aspect, the present invention provides a computer program product, including a computer program / instructions, which when executed by a processor implement the data writing method for a one-time programmable device described in the above embodiments.

[0020] The one-time programmable device, one-time programmable memory, storage chip and data writing method for a one-time programmable device provided by the embodiments of the present invention include a magnetic tunnel junction and a spin-orbit torque layer. The magnetic tunnel junction is used to achieve one-time writing of the first bit in the case of a short circuit, and the spin-orbit torque layer is used to achieve one-time writing of the second bit in the case of an open circuit, improving the reliability of data storage in the one-time programmable device. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings. In the drawings:

[0022] Figure 1 is a schematic perspective view of a one-time programmable device provided by the first embodiment of the present invention.

[0023] Figure 2 is a schematic perspective view of a one-time programmable device provided by the second embodiment of the present invention.

[0024] Figure 3 is a schematic top view of a one-time programmable device provided by the third embodiment of the present invention.

[0025] Figure 4 is a schematic top view of a one-time programmable device provided by the fourth embodiment of the present invention.

[0026] Figure 5 is a schematic top view of a one-time programmable device provided by the fifth embodiment of the present invention.

[0027] Figure 6 is a schematic top view of a one-time programmable device provided by the sixth embodiment of the present invention.

[0028] Figure 7 is a schematic top view of a one-time programmable device provided by the seventh embodiment of the present invention.

[0029] Figure 8 is a schematic top view of a one-time programmable device provided by the eighth embodiment of the present invention.

[0030] Figure 9It is a schematic structural diagram of a one-time programmable memory provided by the ninth embodiment of the present invention.

[0031] Figure 10 It is a schematic structural diagram of a one-time programmable memory provided by the tenth embodiment of the present invention.

[0032] Figure 11 It is a schematic flowchart of a data writing method for a one-time programmable device provided by the eleventh embodiment of the present invention.

[0033] Figure 12 It is a schematic physical structure diagram of a computer device provided by the twelfth embodiment of the present invention. Detailed implementation manners

[0034] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer and more understandable, the following further describes the embodiments of the present invention in detail with reference to the accompanying drawings. Herein, the illustrative embodiments of the present invention and their descriptions are used to explain the present invention, but not to limit the present invention. It should be noted that, without conflict, the embodiments in this application and the features in the embodiments can be arbitrarily combined with each other. The acquisition, storage, use, processing, etc. of data in the technical solutions in this application all comply with the relevant regulations of laws and regulations. The user information in the embodiments of this application is obtained through legal and compliant channels, and the acquisition, storage, use, processing, etc. of the user information have obtained the authorization and consent of the customers.

[0035] To facilitate the understanding of the technical solutions provided in this application, the following first explains the relevant content of the technical solutions in this application.

[0036] Data 0 is stored by short-circuiting the MTJ. Since the short-circuit unit is less affected by external factors such as temperature, the data storage is more reliable. Through research, it is found that due to the heat dissipation of the MTJ, the heat generation at each part of the SOT layer is not uniform, and the local overheating of the SOT layer can cause the failure of the SOT layer. Based on the open circuit of the SOT layer caused by the unstable distribution of heat generation, the read path is opened, and the one-time programming of data 1 can be achieved. Therefore, this application proposes a one-time programmable device, which realizes the one-time writing of data 0 and 1 based on the short-circuit caused by MTJ breakdown and the open circuit of the SOT channel failure, improving the reliability of data storage and the stability of data reading.

[0037] Figure 1 It is a three-dimensional structural diagram of a one-time programmable device provided by the first embodiment of the present invention, as Figure 1As shown in the figure, the one-time programmable device provided by the embodiment of the present invention includes a magnetic tunnel junction 1 and a spin-orbit torque layer 2. The magnetic tunnel junction 1 is used to achieve one-time writing of the first bit in the case of a short circuit, and the spin-orbit torque layer 2 is used to achieve one-time writing of the second bit in the case of an open circuit. The spin-orbit torque layer 2 is asymmetric with respect to the plane passing through the magnetic tunnel junction.

[0038] Specifically, the magnetic tunnel junction (Magnetic Tunnel Junction, abbreviated as MTJ) 1 and the spin-orbit torque (Spin-orbit torque, abbreviated as SOT) layer 2 are connected. When a first current is applied to the MTJ 1 and the MTJ 1 is broken down and short-circuited, one-time writing of the first bit can be achieved; when a second current is applied to the SOT layer 2 and the SOT layer 2 is open-circuited, one-time writing of the second bit can be achieved. Among them, the first current and the second current are set according to actual needs, and the embodiments of the present invention do not make any limitations. The MTJ 1 may include a free layer, a barrier layer, a fixed layer, etc., which are set according to actual needs, and the embodiments of the present invention do not make any limitations. The shape of the MTJ 1 includes but is not limited to an ellipse, a rectangle, a triangle, a rhombus, etc., which are selected according to actual needs, and the embodiments of the present invention do not make any limitations. The SOT layer 2 is asymmetric with respect to the plane passing through the magnetic tunnel junction 1, that is, any plane passing through the magnetic tunnel junction 1 will not be the symmetric plane of the SOT layer 2.

[0039] The open circuit of the SOT layer 2 may be caused by at least one of reasons such as electromigration, self-heating effect, local overheating, local accelerated aging, etc. To reduce the second current applied to the SOT layer 2 or enable the SOT layer 2 to have an open circuit as soon as possible, the local cross-sectional area of the SOT layer 2 can be reduced.

[0040] For example, as Figure 1 shown, when a first current is input through the A1-A2 path, the MTJ 1 is broken down and short-circuited to achieve the writing of data 0. After the MTJ 1 is broken down and short-circuited, the resistance of the A1-A2 path will drop sharply. When a second current is applied to the A2-A3 path, at the corner structure of the SOT layer 2, due to the uneven distribution of channel heating, local accelerated aging failure will cause the SOT layer 2 to be open-circuited at or near the corner structure, achieving the writing of data 1. The open circuit of the A2-A3 path will cause the resistance to rise sharply. Detect the resistance R1 of the A1-A2 path. If the resistance R1 is less than the reference resistance R0, then data 0 can be read out; detect the resistance R2 of the A2-A3 path. If the resistance R2 is greater than the reference resistance R0, then data 1 can be read out. It can be understood that Figure 1 shown, for the one-time writing of a single-bit data realized by the one-time programmable device, under the condition of no external excitation, if 0 is written, 1 will not be written again, and if 1 is written, 0 cannot be written again.

[0041] For example, as Figure 2 shown, when a first current is input into the A1 - A2 path, after MTJ 1 breaks down and becomes short - circuited, data 0 is written. After MTJ1 breaks down and becomes short - circuited, the resistance of the A1 - A2 path drops sharply. When a second current is input into the A1 - A2 path, at the corner structure of the SOT layer 2, due to the non - uniform distribution of channel heating, local accelerated aging failure occurs, which will cause the SOT layer 2 to break down at or near the corner structure, and data 1 is written. The break - down of the A1 - A2 path will cause the resistance to rise sharply. Whether MTJ 1 is short - circuited or not does not affect the break - down of the A1 - A2 path. By detecting the resistance R1 of the A1 - A2 path, if the resistance R1 is less than the reference resistance R0, then data 0 can be read out; if the resistance R1 is greater than the reference resistance R0, then data 1 can be read out.

[0042] Since the breakdown and short - circuit of MTJ 1 and the break - down of the SOT layer 2 are both irreversible, the state after data writing can be maintained stably for a long time, improving the reliability of one - time data writing, and thus improving the data storage reliability of one - time programmable devices. In addition, the read margin is greatly increased, improving the stability of data reading.

[0043] The one - time programmable device provided by the embodiment of the present invention includes a magnetic tunnel junction and a spin - orbit torque layer. The magnetic tunnel junction is used to achieve one - time writing of the first bit in the case of short - circuit, and the spin - orbit torque layer is used to achieve one - time writing of the second bit in the case of break - down, improving the reliability of the one - time programmable device.

[0044] Figure 3 is a top - view structural schematic diagram of the one - time programmable device provided by the third embodiment of the present invention. As Figure 3 shown, on the basis of the above - mentioned embodiments, further, the SOT layer 2 includes a corner structure. At the corner structure of the SOT layer 2, the heat generation is relatively serious, which easily causes the SOT layer 2 to break down. By setting the corner structure, the second current applied to the SOT layer 2 can be reduced and / or the writing time of the second bit can be reduced.

[0045] For example, as Figure 3 shown, the SOT layer 2 includes a corner structure with an angle θ. The size of the angle θ is set according to actual needs and is not limited in the embodiment of the present invention. For example, the angle θ is an acute angle, a right angle or an obtuse angle.

[0046] Figure 4 is a top - view structural schematic diagram of the one - time programmable device provided by the fourth embodiment of the present invention. As Figure 4As shown, on the basis of the above embodiments, further, the SOT layer 2 includes two corner structures, the two corner structures are located on both sides of the MTJ1, and the distance between the two corner structures is less than a preset multiple of the width of the MTJ 1.

[0047] Since the heat generation at the corner structure of the SOT layer 2 is relatively serious, it is easy to cause a break in the SOT layer 2. By setting two corner structures and restricting the distance between the two corner structures, it is possible to make it easier for breaks to occur at the two corners, and as long as a break occurs at any one of the two corner structures, the one-time writing of the second bit can be achieved. The preset multiple is set according to actual experience and is not limited in the embodiments of the present invention.

[0048] For example, as Figure 4 shown, the two corner structures included in the SOT layer 2 respectively have an angle θ and an angle λ, the angle θ and the angle λ may be equal or not equal, the angle θ may be an acute angle, a right angle or an obtuse angle, and the angle λ may be an acute angle, a right angle or an obtuse angle.

[0049] Figure 5 is a top view structural schematic diagram of the one-time programmable device provided by the fifth embodiment of the present invention. As Figure 5 shown, on the basis of the above embodiments, further, the SOT layer 2 includes a narrow portion 2-1. The narrow portion 2-1 may be formed by the cross-section of the SOT layer 2 becoming smaller. The heat generation at the narrow portion 2-1 is relatively serious compared to other parts of the SOT layer 2, and it is easy to cause a break in the SOT layer 2. The specific size of the narrow portion 2-1 is set according to actual needs and is not limited in the embodiments of the present invention.

[0050] Figure 6 is a top view structural schematic diagram of the one-time programmable device provided by the sixth embodiment of the present invention. As Figure 6 shown, on the basis of the above embodiments, further, there are two MTJ 1s, and the SOT layer 2 includes a first region 2-2 and a second region 2-3 corresponding to the two MTJ 1s. The first region 2-2 and the second region 2-3 are respectively used to achieve the one-time writing of the second bit in the case of a break.

[0051] Specifically, the SOT layer 2 is connected to the two MTJ 1s. The two MTJ 1s may be located on the same side of the SOT layer 2 or on both sides of the SOT layer 2. Each MTJ 1 is used to achieve the one-time writing of the first bit in the case of a short circuit. The SOT layer 2 includes a first region 2-2 and a second region 2-3 corresponding to the two MTJ 1s. The first region 2-2 is used to achieve the one-time writing of the second bit in the case of a break, and the second region 2-3 is used to achieve the one-time writing of the second bit in the case of a break. Therefore, the one-time programmable device in the embodiments of the present invention can achieve the one-time writing of 2-bit data.

[0052] The open circuit of the first region 2-2 and the second region 2-3 may be caused by at least one of electromigration, self-heating effect, local overheating, local accelerated aging, etc. To reduce the second current applied to the first region 2-2 and the second region 2-3 or to enable the open circuit of the SOT layer 2 to occur as soon as possible, the local cross-sectional area of the SOT layer 2 can be reduced.

[0053] Based on the above embodiments, further, the first region 2-2 includes a narrow portion and / or a corner structure, and the second region 2-3 includes a narrow portion and / or a corner structure.

[0054] For example, as Figure 6 shown, the first region 2-2 includes a narrow portion, and the narrow portion of the first region 2-2 easily causes an open circuit in the first region 2-2. The second region 2-3 includes a narrow portion, and the narrow portion of the second region 2-3 easily causes an open circuit in the second region 2-3.

[0055] For example, as Figure 7 shown, the first region 2-2 includes a corner structure, and the corner structure of the first region 2-2 easily causes an open circuit in the first region 2-2. The second region 2-3 includes a corner structure, and the corner structure of the second region 2-3 easily causes an open circuit in the second region 2-3.

[0056] For example, as Figure 8 shown, the first region 2-2 includes a narrow portion, and the narrow portion of the first region 2-2 easily causes an open circuit in the first region 2-2. The second region 2-3 includes a corner structure, and the corner structure of the second region 2-3 easily causes an open circuit in the second region 2-3.

[0057] Based on the above embodiments, further, the MTJ 1 is replaced with a metal or a half-metal, and the channel where the metal or the half-metal is located coincides with the channel where the SOT layer 2 is located.

[0058] Specifically, due to the conductivity of metals and semimetals, after replacing MTJ 1, the metal or semimetal part is regarded as a short circuit, with a relatively small resistance. It can be defaulted that the one-time programmable device has been written with the first bit once; when it is necessary to write the second bit once, there is an open circuit in the SOT layer 2, causing an open circuit in the path where the metal or semimetal is located, with a relatively high resistance, and the one-time programmable device becomes written with the second bit once. After the one-time data writing, the data can be read by detecting the resistance of the channel. If the resistance of the channel is less than the threshold, then the first bit is read; if the resistance of the channel is greater than the threshold, then the second bit is read. Among them, the metal is selected according to actual needs, such as using Ti, which is not limited in the embodiments of the present invention. The semimetal is selected according to actual needs, which is not limited in the embodiments of the present invention. The threshold is selected according to actual needs, which is not limited in the embodiments of the invention.

[0059] For example, in Figure 2 the shown structure, MTJ 1 is replaced with the metal Ti. In the A1 - A2 path, there is no need to break down MTJ 1 by inputting the first current again. Due to the conductivity of the metal Ti, the resistance of the A1 - A2 path is relatively small, and the one-time programmable device is defaulted to have been written with 0. If 1 needs to be written, a second current is passed through the A1 - A2 path. At the corner structure of the SOT layer 2, due to the non-uniform distribution of channel heating, local accelerated aging failure will cause an open circuit at or near the corner structure of the SOT layer 2, realizing the writing of data 1. The open circuit of the A1 - A2 path will cause the resistance of the A1 - A2 path to rise sharply. By detecting the resistance R1 of the A1 - A2 path, if the resistance R1 is less than the reference resistance R0, then data 0 can be read; if the resistance R1 is greater than the reference resistance R0, then data 1 can be read.

[0060] Figure 9 is a schematic structural diagram of a one-time programmable memory provided by the ninth embodiment of the present invention. As Figure 9 shown, the embodiments of the present invention provide a one-time programmable memory, including a plurality of storage units 901, and each storage unit 901 includes the one-time programmable device 901 - 1 described in any of the above embodiments.

[0061] Specifically, the plurality of storage units 901 can be arranged in an array. Each storage unit 901 further includes a write transistor and a read transistor. The write transistor is used for writing operations, and the read transistor is used for reading operations. The one-time programmable memory may further include a reading circuit, a writing circuit, a peripheral conversion circuit, etc., which are set according to actual needs and are not limited in the embodiments of the present invention.

[0062] For example, in Figure 9As shown in the figure, the one-time programmable memory includes multiple storage units 901 arranged in an array, multiple word lines 902 arranged horizontally, and multiple bit lines 903 arranged vertically. The storage unit 901 includes a one-time programmable device 901-1, a first transistor 901-2, and a second transistor 901-3; the first transistor 901-2 is respectively connected to the word line 902 and the bit line 903, and the second transistor 901-3 is respectively connected to the word line 902 and the bit line 903; the first transistor 901-2 is connected to the MTJ 901-11 and is used to write the first bit into the MTJ 901-1 and read data from the MTJ 901-1. The second transistor 901-3 is connected to the SOT layer 901-12 and is used to write the second bit into the MTJ 901-1 and read data from the SOT layer 901-12. The one-time programmable device 901-1 uses Figure 1 The one-time programmable device shown.

[0063] For example, as Figure 10 shown, the one-time programmable memory includes multiple storage units 101 arranged in an array, multiple word lines 102 arranged horizontally, and multiple bit lines 103 arranged vertically. The storage unit 101 includes a one-time programmable device 101-1 and a third transistor 101-2; the third transistor 101-2 is respectively connected to the word line 102 and the bit line 103; the third transistor 101-2 is connected to the MTJ 101-11, and the MTJ 101-11 is arranged on the SOT 101-12. The third transistor 101-2 is used to write the first bit or the second bit into the one-time programmable device 101-1 and read data from the one-time programmable device 101-1. The one-time programmable device 101-1 can use Figure 2 The one-time programmable device shown.

[0064] An embodiment of the present invention provides a storage chip, including the one-time programmable memory described in any of the above embodiments. The one-time programmable memory is used as a part of a storage chip or other functional chips. For example, in chips such as a Physical Unclonable Function (PUF) and a True Random Number Generator (TRNG), an array is divided as the one-time programmable memory for OTP operations.

[0065] Figure 11 It is a schematic flowchart of the data writing method of the one-time programmable device provided in the eleventh embodiment of the present invention. As Figure 11 shown, the data writing method of the one-time programmable device provided in the embodiment of the present invention is applied to the one-time programmable device described in any of the above embodiments and includes:

[0066] Apply a first current to the magnetic tunnel junction to short-circuit the magnetic tunnel junction, thereby achieving one-time writing of the first bit;

[0067] Apply a second current to the spin-orbit torque layer to open the spin-orbit torque layer, thereby achieving one-time writing of the second bit.

[0068] Specifically, for the one-time programmable device provided by the embodiments of the present invention, a first current can be applied to the MTJ to short-circuit the MTJ due to breakdown, thereby achieving one-time writing of the first bit. A second current is applied to the SOT layer to open the SOT layer, thereby achieving one-time writing of the second bit. Among them, the first current and the second current are set according to actual needs, and the embodiments of the present invention do not make any limitations.

[0069] For a one-time programmable device for writing 1-bit data, steps S1101 and S1102 are in an OR relationship and only one of them will be executed. For a one-time programmable device for writing 2-bit data, steps S1101 and S1102 are in an AND relationship, and steps S1101 and S1102 can be executed separately and there is no order relationship.

[0070] The data writing method of the one-time programmable device provided by the embodiments of the present invention applies a first current to the magnetic tunnel junction to short-circuit the magnetic tunnel junction, thereby achieving one-time writing of the first bit; and / or applies a second current to the spin-orbit torque layer to open the spin-orbit torque layer, thereby achieving one-time writing of the second bit, which can improve the reliability of data writing of the one-time programmable device.

[0071] For the embodiments of the data writing method of the one-time programmable device provided by the embodiments of the present invention, its functions will not be elaborated here, and reference can be made to the detailed description of the embodiments of the above one-time programmable device.

[0072] It is allowed that the bottom electrode widths of different MTJs are different; it is allowed that different MTJs have different sizes; it is allowed that there are different spacings between different MTJs; it is allowed that multiple MTJs are placed on the same heavy metal.

[0073] It is allowed to form an actual connection by means of a bottom via / top via of the SOT channel, etc.

[0074] The shape of the bottom electrode is not limited. It can be strip-shaped, cross-shaped, Y-branch-shaped, or 6P or 8P electrode-shaped.

[0075] The SOT channel can be above the MTJ, that is, from top to bottom are the SOT channel, free layer, barrier layer, reference layer, and pinned layer. It can be set in a form where two MTJs are respectively above and below the SOT.

[0076] Available shapes of the magnetic tunnel junction include, but are not limited to, shapes such as ellipses, rhombuses, etc. In addition to ellipses, shapes such as rectangles and triangles also have the same effect. Tilted semi - circles, isosceles triangles, etc. that do not have x / y axis symmetry after tilting are also within the scope of protection. Here, various symmetric structures based on these shapes are within the scope of protection of this patent.

[0077] The tilt angle between the MTJ and the SOT channel is selected according to actual needs, and is not limited in the embodiments of the present invention.

[0078] According to the different materials of the underlying spin - orbit coupling layer, the signs of the spin - Hall angles are different, and the polarization directions of the spin currents generated thereby are also different. Metals with negative spin - Hall angles such as W are preferably used. For metals such as Pt, the spin - Hall angle is positive. The difference in the sign of the spin - Hall angle means that the direction of the applied current is opposite.

[0079] A global multi - to - one reference resistor can be adopted, or a complementary pair - type local one - to - one reference resistor can be adopted, or a self - reference scheme can be adopted.

[0080] The connection method, quantity design, and layout design of the transistors in the storage unit are selected according to actual needs, and are not limited in the embodiments of the present invention.

[0081] The magnetic tunnel junction may include a fixed layer A3, a barrier layer A2, and a free layer A1 arranged in sequence from top to bottom. At least one of the cross - sections of the fixed layer A3, the barrier layer A2, and the free layer A1 is trapezoidal for providing the external magnetic field;

[0082] The material of the spin - orbit coupling layer is an antiferromagnetic material. The spin - orbit coupling layer and the free layer A1 form an exchange bias field for providing the external magnetic field;

[0083] The magnetic tunnel junction includes a magnetic material layer (such as a Co layer) for providing the external magnetic field;

[0084] The magnetic tunnel junction has a shape capable of forming a shape anisotropy field (inhomogeneous demagnetizing field) for providing the external magnetic field. In some embodiments, the magnetic tunnel junction can adopt shapes such as rectangles, ellipses, and isosceles right - angled triangles. Taking the ellipse as an example, the demagnetizing field in the long - axis direction is weaker than that in the short - axis direction, and this demagnetizing field can be equivalent to an external magnetic field;

[0085] The free layer A1 has a gradient of perpendicular magnetic anisotropy for providing an equivalent magnetic field of the applied magnetic field. Specifically, when fabricating the magnetic tunnel junction, the concentration of the target material can be adjusted so that the free layer A1 has a gradient of perpendicular magnetic anisotropy, further breaking the symmetry of the magnetic moment distribution, which can be used to provide an equivalent applied magnetic field. At this time, the free layer A1 can still be affected by interface interactions such as the DMI effect and other applied magnetic fields.

[0086] It should be noted that the magnetic field generating device or equivalent device that can form an applied magnetic field is a conventional technical means in the art, and those skilled in the art can flexibly set it according to needs, which will not be elaborated here. In addition, providing an applied magnetic field can also be achieved by making the cross-section of at least one of the fixed layer A3, the barrier layer A2, and the free layer A1 trapezoidal, forming an exchange bias field by using an antiferromagnetic material and the free layer A1, and setting a magnetic material layer. In practical applications, an applied magnetic field can also be formed by other feasible methods, and the present invention does not limit this.

[0087] In an alternative embodiment, the magnetic tunnel junction may include multiple free layers, barrier layers, insertion layers, and the like.

[0088] In an alternative embodiment, the available shapes of the magnetic tunnel junction include but are not limited to ellipse, isosceles triangle, rectangle, rhombus, etc. In addition to the ellipse, rectangles, triangles, etc. also have the same effect. Inclined semi-circles, isosceles triangles, etc. that do not have x / y axis symmetry after inclination are also within the scope of protection. Here, various symmetric structures based on these shapes are within the scope of protection of this patent.

[0089] The SOT channel can be above the MTJ, that is, from top to bottom are the SOT channel, free layer, barrier layer, reference layer, and pinned layer. It can be set in the form that two MTJs are respectively above and below the SOT.

[0090] For perpendicular magnetic anisotropy devices, or when the SOT current direction is parallel to the long axis of the in-plane magnetic anisotropy device when used alone, additional factors are required to cooperate with the SOT current, including but not limited to: ① an external magnetic field in the same direction as the SOT ② making the ferromagnetic layer or the barrier layer of the magnetic tunnel junction into a trapezoidal structure ③ when fabricating the magnetic tunnel junction, the concentration of the target material can be adjusted so that the free layer has a gradient of perpendicular magnetic anisotropy, further breaking the symmetry of the magnetic moment distribution ④ by incorporating a magnetic material such as an internal Co layer, the equivalent effect of an external magnetic field can be achieved ④ a strong spin-coupling layer can use an antiferromagnetic material to form an exchange bias field to replace the use of an external magnetic field, and so on.

[0091] In a preferred embodiment, the magnetic tunnel junction includes a fixed layer A3, a barrier layer A2, and a free layer A1 arranged in sequence from top to bottom. The bottom surface of the free layer A1 is fixedly connected to the spin-orbit coupling layer. It can be understood that the resistance of the magnetic tunnel junction depends on the magnetization directions of the fixed layer A3 and the free layer A1, and the magnetization directions of the free layer A1 and the fixed layer A3 are determined by the magnetic moment directions. Among them, when the magnetic moment directions of the fixed layer A3 and the free layer A1 are the same, the magnetic tunnel junction is in a low-resistance state (low-resistance state), and when the magnetic moment directions of the fixed layer A3 and the free layer A1 are opposite, the magnetic tunnel junction is in a high-resistance state (high-resistance state). Among them, the ranges of the high-resistance state and the low-resistance state are determined by common technical means in the art, and those skilled in the art can determine the resistance value ranges of the high-resistance state and the low-resistance state of the magnetic tunnel junction according to common knowledge, and the present invention will not elaborate herein.

[0092] The magnetic tunnel junction may further include at least one of layer structures such as an insertion layer, a pinning layer, a seed layer, and a capping layer. Among them, the setting of each layer structure can be set to one or more layers according to actual needs, and those skilled in the art can set the setting order of the layer structures of the magnetic tunnel junction from top to bottom according to needs, and the present invention does not limit this.

[0093] Optionally, the shape of the magnetic tunnel junction on the spin-orbit coupling layer can be any one of shapes such as a cube, a cylinder, a cube, or an elliptical cylinder. The bottom surface shape of at least one magnetic tunnel junction provided on the spin-orbit coupling layer, that is, the lower surface of the free layer A1 is coupled to the spin-orbit coupling layer.

[0094] Preferably, the spin-orbit coupling layer can be selected as a rectangle, so that the top surface area of the spin-orbit coupling layer is larger than the area occupied by at least one magnetic tunnel junction provided on the spin-orbit coupling layer, that is, at least one magnetic tunnel junction can be provided on the spin-orbit coupling layer, and the outer edge of at least one magnetic tunnel junction is located inside the outer edge of the spin-orbit coupling layer. Among them, the spin-orbit coupling layer is preferably selected as a heavy metal strip-shaped thin film or an antiferromagnetic strip-shaped thin film.

[0095] It should be noted that the magnetic tunnel junction on the spin-orbit coupling layer can be one or more. Preferably, a plurality of magnetic tunnel junctions can be provided on the same spin-orbit coupling layer, which can realize the one-time data writing operation of a plurality of magnetic tunnel junctions, reduce the number of control transistors for inputting the first current or the second current, and thus improve the integration degree and reduce the circuit power consumption.

[0096] In a preferred embodiment, when the magnetic random access memory cell inputs current to the spin-orbit coupling layer and the magnetic tunnel junction, the input can be achieved by disposing electrodes on the spin-orbit coupling layer and the magnetic tunnel junction. For example, a top electrode is disposed on the top of the magnetic tunnel junction, and an input electrode and an output electrode are respectively disposed on opposite sides of the spin-orbit coupling layer. Preferably, the material of the electrodes can be any one of tantalum (Ta), aluminum (Al), gold (Au), or copper (Cu).

[0097] Preferably, the materials of the free layer A1 and the fixed layer A3 can be ferromagnetic metals, and the material of the barrier layer A2 can be an oxide. The magnetic tunnel junction has perpendicular magnetic anisotropy, which means that the magnetization directions of the free layer A1 and the fixed layer A3 forming the magnetic tunnel junction are along the vertical direction. Among them, the ferromagnetic metal can be a mixed metal material formed by at least one of materials such as cobalt iron (CoFe), cobalt iron boron (CoFeB), or nickel iron (NiFe), and the ratios of the mixed metal materials can be the same or different. The oxide can be one of oxides such as magnesium oxide (MgO) or aluminum oxide (Al2O3), which is used to generate the tunneling magnetoresistance effect. In practical applications, other feasible materials can also be used for the ferromagnetic metal and the oxide, and the present invention does not limit this.

[0098] The free layer A1 of the magnetic tunnel junction is in contact and fixed with the spin-orbit coupling layer. The layers of the magnetic tunnel junction and the spin-orbit coupling layer can be sequentially deposited on the substrate in order from bottom to top by traditional methods such as ion beam epitaxy, atomic layer deposition, or magnetron sputtering, and then multiple magnetic tunnel junctions can be prepared by traditional nano-device processing techniques such as photolithography and etching.

[0099] In a preferred embodiment, the spin-orbit coupling layer is a spin-orbit coupling layer composed of a heavy metal thin film, an antiferromagnetic thin film, or other materials. The heavy metal thin film or the antiferromagnetic thin film can be made rectangular, and its top area is preferably larger than the bottom area of the contour formed by all the magnetic tunnel junctions, so as to be able to dispose one or more magnetic tunnel junctions, and the bottom shape of the magnetic tunnel junction is completely embedded in the top shape of the heavy metal thin film or the antiferromagnetic thin film. Preferably, the material of the spin-orbit coupling layer can be selected from one of materials such as platinum (Pt), tantalum (Ta), or tungsten (W). In practical applications, the spin-orbit coupling layer can also be formed by other feasible materials, and the present invention does not limit this.

[0100] In this embodiment, the magnetic tunnel junction includes a fixed layer A3 at the top, a free layer A1 in contact with the spin-orbit coupling layer, and a barrier layer A2 disposed between the fixed layer A3 and the free layer A1. The magnetic tunnel junction has a three-layer structure and includes only one free layer A1. In other embodiments, the free layer A1 can be provided as multiple, that is, more than two free layers A1. Then the magnetic tunnel junction includes a fixed layer A3 at the top, multiple free layers A1, and a barrier layer A2 disposed between every two adjacent layers. The lowermost free layer A1 is disposed in contact with the spin-orbit coupling layer. For example, in a specific example, when two free layers A1 are included, the magnetic storage unit structure can include a spin-orbit coupling layer, a first free layer A1, a barrier layer A2, a second free layer A1, a barrier layer A2, and a fixed layer A3 sequentially disposed on the spin-orbit coupling layer.

[0101] The devices, modules or units illustrated in the above embodiments can be specifically implemented by a computer chip or an entity, or by a product with certain functions. A typical implementation device is a computer device. Specifically, the computer device can be, for example, a personal computer, a laptop computer, a cellular phone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.

[0102] In a typical example, the computer device specifically includes a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the program, the data writing method of the above one-time programmable device is implemented.

[0103] Next, refer to Figure 12 , which shows a schematic structural diagram of a computer device suitable for implementing the embodiments of the present application.

[0104] As Figure 12 shown, the computer device includes a central processing unit (CPU) 601, which can perform various appropriate operations and processes according to the program stored in the read-only memory (ROM) 602 or the program loaded from the storage section 608 into the random access memory (RAM) 603. In the RAM 603, various programs and data required for the operation of the computer device are also stored. The CPU 601, the ROM 602, and the RAM 603 are connected to each other through a bus 604. The input / output (I / O) interface 605 is also connected to the bus 604.

[0105] The following components are connected to the I / O interface 605: an input section 606 including a keyboard, a mouse, etc.; an output section 607 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc. as well as a speaker, etc.; a storage section 608 including a hard disk, etc.; and a communication section 609 including a network interface card such as a LAN card, a modem, etc. The communication section 609 performs communication processing via a network such as the Internet. A drive 610 is also connected to the I / O interface 605 as needed. A removable medium 611 such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc. is mounted on the drive 610 as needed so as to read out a computer program therefrom.

[0106] Specifically, according to an embodiment of the present invention, the processes described above with reference to the flowcharts can be implemented as a computer software program. For example, an embodiment of the present invention provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the steps of the data writing method for the quasi-two-terminal SOT device described above are implemented.

[0107] For example, an embodiment of the present invention provides a computer program product, the computer program product including a computer program stored on a non-transitory computer-readable storage medium, the computer program including program instructions, and when the program instructions are executed by a computer, the computer can execute the data writing method for the one-time programmable device described above.

[0108] In such an embodiment, the computer program can be downloaded and installed from a network through the communication section 609, and / or installed from the removable medium 611.

[0109] Computer-readable media includes both permanent and non-permanent, removable and non-removable media and can store information by any method or technology. The information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, compact disc read-only memory (CD-ROM), digital versatile disc (DVD) or other optical storage, magnetic cassette tapes, magnetic tape disk storage or other magnetic storage devices, or any other non-transitory medium that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable media does not include transitory media such as modulated data signals and carrier waves.

[0110] For the convenience of description, when describing the above device, various units are described separately according to their functions. Of course, when implementing the present application, the functions of each unit can be implemented in one or more software and / or hardware.

[0111] The present invention is described with reference to the flowcharts and / or block diagrams of methods, apparatuses (systems), and computer program products according to embodiments of the present invention. It should be understood that each flow and / or block in the flowchart and / or block diagram, and the combination of flows and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing devices to generate a machine, such that the instructions executed by the processor of the computer or other programmable data processing devices generate a device for implementing the specified functions in Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks.

[0112] These computer program instructions can also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, such that the instructions stored in the computer-readable memory generate a manufactured article including an instruction device, and the instruction device implements the specified functions in Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks.

[0113] These computer program instructions can also be loaded onto a computer or other programmable data processing device, such that a series of operation steps are executed on the computer or other programmable device to generate a computer-implemented process, and thus the instructions executed on the computer or other programmable device provide steps for implementing the specified functions in Figure 1 one flow or multiple flows and / or blocks Figure 1 one block or multiple blocks.

[0114] It should also be noted that the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, such that a process, method, commodity or device including a series of elements not only includes those elements but also includes other elements not expressly listed, or also includes elements inherent to such process, method, commodity or device. Without further limitation, an element defined by the statement "comprising a..." does not exclude the presence of additional identical elements in the process, method, commodity or device including the said element.

[0115] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system, or a computer program product. Therefore, the present application can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0116] The present application can be described in the general context of computer-executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types. The present application can also be practiced in a distributed computing environment where tasks are performed by remote processing devices connected through a communication network. In a distributed computing environment, program modules can be located in local and remote computer storage media including storage devices.

[0117] Each embodiment in this specification is described in a progressive manner. For the same or similar parts among the embodiments, reference can be made to each other. Each embodiment focuses on the differences from other embodiments. In particular, for the system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and reference can be made to the relevant parts of the method embodiment for the related content.

[0118] The above description is only for the embodiments of the present application and is not intended to limit the present application. For those skilled in the art, various changes and modifications can be made to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included within the scope of the claims of the present application.

Claims

1. A one-time programmable device, characterized in that, Comprising a magnetic tunnel junction and a spin-orbit torque layer, the magnetic tunnel junction is used to achieve one-time writing of a first bit in a short-circuit case, and the spin-orbit torque layer is used to achieve one-time writing of a second bit in an open-circuit case, and the spin-orbit torque layer is asymmetric with respect to a plane passing through the magnetic tunnel junction.

2. The one-time programmable device according to claim 1, characterized in that, The spin-orbit torque layer includes a corner structure.

3. The one-time programmable device according to claim 1, characterized in that, The spin-orbit torque layer includes two corner structures, the two corner structures are located on both sides of the magnetic tunnel junction and the distance between the two corner structures is less than a preset multiple of the width of the magnetic tunnel junction.

4. The one-time programmable device according to claim 1, characterized in that, The spin-orbit torque layer includes a narrow portion.

5. The one-time programmable device according to claim 1, wherein There are two magnetic tunnel junctions, and the spin-orbit torque layer includes a first region and a second region corresponding to the two magnetic tunnel junctions, and the first region and the second region are respectively used to achieve one-time writing of a second bit in an open-circuit case.

6. The one-time programmable device according to claim 5, wherein The first region includes a narrow portion and / or a corner structure, and the second region includes a narrow portion and / or a corner structure.

7. The one-time programmable device according to any one of claims 1 to 6, characterized in that, The magnetic tunnel junction is replaced by a metal or a half-metal, and the channel where the metal or the half-metal is located coincides with the channel where the spin-orbit torque layer is located.

8. A one-time programmable memory, characterized in that, Comprising a plurality of storage units, each storage unit includes the one-time programmable device according to any one of claims 1 to 7.

9. A storage chip, characterized in that, Comprising the one-time programmable memory according to claim 7.

10. A method for writing data into a one-time programmable device, characterized in that, Applied to the one-time programmable device according to any one of claims 1 to 7, including: Applying a first current to the magnetic tunnel junction to short-circuit the magnetic tunnel junction to achieve one-time writing of a first bit; and / or Applying a second current to the spin-orbit torque layer to open-circuit the spin-orbit torque layer to achieve one-time writing of a second bit.