A compact silicon-based EMI filter and method of manufacturing the same

By setting up a semiconductor silicon substrate, dielectric layer and polycrystalline silicon layer that cooperate with each other in a compact silicon-based EMI filter to form a filter capacitor and resistor structure, the problems of large size and high cost of silicon-based EMI filters are solved, achieving miniaturization and cost reduction, making it suitable for small portable electronic devices.

CN120263129BActive Publication Date: 2025-12-26SHENZHEN JINGYANG ELECTRONICS CO LTD
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Patent Information

Application Number
CN202510320447.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-03-18
Publication Date
2025-12-26
Estimated Expiration
2045-03-18

AI Technical Summary

Technical Problem

Existing silicon-based EMI filters are too large and have high manufacturing costs, making it difficult to meet the needs of small portable electronic devices.

Method used

By setting a semiconductor silicon substrate, a first dielectric layer, a first low-resistivity polysilicon layer, a second dielectric layer, and a second low-resistivity polysilicon layer in a compact silicon-based EMI filter, using the first and second dielectric layers as filter capacitors, the high-resistivity polysilicon as filter resistors, and the first and second low-resistivity polysilicon layers as electrical interconnects, an EMI filtering path is formed to achieve signal filtering.

Benefits of technology

The size of silicon-based EMI filters has been significantly reduced, manufacturing costs have been lowered, and they are suitable for small portable electronic devices, thus expanding their applicability.

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Abstract

The application provides a compact silicon-based EMI filter and a manufacturing method thereof, which comprises a high-resistance polysilicon layer additionally arranged in a first low-resistance polysilicon layer, the first dielectric layer, the second dielectric layer, the first low-resistance polysilicon layer and the high-resistance polysilicon layer can form a C-R-C filter circuit, the upper surface of a semiconductor silicon substrate is provided with a first metal conductive layer connected with an I / O port 1 and a second metal conductive layer connected with an I / O port 2, the semiconductor silicon substrate is further provided with an insulating passivation layer and a grounded metal electrode GND, the second low-resistance polysilicon layer is separated into a signal conduction part, a filter grounding part electrically connected with the metal electrode GND and the signal conduction part by the insulating passivation layer, and an EMI filter path is formed between the first low-resistance polysilicon layer and the filter grounding part of the second low-resistance polysilicon layer. The application has the beneficial effects of realizing a significant reduction in the volume of the silicon-based EMI filter and reducing the manufacturing cost.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of filter, in particular to a compact silicon-based EMI filter and a manufacturing method thereof. BACKGROUND

[0002] Low-pass filter is an electronic device that allows low-frequency signals to pass while suppressing high-frequency signals, commonly used in data transmission, signal processing and electromagnetic interference (EMI) applications. Filter circuit can generally be built using resistance R, capacitance C and inductance L. For RC type low-pass filter, resistance elements and capacitance elements need to be combined skillfully, because these two parameters will directly affect the performance of the filter, thereby affecting the applicability and stability of the filter in the actual circuit.

[0003] When manufacturing the above-mentioned RC type low-pass filter using silicon-based semiconductor process, a large area of layout is usually occupied to achieve a larger capacitance, which increases the manufacturing cost and hinders the further miniaturization of product package appearance.

[0004] However, with the steady growth of miniaturization trend in semiconductor electronic industry, silicon-based capacitor has become a very attractive capacitor option with its high reliability, small size, high stability, high density, easy packaging and other advantages, and the market space is also increasing year by year. To further improve the integrated density of the capacitor, a process mode of multi-layer dielectric-polysilicon-dielectric alternately stacked can be used.

[0005] Figure 1(a) shows the circuit equivalent diagram of a typical p-type C-R-C low-pass filter, which is composed of R and C in series and parallel. Figure 1(b) shows a typical p-type C-R-C low-pass filter frequency characteristic curve diagram, S21 represents the insertion loss, which reflects the amplitude and phase change of the signal passing through the measured device. The cut-off frequency is the frequency at which the filter begins to attenuate signals of a particular frequency, and the frequency corresponding to -3 dB is usually defined as the cut-off frequency.

[0006] Figure 2 The existing silicon-based capacitor structure is shown, which adopts a multi-layer "dielectric-polysilicon-dielectric" stacked structure. This process mode uses dielectric layer as filter capacitor and heavily doped polysilicon as electrical interconnection, which can further improve the integrated density of the capacitor. However, for people, the volume of the EMI filter with this structure is still large, and the manufacturing cost is still high, especially in the use of small portable electronic devices, it is still difficult to meet people's use demand. SUMMARY

[0007] To solve the problems in the prior art, the application provides a compact silicon-based EMI filter and a manufacturing method thereof, which are characterized by the following steps: a semiconductor silicon substrate is provided; a first dielectric layer, a first low-resistance polysilicon layer, a second dielectric layer and a second low-resistance polysilicon layer are sequentially arranged in the semiconductor silicon substrate; a high-resistance polysilicon layer is arranged in the first low-resistance polysilicon layer; the first dielectric layer and the second dielectric layer can form filter capacitors; the high-resistance polysilicon layer can form a filter resistor in the first low-resistance polysilicon layer; the first dielectric layer, the second dielectric layer, the first low-resistance polysilicon layer and the high-resistance polysilicon layer can form a C-R-C filter circuit; a first metal conductive layer connected with an I / O port one and a second metal conductive layer connected with an I / O port two are arranged on the upper surface of the second low-resistance polysilicon layer; an insulating passivation layer and a grounded metal electrode GND are arranged on the upper surface of the second low-resistance polysilicon layer; the second low-resistance polysilicon layer is separated into a signal conducting part electrically connected with the first metal conductive layer, a filter grounding part electrically connected with the metal electrode GND and a signal conducting part electrically connected with the second metal conductive layer by the insulating passivation layer; the first low-resistance polysilicon layer is provided with a plurality of deep groove U-shaped paths; an EMI filter path is formed between the first low-resistance polysilicon layer and the filter grounding part of the second low-resistance polysilicon layer; and low-frequency signals between the I / O port one and the I / O port two can flow through the second low-resistance polysilicon layer, the first low-resistance polysilicon layer and the high-resistance polysilicon layer to complete signal filtering.

[0008] The application provides a compact silicon-based EMI filter and a manufacturing method thereof, which are characterized by the following steps: a semiconductor silicon substrate is provided; a first dielectric layer, a first low-resistance polysilicon layer, a second dielectric layer and a second low-resistance polysilicon layer are sequentially arranged in the semiconductor silicon substrate; a high-resistance polysilicon layer is arranged in the first low-resistance polysilicon layer; the first dielectric layer and the second dielectric layer can form filter capacitors; the high-resistance polysilicon layer can form a filter resistor in the first low-resistance polysilicon layer; the first dielectric layer, the second dielectric layer, the first low-resistance polysilicon layer and the high-resistance polysilicon layer can form a C-R-C filter circuit; a first metal conductive layer connected with an I / O port one and a second metal conductive layer connected with an I / O port two are arranged on the upper surface of the second low-resistance polysilicon layer; an insulating passivation layer and a grounded metal electrode GND are arranged on the upper surface of the second low-resistance polysilicon layer; the second low-resistance polysilicon layer is separated into a signal conducting part electrically connected with the first metal conductive layer, a filter grounding part electrically connected with the metal electrode GND and a signal conducting part electrically connected with the second metal conductive layer by the insulating passivation layer; the first low-resistance polysilicon layer is provided with a plurality of deep groove U-shaped paths; an EMI filter path is formed between the first low-resistance polysilicon layer and the filter grounding part of the second low-resistance polysilicon layer; and low-frequency signals between the I / O port one and the I / O port two can flow through the second low-resistance polysilicon layer, the first low-resistance polysilicon layer and the high-resistance polysilicon layer to complete signal filtering.

[0009] The application is further improved, and the manufacturing material of the second dielectric layer is silicon dioxide or silicon nitride or High-K.

[0010] The application is further improved, and the doping type of the high-resistance polysilicon layer is N+ heavy doping or P+ heavy doping.

[0011] The application is further improved, and the resistance of the high-resistance polysilicon layer is 100Ω.

[0012] The semiconductor silicon substrate is an N-type semiconductor silicon substrate or a P-type semiconductor silicon substrate, and the metal electrode GND is arranged on the upper surface of the semiconductor silicon substrate.

[0013] The lower surface of the semiconductor silicon substrate is grounded and electrically connected with the metal electrode GND, and an EMI filtering path is also formed between the first low-resistance polysilicon layer and the lower surface of the semiconductor silicon substrate.

[0014] The manufacturing material of the first dielectric layer is silicon dioxide or silicon nitride or High-K.

[0015] The application further provides a manufacturing method applied to the compact silicon-based EMI filter.

[0016] Step 1: preparing a semiconductor silicon substrate;

[0017] Step 2: etching the upper surface of the semiconductor silicon substrate to form a groove;

[0018] Step 3: depositing the first dielectric layer at the bottom of the groove;

[0019] Step 4: depositing the first low-resistance polysilicon layer on the first dielectric layer;

[0020] Step 5: adding a mask plate and performing heavy-doped ion implantation;

[0021] Step 6: adding a mutual mask plate and performing light-doped ion implantation for forming the high-resistance polysilicon layer;

[0022] Step 7: depositing the second dielectric layer on the first low-resistance polysilicon layer and etching a window;

[0023] Step 8: depositing the second low-resistance polysilicon layer on the second dielectric layer and performing “carpet” heavy-doped ion implantation;

[0024] Step 9: depositing an insulating passivation layer on the second low-resistance polysilicon layer and etching a window;

[0025] Step 10: depositing a metal layer and etching the metal layer into the first metal conductive layer, the second metal conductive layer and the metal electrode GND;

[0026] Step 11: again depositing an insulating passivation layer and etching a window, and completing the production of the compact silicon-based EMI filter.

[0027] The sequence of the step 5 and the step 6 can be exchanged.

[0028] The present application is further improved, in the step 8, the ion for the "carpet" re-doping ion implantation is phosphorus atom.

[0029] Compared with the prior art, the present application has the beneficial effects that: a compact silicon-based EMI filter and a manufacturing method thereof are provided, by arranging a semiconductor silicon substrate, a first dielectric layer, a first low-resistance polysilicon layer, a second dielectric layer and a second low-resistance polysilicon layer in cooperation with each other in the compact silicon-based EMI filter, an EMI filtering path is formed between the filtering ground part of the first low-resistance polysilicon layer and the second low-resistance polysilicon layer, the low-frequency signal between the I / O port one and the I / O port two can flow through the second low-resistance polysilicon layer, the first low-resistance polysilicon layer and the high-resistance polysilicon layer to complete the signal filtering operation, the first dielectric layer and the second dielectric layer can be used as filtering capacitors, the high-resistance polysilicon can be used as a filtering resistor, and the first low-resistance polysilicon layer and the second low-resistance polysilicon layer can be used as electrical interconnections, the volume of the silicon-based EMI filter is greatly reduced, the manufacturing cost is reduced, the application range is wider, and the silicon-based EMI filter is especially suitable for small portable electronic devices, and the problems of the silicon-based capacitor structure in the prior art, such as large volume, high manufacturing cost and difficulty in meeting the use requirements of small portable electronic devices, are solved. BRIEF DESCRIPTION OF DRAWINGS

[0030] In order to more clearly illustrate the schemes in the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0031] FIG. 1(a) is a schematic circuit structure diagram of a typical existing p-type C-R-C low-pass filter;

[0032] FIG. 1(b) is a schematic insertion loss curve diagram of the typical existing p-type C-R-C low-pass filter;

[0033] Figure 2 is a structural schematic diagram of the existing silicon-based capacitor structure filter;

[0034] Figure 3 is a structural schematic diagram of the first embodiment of the compact silicon-based EMI filter of the present application;

[0035] Figure 4 is a step flow chart of the manufacturing method of the compact silicon-based EMI filter of the present application;

[0036] Figure 5 is a structural schematic diagram of the second embodiment of the compact silicon-based EMI filter of the present application;

[0037] Figure 6 Structure diagram of third embodiment of compact silicon-based EMI filter of the present application. DETAILED DESCRIPTION

[0038] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used in the description herein is for describing particular embodiments only and is not intended to be limiting upon the application; the terms "comprising," "including," and "having," and variations thereof, as used herein are intended to be inclusive in a manner analogous to the term "comprising" as "comprising" is interpreted when employed as a transitional word in a claim; the terms "first," "second," and "third," and the like, as used herein do not necessarily have an ordinal implication, but are used to distinguish one element from another.

[0039] Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase "in an embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are they necessarily mutually exclusive of one another. It is expressly understood that any of the embodiments described herein can be incorporated into any other embodiment.

[0040] In order to make the technical personnel of the art better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings.

[0041] As Figures 3-5As shown, the application provides a compact silicon-based EMI filter and a manufacturing method thereof, which comprises a semiconductor silicon substrate, a first dielectric layer, a first low-resistance polysilicon layer, a second dielectric layer and a second low-resistance polysilicon layer arranged in the semiconductor silicon substrate from bottom to top, and a high-resistance polysilicon layer arranged in the first low-resistance polysilicon layer, the first dielectric layer and the second dielectric layer can form filter capacitors, the high-resistance polysilicon layer can form a filter resistor in the first low-resistance polysilicon layer, the first dielectric layer, the second dielectric layer, the first low-resistance polysilicon layer and the high-resistance polysilicon layer can form a C-R-C filter circuit, the upper surface of the second low-resistance polysilicon layer is provided with a first metal conductive layer connected with an I / O port one and a second metal conductive layer connected with an I / O port two, and is further provided with an insulating passivation layer and a grounded metal electrode GND, the second low-resistance polysilicon layer is divided into a signal conducting part electrically connected with the first metal conductive layer, a filter grounding part electrically connected with the metal electrode GND and a signal conducting part electrically connected with the second metal conductive layer by the insulating passivation layer, the first low-resistance polysilicon layer is provided with a plurality of deep groove U-shaped paths, and an EMI filter path is formed between the first low-resistance polysilicon layer and the filter grounding part of the second low-resistance polysilicon layer; the manufacturing material of the second dielectric layer is silicon dioxide or silicon nitride or High-K, the doping type of the high-resistance polysilicon layer is N+ heavy doping or P+ heavy doping, the resistance value of the high-resistance polysilicon layer is 100Ω, the semiconductor silicon substrate is an N-type semiconductor silicon substrate or a P-type semiconductor silicon substrate, and the metal electrode GND is arranged on the upper surface of the semiconductor silicon substrate. In this embodiment, the low-frequency signal between the I / O port one and the I / O port two can flow through the second low-resistance polysilicon layer, the first low-resistance polysilicon layer and the high-resistance polysilicon layer to complete signal filtering, the first dielectric layer and the second dielectric layer can be used as filter capacitors, the high-resistance polysilicon layer can be used as a filter resistor, and the first low-resistance polysilicon layer and the second low-resistance polysilicon layer can be used as electrical interconnection, thereby greatly reducing the volume of the silicon-based EMI filter, reducing the manufacturing cost, and being suitable for a wider range of applications, especially for small portable electronic devices.

[0042] As Figure 3As shown, as the first embodiment of the present invention, this embodiment is a "horizontal device" structure, with all three electrodes located on the upper surface of the semiconductor silicon substrate, namely the first metal conductive layer, the second metal conductive layer, and the metal electrode GND. The description and function of each part of the structure are as follows: (1) The signal transmission path is from the first metal conductive layer through the filter resistor to the second metal conductive layer, as shown in Figure 110 (this path can be a bidirectional symmetrical path, flowing from the first metal conductive layer to the second metal conductive layer, or from the second metal conductive layer to the first metal conductive layer); (2) The EMI filtering path is for the high-frequency components of the signal transmission to reach the metal electrode GND through the capacitive field plate formed by the second dielectric layer, as shown in Figure 111; (3) The second dielectric layer, i.e. the capacitive field plate, can be used (4) When manufacturing the first low-resistivity polysilicon layer, an additional ion implantation mask is required to distinguish between "high-resistivity polysilicon" and "low-resistivity polysilicon". The former is used to construct the high-resistivity polysilicon layer, i.e., the filter resistor, with a resistance value of 100Ω. The latter is used for electrical interconnection, i.e., to act as a wire. (5) The second low-resistivity polysilicon layer does not require the use of an ion implantation mask. The entire area is "carpet-like" ion implanted, with phosphorus atoms as an option, to realize "low-resistivity polysilicon" for electrical interconnection. Wherein, 100, 200, and 300 represent semiconductor silicon substrates; 101, 201, and 301 represent the first dielectric layer; 102, 202, and 302 represent high-resistivity polysilicon layers; 103, 203, and 303 represent the first low-resistivity polysilicon layer; 104 and 204 represent the second dielectric layer; 105 and 205 represent the second low-resistivity polysilicon layer; 106, 206, and 304 represent insulating passivation layers; 107, 207, and 305 represent the first metal conductive layer; and 108, 208, and 30... 6 represents the second metal conductive layer, 109 and 209 represent the metal electrode GND, 210 and 307 represent the metal interconnect between the bottom of the semiconductor silicon substrate and the ground port, 110, 211 and 308 represent the low-frequency signal flow path, 111 and 212 represent the EMI filtering path formed between the filter ground portion of the first low-resistivity polysilicon layer and the second low-resistivity polysilicon layer, and 213 and 309 represent the EMI filtering path formed between the first low-resistivity polysilicon layer and the lower surface of the semiconductor silicon substrate.

[0043] like Figure 4 The diagram shows a manufacturing method for the first embodiment of the compact silicon-based EMI filter proposed in this invention. The detailed steps are as follows:

[0044] Step 1, prepare the semiconductor silicon substrate;

[0045] Step 2: Etch the upper surface of the semiconductor silicon substrate to form trenches;

[0046] Step 3: Deposit the first dielectric layer at the bottom of the trench;

[0047] Step 4: Deposit a first low-resistivity polysilicon layer on the first dielectric layer;

[0048] Step 5: Add a mask template and perform heavy doping ion implantation;

[0049] Step 6: Add mutual masking templates and perform lightly doped ion implantation to form a high-resistivity polycrystalline silicon layer;

[0050] Step 7: Deposit a second dielectric layer on the first low-resistivity polysilicon layer and etch a window;

[0051] Step 8: Deposit a second low-resistivity polysilicon layer on the second dielectric layer and perform "carpet-like" heavy doping ion implantation;

[0052] Step 9: Deposit an insulating passivation layer on the second low-resistivity polysilicon layer and etch a window;

[0053] Step 10: Deposit a metal layer and etch it into a first conductive metal layer, a second conductive metal layer, and a metal electrode GND;

[0054] Step 11: Deposit the insulating passivation layer again and etch the opening to complete the production of the compact silicon-based EMI filter.

[0055] The order of steps 5 and 6 can be interchanged. In step 8, the ions used for "carpet-bombing" heavy doping are phosphorus atoms.

[0056] like Figure 5 As shown, the lower surface of the semiconductor silicon substrate is grounded and electrically connected to the metal electrode GND. An EMI filtering path is also formed between the first low-resistivity polysilicon layer and the lower surface of the semiconductor silicon substrate. The first dielectric layer is made of silicon dioxide, silicon nitride, or High-K material. As a second embodiment of the present invention, this embodiment differs from the first embodiment in that it is a "vertical device" structure. Both the first and second metal conductive layers are located on the upper surface of the semiconductor silicon substrate. The capacitance density is doubled in this embodiment, thus further reducing the chip area. In this case, both the first and second dielectric layers serve as field plates for the capacitor, and the manufacturing materials can be silicon dioxide, silicon nitride, or High-K materials. Furthermore, compared to the first embodiment, in this embodiment, the high-frequency components of the signal transmission can reach the metal electrode GND and the lower surface of the semiconductor silicon substrate from the inner side (path shown in Figure 212) and the outer side (path shown in Figure 213), respectively. In this case, to reduce the "series parasitic resistance of the capacitor," a "low-resistivity substrate" is preferred for the semiconductor silicon substrate, resulting in a relatively high impurity doping concentration.

[0057] like Figure 6As shown, as the third embodiment of the present application, the embodiment is different from the second embodiment in that: the embodiment is a "vertical device" structure, the first metal conductive layer and the second metal conductive layer are located on the upper surface of the semiconductor silicon substrate, only the lower surface of the semiconductor silicon substrate is grounded, compared with the second embodiment, the packaging of the embodiment is simpler. In addition, compared with the first embodiment and the second embodiment, the low-frequency signal transmission of the embodiment does not need to flow through the "deep groove U-shaped path", which is more friendly to the process processing capacity, is conducive to improving the yield, and is helpful to control the parasitic resistance of the signal link. And compared with the first embodiment and the second embodiment, the embodiment only has the first dielectric layer and the first low-resistance polysilicon layer, the process is simpler, which is also conducive to improving the product yield, and the embodiment can also extend the number of deep grooves to N, which is used to increase the capacitance.

[0058] The manufacturing process of the compact silicon-based EMI filter of the present application is suitable for various common integrated circuit manufacturing processes, such as a nanoscale complementary metal oxide semiconductor (CMOS) process, a three-dimensional fin field-effect transistor (FinFET) or gate-all-around FET (GAA) process, or a silicon-on-insulator (SOI) process, etc.

[0059] As can be seen from the above, the present application provides a compact silicon-based EMI filter and a manufacturing method thereof. By arranging the semiconductor silicon substrate, the first dielectric layer, the first low-resistance polysilicon layer, the second dielectric layer, and the second low-resistance polysilicon layer in the compact silicon-based EMI filter, the EMI filtering path is formed between the filtering grounding parts of the first low-resistance polysilicon layer and the second low-resistance polysilicon layer. The low-frequency signal between the I / O port one and the I / O port two can flow through the second low-resistance polysilicon layer, the first low-resistance polysilicon layer, and the high-resistance polysilicon layer to complete the signal filtering operation. The first dielectric layer and the second dielectric layer can be used as filtering capacitors, the high-resistance polysilicon can be used as a filtering resistor, and the first low-resistance polysilicon layer and the second low-resistance polysilicon layer can be used as electrical interconnections. The volume of the silicon-based EMI filter is greatly reduced, the manufacturing cost is reduced, the application range is wider, and the silicon-based EMI filter is especially suitable for small portable electronic devices. The problems of the prior art, such as the large volume of the silicon-based capacitor structure EMI filter, the high manufacturing cost, and the difficulty in meeting the use requirements of small portable electronic devices, are solved.

[0060] The above described embodiments are the preferred embodiments of the present application, and are not intended to limit the specific implementation of the present application. The scope of the present application includes, but is not limited to, the above described embodiments. Any equivalent changes made in accordance with the present application are within the scope of the present application.

Claims

1. A compact silicon-based EMI filter characterized by: The semiconductor silicon substrate and the first dielectric layer, the first low-resistance polysilicon layer, the second dielectric layer and the second low-resistance polysilicon layer arranged from bottom to top in the semiconductor silicon substrate, the first low-resistance polysilicon layer is further provided with a high-resistance polysilicon layer, the first dielectric layer and the second dielectric layer can form a filter capacitor, the high-resistance polysilicon layer can form a filter resistor in the first low-resistance polysilicon layer, the first dielectric layer, the second dielectric layer, the first low-resistance polysilicon layer and the high-resistance polysilicon layer can form a C-R-C filter circuit, the upper surface of the second low-resistance polysilicon is provided with a first metal conductive layer connected with an I / O port one, a second metal conductive layer connected with an I / O port two, and the upper surface of the second low-resistance polysilicon is further provided with an insulating passivation layer and a grounded metal electrode GND, the second low-resistance polysilicon layer is separated by the insulating passivation layer into a signal conducting part electrically connected with the first metal conductive layer, a filter grounding part electrically connected with the metal electrode GND and a signal conducting part electrically connected with the second metal conductive layer, the first low-resistance polysilicon layer is provided with a plurality of deep groove U-shaped paths, an EMI filter path is formed between the first low-resistance polysilicon layer and the filter grounding part of the second low-resistance polysilicon layer, and low-frequency signals between the I / O port one and the I / O port two can flow through the second low-resistance polysilicon layer, the first low-resistance polysilicon layer and the high-resistance polysilicon layer to complete signal filtering work.

2. The compact silicon-based EMI filter of claim 1, wherein: The manufacturing material of the second dielectric layer is silicon dioxide or silicon nitride or High-K.

3. The compact silicon-based EMI filter of claim 2, wherein: The doping type of the high-resistance polysilicon layer is N+ heavy doping or P+ heavy doping.

4. The compact silicon-based EMI filter of claim 3, wherein: The resistance of the high-resistance polysilicon layer is 100Ω.

5. The compact silicon-based EMI filter of claim 4, wherein: The semiconductor silicon substrate is an N-type semiconductor silicon substrate or a P-type semiconductor silicon substrate, and the metal electrode GND is arranged on the upper surface of the semiconductor silicon substrate.

6. The compact silicon-based EMI filter of claim 5, wherein: The lower surface of the semiconductor silicon substrate is grounded and electrically connected with the metal electrode GND, and an EMI filter path is also formed between the first low-resistance polysilicon layer and the lower surface of the semiconductor silicon substrate.

7. The compact silicon-based EMI filter of claim 6, wherein: The manufacturing material of the first dielectric layer is silicon dioxide or silicon nitride or High-K.

8. A manufacturing method applied to the compact silicon-based EMI filter according to any one of claims 1-7, characterized in that, It comprises: Step 1, preparing a semiconductor silicon substrate; Step 2, etching the upper surface of the semiconductor silicon substrate to form a groove; Step 3, depositing the first dielectric layer at the bottom of the groove; Step 4, depositing the first low-resistance polysilicon layer on the first dielectric layer; Step 5, adding a mask plate and performing heavy-doped ion implantation; Step 6, adding a mutual mask plate and performing light-doped ion implantation for forming the high-resistance polysilicon layer; Step 7, depositing the second dielectric layer on the first low-resistance polysilicon layer and etching an opening; Step 8, depositing the second low-resistance polysilicon layer on the second dielectric layer and performing "carpet" heavy-doped ion implantation; Step 9: depositing an insulating passivation layer on the second low-resistance polysilicon layer and etching an opening; Step 10: depositing a metal layer and etching it into the first metal conductive layer, the second metal conductive layer and the metal electrode GND; Step 11: Again deposit the insulating passivation layer and etch the window, complete the production of compact silicon-based EMI filter.

9. The manufacturing method of claim 8, wherein: The sequence of the step 5 and the step 6 can be exchanged.

10. The manufacturing method according to claim 9, characterized in that: In the step 8, the ion of the "carpet" re-doping ion implantation is phosphorus atom.

Citation Information

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