Variable decimation rate digital filter and test platform thereof

By designing a variable decimation rate digital filter, the bottleneck of EEG signal processing for the hardware platform is solved, and a cross-platform high-precision filter is realized to meet real-time and power consumption requirements, improving the flexibility and accuracy of signal processing.

CN120263146AActive Publication Date: 2025-07-04JILI INNOVATION (SHANGHAI) INTELLIGENT TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202510757419.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-09
Publication Date
2025-07-04
Estimated Expiration
2045-06-09

AI Technical Summary

Technical Problem

In the prior art, the hardware filtering scheme for EEG signal processing usually relies on digital signal acquisition sensors, Σ-Δ modulation circuits and decimation filters, resulting in high-precision filters becoming a bottleneck of real-time and power consumption on platforms with limited chip performance, and cannot flexibly match the needs of different hardware platforms.

Method used

A variable decimation rate digital filter is designed, including input sample receiving module, buffer update module, kernel function construction module and variable tap design module. By adjusting the decimation rate and weight coefficient, different types of kernel functions are constructed to achieve flexible frequency response adjustment, and implemented in C language to improve real-time performance.

Benefits of technology

It realizes a cross-platform high-precision filter, which can adapt to the EEG signal processing needs of different hardware platforms, reasonably allocate device power consumption, meet real-time requirements, and improve the signal-to-noise ratio through adaptive filtering, and improve the accuracy of feature extraction.

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Abstract

The invention discloses a variable decimation rate digital filter and a test platform thereof. The filter comprises an input sample receiving module for receiving input signal sample data; the buffer area updating module provides a historical value of the signal sample data stored in the buffer area and updates the historical value in time; the kernel function construction module sets a cut-off frequency, determines different types of kernel functions through a sliding window based on the sinc function and the cut-off frequency, and takes the different types of kernel functions as weight coefficients of corresponding filters; the variable tap design module sets a decimation rate, so that the attenuation multiple of the filter is adjusted by adjusting the decimation rate, and different frequency responses are adjusted; and the filter calculation module initializes the output variable value of the filter, traverses the buffer area updating module, calculates the output variable value of the current filter according to the extraction rate and the weight coefficient based on the signal sample data, and returns the current output variable value. The attenuation multiple of the filter can be adjusted to adapt to different application scenes and signal processing requirements.
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Description

Technical Field

[0001] This application belongs to the technical fields of filter design and testing, and specifically relates to a variable decimation rate digital filter and its testing platform. Background Art

[0002] EEG signals require high precision, low power consumption, and a certain degree of real-time performance. Most existing filtering solutions rely on hardware. These hardware acquisition solutions usually consist of three parts: a digital signal acquisition sensor, a Σ-Δ modulation circuit, and a decimation filter. Among them, the optimized design of the decimation filter directly affects the system performance and power consumption. On some platforms with limited chip performance, high-precision filters may become the bottleneck of the real-time performance and power consumption of the acquisition system.

[0003] Therefore, designing a cross-platform high-precision digital filter and its testing platform will be beneficial for running on various hardware platforms, especially some platforms that cannot access proprietary hardware, which can flexibly match the requirements of EEG signal processing, reasonably allocate device power consumption, and meet the real-time requirements. Summary of the Invention

[0004] The technical objective of this application is to design a cross-platform digital filter and its testing platform to flexibly match the requirements of EEG signal processing.

[0005] To achieve the above technical objective, this application adopts the following technical solutions.

[0006] In the first aspect, an embodiment of this application provides a variable decimation rate digital filter, including:

[0007] An input sample receiving module, configured to receive input signal sample data;

[0008] A buffer update module, configured to provide a buffer to store historical values of the signal sample data and update it in a timely manner;

[0009] A kernel function construction module, configured to set a cut-off frequency, and based on the sinc function and the cut-off frequency, determine different types of kernel functions through a sliding window, and use different types of the kernel functions as weight coefficients of corresponding filters;

[0010] A variable tap design module, configured to set a decimation rate to adjust the attenuation multiple of the filter by adjusting the decimation rate, so as to adjust different frequency responses;

[0011] A filter calculation module, configured to initialize the output variable value of the filter, traverse the buffer update module, calculate the current output variable value of the filter based on the signal sample data, the decimation rate, and the weight coefficients, and return the current output variable value.

[0012] Further, an output variable of the current filter is calculated according to the extraction rate and the weight coefficient, and the calculation formula is as follows:

[0013] ;

[0014] where output is the output variable value of the current filter, i is the index variable of the summation operation, is the signal sample data corresponding to the element of the index variable i, is the weight coefficient of the kernel function corresponding to the index variable i; taps is the extraction rate.

[0015] Further, different types of kernel functions are determined by a sliding window based on the sinc function and the cut-off frequency, including:

[0016] For a low-pass filter: the truncated sinc function is used to construct the kernel function of the low-pass filter, and the kernel function of the low-pass filter passes the frequencies below the cut-off frequency and suppresses the frequencies above the cut-off frequency;

[0017] For a high-pass filter: it is constructed by frequency inversion of the kernel function of the low-pass filter, and the high-pass filter passes the frequencies above the cut-off frequency and suppresses the frequencies below the cut-off frequency;

[0018] For a band-pass filter: it is composed of the frequency difference between the kernel functions of two low-pass filters, and the band-pass filter adjusts the frequency bandwidth by setting two cut-off frequencies;

[0019] For a band-stop filter: it is composed of the difference between the unit impulse function and the kernel function frequency of the band-pass filter.

[0020] Further, the performance of the filter is improved by increasing the extraction rate through a variable tap design module.

[0021] Further, the filter is implemented based on C language.

[0022] Further, the filter calculation module adopts a parallel computing architecture to improve the real-time performance of filtering calculation.

[0023] Further, the filter is applied to the field of electroencephalogram signal processing for real-time filtering of electroencephalogram signals.

[0024] Further, the variable tap design module automatically adjusts the extraction rate according to the frequency characteristics of the input signal to achieve adaptive filtering.

[0025] In a second aspect, an embodiment of the present application provides a test platform for a variable extraction rate digital filter as provided in any possible embodiment of the first aspect. The test platform includes:

[0026] A standard signal generation module for generating a standard signal;

[0027] A data set storage module for saving the standard signal as a signal data set;

[0028] A data set import module for importing a signal to be tested from the data set to test the performance of a filter;

[0029] The variable decimation rate digital filter is used to process the signal to be tested to obtain the current output variable value;

[0030] A preprocessing effect analysis module for analyzing the current output variable value, and the analysis includes frequency response analysis, spectrum analysis and / or time series analysis.

[0031] Compared with the prior art, the beneficial technical effects achieved by the variable decimation rate digital filter provided by the embodiment of the present application include: the decimation rate can be set through the variable tap design module, the attenuation multiple of the filter can be adjusted, and then the different frequency responses can be adjusted to adapt to different application scenarios and signal processing requirements. It has strong customizability. The kernel function construction module can determine different types of kernel functions through a sliding window based on the sinc function and the cut-off frequency. These different types of kernel functions are used as the weight coefficients of the filter, and various types of filters such as low-pass, high-pass, band-pass, and band-stop can be constructed to meet the processing requirements of signals with different frequency components.

[0032] Compared with the prior art, the beneficial technical effects achieved by the test platform of the variable decimation rate digital filter provided by the embodiment of the present application include: a real-time analysis software for the filter can be implemented to evaluate the performance of different filters. This tool analyzes the frequency domain response and time delay of the standard signal filter, intuitively displays the filtering effect and performance indicators of the filter under different parameter settings, and at the same time has the functions of saving and loading data sets. Description of the Drawings

[0033] The drawings described herein are only for explanatory purposes and are not intended to limit the scope of the disclosure of the present application in any way. In addition, the shapes and proportional dimensions of the components in the drawings are only schematic and are used to help understand the present application, rather than specifically limiting the shapes and proportional dimensions of the components of the present application. Those skilled in the art can choose various possible shapes and proportional dimensions according to specific situations to implement the present application under the teaching of the present application. In the drawings:

[0034] Figure 1 It is a schematic structural diagram of the variable decimation rate digital filter provided for the embodiment;

[0035] Figure 2Schematic diagram of the weight coefficients of the convolution kernels of various filters of the variable decimation rate digital filter provided for the embodiment at a decimation rate of 20;

[0036] Figure 3 Schematic diagram of the weight coefficients of the convolution kernels of various filters of the variable decimation rate digital filter provided for the embodiment at a decimation rate of 50;

[0037] Figure 4 Schematic diagram of the process for the variable tap design module in the embodiment to automatically adjust the decimation rate according to the frequency characteristics of the input signal;

[0038] Figure 5 Schematic diagram of the process for calculating the output of the variable decimation rate digital filter provided for the embodiment;

[0039] Figure 6 Schematic diagram of the frequency responses of various filters at a sampling rate of 250 hz and 100 taps in the embodiment;

[0040] Figure 7 Schematic diagram of the frequency responses of various filters at a sampling rate of 250 hz and 200 taps in the embodiment;

[0041] Figure 8 Schematic diagram of the real-time performance comparison between the filter implemented in C language and the filter implemented in Python in the embodiment;

[0042] Figure 9 Schematic diagram of the four-channel real-time waveform of the test platform provided for the embodiment;

[0043] Figure 10 Schematic diagram of the four-channel real-time filtering of the test platform provided for the embodiment;

[0044] Figure 11 Schematic diagram of generating a filter channel report for the test platform provided for the embodiment. Detailed implementation manners

[0045] In order to enable those skilled in the art of the present technology to better understand the technical solutions in this application, the following will clearly and completely describe the technical solutions in the embodiments of this application with reference to the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are only a part of the embodiments of this application, rather than all the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of this application.

[0046] In the field of modern signal processing, the preprocessing process is crucial for ensuring the accuracy of subsequent analysis. Having a customizable digital filter library allows engineers to design filter parameters according to specific application requirements, thus more precisely matching the characteristics of the signal and achieving processing goals. This flexibility enables the filter to adapt to various different signal environments and conditions. In addition, by customizing the filter, its performance can be optimized to meet specific frequency response and time delay requirements, which is particularly important for application scenarios that require fast response or specific bandwidth. The custom filter can be specifically designed to suppress noise within a specific frequency range, thereby improving the signal-to-noise ratio.

[0047] In the field of electroencephalogram (EEG) signal processing, the application of a customizable digital filter library is crucial for the signal preprocessing process. EEG signals are usually affected by external noise, making further processing such as feature extraction or classification difficult. By using a custom digital filter, noise can be effectively filtered from the EEG signal, improving the signal-to-noise ratio and making feature extraction more accurate. In addition, EEG signals are composed of signals in different frequency bands, and the custom filter can be optimized for these specific brain waves to ensure the best signal response in different frequency bands. This is of positive significance for further improving the accuracy of disease detection.

[0048] The variable decimation rate digital filter provided by the application embodiment has adjustable filter parameters and is based on the sinc kernel function. Its internal amplitude spectrum coefficient changes with the change of the decimation rate to adjust the attenuation multiple (FRD) at the specified index frequency, which is convenient for developers to debug and use, and is very suitable for application in the field of EEG data processing technology.

[0049] The following is further described in conjunction with the accompanying drawings of the specification and specific embodiments.

[0050] As Figure 1 , this embodiment discloses a variable decimation rate digital filter, including an input sample receiving module, a buffer update module, a kernel function construction module, a variable tap design module, and a filter calculation module.

[0051] The input sample receiving module is used to receive input signal sample data.

[0052] The buffer update module is used to provide a buffer to store the historical values of signal sample data and update them in a timely manner.

[0053] The kernel function construction module is used to set the cut-off frequency. Based on the sinc function and the cut-off frequency, different types of kernel functions are determined through a sliding window, and different types of kernel functions serve as the weight coefficients of the corresponding filters.

[0054] The variable tap design module is used to set the decimation rate, so as to adjust the attenuation multiple of the filter by adjusting the decimation rate, thereby adjusting different frequency responses.

[0055] The filter calculation module is used to initialize the output variable value of the filter, traverse the buffer update module, calculate the output variable value of the current filter based on the signal sample data according to the decimation rate and the weight coefficient, and return the current output variable value.

[0056] The kernel function of the filter provided by the embodiments of the present application is based on the sinc function, which is the time-domain representation corresponding to the frequency-domain characteristic of an ideal low-pass filter.

[0057] In a specific embodiment, a FIR (finite impulse response) filter is designed, where the kernel function (also called the impulse response or weight coefficient of the filter) is calculated through a sliding window and can be used to construct a low-pass filter, a high-pass filter, a band-pass filter, and a band-stop filter.

[0058] In some embodiments, a sliding rectangular window is used as the sliding window. Although the rectangular window will face the problem of a narrow main lobe (steep transition from the passband to the stopband) compared with other types of windows, the advantage is that the calculation overhead is small and it contributes greatly to the real-time performance.

[0059] The process of calculating the output of the variable decimation rate digital filter can be as follows:

[0060] 1. The input sample receiving module receives the input sample.

[0061] 2. The buffer update module updates the buffer.

[0062] 3. Move the buffer content (overwrite from back to front in sequence).

[0063] 4. Place the new sample at the start position of the buffer.

[0064] 5. The filter calculation module initializes the output variable value of the filter.

[0065] 6. The filter calculation module traverses the buffer, calculates the filter output, and returns the result.

[0066] ;

[0067] where output is the output variable value of the current filter, i is the index variable of the summation operation, is the signal sample data corresponding to the element of the index variable i, is the weight coefficient of the kernel function corresponding to the index variable i; taps is the decimation rate.

[0068] In the example, the extraction rate taps is determined according to the window length of the sliding window, and the window length is variable. The extraction rate should not exceed the window length.

[0069] As an example, traverse the range from 0 to taps - 1, and successively take out the elements at the corresponding index position i in the buffer array (input sample buffer) and the coeff array (kernel function weight coefficients), multiply them and then accumulate them. Finally, the output output of the filter is obtained. By changing the value of i, each element in the array is operated on, so as to realize the weighted summation calculation of the entire buffer samples and weight coefficients.

[0070] In the embodiment, the construction methods and characteristics of the kernel functions of different types of filters are as follows.

[0071] I. Construction method and characteristics of the kernel function of the low-pass filter:

[0072] The truncated sinc function corresponds to the low-pass filter and can pass frequencies below the cut-off frequency, while suppressing frequencies higher than .

[0073] 1. Frequency domain characteristics of the ideal low-pass filter:

[0074] ;

[0075] Among them, is the cut-off frequency, is the angular frequency of the signal function.

[0076] 2. Impulse response of the ideal low-pass filter:

[0077] ;

[0078] Among them, is the cut-off frequency, is the index of the sample point.

[0079] II. Construction method and characteristics of the kernel function of the high-pass filter:

[0080] The kernel function of the high-pass filter is constructed by frequency inversion from the low-pass kernel and can pass frequencies above the cut-off frequency, while suppressing frequencies lower than .

[0081] 1. Frequency domain characteristics of the ideal high-pass filter:

[0082] ;

[0083] 2. Impulse response of the ideal high-pass filter:

[0084] ;

[0085] Among them, is the cut-off frequency, is the index of the sample point.

[0086] III. Construction method and characteristics of the kernel function of the band-pass filter:

[0087] The kernel function of the band-pass filter is composed of the frequency difference between two low-pass filter kernels, and the frequency bandwidth can be adjusted by setting and .

[0088] 1. Frequency domain characteristics of the ideal band-pass filter:

[0089] ;

[0090] Among them, and are the lower and upper limits of the frequency bandwidth.

[0091] 2. Impulse response of the ideal band-pass filter:

[0092] ;

[0093] Among them, and are the lower and upper limits of the frequency bandwidth, is the index of the sample point.

[0094] IV. Construction method and characteristics of the kernel function of the band-pass filter:

[0095] The kernel function of the band-pass filter is composed of the frequency difference between the unit impulse function and the band-pass kernel.

[0096] 1. Frequency domain characteristics of the ideal band-stop filter:

[0097] ;

[0098] Among them, and are the lower and upper limits of the frequency bandwidth.

[0099] 2. Impulse response of the ideal band-stop filter:

[0100] ;

[0101] Among them, and are the lower and upper limits of the frequency bandwidth, is the index of the sample point.

[0102] The design purpose of the variable tap in this application is to adjust the attenuation multiple of the filter by adjusting the decimation rate, so as to achieve the purpose of adjusting different frequency responses. Specifically, the decimation number is achieved by adjusting the amplitude spectrum coefficient of the filter. The larger the decimation number, the smaller the attenuation multiple and the smoother the frequency response, but more delay will be introduced.

[0103] In the embodiment, the attenuation multiple of the specified index frequency can be specified. The filter design based on the variable decimation rate can effectively control the attenuation multiple (FRD) of the specified index frequency, meeting the flexible requirements for frequency domain characteristics in different application scenarios, such as dynamically adjusting the attenuation multiple of the specified frequency in high-pass, low-pass, band-pass, and band-stop filtering.

[0104] In the embodiment, the value range of the decimation rate is 20 to 200, such as 20, 50, 100, 150, 200, etc. Figure 2 and Figure 3 shows the changes in the convolutional kernel weight coefficients at the decimation rates of 20 and 50.

[0105] In some embodiments, the variable tap design module automatically adjusts the decimation rate according to the frequency characteristics of the input signal to achieve adaptive filtering.

[0106] As an example, the variable tap design module performs frequency analysis on the input signal. Algorithms such as the Fast Fourier Transform (FFT) can be used to transform the input signal from the time domain to the frequency domain to obtain the spectrum information of the signal. By analyzing the spectrum, the distribution of different frequency components in the input signal can be determined, such as the main frequency range of the signal, whether there is high-frequency noise or low-frequency interference, etc. According to the characteristics of the signal and the filtering requirements, some thresholds and adjustment rules are set. According to the results of the frequency analysis and the set rules, the variable tap design module can dynamically adjust the decimation rate.

[0107] such as Figure 4 shown, a possible implementation manner is introduced in this application. Period represents a frequency difference range, which defines whether the frequency difference DIS is within an acceptable interval, which can keep the upper and lower bound frequency points of the filter with sufficient attenuation, less compensation and more reduction.

[0108] Specifically:

[0109] DIS = the current attenuation coefficient of the specified frequency point - the target attenuation coefficient of the specified frequency point, that is, the calculated frequency difference value.

[0110] If DIS is within the range of -Period < DIS < +Period, the decimation number remains unchanged.

[0111] If DIS is positive and exceeds +Period, the extraction count needs to be increased.

[0112] If DIS is negative and less than -Period, the extraction count needs to be decreased.

[0113] Therefore, a Period threshold range is set, with +Period as the upper threshold and -Period as the lower threshold. The Period threshold range ensures that when DIS is within a certain fluctuation range, it does not affect the adjustment of the extraction count, and only when it exceeds the Period threshold range will the extraction count be adjusted.

[0114] In some embodiments, a cross-platform C / Python general DSP library can be used to implement a variable decimation rate digital filter. Part of the filtering process is as Figure 5 shown.

[0115] As an example, in the embodiment, a DSP can be used to implement a variable decimation rate digital filter.

[0116] Currently, for some DSP filters (such as those directly generated by matlab in Type I), their weight parameters often need to be statically compiled into the code. Every time the cut-off frequency of a filter is changed, the weight parameters need to be regenerated. Since the filter provided in this application rewrites the initialization method of each type of filter based on the sinc kernel function and dynamically calculates the weight parameter array during initialization, users only need to specify the required cut-off frequency by themselves, instead of writing all the required weight parameters into the static code every time.

[0117] As an example, the method for implementing the filter of this application embodiment by a DSP is as follows.

[0118] The Filter method implements the core operations of a finite impulse response (FIR) filter, mainly relying on two key data structures: the input buffer and the coefficient vector.

[0119] 1. Input buffer update: The input buffer (buffer) is used to store the historical values of the input data. Each time the method is called, all elements in the input buffer are shifted one position backward in sequence, the oldest element is removed, and space is vacated for the new input sample. The new sample is stored in the first position of the input buffer (buffer[0]).

[0120] 2. Filtering calculation: Initialize the filter output (output) to zero. By traversing the input buffer and the coefficient vector (coeff), calculate the dot product of the two item by item, that is: multiply the value at each position in the input buffer by the corresponding coefficient, and then accumulate the results into the output. This step implements the core formula of the filter:

[0121] ;

[0122] Among them, is the current filter output, is the weight coefficient vector;

[0123] is the signal sample value in the input buffer, and M represents the length of the weight coefficient vector (i.e., the weight coefficient of the filter).

[0124] 3. Return the filtering result: After the dot product calculation is completed, the output value is the filtering result at the current moment and is directly returned to the caller.

[0125] This sliding window algorithm based on the input buffer is applicable to real-time signal processing and can gradually apply the filter weight coefficients to smooth or frequency-filter the input signal.

[0126] The variable decimation rate digital filter provided by the embodiment supports high-precision digital signal processing (DSP) libraries for embedded devices and X86 platforms, provides dual versions of C and Python support to meet multi-platform requirements. At the same time, analyze the real-time performance of the X86 library to ensure efficient operation under various hardware architectures.

[0127] Figure 6 and Figure 7 are respectively the schematic diagrams of the frequency response (Frequency Reponse) results of various filters at a sampling rate of 250hz and 100 taps and the frequency response results of various filters at a sampling rate of 250hz and 200 taps in the embodiment. The two groups of diagrams show the frequency responses of the passband signals of each filter at different numbers of taps (decimation rates). Each group of diagrams contains 8 subgraphs, corresponding to the linear phase (Linear) and exponential phase (Index) responses of the low-pass filter (Lowpass), high-pass filter (Highpass), band-pass filter (Bandpass), and band-stop filter (Bandstop) respectively. The sampling frequency (Fs) is 250.0Hz, the number of taps is 100 and 200 respectively, and the low-pass cut-off frequency (Flow) of all filters is 0.5Hz, and the high-pass cut-off frequency (Fhigh) is 30Hz.

[0128] Analysis of taps = 100:

[0129] 1. Low-pass filter (Lowpass Filter):

[0130] ① Linear gain: The gain is 0.36653 at 0.5Hz and close to 0 at 30Hz.

[0131] ② Exponential gain: The gain is -8.71787 dB at 0.5 Hz and -88.57311 dB at 30 Hz.

[0132] 2. Highpass Filter:

[0133] ① Linear gain: The gain is close to 0 at 0.5 Hz and 0.50339 at 30 Hz.

[0134] ② Exponential gain: The gain is -8.41550 dB at 0.5 Hz and -5.96258 dB at 30 Hz.

[0135] 3. Bandpass Filter:

[0136] ① Linear gain: The gain is 0.62050 at 0.5 Hz and 0.49665 at 30 Hz.

[0137] ② Exponential gain: The gain is -4.14518 dB at 0.5 Hz and -6.07901 dB at 30 Hz.

[0138] 4. Bandstop Filter:

[0139] ① Linear gain: The gain is 0.37951 at 0.5 Hz and 0.50335 at 30 Hz.

[0140] ② Exponential gain: The gain is -8.41550 dB at 0.5 Hz and -7.94175 dB at 30 Hz.

[0141] Analysis for taps = 200:

[0142] 1. Lowpass Filter:

[0143] ① Linear gain: The gain is 0.56712 at 0.5 Hz and close to 0 at 30 Hz.

[0144] ② Exponential gain: The gain is -4.92649 dB at 0.5 Hz and -83.59598 dB at 30 Hz.

[0145] 2. Highpass Filter:

[0146] ① Linear gain: The gain is close to 0 at 0.5 Hz and 0.50169 at 30 Hz.

[0147] ②Exponential gain: The gain is -52.10873 dB at 0.5 Hz and -5.99121 dB at 30 Hz.

[0148] 3. Bandpass Filter:

[0149] ①Linear gain: The gain is 0.43042 at 0.5 Hz and 0.49837 at 30 Hz.

[0150] ②Exponential gain: The gain is -7.32224 dB at 0.5 Hz and -6.04894 dB at 30 Hz.

[0151] 4. Bandstop Filter:

[0152] ①Linear gain: The gain is 0.56960 at 0.5 Hz and 0.50163 at 30 Hz.

[0153] ②Exponential gain: The gain is -4.888858 dB at 0.5 Hz and -5.99236 dB at 30 Hz.

[0154] From the above analysis, we can see: 1. The influence of the number of taps: Increasing the number of taps from 100 to 200 makes the frequency response at the cut-off frequency of the filter approach stability faster, indicating that a higher number of taps can provide better frequency selectivity. 2. Cut-off frequency: The gain change of all filters is obvious at 0.5 Hz or 30 Hz, which is consistent with the set cut-off frequency of the filter.

[0155] Generally speaking, increasing the number of taps can improve the performance of the filter, especially in applications that require more precise frequency control. Of course, this requires the user to make a trade-off with the required real-time performance.

[0156] The following is the purpose of describing the variable tap design for analyzing the attenuation multiple (FRD) at the specified index frequency.

[0157] The variable tap design is a flexible filter design method that allows the characteristics of the filter to be changed by adjusting the decimation rate (taps, also called the number of taps) in the filter. The main purpose of this design is to achieve precise control of the filter's frequency response, especially the attenuation multiple (Frequency Response Down, FRD) at the specified index frequency. By changing the weights of the taps, the passband and stopband characteristics of the filter can be effectively adjusted to meet specific signal processing requirements.

[0158] In a variable tap design, the number of taps has a significant impact on the performance of the filter. More taps can provide finer control, enabling more precise adjustment of the attenuation factor at specified frequencies. For example, when comparing two different numbers of taps (100 and 200), the following differences can be observed:

[0159] 1. Lowpass Filter: In the 100-tap design, the gain at 0.5 Hz is 0.36653, while in the 200-tap design, the gain at the same frequency increases to 0.56712. This indicates that as the number of taps increases, the gain of the filter at low frequencies also improves.

[0160] 2. Highpass Filter: In the 100-tap design, the gain at 30 Hz is 0.50339, while in the 200-tap design, the gain at the same frequency slightly decreases to 0.50169. This may imply that more taps help to more precisely control the cut-off frequency of the highpass filter.

[0161] 3. Bandpass Filter: In the 100-tap design, the gains at 0.5 Hz and 30 Hz are 0.62050 and 0.49665 respectively, while in the 200-tap design, the gains at these frequencies are 0.43042 and 0.49837 respectively. This shows that increasing the number of taps can improve the gain control of the bandpass filter within the passband.

[0162] 4. Bandstop Filter: In the 100-tap design, the gains at 0.5 Hz and 30 Hz are 0.37951 and 0.50335 respectively, while in the 200-tap design, the gains at these frequencies are 0.56960 and 0.50163 respectively. This indicates that more taps can help to more precisely adjust the attenuation of the bandstop filter within the stopband.

[0163] Overall, the variable tap design can achieve fine control of the filter frequency response by adjusting the number and weights of the taps. Especially when the attenuation factor at the specified index frequency needs to be adjusted, increasing the number of taps can improve the performance of the filter, achieving more precise frequency selectivity and better signal processing effects.

[0164] As Figure 8 shown, Figure 8It shows the comparison of the processing counts of the X86-64 filter application compiled in C language and the filter application implemented in Python within 1 second. Each bar in the chart represents the result of one round of testing, where blue represents the performance of the C language filter and orange represents the performance of the Python filter. It can be seen from the figure that the processing count of the C language filter is significantly higher than that of the Python filter in each round of testing.

[0165] Consistency: The performance of the C language filter is relatively stable in five rounds of testing, and the processing count fluctuates between 2,921,087 and 2,936,445. The performance of the Python filter fluctuates less, with the processing count between 23,494 and 25,600, which is much lower than that of the C language filter.

[0166] Real-time performance: The processing count of the C language filter fluctuates between 2,921,087 and 2,936,445, which means that the C language filter can meet the real-time performance requirements of 2.9MHz. The processing count of the Python filter is between 23,494 and 25,600, which is much lower than that of the C language filter. Nevertheless, this still means that the Python filter can meet the real-time performance requirements of 23KHz.

[0167] From the above analysis, it can be seen that the C language filter is significantly superior to the Python filter in terms of real-time performance, especially in application scenarios that require processing a large amount of data or have high performance requirements. However, the Python filter may have advantages in terms of development speed and code readability, which may be more important than performance in some cases. Which language to choose to implement the filter should be determined according to the specific application requirements and context.

[0168] The variable decimation rate digital filter provided by this application can adopt the implementation of a dual-version library of C and Python to be compatible with a variety of hardware platforms, and can operate efficiently from resource-constrained embedded devices to high-performance X86 architectures. The test results show that while maintaining the filtering accuracy, the real-time analysis data of the library is excellent, the usage threshold is low, and it is also convenient to integrate into different development environments.

[0169] In a specific embodiment, the above variable decimation rate digital filter can be used to implement some general electroencephalogram (EEG) signal preprocessing platforms, which can preprocess signals such as high-pass filtering, low-pass filtering, band-pass filtering, and band-stop filtering before collecting the original EEG signals. By preprocessing the signals, the signal quality can be improved, noise can be reduced, and the reliability of the signals can be enhanced.

[0170] However, if we want to test the performance of these filters, a test platform is needed. An embodiment of this application also designs a test platform, which can automatically generate the frequency response diagram of the filter and test the signal. The test platform can evaluate the performance of the filter and give a performance score for the filter.

[0171] An embodiment of this application also provides a test platform for the variable decimation rate digital filter as described above, including a standard signal generation module, a data set storage module, a data set import module, a variable decimation rate digital filter, and a preprocessing effect analysis module.

[0172] The standard signal generation module is used to generate a standard signal.

[0173] The data set storage module is used to save the standard signal as a signal data set.

[0174] The data set import module is used to import the signal to be tested from the data set to test the performance of the filter.

[0175] The signal processing module is used to process the signal to be tested to obtain the current output variable value.

[0176] The preprocessing effect analysis module is used to analyze the current output variable value, and the analysis includes frequency response analysis, spectrum analysis, and / or time series analysis.

[0177] The test platform needs to generate a standard signal for testing the performance of the filter. The standard signal can be a random signal, a sine signal, a square wave signal, a digital signal, etc. Among them, the random signal can simulate noise, clutter, voltage imbalance, etc. The sine signal can simulate electroencephalogram (EEG) signals of different frequencies. The square wave signal can simulate electroencephalogram (EEG) signals of different frequencies. The electroencephalogram (EEG) signal can be extracted from the digital signal.

[0178] The data set storage module of the test platform needs to save the standard signal as a data set for testing the performance of the filter. The data set can be a text file, an Excel table, a database, etc.

[0179] The data set import module imports the data set for testing the performance of the filter. The imported data set can be a text file, an Excel table, a database, an h5 file, etc.

[0180] The variable decimation rate digital filter can implement signal preprocessing, such as combinations of high-pass filtering, low-pass filtering, band-pass filtering, band-stop filtering, etc.

[0181] The preprocessing effect analysis module analyzes the preprocessed signal, such as a frequency response diagram, a spectrogram, a time series diagram, etc.

[0182] Figures 9 - 10Schematic diagram for analyzing the effect of signal preprocessing using a variable extraction rate digital filter on a test platform, showing the decomposition of real-time standard sine signals of four channels and a superimposed signal. Among them Figure 9 Schematic diagram of the four-channel real-time waveform of the test platform provided by the embodiment; Figure 10 Schematic diagram of the four-channel real-time filtering of the test platform provided by the embodiment.

[0183] In the embodiment, the preprocessing effect analysis module of the test platform evaluates the parameters of the filter and gives a parameter scoring report of the filter, as Figure 11 shown.

[0184] In the performance evaluation report, Figure 11 it shows the effects of filtering the signals of four different channels (CH0, CH1, CH2, CH3) using the same standard data (a set of sine signals of 10hz, 20hz, 40hz, 50hz, 60hz superimposed). The chart shows the processing process of the input of the signal (CH0), and the analysis of five steps of the original signal (Raw), spectral scaling (Bandpass Scaler), bandpass filter response (Bandpass Db), notch filter response (Notch Db), and filtered signal (Signal Filtered) can be displayed for each channel. Figure 11 In it, (a) - (e) are the original signal (Raw), spectral scaling (Bandpass Scaler), bandpass filter response (Bandpass Db), notch filter response (Notch Db), and filtered signal (Signal Filtered) of the first channel (CH0); (f) - (j) are the original signal (Raw), spectral scaling (Bandpass Scaler), bandpass filter response (Bandpass Db), notch filter response (Notch Db), and filtered signal (Signal Filtered) of the second channel (CH1); (k) - (o) are the original signal (Raw), spectral scaling (Bandpass Scaler), bandpass filter response (Bandpass Db), notch filter response (Notch Db), and filtered signal (Signal Filtered) of the third channel (CH2); (p) - (t) are the original signal (Raw), spectral scaling (Bandpass Scaler), bandpass filter response (Bandpass Db), notch filter response (Notch Db), and filtered signal (Signal Filtered) of the fourth channel (CH3).

[0185] The following is the description of each step:

[0186] 1. Signal Raw:

[0187] ① The raw signal of each channel is shown in the form of frequency response, showing that the signal is a superposition of a group of sine signals of 10 hz, 20 hz, 40 hz, 50 hz, and 60 hz.

[0188] 2. Bandpass Scaler:

[0189] ② This chart shows the relationship between the gain and frequency of the bandpass filter under the excitation of the passband. It can be seen that the signal is passed within 0.5 Hz to 30 Hz, while the gain is low in other frequency ranges.

[0190] 3. Bandpass Db:

[0191] ③ Figure 11 Shows the frequency response of the bandpass filter in decibels (dB). It shows the frequency range allowed by the filter in the passband and the attenuation in the stopband. The passband is also 0.5 Hz to 30 Hz.

[0192] 4. Notch Db:

[0193] ④ Figure 11 Shows the frequency response of the notch filter, which is usually used to remove interference signals at specific frequencies. It can be seen that there is obvious attenuation at a specific frequency (50 hz).

[0194] 5. Signal Filtered:

[0195] ⑤ The last chart shows the signal after being processed by the bandpass and notch filters. Compared with the raw signal, the filtered signal removes the unwanted frequency components and only retains the frequency range of interest (0.5 Hz to 30 Hz).

[0196] The following is the channel analysis:

[0197] Raw signal: Shows the initial amplitude distribution of the signal.

[0198] Bandpass Scaler: Under the action of the bandpass filter, the gain is amplified within a specific frequency range.

[0199] Bandpass filter response: The gain is 0.94417 in the passband and there is obvious attenuation in the stopband.

[0200] Notch filter response: The gain drops to -6.48801 dB at a specific frequency, effectively removing interference.

[0201] Filtered signal: The filtered signal remains stable within the passband, and interference is effectively suppressed.

[0202] The embodiment of the present application provides a test platform, which, as a performance evaluation tool for variable decimation rate digital filters, can quickly perform visual analysis on the frequency domain response and time delay, helping developers optimize filter parameters more conveniently and shortening the design cycle.

[0203] The above has introduced in detail a variable decimation rate digital filter and its test platform provided by the present application. Specific examples are used herein to elaborate on the principle and implementation manner of the present application. The description of the above embodiments is only used to help understand the concept of the present application and should not be construed as a limitation on the protection scope of the present application.

Claims

1. A variable extraction rate digital filter, characterized in that, Including: An input sample receiving module for receiving input signal sample data; A buffer update module for providing a buffer to store the historical values of the signal sample data and updating them in a timely manner; A kernel function construction module for setting a cut-off frequency, and based on the sinc function and the cut-off frequency, determining different types of kernel functions through a sliding window, where the different types of kernel functions serve as the weight coefficients of the corresponding filters; A variable tap design module for setting a decimation rate to adjust the attenuation multiple of the filter by adjusting the decimation rate, thereby adjusting different frequency responses; A filter calculation module for initializing the output variable value of the filter, traversing the buffer update module, calculating the current output variable value of the filter based on the signal sample data, the decimation rate, and the weight coefficients, and returning the current output variable value.

2. The variable extraction rate digital filter according to claim 1, characterized in that, Calculating the current output variable of the filter according to the decimation rate and the weight coefficients, and the calculation formula is as follows: ; where output is the output variable value of the current filter, and i is the index variable for the summation operation, is the signal sample data corresponding to the element of the index variable i, is the weight coefficient of the kernel function corresponding to the index variable i; taps is the decimation rate.

3. The variable extraction rate digital filter according to claim 1, characterized in that, Based on the sinc function and the cut-off frequency, determining different types of kernel functions through a sliding window, including: For a low-pass filter: Using the truncated sinc function to construct the kernel function of the low-pass filter, and the kernel function of the low-pass filter passes the frequencies below the cut-off frequency and suppresses the frequencies above the cut-off frequency; For a high-pass filter: It is constructed by frequency inversion of the kernel function of the low-pass filter, and the high-pass filter passes the frequencies above the cut-off frequency and suppresses the frequencies below the cut-off frequency; For a band-pass filter: It is composed of the frequency difference between the kernel functions of two low-pass filters, and the band-pass filter adjusts the frequency bandwidth by setting two cut-off frequencies; For a band-stop filter: It is composed of the difference between the unit impulse function and the frequency of the kernel function of the band-pass filter.

4. The variable extraction rate digital filter according to claim 1, wherein The performance of the filter is improved by increasing the decimation rate through the variable tap design module.

5. The variable extraction rate digital filter according to claim 1, characterized in that, The filter is implemented based on C language.

6. The variable extraction rate digital filter according to claim 1, wherein The filter calculation module adopts a parallel computing architecture to improve the real-time performance of the filtering calculation.

7. The variable extraction rate digital filter according to claim 1, characterized in that, The filter is applied to the field of electroencephalogram (EEG) signal processing for real-time filtering of EEG signals.

8. The variable extraction rate digital filter according to claim 1, characterized in that, The variable tap design module automatically adjusts the decimation rate according to the frequency characteristics of the input signal to achieve adaptive filtering.

9. A test platform for a variable extraction rate digital filter as described in any one of claims 1 to 8, characterized in that, The test platform includes: A standard signal generation module for generating a standard signal; A data set storage module for saving the standard signal as a signal data set; A data set import module for importing the signal to be tested from the data set to test the performance of the filter; The variable decimation rate digital filter for processing the signal to be tested to obtain the current output variable value; A preprocessing effect analysis module for analyzing the current output variable value, and the analysis includes frequency response analysis, spectrum analysis, and / or time series analysis.

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