A variable decimation rate digital filter and its test platform

By designing a variable decimation rate digital filter, the real-time and power consumption bottleneck problems of high-precision filters on platforms with limited chip performance are solved, and flexible matching and efficient EEG signal processing are achieved on different hardware platforms.

CN120263146BActive Publication Date: 2025-08-19JILI INNOVATION (SHANGHAI) INTELLIGENT TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202510757419.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-06-09
Publication Date
2025-08-19
Estimated Expiration
2045-06-09

AI Technical Summary

Technical Problem

In the existing technology, high-precision filters have become the real-time and power consumption bottleneck of EEG signal processing on platforms with limited chip performance, and cannot flexibly match the needs of different hardware platforms.

Method used

Design a variable decimation rate digital filter, including input sample receiving module, buffer update module, kernel function construction module and variable tap design module. By adjusting the decimation rate and weight coefficient, a variety of filters such as low pass, high pass, bandpass, and band resistance are constructed to meet different frequency response needs, and implemented in C language to improve real-time performance.

Benefits of technology

It realizes flexible matching of high-precision filters on different hardware platforms, meets the real-time and power consumption requirements of EEG signal processing, provides frequency response adjustment capabilities of various filter types, and improves the accuracy and efficiency of signal processing.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application discloses a variable decimation rate digital filter and its test platform. The filter includes an input sample receiving module that receives input signal sample data; a buffer update module that provides a buffer area to store historical values of the signal sample data and updates them in a timely manner; a kernel function construction module that sets a cutoff frequency and determines different types of kernel functions through a sliding window based on a sinc function and the cutoff frequency. The different types of kernel functions serve as weight coefficients of the corresponding filters; a variable tap design module that sets a decimation rate to adjust the attenuation factor of the filter by adjusting the decimation rate, thereby adjusting different frequency responses; a filter calculation module that initializes the output variable value of the filter and traverses the buffer update module to calculate the output variable value of the current filter according to the decimation rate and weight coefficient based on the signal sample data, and returns the current output variable value. The filter attenuation factor can be adjusted to adapt to different application scenarios and signal processing requirements.
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Description

Technical Field

[0001] The present application belongs to the field of filter design and testing technology, and specifically relates to a variable decimation rate digital filter and a testing platform thereof. Background Art

[0002] EEG signals require high precision, low power consumption, and a certain level of real-time performance. Most existing filtering solutions rely on hardware. These hardware acquisition solutions typically consist of three components: a digital signal acquisition sensor, a Σ-Δ modulation circuit, and a decimation filter. The optimal design of the decimation filter directly impacts system performance and power consumption. On platforms with limited chip performance, high-precision filters can become a bottleneck for the real-time performance and power consumption of the acquisition system.

[0003] Therefore, designing a cross-platform high-precision digital filter and its test platform will be beneficial for running on various hardware platforms, especially some platforms that cannot access proprietary hardware. This can flexibly match the needs of EEG signal processing, reasonably allocate device power consumption and meet real-time requirements. Summary of the Invention

[0004] The technical purpose of this application is to design a cross-platform digital filter and its test platform to flexibly match the needs of EEG signal processing.

[0005] In order to achieve the above technical objectives, this application adopts the following technical solutions.

[0006] In a first aspect, an embodiment of the present application provides a variable decimation rate digital filter, comprising:

[0007] An input sample receiving module, configured to receive input signal sample data;

[0008] A buffer updating module is used to provide a buffer area to store the historical values of the signal sample data and update them in time;

[0009] A kernel function construction module is used to set a cutoff frequency, determine different types of kernel functions through a sliding window based on a sinc function and the cutoff frequency, and use the different types of kernel functions as weight coefficients of corresponding filters;

[0010] A variable tap design module, used to set a decimation rate, so as to adjust the attenuation factor of the filter by adjusting the decimation rate, thereby adjusting different frequency responses;

[0011] The filter calculation module is used to initialize the output variable value of the filter, traverse the buffer update module, calculate the current output variable value of the filter based on the signal sample data, according to the sampling rate and the weight coefficient, and return the current output variable value.

[0012] Furthermore, the output variable of the current filter is calculated according to the decimation rate and the weight coefficient, and the calculation formula is as follows:

[0013] ;

[0014] Where output is the output variable value of the current filter, i is the index variable of the summation operation, is the signal sample data corresponding to the element of index variable i, is the weight coefficient of the kernel function corresponding to the index variable i; taps is the decimation rate.

[0015] Furthermore, based on the sinc function and the cutoff frequency, different types of kernel functions are determined through a sliding window, including:

[0016] For a low-pass filter: a kernel function of the low-pass filter is constructed using the truncated sinc function, wherein the kernel function of the low-pass filter passes frequencies below the cutoff frequency and suppresses frequencies above the cutoff frequency;

[0017] For a high-pass filter: it is constructed by frequency inversion of the kernel function of the low-pass filter, and the high-pass filter passes frequencies above the cutoff frequency and suppresses frequencies below the cutoff frequency;

[0018] For a bandpass filter: it is composed of the frequency difference of the kernel functions of two low-pass filters, and the bandpass filter adjusts the frequency bandwidth by setting the two cutoff frequencies;

[0019] For the band-stop filter: it is composed of the frequency difference between the unit pulse function and the kernel function of the band-pass filter.

[0020] Furthermore, the filter improves performance by increasing the decimation rate through a variable tap design module.

[0021] Furthermore, the filter is implemented based on C language.

[0022] Furthermore, the filter calculation module adopts a parallel computing architecture to improve the real-time performance of the filter calculation.

[0023] Furthermore, the filter is applied in the field of EEG signal processing to perform real-time filtering on EEG signals.

[0024] Furthermore, the variable tap design module automatically adjusts the decimation rate according to the frequency characteristics of the input signal to achieve adaptive filtering.

[0025] In a second aspect, an embodiment of the present application provides a test platform for a variable decimation rate digital filter as provided in any possible embodiment of the first aspect, the test platform comprising:

[0026] A standard signal generating module, used for generating a standard signal;

[0027] A data set storage module, configured to store the standard signal as a signal data set;

[0028] A data set import module, used to import a signal to be tested from the data set to test the performance of the filter;

[0029] The variable decimation rate digital filter is used to process the signal to be measured to obtain the current output variable value;

[0030] The preprocessing effect analysis module is used to analyze the current output variable value, and the analysis includes frequency response analysis, spectrum analysis and / or time series analysis.

[0031] Compared to existing technologies, the variable decimation rate digital filter provided in the embodiments of this application achieves beneficial technical effects, including: The variable tap design module allows for setting the decimation rate, adjusting the filter's attenuation factor, and thus adjusting the frequency response to suit different application scenarios and signal processing requirements. It also offers strong customizability. The kernel function construction module uses a sliding window to determine different types of kernel functions based on the sinc function and cutoff frequency. These different kernel functions serve as filter weight coefficients, enabling the construction of various filter types, such as low-pass, high-pass, band-pass, and band-stop, to meet the processing requirements of signals with different frequency components.

[0032] Compared to existing technologies, the variable decimation rate digital filter testing platform provided by the present invention offers several advantages: It enables real-time filter analysis software for evaluating the performance of different filters. This tool analyzes the frequency domain response and time delay of standard signal filters, visually demonstrating the filtering effects and performance indicators under different parameter settings. It also supports the ability to save and load datasets. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The drawings described herein are for illustrative purposes only and are not intended to limit the scope of the present application in any way. In addition, the shapes and proportional dimensions of the components in the drawings are only schematic and are used to help understand the present application. They do not specifically limit the shapes and proportional dimensions of the components of the present application. Those skilled in the art can select various possible shapes and proportional dimensions to implement the present application according to the specific circumstances under the guidance of the present application. In the drawings:

[0034] Figure 1 A schematic diagram of the structure of a variable decimation rate digital filter provided in an embodiment;

[0035] Figure 2A schematic diagram of the convolution kernel weight coefficients of various filters at a decimation rate of 20 for a variable decimation rate digital filter provided in an embodiment;

[0036] Figure 3 A schematic diagram of the convolution kernel weight coefficients of various filters at a decimation rate of 50 for a variable decimation rate digital filter provided in an embodiment;

[0037] Figure 4 Schematic diagram of a flow chart of the variable tap design module in an embodiment automatically adjusting the decimation rate according to the frequency characteristics of the input signal;

[0038] Figure 5 A schematic diagram of a flow chart of calculating output of a variable decimation rate digital filter provided in an embodiment;

[0039] Figure 6 Schematic diagram of the frequency response of various filters at a sampling rate of 100 taps at 250 Hz in the embodiment;

[0040] Figure 7 Schematic diagram of the frequency response of various filters at a sampling rate of 250 Hz and 200 taps in the embodiment;

[0041] Figure 8 Schematic diagram comparing the real-time performance of the filter implemented in C language and the filter implemented in Python in the embodiment;

[0042] Figure 9 A schematic diagram of four-channel real-time waveforms of the test platform provided in the embodiment;

[0043] Figure 10 Schematic diagram of four-channel real-time filtering of the test platform provided in the embodiment;

[0044] Figure 11 A schematic diagram of a filter channel report generated by a test platform provided in an embodiment. DETAILED DESCRIPTION

[0045] In order to enable those skilled in the art to better understand the technical solutions in this application, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of this application.

[0046] In modern signal processing, preprocessing is crucial to ensuring the accuracy of subsequent analysis. Having a library of customizable digital filters allows engineers to design filter parameters based on specific application requirements, more precisely matching signal characteristics and achieving processing goals. This flexibility enables filters to adapt to a variety of signal environments and conditions. Furthermore, by customizing filters, their performance can be optimized to meet specific frequency response and time delay requirements, which is particularly important for applications requiring fast response or a specific bandwidth. Custom filters can be specifically designed to suppress noise within a specific frequency range, thereby improving the signal-to-noise ratio.

[0047] In the field of electroencephalogram (EEG) signal processing, the application of custom digital filter libraries is crucial for signal preprocessing. EEG signals are often affected by external noise, making further processing such as feature extraction or classification difficult. Custom digital filters can effectively filter out noise from EEG signals, improving the signal-to-noise ratio and enabling more accurate feature extraction. Furthermore, EEG signals are composed of signals in different frequency bands, and custom filters can be optimized for these specific brain waves to ensure optimal signal response across different frequency bands. This has positive implications for further improving the accuracy of disease detection.

[0048] The variable decimation rate digital filter provided in the application embodiment has adjustable filtering parameters and is based on the sinc kernel function. Its internal amplitude spectrum coefficient changes with the decimation rate to adjust the attenuation factor (FRD) at a specified index frequency. It can be easily debugged by developers and is very suitable for application in the field of EEG data processing technology.

[0049] The following is further explained with reference to the accompanying drawings and specific embodiments.

[0050] like Figure 1 This embodiment discloses a variable decimation rate digital filter, including an input sample receiving module, a buffer updating module, a kernel function construction module, a variable tap design module and a filter calculation module.

[0051] The input sample receiving module is used to receive input signal sample data.

[0052] The buffer update module is used to provide the historical values of the signal sample data stored in the buffer area and update them in time.

[0053] The kernel function construction module is used to set the cutoff frequency. Based on the sinc function and the cutoff frequency, different types of kernel functions are determined through a sliding window. Different types of kernel functions serve as weight coefficients of the corresponding filters.

[0054] The variable tap design module is used to set the decimation rate, so as to adjust the attenuation multiple of the filter by adjusting the decimation rate, thereby adjusting different frequency responses.

[0055] The filter calculation module is used to initialize the output variable value of the filter, and traverse the buffer update module to calculate the output variable value of the current filter based on the signal sample data, the decimation rate and the weight coefficient, and return the current output variable value.

[0056] The kernel function of the filter provided in the embodiment of the present application is based on the sinc function, which is a time domain representation corresponding to the frequency domain characteristics of an ideal low-pass filter.

[0057] In a specific embodiment, the design is based on an FIR (finite impulse response) filter, in which the kernel function (also called the impulse response or weight coefficient of the filter) is calculated through a sliding window and can be used to construct a low-pass filter (Lowpass), a high-pass filter (Highpass), a band-pass filter (Bandpass) and a band-stop filter (Bandstop).

[0058] In some embodiments, the sliding window is a sliding rectangular window. Although the rectangular window has a narrow main lobe (steep transition from passband to stopband) compared to other types of windows, it has the advantage of low computational overhead and a significant contribution to real-time performance.

[0059] The process of calculating the output of the variable decimation rate digital filter can be as follows:

[0060] 1. The input sample receiving module receives input samples.

[0061] 2. The buffer update module updates the buffer.

[0062] 3. Move the buffer contents (overwrite from back to front).

[0063] 4. Place the new sample at the beginning of the buffer.

[0064] 5. The filter calculation module initializes the output variable value of the filter.

[0065] 6. The filter calculation module traverses the buffer, calculates the filter output, and returns the result.

[0066] ;

[0067] Where output is the output variable value of the current filter, i is the index variable of the summation operation, is the signal sample data corresponding to the element of index variable i, is the weight coefficient of the kernel function corresponding to the index variable i; taps is the decimation rate.

[0068] In this example, the decimation rate taps is determined by the sliding window length, which can be variable. The decimation rate does not need to exceed the window length.

[0069] As an example, we traverse the range from 0 to taps - 1, sequentially extracting the element corresponding to index i from the buffer array (the input sample buffer) and the coeff array (the kernel function weight coefficient), multiplying them together, and then accumulating them to obtain the filter output, output. By varying the value of i, we operate on each element in the array, thus achieving a weighted summation of the entire buffer of samples and the weight coefficients.

[0070] In the embodiment, the construction method and characteristics of the kernel function of different types of filters are as follows.

[0071] 1. Construction method and characteristics of the kernel function of the low-pass filter:

[0072] The truncated sinc function corresponds to a low-pass filter that passes the cutoff frequency frequencies below, while suppressing frequencies above frequency.

[0073] 1. Frequency domain characteristics of an ideal low-pass filter:

[0074] ;

[0075] in, is the cutoff frequency, is the angular frequency of the signal function.

[0076] 2. Impulse response of an ideal low-pass filter:

[0077] ;

[0078] in, is the cutoff frequency, is the index of the sample point.

[0079] 2. Construction method and characteristics of kernel function of high-pass filter:

[0080] The kernel function of the high-pass filter is constructed by frequency inversion of the low-pass kernel, which can pass the cutoff frequency. above, while suppressing frequencies below frequency.

[0081] 1. Frequency domain characteristics of an ideal high-pass filter:

[0082] ;

[0083] 2. Impulse response of an ideal high-pass filter:

[0084] ;

[0085] in, is the cutoff frequency, is the index of the sample point.

[0086] 3. Construction method and characteristics of the kernel function of the bandpass filter:

[0087] The kernel function of the bandpass filter is composed of the frequency difference of two low-pass filter kernels, which can be set by and To adjust the frequency bandwidth.

[0088] 1. Frequency domain characteristics of ideal bandpass filter:

[0089] ;

[0090] in, and are the lower and upper limits of the frequency bandwidth.

[0091] 2. Impulse response of an ideal bandpass filter:

[0092] ;

[0093] in, and are the lower and upper limits of the frequency bandwidth, is the index of the sample point.

[0094] 4. Construction method and characteristics of the kernel function of the bandpass filter:

[0095] The kernel function of the bandpass filter is composed of the frequency difference between the unit impulse function and the bandpass kernel.

[0096] 1. Frequency domain characteristics of ideal band-stop filter:

[0097] ;

[0098] in, and are the lower and upper limits of the frequency bandwidth.

[0099] 2. Impulse response of ideal band-stop filter:

[0100] ;

[0101] in, and are the lower and upper limits of the frequency bandwidth, is the index of the sample point.

[0102] The purpose of the variable tap design used in this application is to adjust the attenuation factor of the filter by adjusting the decimation rate, thereby achieving the purpose of adjusting different frequency responses. Specifically, the decimation number is achieved by adjusting the amplitude spectrum coefficient of the filter. The larger the decimation number, the smaller the attenuation factor and the smoother the frequency response, but it will also introduce more delay.

[0103] In this embodiment, the attenuation factor of the specified index frequency can be specified. The filter design based on the variable decimation rate can effectively control the attenuation factor (FRD) of the specified index frequency, meeting the flexible requirements for frequency domain characteristics in different application scenarios. For example, the attenuation factor of the specified frequency can be dynamically adjusted in high-pass, low-pass, band-pass, and band-stop filtering.

[0104] In the embodiment, the decimation rate ranges from 20 to 200, such as 20, 50, 100, 150, 200, etc. Figure 2 and Figure 3 The changes in the convolution kernel weight coefficients at 20% and 50% decimation rates are shown.

[0105] In some embodiments, the variable tap design module automatically adjusts the decimation rate according to the frequency characteristics of the input signal to achieve adaptive filtering.

[0106] For example, the variable tap design module performs frequency analysis on the input signal. It uses algorithms such as the Fast Fourier Transform (FFT) to convert the input signal from the time domain to the frequency domain, obtaining the signal's spectrum. This spectrum analysis can determine the distribution of different frequency components in the input signal, such as the signal's primary frequency range and the presence of high-frequency noise or low-frequency interference. Based on the signal's characteristics and filtering requirements, thresholds and adjustment rules are set. Based on the frequency analysis results and the set rules, the variable tap design module dynamically adjusts the decimation rate.

[0107] like Figure 4 As shown, this application introduces a possible implementation method, where Period represents a frequency difference range and defines whether the frequency difference distance DIS is within an acceptable range. This allows the upper and lower frequency points of the filter to maintain sufficient attenuation, with less compensation and more reduction.

[0108] Specifically:

[0109] DIS = Current attenuation coefficient of the specified frequency point - Target attenuation coefficient of the specified frequency point, that is, the calculated frequency difference value.

[0110] If DIS is in the range -Period < DIS < +Period, the number of decimations remains unchanged.

[0111] If DIS is positive and exceeds +Period, the number of decimations needs to be increased.

[0112] If DIS is negative and less than -Period, the number of decimations needs to be reduced.

[0113] Therefore, a Period threshold range is set, where +Period is the upper threshold limit and -Period is the lower threshold limit. The Period threshold range ensures that the adjustment of the extraction number is not affected when the DIS is within a certain fluctuation range. The extraction number will only be adjusted when it exceeds the Period threshold range.

[0114] In some embodiments, a cross-platform C / Python general DSP library can be used to implement a variable decimation rate digital filter. Part of the filtering process is as follows Figure 5 shown.

[0115] As an example, in the embodiment, a DSP may be used to implement a variable decimation rate digital filter.

[0116] Currently, the weight parameters of some DSP filters (such as those generated by MATLAB Direct Type I) often need to be statically compiled into the code. Each time a filter cutoff frequency is changed, the weight parameters need to be regenerated. Because the filter proposed in this application rewrites the initialization method of various filter types based on the sinc kernel function, the weight parameter array is dynamically calculated during initialization. This allows users to specify the required cutoff frequency without having to write all the required weight parameters into the static code each time.

[0117] As an example, the filter method of the DSP implementing the embodiment of the present application is as follows.

[0118] The Filter method implements the core operation of a finite impulse response (FIR) filter, which relies mainly on two key data structures: the input buffer and the coefficient vector.

[0119] 1. Input Buffer Update: The input buffer stores the historical values of input data. Each time the method is called, all elements in the input buffer are shifted back one position, removing the oldest element to make room for the new input sample. The new sample is stored at the first position of the input buffer (buffer[0]).

[0120] 2. Filter calculation: Initialize the filter output to zero. By traversing the input buffer and the coefficient vector (coeff), the dot product between the two is calculated item by item, that is, the value of each position in the input buffer is multiplied by the corresponding coefficient, and the result is accumulated to the output. This step implements the core formula of the filter:

[0121] ;

[0122] in, is the current filter output, is the weight coefficient vector;

[0123] is the signal sample value in the input buffer, and M represents the weight coefficient vector (that is, the length of the filter's weight coefficients).

[0124] 3. Return the filtering result: After the dot product calculation is completed, the output value is the filtering result at the current moment and is directly returned to the caller.

[0125] This sliding window algorithm based on an input buffer is suitable for real-time signal processing and can gradually apply filter weight coefficients to smooth or frequency filter the input signal.

[0126] The variable decimation rate digital filter provided in this embodiment supports a high-precision digital signal processing (DSP) library for embedded devices and the X86 platform. It provides dual C and Python versions to meet multi-platform requirements. Furthermore, the real-time performance of the X86 library is analyzed to ensure efficient operation on various hardware architectures.

[0127] Figure 6 and Figure 7 The following diagrams illustrate the frequency responses of various filters at a 250 Hz sampling rate of 100 taps and a 250 Hz sampling rate of 200 taps, respectively. These two sets of figures show the frequency responses of various filters at different tap counts (decimation rates) for passband signals. Each set of figures contains eight sub-graphs, corresponding to the linear phase and exponential phase responses of the lowpass, highpass, bandpass, and bandstop filters. The sampling frequency (Fs) is 250.0 Hz, the tap counts are 100 and 200, respectively, and the lowpass cutoff frequency (Flow) for all filters is 0.5 Hz, and the highpass cutoff frequency (Fhigh) is 30 Hz.

[0128] Analysis of taps=100:

[0129] 1. Lowpass Filter:

[0130] ① Linear gain: The gain is 0.36653 at 0.5Hz and close to 0 at 30Hz.

[0131] ② Exponential gain: The gain is -8.71787dB at 0.5Hz and -88.57311dB at 30Hz.

[0132] 2. Highpass Filter:

[0133] ① Linear gain: The gain is close to 0 at 0.5Hz and 0.50339 at 30Hz.

[0134] ② Exponential gain: The gain is -8.41550dB at 0.5Hz and -5.96258dB at 30Hz.

[0135] 3. Bandpass Filter:

[0136] ① Linear gain: The gain is 0.62050 at 0.5Hz and 0.49665 at 30Hz.

[0137] ② Exponential gain: The gain is -4.14518dB at 0.5Hz and -6.07901dB at 30Hz.

[0138] 4. Bandstop Filter:

[0139] ① Linear gain: The gain is 0.37951 at 0.5Hz and 0.50335 at 30Hz.

[0140] ② Exponential gain: The gain is -8.41550dB at 0.5Hz and -7.94175dB at 30Hz.

[0141] Analysis of taps=200:

[0142] 1. Lowpass Filter:

[0143] ① Linear gain: The gain is 0.56712 at 0.5Hz and close to 0 at 30Hz.

[0144] ② Exponential gain: The gain is -4.92649dB at 0.5Hz and -83.59598dB at 30Hz.

[0145] 2. Highpass Filter:

[0146] ① Linear gain: The gain is close to 0 at 0.5Hz and 0.50169 at 30Hz.

[0147] ② Exponential gain: The gain at 0.5Hz is -52.10873dB, and the gain at 30Hz is -5.99121dB.

[0148] 3. Bandpass Filter:

[0149] ① Linear gain: The gain is 0.43042 at 0.5Hz and 0.49837 at 30Hz.

[0150] ② Exponential gain: The gain is -7.32224dB at 0.5Hz and -6.04894dB at 30Hz.

[0151] 4. Bandstop Filter:

[0152] ① Linear gain: The gain is 0.56960 at 0.5Hz and 0.50163 at 30Hz.

[0153] ② Exponential gain: The gain is -4.888858dB at 0.5Hz and -5.99236dB at 30Hz.

[0154] The above analysis shows the following: 1. Impact of Taps: Increasing the taps from 100 to 200 results in a faster plateauing of the filter's frequency response at the cutoff frequency, indicating that a higher tap count provides better frequency selectivity. 2. Cutoff Frequency: All filters exhibit significant gain changes at either 0.5Hz or 30Hz, consistent with the set filter cutoff frequency.

[0155] In general, increasing the number of taps can improve filter performance, especially in applications that require more precise frequency control. Of course, this requires the user to make a trade-off with the real-time performance they need.

[0156] The following describes the purpose of the variable tap design to adjust the multiple attenuation (FRD) analysis at a specified index frequency.

[0157] Variable tap design is a flexible filter design method that allows filter characteristics to be modified by adjusting the decimation rate (also known as the number of taps) in the filter. The primary goal of this design is to achieve precise control over the filter's frequency response, particularly the frequency response down (FRD) at a specified index frequency. By varying the tap weights, the filter's passband and stopband characteristics can be effectively adjusted to meet specific signal processing requirements.

[0158] In a variable tap design, the number of taps (taps) has a significant impact on the filter's performance. More taps provide finer control, enabling more precise adjustment of the attenuation factor at a given frequency. For example, when comparing two different tap counts (100 and 200), the following differences can be observed:

[0159] 1. Lowpass Filter: In the 100 taps design, the gain at 0.5 Hz is 0.36653, while in the 200 taps design, the gain at the same frequency increases to 0.56712. This shows that as the number of taps increases, the filter gain at low frequencies also increases.

[0160] 2. Highpass Filter: In the 100 taps design, the gain at 30Hz is 0.50339, while in the 200 taps design, the gain at the same frequency drops slightly to 0.50169. This may mean that more taps help to more accurately control the cutoff frequency of the highpass filter.

[0161] 3. Bandpass Filter: In the 100 taps design, the gains at 0.5 Hz and 30 Hz are 0.62050 and 0.49665, respectively, while in the 200 taps design, the gains at these frequencies are 0.43042 and 0.49837, respectively. This shows that increasing the number of taps can improve the gain control of the bandpass filter within the passband.

[0162] 4. Bandstop Filter: In the 100 taps design, the gains at 0.5Hz and 30Hz are 0.37951 and 0.50335, respectively, while in the 200 taps design, the gains at these frequencies are 0.56960 and 0.50163, respectively. This shows that more taps can help more precisely adjust the attenuation of the bandstop filter within the stopband.

[0163] In general, variable tap design can achieve fine control of the filter frequency response by adjusting the number and weight of taps. In particular, when the attenuation factor at a specified index frequency needs to be adjusted, increasing the number of taps can improve the filter performance, achieve more precise frequency selectivity and better signal processing effects.

[0164] like Figure 8 As shown, Figure 8This chart compares the processing counts (counts) per second for an X86-64 filter application compiled in C and a filter application implemented in Python. Each bar in the chart represents the results of a single test run, with blue representing the performance of the C filter and orange representing the performance of the Python filter. As can be seen from the chart, the C filter's processing counts were significantly higher than those of the Python filter in every test run.

[0165] Consistency: The C language filter's performance was relatively stable across the five rounds of testing, with the processing count fluctuating between 2,921,087 and 2,936,445. The Python filter's performance fluctuated less, with the processing count ranging from 23,494 to 25,600, significantly lower than the C language filter.

[0166] Real-time performance: The C filter's process count fluctuates between 2,921,087 and 2,936,445, meaning the C filter can meet the 2.9 MHz real-time performance requirement. The Python filter's process count ranges from 23,494 to 25,600, significantly lower than the C filter's. However, this still means the Python filter can meet the 23 kHz real-time performance requirement.

[0167] The above analysis shows that C filters significantly outperform Python filters in terms of real-time performance, especially in applications that process large amounts of data or have high performance requirements. However, Python filters may have advantages in development speed and code readability, which may be more important than performance in some cases. The choice of language for implementing filters should be determined based on the specific application requirements and context.

[0168] The variable decimation rate digital filter proposed in this application is implemented using dual C and Python libraries, compatible with a wide range of hardware platforms, from resource-constrained embedded devices to high-performance x86 architectures. Test results demonstrate that the library provides excellent real-time analysis data while maintaining filtering accuracy, offering a low barrier to entry and easy integration into various development environments.

[0169] In specific embodiments, the variable decimation rate digital filter described above can be used to implement a general EEG signal preprocessing platform. This platform can preprocess the EEG signal before acquiring the original signal, such as high-pass filtering, low-pass filtering, band-pass filtering, and band-stop filtering. By preprocessing the signal, the signal quality can be improved, noise can be reduced, and the signal reliability can be increased.

[0170] However, if you want to test the performance of these filters, you need a test platform. The present application also provides a test platform that automatically generates a frequency response graph of the filter and tests the signal. The test platform can evaluate the performance of the filter and provide a performance score for the filter.

[0171] An embodiment of the present application also provides a test platform for the variable decimation rate digital filter as described above, including a standard signal generation module, a data set storage module, a data set import module, a variable decimation rate digital filter and a preprocessing effect analysis module.

[0172] The standard signal generation module is used to generate standard signals.

[0173] The dataset storage module is used to save standard signals as signal datasets.

[0174] The data set import module is used to import the signal to be tested from the data set to test the performance of the filter.

[0175] The signal processing module is used to process the signal to be measured to obtain the current output variable value.

[0176] The preprocessing effect analysis module is used to analyze the current output variable value, including frequency response analysis, spectrum analysis and / or time series analysis.

[0177] The test platform needs to generate standard signals for testing filter performance. Standard signals can include random signals, sinusoidal signals, square wave signals, and digital signals. Random signals can simulate noise, clutter, and voltage imbalance. Sinusoidal signals can simulate EEG signals of different frequencies. Square wave signals can also simulate EEG signals of different frequencies. EEG signals can also be extracted from digital signals.

[0178] The test platform's dataset storage module needs to save the standard signal as a dataset for testing the filter's performance. The dataset can be a text file, Excel spreadsheet, database, etc.

[0179] The dataset import module imports datasets for testing filter performance. The imported datasets can be text files, Excel spreadsheets, databases, h5 files, etc.

[0180] Variable decimation rate digital filters can realize signal preprocessing, such as high-pass filtering, low-pass filtering, band-pass filtering, band-stop filtering and other combinations.

[0181] The preprocessing effect analysis module analyzes the preprocessed signal, such as frequency response diagram, spectrum diagram, time series diagram, etc.

[0182] Figure 9-10This is a schematic diagram of the effect analysis of the test platform using a variable decimation rate digital filter for signal preprocessing, showing the decomposition of four channels of real-time standard sine signals and a superimposed signal. Figure 9 A schematic diagram of four-channel real-time waveforms of the test platform provided in the embodiment; Figure 10 Schematic diagram of four-channel real-time filtering of the test platform provided in the embodiment.

[0183] In the embodiment, the pre-processing effect analysis module of the test platform evaluates the parameters of the filter and provides a parameter score report of the filter, such as Figure 11 shown.

[0184] In the performance evaluation report, Figure 11 This diagram shows the effects of filtering four different channels (CH0, CH1, CH2, and CH3) using the same standard data (a superimposed set of 10Hz, 20Hz, 40Hz, 50Hz, and 60Hz sinusoidal signals). The diagram illustrates the processing of the CH0 input signal, with each channel displaying the five-step analysis: the original signal (Raw), the spectrum scaler (Bandpass Scaler), the bandpass filter response (Bandpass Db), the notch filter response (Notch Db), and the filtered signal (Signal Filtered). Figure 11 (a) to (e) are the original signal (Raw), spectrum scaling (Bandpass Scaler), bandpass filter response (Bandpass Db), notch filter response (Notch Db) and filtered signal (Signal Filtered) of the first channel (CH0); (f) to (j) are the original signal (Raw), spectrum scaling (Bandpass Scaler), bandpass filter response (Bandpass Db), notch filter response (Notch Db) and filtered signal (Signal Filtered) of the second channel (CH1); (k) to (o) are the original signal (Raw), spectrum scaling (Bandpass Scaler), bandpass filter response (Bandpass Db), notch filter response (Notch Db) and filtered signal (Signal Filtered) of the third channel (CH2); (p) to (t) are the original signal (Raw), spectrum scaling (Bandpass Scaler), bandpass filter response (Bandpass Db), notch filter response (Notch Db) and filtered signal (Signal Filtered) of the fourth channel (CH3). Db) and the filtered signal (Signal Filtered).

[0185] Here is a description of each step:

[0186] 1. Original signal (Signal Raw):

[0187] ① The original signal of each channel is displayed in the form of frequency response, showing that the signal is a superposition of a set of sine signals of 10 Hz, 20 Hz, 40 Hz, 50 Hz, and 60 Hz.

[0188] 2. Bandpass Scaler

[0189] ②This graph shows the relationship between the gain of a bandpass filter and frequency under the action of a passband excitation. As can be seen, the signal is passed between 0.5Hz and 30Hz, while the gain is low in other frequency ranges.

[0190] 3. Bandpass filter response (Bandpass Db):

[0191] ③ Figure 11 The frequency response of a bandpass filter is shown in decibels (dB). It shows the frequency range allowed by the filter in the passband, which is also 0.5Hz to 30Hz, and the attenuation in the stopband.

[0192] 4. Notch filter response (Notch Db):

[0193] ④ Figure 11 This shows the frequency response of a notch filter, which is often used to remove interfering signals at a specific frequency. You can see that there is significant attenuation at a specific frequency (50 Hz).

[0194] 5. Signal Filtered:

[0195] ⑤The last graph shows the signal after being processed by bandpass and notch filters. Compared to the original signal, the filtered signal removes unwanted frequency components and only retains the frequency range of interest (0.5Hz to 30Hz).

[0196] The following is the channel analysis:

[0197] Original Signal: Shows the initial amplitude distribution of the signal.

[0198] Spectrum Scaling: Under the action of a bandpass filter, the gain is amplified within a specific frequency range.

[0199] Bandpass filter response: The gain is 0.94417 in the passband and there is significant attenuation in the stopband.

[0200] Notch filter response: Gain drops to -6.48801 dB at a specific frequency, effectively removing interference.

[0201] Filtered signal: The filtered signal remains stable within the passband and interference is effectively suppressed.

[0202] The embodiments of the present application provide a test platform that serves as a performance evaluation tool for variable decimation rate digital filters. It can quickly perform visual analysis of frequency domain response and time delay, helping developers to more conveniently optimize filter parameters and shorten the design cycle.

[0203] The above is a detailed introduction to a variable decimation rate digital filter and its test platform provided by the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the concept of the present application and should not be understood as limiting the scope of protection of the present application.

Claims

1. A variable decimation rate digital filter, characterized in that: include: An input sample receiving module, used for receiving input signal sample data; A buffer updating module is used to provide a buffer area to store the historical values of the signal sample data and update them in time; A kernel function construction module is used to set the cutoff frequency. Based on the sinc function and the cutoff frequency, four types of kernel functions, namely low-pass filter, high-pass filter, band-pass filter and band-stop filter, are determined through a sliding window, and the kernel functions serve as weight coefficients of the corresponding filters. The kernel function of the low-pass filter is constructed using a truncated sinc function, and frequencies below the cutoff frequency are passed, while frequencies above the cutoff frequency are suppressed. The kernel function of the high-pass filter is constructed by frequency inversion of the kernel function of the low-pass filter, and frequencies above the cutoff frequency are passed, while frequencies below the cutoff frequency are suppressed. The kernel function of the band-pass filter is composed of the frequency difference between the kernel functions of two low-pass filters, and the frequency bandwidth is adjusted by setting the two cutoff frequencies. The kernel function of the band-stop filter is composed of the frequency difference between the unit pulse function and the kernel function of the band-pass filter. A variable tap design module, used to set a decimation rate, so as to adjust the attenuation factor of the filter by adjusting the decimation rate, thereby adjusting different frequency responses; The filter calculation module is used to initialize the output variable value of the filter, traverse the buffer update module, calculate the current output variable value of the filter based on the signal sample data, according to the sampling rate and the weight coefficient, and return the current output variable value.

2. The variable decimation rate digital filter according to claim 1, wherein: The output variable of the current filter is calculated according to the decimation rate and the weight coefficient, and the calculation formula is as follows: ; Where output is the output variable value of the current filter, i is the index variable for the sum operation, Index variable i The elements of correspond to the signal sample data, Index variable i The weight coefficient corresponding to the kernel function; taps is the decimation rate.

3. The variable decimation rate digital filter according to claim 1, wherein: The filter improves performance by increasing the decimation rate through a variable tap design module.

4. The variable decimation rate digital filter according to claim 1, wherein: The filter is implemented based on C language.

5. The variable decimation rate digital filter according to claim 1, wherein: The filter calculation module adopts a parallel computing architecture to improve the real-time performance of the filter calculation.

6. The variable decimation rate digital filter according to claim 1, wherein: The filter is applied in the field of EEG signal processing and is used for real-time filtering of EEG signals.

7. The variable decimation rate digital filter according to claim 1, wherein: The variable tap design module automatically adjusts the decimation rate according to the frequency characteristics of the input signal to achieve adaptive filtering.

8. A test platform for a variable decimation rate digital filter according to any one of claims 1 to 7, characterized in that: The test platform includes: A standard signal generating module, used for generating a standard signal; A data set storage module, configured to store the standard signal as a signal data set; A data set import module, used to import a signal to be tested from the data set to test the performance of the filter; The variable decimation rate digital filter is used to process the signal to be measured to obtain a current output variable value; The preprocessing effect analysis module is used to analyze the current output variable value, and the analysis includes frequency response analysis, spectrum analysis and / or time series analysis.

Citation Information

Patent Citations

  • Digital low-pass filter with variable cut-off frequency and adjustable gain

    CN115412058A