A broadband radio frequency signal direct sampling preprocessing device and method

By designing a broadband RF signal direct acquisition preprocessing device, the problems of high system complexity, expensive price, poor spurious suppression and limited dynamic range in the prior art are solved, and high-fidelity direct sampling and real-time processing in the frequency band of 30MHz to 3000MHz are achieved, meeting the basic design requirements of the system under the RF direct acquisition system.

CN120263203BActive Publication Date: 2025-08-12NO 30 INST OF CHINA ELECTRONIC TECH GRP CORP
View PDF 4 Cites 0 Cited by

Patent Information

Application Number
CN202510703826.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-05-29
Publication Date
2025-08-12
Estimated Expiration
2045-05-29

AI Technical Summary

Technical Problem

The prior art has problems in broadband RF signal processing systems with high system complexity, expensive price, poor stray suppression, limited dynamic range and poor anti-interference ability, and it is impossible to achieve high-fidelity direct sampling and real-time processing in the frequency band of 30MHz to 3000MHz.

Method used

Design a broadband RF signal direct acquisition preprocessing device, including a limiter, RF switch, low-pass filter, coupler, preselected switch notch, a second-stage segmented preselected switch filter group, a three-stage temperature compensation attenuator, a three-stage CNC attenuator, a four-stage amplifier, a power supply circuit and a control circuit. Through preprocessing in the frequency band of 30MHz to 3000MHz, the index requirements such as small noise coefficient, flat passband, large dynamic range, high gain, high harmonic suppression and in-band stray suppression are achieved.

Benefits of technology

The basic design of the system under the RF direct acquisition system is realized, and the index requirements such as small noise coefficient, flat passband, large dynamic range, high gain, high harmonic suppression and in-band stray suppression are met, laying the foundation for the development of the system under the RF direct acquisition system.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120263203B_ABST
    Figure CN120263203B_ABST
Patent Text Reader

Abstract

The present invention belongs to the technical field of signal devices, and in particular relates to a broadband radio frequency signal direct sampling and preprocessing device and method. The device of the present invention includes a metal cavity shell, a power supply circuit and a control circuit. A printed circuit board is installed in the metal cavity shell. A limiter, a radio frequency switch, a low-pass filter, a first-stage low-noise amplifier, a first-stage preselection switch filter group, a first-stage temperature-compensated attenuator, a preselection switch notch filter group, a first-stage digitally controlled attenuator, a second-stage amplifier, a second-stage temperature-compensated attenuator, a second-stage digitally controlled attenuator, a third-stage temperature-compensated attenuator, a third-stage amplifier, a third-stage digitally controlled attenuator, a fourth-stage amplifier, a second-stage preselection switch filter group, a coupler and a detector are sequentially arranged on the printed circuit board along the signal transmission direction. The present invention provides a broadband radio frequency signal direct sampling and preprocessing device and method, which realizes high-fidelity direct sampling and real-time processing of broadband radio frequency signals in the frequency band of 30MHz to 3000MHz.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention belongs to the technical field of signal devices, and in particular relates to a broadband radio frequency signal direct sampling preprocessing device and method. Background Art

[0002] Limited by the development level of domestic components, wireless signal processing systems often utilize a superheterodyne architecture—designed to perform analog-to-digital (ADC) conversion in the intermediate frequency (IF) band. While this architecture reduces the signal processing power and speed requirements of the ADC's back-end digital signal processing, traditional superheterodyne broadband receivers place extremely high demands on the RF signal front-end processing. These requirements necessitate parallel processing of multiple analog frequency conversion channels and multiple high-precision frequency sources as mixing local oscillator signals, resulting in high system size and cost. Furthermore, superheterodyne frequency conversion receivers are limited by the nonlinearities of their extensive use of analog components, making it difficult to achieve high performance in certain specifications, such as noise figure, passband spurious suppression, image rejection, and two-tone dynamic range. The current mainstream architecture is based on the software-defined radio (SDR) concept to design the system, moving the post-acquisition digital processing of RF signals as far as possible to the antenna end, reducing the complexity of the front-end receiver as much as possible, and giving full play to the digital signal processing capabilities of large-scale integrated circuit devices such as back-end FPGA, DSP, CPU and GPU. It can also more conveniently and flexibly replace functional payloads and adapt artificial intelligence (AI) algorithms such as machine learning (ML).

[0003] The invention patent with application number 202210579584.7 discloses a tunable filter for anti-aliasing of RF direct sampling ADC. The filter includes a tunable filter, an RF variable gain amplifier and an ADC input buffer; the output end of the tunable filter is connected to the input end of the RF variable gain amplifier, and the output end of the RF variable gain amplifier is connected to the input end of the ADC input buffer. The tunable filter adopts a six-stage Chebyshev II structure filter. Each stage of the Chebyshev II structure filter adopts an active LC filter architecture. Each stage changes the value of LC to change the zero and pole of the corresponding filter. The invention is mainly adjustable for signals with an intermediate frequency of 1.5GHz and a bandwidth of 500MHz to 1GHz, meeting the anti-aliasing application requirements of 2GHz sampling high-speed ADCs. However, the invention cannot complete the signal preprocessing function of the front end of direct sampling of RF signals in the frequency band range of 30MHz to 3000MHz, and cannot be applied to the signal processing system of the broadband RF direct sampling system.

[0004] Patent application number 202311743874.1 discloses a wide-bandwidth, high-dynamic digital detection system and method for RF. This invention uses a high-dynamic ADC to directly sample intermediate frequency signals, reducing the requirements for the dynamic range of ultra-high-speed ADCs. It uses two high-speed DACs and a wide-bandwidth RF switch to achieve rapid frequency hopping of the local oscillator signal. It uses an FPGA to control the DAC output frequency to achieve sweep acquisition within a wide frequency range, resulting in a simple and effective expansion method. However, this invention cannot perform the pre-processing function of the front-end for direct sampling of RF signals in the 30MHz to 3000MHz frequency band, making it unsuitable for signal processing systems with broadband RF signal direct sampling systems. Summary of the Invention

[0005] In order to solve the above-mentioned problems existing in the prior art, the purpose of the present invention is to provide a broadband RF signal direct sampling preprocessing device and method to solve the problems of high system complexity, high price, poor spurious suppression, limited dynamic range, and poor anti-interference ability in the existing superheterodyne technology system, and to realize high-fidelity direct sampling and real-time processing of broadband RF signals in the frequency band range of 30MHz to 3000MHz based on the software radio architecture.

[0006] The technical solution adopted in the present invention is:

[0007] A broadband radio frequency signal direct sampling preprocessing device comprises a metal cavity shell, a power supply circuit and a control circuit. A printed circuit board is installed in the metal cavity shell. The power supply circuit and the control circuit are electrically connected to the printed circuit board respectively. A limiter, a radio frequency switch, a low-pass filter, a first-stage low-noise amplifier, a first-stage preselection switch filter group, a first-stage temperature compensation attenuator, a preselection switch notch filter group, a first-stage digitally controlled attenuator, a second-stage amplifier, a second-stage temperature compensation attenuator, a second-stage digitally controlled attenuator, a third-stage temperature compensation attenuator, a third-stage amplifier, a third-stage digitally controlled attenuator, a fourth-stage amplifier, a second-stage preselection switch filter group, a coupler and a detector are sequentially arranged on the printed circuit board along the signal transmission direction.

[0008] The present invention implements the design of a method for preprocessing broadband RF signals before direct sampling by using a limiter, a radio frequency switch, a low-pass filter, a coupler, a detector, a preselection switch notch filter, a two-stage segmented preselection switch filter bank, a three-stage temperature-compensated attenuator, a three-stage digitally controlled attenuator, a four-stage amplifier, a power supply circuit, and a control circuit. The present invention achieves relevant performance requirements such as low noise figure, flat passband, large dynamic range, high gain, high harmonic suppression, and high in-band spurious suppression by preprocessing broadband RF signals within the 30MHz to 3000MHz frequency band before direct sampling, laying the foundation for the development of systems under the RF direct sampling system.

[0009] As a preferred embodiment of the present invention, the metal cavity shell includes an upper shell and a lower shell, the printed circuit board includes an upper printed circuit board and a lower printed circuit board, the upper printed circuit board is installed in the upper shell, and the lower printed circuit board is installed in the lower shell, and the edges of the upper printed circuit board and the lower printed circuit board are both provided with a plurality of blind grooves, each blind groove is provided with a plurality of via holes, and a circular pad is provided at each via hole inside the blind groove;

[0010] An intermediate connector is also provided in the metal cavity shell. The upper side of the intermediate connector is plugged with the upper connector, and the lower side of the intermediate connector is plugged with the lower connector. The needle core of the upper connector is welded to the circular pad through the via hole from the blind groove side of the upper printed circuit board, and the needle core of the lower connector is welded to the circular pad through the via hole from the blind groove side of the lower printed circuit board.

[0011] As a preferred embodiment of the present invention, the power supply circuit includes a low-voltage dropout regulator and a power supply filter circuit. The low-voltage dropout regulator stabilizes the input voltage to a required voltage, and the required voltage is divided into two outputs to two groups of power supply filter circuits. The filtered power supply is used to power the upper printed circuit board and the lower printed circuit board respectively.

[0012] The power supply of the upper printed circuit board and the lower printed circuit board are divided into three outputs. One output is stabilized by a low-voltage difference regulator to the voltage required by the RF switch to power the RF switch. The other two outputs are respectively supplied to the first-stage low-noise amplifier, the second-stage amplifier, the third-stage amplifier and the fourth-stage amplifier after passing through the third-order LC filter circuit.

[0013] As a preferred embodiment of the present invention, the control circuit includes a serial-to-parallel converter and an isolation circuit. The serial-to-parallel converter converts the input multiple-bit serial signals into multiple-bit parallel signals. The output parallel signals are output through the isolation circuit to control the radio frequency switch, the first-stage digitally controlled attenuator, the second-stage digitally controlled attenuator, and the third-stage digitally controlled attenuator.

[0014] As a preferred embodiment of the present invention, the limiter adopts a GaAs MMIC limiter, the limiter loss is less than 0.4dB, the flatness is less than 0.1dB, and the input and output port standing wave is less than 1.5; the limiter is connected to the external receiving antenna, the limiter burnout power is 5W, and the limiting level is 16dBm;

[0015] The RF switch adopts a COMS single-pole double-throw RF switch, the loss of the RF switch is less than 1dB, and the input and output port standing wave is less than 1.5; the RF switch includes a common port and two branch ports, one branch port is connected to the pre-stage limiter, and the other branch port is connected to the self-test source input port, switching the received RF signal and the self-test signal;

[0016] The low-pass filter adopts an LTCC low-pass filter, which suppresses frequencies above 4500MHz, has an insertion loss of less than 1dB, and a stop-band suppression greater than 20dBc; one port of the low-pass filter is connected to the common port of the RF switch to perform low-pass filtering on the received signal or self-test signal;

[0017] The first-stage low-noise amplifier uses a GaAs MMIC amplifier, and has a gain of 22dB and a noise figure of less than 2dB. The input of the first-stage low-noise amplifier is connected to the output of the low-pass filter to perform low-noise amplification on the received signal or the self-test signal.

[0018] The first-stage preselection switch filter group includes N bandpass filters, which cover a frequency band of 30 MHz to 3000 MHz. The N bandpass filters are configurable within a filtering bandwidth range of 30 MHz to 1000 MHz. The first-stage preselection switch filter group uses an inductor-capacitor type filter, a low-temperature ceramic co-fired filter, or a surface acoustic wave filter according to different RF frequency bands. The input end of the first-stage preselection switch filter group is connected to the output of the first-stage low-noise amplifier to preliminarily preselect and filter the RF signal after low-noise amplification to form N RF band-limited signals in different frequency bands while filtering out the amplified harmonic interference signal.

[0019] The attenuation of the first-stage temperature-compensated attenuator is 3 dB, and the attenuation temperature coefficient is 0.006 dB / °C; the first-stage temperature-compensated attenuator performs amplitude temperature compensation on the RF signal after the first-stage preselection filter group;

[0020] The preselection switch notch filter group includes a direct-pass signal, a 97MHz-108MHz band-stop filter and a 935MHz-950MHz band-stop filter; the preselection switch notch filter group performs direct-pass or segmented band-stop notch on the signal after the first-stage temperature compensation attenuator;

[0021] The first-stage digitally controlled attenuator is a 1-bit 8dB attenuator, and the insertion loss of the first-stage digitally controlled attenuator is less than 2dB and the flatness is less than 0.5dB; the first-stage digitally controlled attenuator is connected to the output end of the pre-selection switch notch filter group, and according to the input control signal, the RF signal output by the pre-selection switch notch filter group is adjusted to 8dB attenuation.

[0022] As a preferred embodiment of the present invention, the second-stage amplifier adopts a GaAs MMIC amplifier, and the gain of the second-stage amplifier is 22dB and the noise figure is less than 2dB; the input of the second-stage amplifier is connected to the output of the first-stage digitally controlled attenuator, and amplifies the radio frequency signal after the first-stage digitally controlled attenuator;

[0023] The attenuation of the second-stage temperature-compensated attenuator is 3 dB, and the attenuation temperature coefficient is 0.006 dB / °C; the second-stage temperature-compensated attenuator performs amplitude temperature compensation on the RF signal after the second-stage amplifier;

[0024] The second-stage digitally controlled attenuator is a 1-bit 31dB attenuator with an insertion loss of less than 2dB and a flatness of less than 0.5dB. According to the input control signal, the second-stage digitally controlled attenuator performs a 31dB attenuation adjustment on the output signal of the second-stage amplifier.

[0025] As a preferred embodiment of the present invention, the attenuation of the third-stage temperature-compensated attenuator is 3 dB, and the attenuation temperature coefficient is 0.006 dB / °C; the third-stage temperature-compensated attenuator performs amplitude temperature compensation on the RF signal after the second-stage digitally controlled attenuator;

[0026] The third-stage amplifier has a gain of 32dB, a flatness of less than 1dB, and an output 1dB compression point greater than 18dBm; the input of the third-stage amplifier is connected to the output of the third-stage temperature-compensated attenuator to amplify the RF signal pre-selected by the previous stage;

[0027] The third-stage digitally controlled attenuator is a 5-bit attenuator with an attenuation step of 1dB, an attenuation range of 1dB to 31dB, an insertion loss of less than 2dB, and a flatness of less than 0.5dB. According to the input control signal, the third-stage digitally controlled attenuator adjusts the attenuation of the pre-selected radio frequency signal of the previous stage by 1dB to 31dB.

[0028] As a preferred embodiment of the present invention, the fourth-stage amplifier has a gain of 32dB, a flatness of less than 1dB, and an output 1dB compression point greater than 18dBm; the input of the fourth-stage amplifier is connected to the third-stage digitally controlled attenuator to amplify the pre-selected RF signal of the previous stage;

[0029] The second-stage preselection switch filter group includes N bandpass filters, which cover a frequency band of 30 MHz to 3000 MHz. The N bandpass filters are configurable within a filtering bandwidth range of 30 MHz to 1000 MHz. The second-stage preselection switch filter group uses an inductor-capacitor type filter, a low-temperature ceramic co-fired filter, or a surface acoustic wave filter according to different RF frequency bands. The input of the second-stage preselection switch filter group is connected to the output of the fourth-stage amplifier, and the RF signal amplified by the previous preselection is filtered for a second time, and the preprocessed RF signal is output.

[0030] The coupler has an insertion loss of less than 2dB, a flatness of less than 0.5dB, and a coupling degree of 25dB; the coupler is connected to a second-stage preselection switch filter bank to output the preprocessed RF signal to a direct sampling digital processing unit;

[0031] The detector is a broadband, high-dynamic logarithmic detector that converts the RF input signal into a corresponding logarithmic linear voltage output. The input power range is -60dBm to 10dBm, and the rise / fall response time is less than 100ns. The detector input is connected to the coupler output and outputs a corresponding voltage signal to the self-test output port based on the coupled power.

[0032] A broadband radio frequency signal direct sampling preprocessing method comprises the following steps:

[0033] S1: First, the RF signal received by the antenna enters the limiter, which limits the signal above 10dBm. The remaining signals pass through and are sent to the RF switch.

[0034] S2: The RF switch selects the antenna signal or the self-test signal and outputs it to the first-stage low-noise amplifier. After amplifying it to 22dB power, it is sent to the first-stage pre-selection switch filter group.

[0035] S3: Based on the frequency band of the target signal, the RF signal with a bandwidth of 30MHz to 1000MHz is pre-selected and filtered through the N filters of the 30MHz to 3000MHz frequency band of the first-stage pre-selection switch filter bank to form a band-limited signal.

[0036] S4: The band-limited RF signal after the first stage pre-selection filtering passes through the first stage temperature compensation attenuator and performs 3dB amplitude temperature compensation attenuation;

[0037] S5: The signal is sent to the pre-selection switch trap group, which suppresses the N specific frequency band signals or selects the signal to pass directly;

[0038] S6: After the signal passes through the first-stage digitally controlled attenuator for 8dB gain control, it is output to the second-stage amplifier for 22dB gain amplification;

[0039] S7: The amplified RF signal is sequentially output to the second-stage temperature compensation attenuator for 3dB power temperature compensation, the second-stage digitally controlled attenuator for 31dB gain control, and the third-stage temperature compensation attenuator for 3dB power compensation;

[0040] S8: The signal is amplified by 32dB gain through the third-stage amplifier and output to the third-stage digitally controlled attenuator, where the gain is controlled from 1dB to 31dB.

[0041] S9: The signal is then output to the fourth-stage amplifier for 32dB gain amplification and output to the second-stage preselection switch filter group;

[0042] S10: The N filters of the second-stage preselection switch filter bank preselect and filter the RF signal with a bandwidth of 30 MHz to 1000 MHz to form a conditioned, filtered, and band-limited RF signal.

[0043] S11: The coupler finally outputs the pre-processed RF signal, which meets the Nyquist sampling theorem, the optimal sampling level range of the high-speed analog-to-digital converter, and the performance index requirements of the receiving system, thereby realizing the pre-processing function of the RF signal before direct sampling.

[0044] As a preferred embodiment of the present invention, in step S11, when the output preprocessed signal power exceeds the saturation level of the back-end ADC sampler, the third-stage digitally controlled attenuator is selected to perform a gain control of 1dB to 31dB; if the sampling level requirement is still not met after the third-stage digitally controlled attenuator performs a gain control of 31dB, then the second-stage digitally controlled attenuator is selected to perform a gain control of 31dB, and then the third-stage digitally controlled attenuator is selected to perform a gain control of 1dB to 31dB; if the sampling level still cannot meet the requirement after adjustment by the third-stage digitally controlled attenuator and the second-stage digitally controlled attenuator, the first-stage digitally controlled attenuator and the second-stage digitally controlled attenuator are simultaneously selected to perform a gain control of 39dB, and finally the third-stage digitally controlled attenuator is used to perform a gain control of 1dB to 31dB.

[0045] The beneficial effects of the present invention are:

[0046] The present invention implements the design of a method for preprocessing broadband RF signals before direct sampling by using a limiter, a radio frequency switch, a low-pass filter, a coupler, a detector, a preselection switch notch filter, a two-stage segmented preselection switch filter bank, a three-stage temperature-compensated attenuator, a three-stage digitally controlled attenuator, a four-stage amplifier, a power supply circuit, and a control circuit. The present invention achieves relevant performance requirements such as low noise figure, flat passband, large dynamic range, high gain, high harmonic suppression, and high in-band spurious suppression by preprocessing broadband RF signals within the 30MHz to 3000MHz frequency band before direct sampling, laying the foundation for the development of systems under the RF direct sampling system. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 This is the principle block diagram of the broadband RF direct sampling signal receiving preprocessing device;

[0048] Figure 2 It is a structural diagram of the metal cavity shell;

[0049] Figure 3 It is a schematic diagram of the structure of the printed circuit board;

[0050] Figure 4 This is a block diagram of the power processing principle;

[0051] Figure 5 This is a block diagram of the power supply principle of the upper and lower printed circuit boards;

[0052] Figure 6 It is the principle block diagram of the control circuit;

[0053] Figure 7 This is a flow chart of a direct sampling preprocessing method for broadband RF signals.

[0054] In the figure: 1-metal cavity shell; 2-printed circuit board; 3-limiter; 4-RF switch; 5-low-pass filter; 6-first-stage low-noise amplifier; 7-first-stage preselection switch filter group; 8-first-stage temperature-compensated attenuator; 9-preselection switch notch filter group; 10-first-stage digitally controlled attenuator; 11-second-stage amplifier; 12-second-stage temperature-compensated attenuator; 13-second-stage digitally controlled attenuator; 14-third-stage temperature-compensated attenuator; 15-third-stage amplifier; 16-third-stage digitally controlled attenuator; 17-fourth-stage amplifier; 18-second-stage preselection switch filter group; 19-coupler; 20-detector; 101-lower housing; 102-lower printed circuit board; 103-upper housing; 104-upper printed circuit board; 105-upper connector; 106-middle connector; 107-lower connector; 201-blind slot; 202-via; 203-circular pad. DETAILED DESCRIPTION

[0055] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings herein can be arranged and designed in various different configurations.

[0056] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but rather merely represents selected embodiments of the present invention. All other embodiments derived by persons of ordinary skill in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention. It should be noted that the embodiments of the present invention and the features therein may be combined with each other unless there is a conflict.

[0057] like Figure 1As shown, the broadband radio frequency signal direct sampling preprocessing device of this embodiment includes a metal cavity shell 1, a power supply circuit and a control circuit. A printed circuit board 2 is installed in the metal cavity shell 1. The power supply circuit and the control circuit are electrically connected to the printed circuit board 2 respectively. A limiter 3, a radio frequency switch 4, a low-pass filter 5, a first-stage low-noise amplifier 6, a first-stage preselection switch filter group 7, a first-stage temperature compensation attenuator 8, a preselection switch notch filter group 9, a first-stage digitally controlled attenuator 10, a second-stage amplifier 11, a second-stage temperature compensation attenuator 12, a second-stage digitally controlled attenuator 13, a third-stage temperature compensation attenuator 14, a third-stage amplifier 15, a third-stage digitally controlled attenuator 16, a fourth-stage amplifier 17, a second-stage preselection switch filter group 18, a coupler 19 and a detector 20 are sequentially arranged on the printed circuit board 2 along the signal transmission direction. Figure 1 In the figure, RFin is the RF input signal, RFout is the RF output signal, ZJin is the quality inspection input signal, and ZJout is the quality inspection output signal.

[0058] The present invention implements the design of a method for preprocessing broadband RF signals before direct sampling by using a limiter 3, a radio frequency switch 4, a low-pass filter 5, a coupler 19, a detector 20, a preselection switch notch filter, a two-stage segmented preselection switch filter bank, a three-stage temperature-compensated attenuator, a three-stage digitally controlled attenuator, a four-stage amplifier, a power supply circuit, and a control circuit. The present invention achieves relevant performance requirements such as low noise figure, flat passband, large dynamic range, high gain, high harmonic suppression, and high in-band spurious suppression by preprocessing broadband RF signals within the 30 MHz to 3000 MHz frequency band before direct sampling, laying a foundation for the development of systems under a radio frequency direct sampling system.

[0059] Specifically, if Figure 2 As shown, the metal cavity shell 1 includes an upper shell 103 and a lower shell 101. The upper shell 103 and the lower shell 101 are fixed with screws, and the upper shell 103 and the lower shell 101 are sealed and connected with a cover plate by laser sealing.

[0060] like Figure 3 As shown, the printed circuit board 2 includes an upper printed circuit board 104 and a lower printed circuit board 102. The upper printed circuit board 104 is installed in the upper shell 103, and the lower printed circuit board 102 is installed in the lower shell 101. Several blind grooves 201 are opened on the edges of the upper printed circuit board 104 and the edges of the lower printed circuit board 102. Each blind groove 201 is opened with several vias 202, and a circular pad 203 is set at each via 202 on the inner side of the blind groove 201.

[0061] An intermediate connector 106 is also provided in the metal cavity shell 1. The upper connector 105 is plugged into the upper side of the intermediate connector 106, and the lower connector 107 is plugged into the lower side of the intermediate connector 106. The needle core of the upper connector 105 is welded to the circular pad 203 through the via 202 from the side of the blind groove 201 of the upper printed circuit board 104, and the needle core of the lower connector 107 is welded to the circular pad 203 through the via 202 from the side of the blind groove 201 of the lower printed circuit board 102.

[0062] like Figure 4 As shown, the power supply circuit includes a low-voltage dropout regulator and a power filter circuit. The low-voltage dropout regulator stabilizes the input voltage to the required voltage. The required voltage is divided into two output paths and sent to two sets of power filter circuits. The filtered power supply is used to power the upper printed board 104 and the lower printed board 102 respectively. The power filter circuit is a 5th-order LC filter circuit, and the inductor uses a ferrite wound chip inductor to reduce the voltage drop of the filter circuit. The filtered power supply is used to power the upper printed board 104 and the lower printed board 102 respectively, ensuring that the power supply of the upper printed board 104 and the lower printed board 102 is relatively independent.

[0063] like Figure 5 As shown, the power supplies of the upper printed circuit board 104 and the lower printed circuit board 102 are divided into three output paths. One path is stabilized by a low voltage difference regulator to the voltage required by the RF switch 4 to supply power to the RF switch 4. The other two paths are respectively supplied to the first-stage low noise amplifier 6, the second-stage amplifier 11, the third-stage amplifier 15 and the fourth-stage amplifier 17 after passing through the third-order LC filter circuit.

[0064] like Figure 6 As shown, the control circuit includes a serial-to-parallel converter and an isolation circuit. The serial-to-parallel converter converts the input serial signals into parallel signals. The output parallel signals are output through the isolation circuit to control the RF switch 4, the first-stage digitally controlled attenuator 10, the second-stage digitally controlled attenuator 13, and the third-stage digitally controlled attenuator 16. The isolation circuit is a third-order LC filter circuit to reduce crosstalk between control signals. Figure 6 In the figure, CLK is the input clock, DATA is the input data, LE is the enable signal, and D0~Dn are the output data.

[0065] Specifically, the limiter 3 utilizes a GaAs MMIC limiter with a loss of less than 0.4dB, a flatness of less than 0.1dB, and an input and output standing wave (VSWR) of less than 1.5. The limiter 3 is connected to an external receiving antenna, has a burnout resistance of 5W, and a limiting level of 16dBm. This protects the downstream circuitry by preventing excessive signal power from being received by the antenna and potentially damaging it.

[0066] The RF switch 4 uses a CMOS single-pole double-throw (SPDT) RF switch with a loss of less than 1dB and a standing wave (SWR) of less than 1.5 at its input and output ports. The RF switch 4 includes a common port and two branch ports. One branch port is connected to the pre-stage limiter 3, and the other branch port is connected to the self-test source input port. The RF switch 4 switches between the received RF signal and the self-test signal.

[0067] The low-pass filter 5 is an LTCC low-pass filter 5 that suppresses frequencies above 4500 MHz, with an insertion loss of less than 1 dB and a stop-band suppression greater than 20 dBc. One port of the low-pass filter 5 is connected to the common port of the RF switch 4 to perform low-pass filtering on the received signal or self-test signal.

[0068] The first-stage low-noise amplifier 6 (LAN1) uses a GaAs MMIC amplifier with a gain of 22dB and a noise figure of less than 2dB. The input of the first-stage low-noise amplifier 6 is connected to the output of the low-pass filter 5 to perform low-noise amplification on the received signal or self-test signal.

[0069] The first-stage preselection switch filter bank 7 includes N bandpass filters covering the 30MHz to 3000MHz frequency band. These N bandpass filters are configurable within a filtering bandwidth range of 30MHz to 1000MHz. Depending on the RF frequency band, the first-stage preselection switch filter bank 7 utilizes LC (inductor-capacitor) filters, LTCC (low-temperature ceramic co-fired) filters, and SAW (surface acoustic wave) filters. The input of the first-stage preselection switch filter bank 7 is connected to the output of the first-stage low-noise amplifier 6. The bank performs preliminary preselection and filtering on the low-noise amplified RF signal, generating N band-limited RF signals in different frequency bands while also filtering out the amplified harmonic interference signals.

[0070] The first-stage temperature compensation attenuator 8 performs amplitude temperature compensation on the RF signal after the first-stage pre-selection filter group. Its attenuation is 3dB and the attenuation temperature coefficient is 0.006dB / °C, ensuring the amplitude consistency of the pre-selection signal at high and low temperatures.

[0071] The preselection switch trap group 9 includes a direct-pass signal, a 97MHz-108MHz band-stop filter and a 935MHz-950MHz band-stop filter; the preselection switch trap group 9 directly passes or performs segmented band-stop notching on the signal after the first-stage temperature compensation attenuator 8.

[0072] The first-stage digitally controlled attenuator 10 is a 1-bit 8dB attenuator with an insertion loss of less than 2dB and a flatness of less than 0.5dB. The first-stage digitally controlled attenuator 10 is connected to the output end of the preselection switch notch filter group 9, and performs 8dB attenuation adjustment on the RF signal output by the notch filter group according to the input control signal.

[0073] The second-stage amplifier 11 (LAN2) uses a GaAs MMIC amplifier with a gain of 22dB and a noise figure of less than 2dB. The input of the second-stage amplifier 11 is connected to the output of the first-stage digitally controlled attenuator 10 to amplify the RF signal after the first-stage digitally controlled attenuator 10.

[0074] The attenuation of the second-stage temperature-compensated attenuator 12 is 3 dB, and the attenuation temperature coefficient is 0.006 dB / ° C. The second-stage temperature-compensated attenuator 12 performs amplitude temperature compensation on the radio frequency signal after the second-stage amplifier 11 .

[0075] The second-stage digitally controlled attenuator 13 is a 1-bit 31dB attenuator with an insertion loss of less than 2dB and a flatness of less than 0.5dB. According to the input control signal, the second-stage digitally controlled attenuator 13 performs a 31dB attenuation adjustment on the output signal of the second-stage amplifier 11.

[0076] The attenuation of the third-stage temperature-compensated attenuator 14 is 3 dB, and the attenuation temperature coefficient is 0.006 dB / ° C. The third-stage temperature-compensated attenuator 14 performs amplitude temperature compensation on the radio frequency signal after the second-stage digitally controlled attenuator 13 .

[0077] The third-stage amplifier 15 (LAN3) has a gain of 32dB, a flatness of less than 1dB, and an output 1dB compression point greater than 18dBm. The input of the third-stage amplifier 15 is connected to the output of the third-stage temperature-compensated attenuator 14 to amplify the RF signal pre-selected by the previous stage.

[0078] The third-stage digitally controlled attenuator 16 is a 5-bit attenuator with an attenuation step of 1dB, an attenuation range of 1dB to 31dB, an insertion loss of less than 2dB, and a flatness of less than 0.5dB. According to the input control signal, the third-stage digitally controlled attenuator 16 adjusts the attenuation of the pre-selected RF signal of the previous stage by 1dB to 31dB.

[0079] The fourth-stage amplifier 17 (LAN4) has a gain of 32 dB, a flatness of less than 1 dB, and an output 1 dB compression point greater than 18 dBm. The input of the fourth-stage amplifier 17 is connected to the third-stage digitally controlled attenuator 16 to amplify the pre-selected RF signal of the previous stage.

[0080] The second-stage preselection switch filter bank 18 includes N bandpass filters covering the 30MHz to 3000MHz frequency band. These N bandpass filters are configurable within a filtering bandwidth range of 30MHz to 1000MHz. The filter bank utilizes LC (inductor-capacitor) filters, LTCC (low-temperature ceramic co-fired) filters, and SAW (surface acoustic wave) filters, depending on the RF frequency band. The input of the second-stage preselection switch filter bank 18 is connected to the output of the fourth-stage amplifier 17. It performs a second filtering on the RF signal amplified by the previous preselection stage and outputs the preprocessed RF signal.

[0081] The coupler 19 has an insertion loss of less than 2dB, a flatness of less than 0.5dB, and a coupling degree of 25dB; the coupler 19 is connected to the second-stage preselection switch filter group 18 to output the preprocessed RF signal to the direct sampling digital processing unit.

[0082] The detector 20 is a broadband, high-dynamic logarithmic detector 20 that converts the RF input signal into a corresponding logarithmic linear voltage output. The input power range is -60dBm to 10dBm, and the rise / fall response time is less than 100ns. The input of the detector 20 is connected to the output of the coupler 19, and according to the coupled power, the corresponding voltage signal is output to the self-test output port.

[0083] like Figure 7 As shown, the broadband RF signal direct sampling preprocessing method of this embodiment includes the following steps:

[0084] S1: First, the RF signal received by the antenna enters the limiter 3, which limits the signal above 10dBm, and the remaining signal passes through and is sent to the RF switch 4;

[0085] S2: The antenna signal or the self-test signal is selected by the RF switch 4 and output to the first-stage low-noise amplifier 6. After being amplified to a power of 22dB, it is sent to the first-stage preselection switch filter group 7.

[0086] S3: Based on the frequency band of the target signal, the RF signal with a bandwidth of 30 MHz to 1000 MHz is pre-selected and filtered through the N filters of the 30 MHz to 3000 MHz frequency band of the first-stage pre-selection switch filter bank 7 to form a band-limited signal.

[0087] S4: The band-limited RF signal after the first stage pre-selection filtering passes through the first stage temperature compensation attenuator 8 and is subjected to 3dB amplitude temperature compensation attenuation;

[0088] S5: The signal is then sent to the pre-selection switch trap group 9, which performs filtering or direct pass on N specific frequency band signals;

[0089] S6: The signal then passes through the first-stage digitally controlled attenuator 10 for 8dB gain control and is then output to the second-stage amplifier 11 for 22dB gain amplification.

[0090] S7: The amplified RF signal is sequentially output to the second-stage temperature compensation attenuator 12 for 3dB power temperature compensation, the second-stage digitally controlled attenuator 13 for 31dB gain control, and the third-stage temperature compensation attenuator 14 for 3dB power compensation;

[0091] S8: The signal is then amplified by a third-stage amplifier 15 with a gain of 32 dB and output to a third-stage digitally controlled attenuator 16, where it undergoes a gain control ranging from 1 dB to 31 dB.

[0092] S9: The signal is then output to the fourth stage amplifier 17 for 32dB gain amplification and then output to the second stage preselection switch filter bank 18;

[0093] S10: The N filters of the second-stage preselection switch filter bank 18 preselect and filter the RF signal with a bandwidth of 30 MHz to 1000 MHz to form a conditioned, filtered, and band-limited RF signal.

[0094] S11: Finally, the pre-processed RF signal is outputted through the coupler 19. The signal meets the Nyquist sampling theorem, the optimal sampling level range of the high-speed analog-to-digital converter, and the performance index requirements of the receiving system, thereby realizing the pre-processing function of the RF signal before direct sampling.

[0095] The module of the present invention typically employs an intelligent digital gain control (DGC) algorithm. When the output preprocessed signal power exceeds the saturation level of the back-end ADC sampler, the third-stage digitally controlled attenuator 16 is preferentially used for gain control of 1dB to 31dB. If the sampling level requirement is still not met after the third-stage digitally controlled attenuator 16 performs a 31dB gain control, then the second-stage digitally controlled attenuator 13 is used for a 31dB gain control, followed by the third-stage digitally controlled attenuator 16 for a 1dB to 31dB gain control. If the sampling level still cannot meet the requirement after adjustment by the third-stage digitally controlled attenuator 16 and the second-stage digitally controlled attenuator 13, then the first-stage and second-stage digitally controlled attenuators 13 are simultaneously used for a 39dB gain control, and finally the third-stage digitally controlled attenuator 16 is used for a 1dB to 31dB gain control. Based on the sampling rate of the back-end ADC sampling device and while satisfying the Nyquist sampling theorem, a two-stage N-way switch filter bank is preselected to perform band-limiting processing on the RF signal.

[0096] According to the sampling rate of the back-end ADC sampling device, under the condition of satisfying the Nyquist sampling theorem, a two-stage N-way switch filter group is pre-selected in time to perform band-limiting processing on the RF signal.

[0097] The specific implementation of the broadband RF signal direct sampling preprocessing device is as follows:

[0098] According to the components of the present invention, the materials and devices used are as follows:

[0099] The shell of the metal cavity housing 1 is made of 6061 aluminum material, and the cover plate is made of 4047 aluminum material. The upper shell 103 and the lower shell 101 are respectively connected to the cover plate by laser welding.

[0100] Limiter 3 uses ILM-0020A-PQ3.

[0101] The RF switch 4 uses MXD8723E, which has a small size and a low low-frequency noise coefficient.

[0102] The low-pass filter 5 uses LFCN2012-3000B01.

[0103] The first-stage low-noise amplifier 6 and the second-stage amplifier 11 are made of MWL0035, with a gain of 22.5dB, a flatness of less than 1dB, and an output P-1 greater than 21.5dBm.

[0104] The first-stage preselection switch filter group 7 and the second-stage preselection switch filter group 18 are self-made 16-to-1 switch filter groups with a frequency coverage of 30MHz to 3000MHz, a signal bandwidth of 30MHz to 1000MHz, an insertion loss of less than 8dB, and a stopband suppression of greater than 30dBc.

[0105] The first-stage temperature compensation attenuator 8, the second-stage temperature compensation attenuator 12 and the third-stage temperature compensation attenuator 14 are made of MTVA1202N6W3S.

[0106] The preselection switch notch filter group 9 is a self-made 3-to-1 switch notch filter group, which includes a through signal, a 97MHz-108MHz band-stop filter and a 935MHz-950MHz band-stop filter.

[0107] The first-stage digital controlled attenuator 10 uses MWA3001Q, whose control pins "1", "12", "14", "15" and "16" are connected to high level, and the control pin "13" is connected to the control level, thereby realizing a 1-bit 8dB attenuation function.

[0108] The second-stage digitally controlled attenuator 13 uses MWA3001Q, whose control pin "1" is connected to a high level, and control pins "12", "13", "14", "15" and "16" are connected to the same control level, thereby achieving a 1-bit 31dB attenuation function.

[0109] The third-stage amplifier 15 and the fourth-stage amplifier 17 use HGC180-4BLP3, with an amplification gain of 32 dB and a flatness of less than 1 dB.

[0110] The third-stage digitally controlled attenuator 16MWA3001Q has its control pin "1" connected to a high level, and control pins "12", "13", "14", "15" and "16" are connected to a control level respectively, thereby realizing a 5-bit 1~31dB attenuation function.

[0111] Coupler 19 uses YDC8501-QP3.

[0112] The detector 20 is YDC8108-QP3.

[0113] The serial-to-parallel converter uses HGC166-3LP3, which converts the input 13-bit serial signal into a 13-bit parallel signal, realizing the control functions of channel selection, attenuation control and self-test signal selection.

[0114] The indicators of the traditional 30MHz to 3000MHz superheterodyne intermediate frequency signal receiving system are as follows: spurious suppression within the passband: ≥60dBc; two-tone dynamic range: ≥60dBc; system noise figure: ≤7.0 dB.

[0115] The indicators of the 30MHz to 3000MHz frequency band radio frequency signal direct sampling system receiving system based on the present invention are as follows: spurious suppression in the passband: ≥70dBc; dual-tone dynamic range: ≥90dBc; system noise figure: ≤4.5dB.

[0116] By comparison, it can be found that the software defined radio (SDR) receiving system designed based on the present invention has obvious advantages and can be applied to the subsequent technology development such as 5G and 6G, as well as various wireless communications, radar arrays, wireless electromagnetic spectrum monitoring, and a large number of digital signal beamforming (DBF) applications.

[0117] The present invention is not limited to the above-mentioned optional implementation modes. Anyone can derive other forms of products under the inspiration of the present invention. However, no matter what changes are made in the shape or structure, any technical solution that falls within the scope defined by the claims of the present invention falls within the scope of protection of the present invention.

Claims

1. A broadband radio frequency signal direct sampling preprocessing device, characterized by: The invention comprises a metal cavity shell (1), a power supply circuit and a control circuit, wherein a printed circuit board (2) is installed in the metal cavity shell (1), the power supply circuit and the control circuit are electrically connected to the printed circuit board (2) respectively, and a limiter (3), a radio frequency switch (4), a low-pass filter (5), a first-stage low-noise amplifier (6), a first-stage preselection switch filter group (7), a first-stage temperature compensation attenuator (8), a preselection switch notch filter group (9), a first-stage digitally controlled attenuator (10), a second-stage amplifier (11), a second-stage temperature compensation attenuator (12), a second-stage digitally controlled attenuator (13), a third-stage temperature compensation attenuator (14), a third-stage amplifier (15), a third-stage digitally controlled attenuator (16), a fourth-stage amplifier (17), a second-stage preselection switch filter group (18), a coupler (19) and a detector (20) are sequentially arranged on the printed circuit board (2) along the signal transmission direction; First, the RF signal received by the antenna enters the limiter (3), which limits the signal above 10dBm, and the remaining signal is sent to the RF switch (4). The antenna signal or the self-test signal is selected by the radio frequency switch (4) and output to the first-stage low noise amplifier (6), amplified to a power of 22dB, and then sent to the first-stage preselection switch filter group (7); According to the frequency band of the target signal, the RF signal with a bandwidth of 30 MHz to 1000 MHz is pre-selected and filtered by the N-way filter of the 30 MHz to 3000 MHz frequency band of the first-stage pre-selection switch filter group (7) to form a band-limited signal; The band-limited radio frequency signal after the first stage preselection filtering is passed through the first stage temperature compensation attenuator (8) to perform 3dB amplitude temperature compensation attenuation; The signal is sent to the preselection switch trap group (9), which suppresses the N specific frequency band signals or selects the signal to pass directly; After the signal passes through the first-stage digitally controlled attenuator (10) for 8dB gain control, it is output to the second-stage amplifier (11) for 22dB gain amplification; The amplified radio frequency signal is sequentially output to the second-stage temperature compensation attenuator (12) for 3dB power temperature compensation, the second-stage digital control attenuator (13) for 31dB gain control, and the third-stage temperature compensation attenuator (14) for 3dB power compensation; The signal is amplified by a third-stage amplifier (15) with a gain of 32 dB and output to a third-stage digitally controlled attenuator (16), where a gain control of 1 dB to 31 dB is performed. The signal is then output to the fourth stage amplifier (17) for 32dB gain amplification and output to the second stage preselection switch filter group (18); The N-way filters of the second-stage preselection switch filter group (18) preselect and filter the radio frequency signal with a bandwidth of 30MHz to 1000MHz to form a radio frequency signal after conditioning, filtering and band limiting; Finally, the pre-processed RF signal is outputted through the coupler (19), and the signal meets the Nyquist sampling theorem, the optimal sampling level range of the high-speed analog-to-digital converter, and the performance index requirements of the receiving system, thereby realizing the pre-processing function before the direct sampling of the RF signal.

2. The broadband RF signal direct sampling preprocessing device according to claim 1, characterized in that: The metal cavity shell (1) includes an upper shell (103) and a lower shell (101), and the printed circuit board (2) includes an upper printed circuit board (104) and a lower printed circuit board (102), the upper printed circuit board (104) is installed in the upper shell (103), and the lower printed circuit board (102) is installed in the lower shell (101), and the edges of the upper printed circuit board (104) and the lower printed circuit board (102) are both provided with a plurality of blind grooves (201), each blind groove (201) is provided with a plurality of via holes (202), and a circular pad (203) is provided at each via hole (202) inside the blind groove (201); An intermediate connector (106) is further provided in the metal cavity shell (1), an upper layer connector (105) is plugged into the upper side of the intermediate connector (106), and a lower layer connector (107) is plugged into the lower side of the intermediate connector (106), the needle core of the upper layer connector (105) is welded to the circular pad (203) through the via hole (202) from one side of the blind groove (201) of the upper layer printed circuit board (104), and the needle core of the lower layer connector (107) is welded to the circular pad (203) through the via hole (202) from one side of the blind groove (201) of the lower layer printed circuit board (102).

3. The broadband RF signal direct sampling preprocessing device according to claim 2, characterized in that: The power supply circuit includes a low-voltage difference regulator and a power supply filter circuit. The low-voltage difference regulator stabilizes the input voltage to a required voltage. The required voltage is divided into two paths and output to two groups of power supply filter circuits. The filtered power supplies are used to supply power to the upper printed circuit board (104) and the lower printed circuit board (102). The power supplies of the upper printed circuit board (104) and the lower printed circuit board (102) are divided into three output paths, one path is stabilized by a low voltage difference regulator to the voltage required by the radio frequency switch (4) to supply power to the radio frequency switch (4), and the other two paths are respectively supplied to the first-stage low noise amplifier (6), the second-stage amplifier (11), the third-stage amplifier (15) and the fourth-stage amplifier (17) after passing through a third-order LC filter circuit.

4. The broadband RF signal direct sampling preprocessing device according to claim 1, characterized in that: The control circuit includes a serial-to-parallel converter and an isolation circuit. The serial-to-parallel converter converts a plurality of input serial signals into a plurality of parallel signals. The output parallel signals are output through the isolation circuit to control the radio frequency switch (4), the first-stage digitally controlled attenuator (10), the second-stage digitally controlled attenuator (13), and the third-stage digitally controlled attenuator (16).

5. The broadband radio frequency signal direct sampling preprocessing device according to claim 1, characterized in that: The limiter (3) adopts a GaAs MMIC limiter (3), the limiter (3) has a loss of less than 0.4dB, a flatness of less than 0.1dB, and an input and output port standing wave of less than 1.5; the limiter (3) is connected to an external receiving antenna, and the limiter (3) has an anti-burning power of 5W and a limiting level of 16dBm; The radio frequency switch (4) adopts a COMS single-pole double-throw radio frequency switch (4), the loss of the radio frequency switch (4) is less than 1dB, and the input and output port standing waves are less than 1.5; the radio frequency switch (4) includes a common port and two branch ports, one branch port is connected to the front-stage limiter (3), and the other branch port is connected to the self-test source input port, and switches the received radio frequency signal and the self-test signal; The low-pass filter (5) adopts an LTCC low-pass filter (5), the low-pass filter (5) suppresses frequencies above 4500 MHz, the low-pass filter (5) has an insertion loss of less than 1 dB, and a stop-band suppression greater than 20 dBc; one port of the low-pass filter (5) is connected to the common port of the radio frequency switch (4), and performs low-pass filtering on the received signal or the self-test signal; The first-stage low-noise amplifier (6) uses a GaAs MMIC amplifier, and the gain of the first-stage low-noise amplifier (6) is 22dB and the noise figure is less than 2dB; the input of the first-stage low-noise amplifier (6) is connected to the output of the low-pass filter (5), and performs low-noise amplification on the received signal or the self-test signal; The first-stage preselection switch filter group (7) includes N bandpass filters, and the first-stage preselection switch filter group (7) covers a frequency band of 30MHz to 3000MHz. The N bandpass filters are configurable within a filtering bandwidth range of 30MHz to 1000MHz. The first-stage preselection switch filter group (7) uses an inductor-capacitor type filter, a low-temperature ceramic co-fired type filter, or a surface acoustic wave type filter according to different radio frequency bands. The input end of the first-stage preselection switch filter group (7) is connected to the output of the first-stage low-noise amplifier (6), and performs preliminary preselection and filtering on the radio frequency signal after low-noise amplification to form radio frequency band-limited signals of N different frequency bands while filtering out the amplified harmonic interference signal. The attenuation of the first-stage temperature compensation attenuator (8) is 3 dB, and the attenuation temperature coefficient is 0.006 dB / °C; the first-stage temperature compensation attenuator (8) performs amplitude temperature compensation on the radio frequency signal after the first-stage preselection filter group; The preselection switch trap group (9) includes a direct-through signal, a 97MHz-108MHz band-stop filter, and a 935MHz-950MHz band-stop filter; the preselection switch trap group (9) performs direct-through or segmented band-stop trapping on the signal after the first-stage temperature compensation attenuator (8); The first-stage digitally controlled attenuator (10) is a 1-bit 8dB attenuator, and the insertion loss of the first-stage digitally controlled attenuator (10) is less than 2dB and the flatness is less than 0.5dB; the first-stage digitally controlled attenuator (10) is connected to the output end of the preselection switch trap group (9), and performs 8dB attenuation adjustment on the radio frequency signal output by the preselection switch trap group (9) according to the input control signal.

6. The broadband radio frequency signal direct sampling preprocessing device according to claim 5, characterized in that: The second-stage amplifier (11) uses a GaAs MMIC amplifier, and the gain of the second-stage amplifier (11) is 22 dB and the noise figure is less than 2 dB; the input of the second-stage amplifier (11) is connected to the output of the first-stage digitally controlled attenuator (10), and amplifies the radio frequency signal after the first-stage digitally controlled attenuator (10); The attenuation of the second-stage temperature compensation attenuator (12) is 3 dB, and the attenuation temperature coefficient is 0.006 dB / °C; the second-stage temperature compensation attenuator (12) performs amplitude temperature compensation on the radio frequency signal after the second-stage amplifier (11); The second-stage digitally controlled attenuator (13) is a 1-bit 31 dB attenuator, and the insertion loss of the second-stage digitally controlled attenuator (13) is less than 2 dB, and the flatness is less than 0.5 dB. According to the input control signal, the second-stage digitally controlled attenuator (13) performs a 31 dB attenuation adjustment on the output signal of the second-stage amplifier (11).

7. The broadband radio frequency signal direct sampling preprocessing device according to claim 6, characterized in that: The attenuation of the third-stage temperature-compensated attenuator (14) is 3 dB, and the attenuation temperature coefficient is 0.006 dB / °C; the third-stage temperature-compensated attenuator (14) performs amplitude temperature compensation on the radio frequency signal after the second-stage digitally controlled attenuator (13); The third-stage amplifier (15) has a gain of 32 dB, a flatness of less than 1 dB, and an output 1 dB compression point greater than 18 dBm; the input of the third-stage amplifier (15) is connected to the output of the third-stage temperature compensation attenuator (14) to amplify the radio frequency signal preselected by the previous stage; The third-stage digitally controlled attenuator (16) is a 5-bit attenuator, and has an attenuation step of 1 dB, an attenuation range of 1 dB to 31 dB, an insertion loss of less than 2 dB, and a flatness of less than 0.5 dB. According to an input control signal, the third-stage digitally controlled attenuator (16) performs 1 dB to 31 dB attenuation adjustment on the pre-selected radio frequency signal of the previous stage.

8. The broadband radio frequency signal direct sampling preprocessing device according to claim 7, characterized in that: The fourth-stage amplifier (17) has a gain of 32 dB, a flatness of less than 1 dB, and an output 1 dB compression point greater than 18 dBm; the input of the fourth-stage amplifier (17) is connected to the third-stage digitally controlled attenuator (16) to amplify the pre-selected radio frequency signal of the previous stage; The second-stage preselection switch filter group (18) includes N bandpass filters, and the second-stage preselection switch filter group (18) covers a frequency band of 30MHz to 3000MHz. The N bandpass filters are configurable within a filtering bandwidth range of 30MHz to 1000MHz. The second-stage preselection switch filter group (18) uses an inductor-capacitor type filter, a low-temperature ceramic co-fired type filter, or a surface acoustic wave type filter according to different radio frequency bands. The input of the second-stage preselection switch filter group (18) is connected to the output of the fourth-stage amplifier (17), and the radio frequency signal amplified by the previous stage preselection is filtered for the second time, and the preprocessed radio frequency signal is output. The coupler (19) has an insertion loss of less than 2 dB, a flatness of less than 0.5 dB, and a coupling degree of 25 dB; the coupler (19) is connected to a second-stage preselection switch filter group (18) to output the preprocessed radio frequency signal to a direct sampling digital processing unit; The detector (20) is a broadband high-dynamic logarithmic detector (20) that converts a radio frequency input signal into a corresponding logarithmic linear voltage output, with an input power range of -60dBm to 10dBm and a rise / fall response time of less than 100ns; the input of the detector (20) is connected to the output of the coupler (19), and outputs a corresponding voltage signal to the self-test output port according to the coupled power.

9. A broadband radio frequency signal direct sampling preprocessing method, characterized by: A broadband radio frequency signal direct sampling preprocessing device according to any one of claims 1 to 8 is used.

10. A broadband radio frequency signal direct sampling preprocessing method according to claim 9, characterized in that: When the output pre-processed signal power exceeds the saturation level of the back-end ADC sampler, the third-stage digital controlled attenuator (16) is selected to perform a gain control of 1 dB to 31 dB; if the sampling level requirement is still not met after the third-stage digital controlled attenuator (16) performs a gain control of 31 dB, then the second-stage digital controlled attenuator (13) is selected to perform a gain control of 31 dB, and then the third-stage digital controlled attenuator (16) is selected to perform a gain control of 1 dB to 31 dB; if the sampling level still cannot meet the requirement after adjustment by the third-stage digital controlled attenuator (16) and the second-stage digital controlled attenuator (13), the first-stage digital controlled attenuator (10) and the second-stage digital controlled attenuator (13) are simultaneously selected to perform a gain control of 39 dB, and finally the third-stage digital controlled attenuator (16) is used to perform a gain control of 1 dB to 31 dB.

Citation Information

Patent Citations

  • Radio frequency direct acquisition ADC anti-aliasing tunable filter

    CN115021717A

  • Radio frequency wide-open large dynamic digital detection and reception system and radio frequency wide-open large dynamic digital detection and reception method

    CN117856818A

  • Reconfigurable signal processing board based on VPX architecture and reconstruction method thereof

    CN115905813A

  • SIP (Session Initiation Protocol) module integrated straight wave amplifier

    CN119813975A