Photoelectric wafer bonding structure and bonding method, and chip packaging structure and packaging method

Abstract

The invention provides a photoelectric wafer bonding structure, a bonding method, a chip packaging structure and a packaging method. The photoelectric wafer bonding method comprises the following steps that a photon integrated circuit wafer is provided, the photon integrated circuit wafer comprises a plurality of photon integrated circuit chips, each photon integrated circuit chip is provided with a first area, a second area and a third area which are sequentially arranged in the first direction, the first area is provided with a conductive structure, and the third area is provided with a second conductive structure; the second area is provided with a waveguide extending along the first direction; forming a groove in the third region, wherein the waveguide is exposed on the side wall of the groove; an electric chip is provided, the electric chip is bonded to the upper surface of one photon integrated circuit chip of the photon integrated circuit wafer, and the electronic integrated circuit chip is electrically connected with the conductive structure; a reflective structure is arranged in the groove, so that light emitted by the waveguide can be emitted out along a second direction after being reflected by the reflective structure; and filling a light-transmitting material in the groove to form a light-transmitting layer covering the light-reflecting structure.

Description

Technical Field

[0001] The present invention relates to the field of chip packaging, and in particular to an optoelectronic wafer bonding structure and bonding method, a chip packaging structure and packaging method. Background Art

[0002] In 2.5D packaging, multiple semiconductor chips using different process technologies are usually placed side by side on an interposer. The interposer acts as a bridge to connect each chip and provides a high-speed communication interface. With the continuous evolution of advanced packaging technologies, 2.5D packaging has been increasingly widely used; 2.5D packaging can integrate more functional chips in a limited space and achieve a complete system function within a single package.

[0003] With the integration of 2.5D packaging, the throughput of big data requires the participation of integrated photonic integrated circuit wafers, and more and more optoelectronic co-packaging solutions have been proposed. 2.5D is a good solution idea among them. Through a photonic interposer, chips such as application-specific integrated circuits (ASICs) and memories can be co-packaged through the interposer, and the interposer can continue to be coupled with optical devices to achieve big data transmission.

[0004] 2.5D packaging requires processing on both the front and back sides of the package body. However, the front side of the photonic interposer needs to perform optical coupling, and the optical coupling area needs to be open, so a hermetic package cannot be formed, resulting in poor reliability of the package body.

[0005] Therefore, the inability to seal the front side of the photonic interposer packaging and the poor reliability of the package body are problems that need to be solved currently. Summary of the Invention

[0006] The technical problem to be solved by the present invention is that the front side of the photonic interposer packaging cannot be sealed and the reliability of the package body is poor, and an optoelectronic wafer bonding structure and bonding method, a chip packaging structure and packaging method are provided.

[0007] To solve the above problems, the present invention provides an optoelectronic wafer bonding method, including the following steps:

[0008] Provide a photonic integrated circuit wafer, the photonic integrated circuit wafer includes a plurality of photonic integrated circuit chips, each of the photonic integrated circuit chips has a first region, a second region, and a third region arranged in sequence along a first direction, the first region is provided with a conductive structure, and the second region is provided with a waveguide extending along the first direction;

[0009] Form a trench in the third region, and the side wall of the trench exposes the waveguide;

[0010] Provide an electronic integrated circuit chip and bond the lower surface of the electronic integrated circuit chip to the upper surface of a photonic integrated circuit chip of the photonic integrated circuit wafer, and the electronic integrated circuit chip is electrically connected to the conductive structure;

[0011] A reflective structure is disposed in the trench, so that the light emitted by the waveguide can be reflected by the reflective structure and then emitted along a second direction, where the second direction is perpendicular to the first direction;

[0012] Fill the trench with a light-transmitting material to form a light-transmitting layer covering the reflective structure, and the light emitted by the waveguide is reflected by the reflective structure and then emitted along the second direction and propagates in the light-transmitting layer.

[0013] In some embodiments, the conductive structure further includes:

[0014] A first conductive pad disposed on the upper surface of the photonic integrated circuit chip;

[0015] A through-silicon via, one end of which is electrically connected to the first conductive pad, and the other end extends perpendicularly to the inside of the photonic integrated circuit chip with respect to the upper surface.

[0016] In some embodiments, the light-transmitting layer also covers the upper surface of the electronic integrated circuit chip.

[0017] In some embodiments, in the step of coating a light-transmitting material in the trench to form a light-transmitting layer, the following steps are further included:

[0018] A fiber optic welding area is provided on the surface of the light-transmitting layer, and the light emitted by the waveguide is reflected by the reflective structure and then emitted along the second direction and propagates in the light-transmitting layer to the fiber optic welding area.

[0019] In some embodiments, in the step of disposing a reflective structure in the trench, the following steps are further included:

[0020] Provide a reflective structure, the reflective structure includes an inclined surface, and a reflective layer is disposed on the inclined surface; the reflective structure is disposed in the trench, and the reflective layer faces the waveguide, so that the light emitted by the waveguide can be reflected by the reflective layer and then emitted along the second direction.

[0021] In some embodiments, in the step of disposing a reflective structure in the trench, the following steps are further included:

[0022] Fill the trench with a polymer substrate and perform photolithography to form a reflective structure, and the reflective structure includes an inclined surface, the inclined surface faces the waveguide; a reflective layer is disposed on the inclined surface.

[0023] In some embodiments, the reflective layer is a metal layer.

[0024] In some embodiments, the method further comprises the following steps:

[0025] Provide a plurality of the electronic integrated circuit chips, and bond the lower surfaces of the plurality of electronic integrated circuit chips to the upper surfaces of the respective photonic integrated circuit chips of the photonic integrated circuit wafer, and form the reflective structure and the light-transmitting layer in the trenches of each photonic integrated circuit chip.

[0026] In some embodiments, the method further comprises the following steps:

[0027] Thin the lower surface of the photonic integrated circuit wafer to expose the other end of the through-silicon via from the lower surface of the photonic integrated circuit wafer.

[0028] In some embodiments, in the step of thinning the lower surface of the photonic integrated circuit wafer, the following steps are further included:

[0029] Bond an auxiliary wafer to the surface of the light-transmitting layer; thin the lower surface of the photonic integrated circuit wafer to expose the other end of the through-silicon via from the lower surface of the photonic integrated circuit wafer;

[0030] Dispose solder balls on the lower surface of the photonic integrated circuit wafer; remove the auxiliary wafer.

[0031] In some embodiments, after the step of thinning the lower surface of the photonic integrated circuit wafer, the following steps are further included:

[0032] Cut the photonic integrated circuit wafer to obtain a plurality of independent optoelectronic wafer bonding structures.

[0033] In some embodiments, the light-transmitting layer covers the upper surface of the reflective structure, or the upper surface of the reflective structure is flush with the upper surface of the light-transmitting layer.

[0034] To solve the above problems, the present invention provides an optoelectronic wafer bonding structure, comprising:

[0035] A photonic integrated circuit chip, the photonic integrated circuit chip having a first region, a second region, and a third region arranged in sequence along a first direction, the first region being provided with a conductive structure, the second region being provided with a waveguide extending along the first direction, the third region being formed with a trench, and the sidewall of the trench exposing the waveguide;

[0036] An electronic integrated circuit chip, the lower surface of the electronic integrated circuit chip being bonded to the upper surface of the photonic integrated circuit chip, and the electronic integrated circuit chip being electrically connected to the conductive structure;

[0037] A reflective structure is disposed in the groove and can reflect the light emitted by the waveguide and then emit it along a second direction, wherein the second direction is perpendicular to the first direction;

[0038] A light-transmitting layer is filled in the groove and covers the reflective structure, and the light emitted by the waveguide is reflected by the reflective structure and then emits along the second direction and propagates in the light-transmitting layer.

[0039] In some embodiments, the conductive structure further includes:

[0040] A first conductive pad is disposed on the upper surface of the photonic integrated circuit chip;

[0041] A through-silicon via, one end of which is electrically connected to the first conductive pad, and the other end is exposed from the lower surface of the photonic integrated circuit chip.

[0042] In some embodiments, solder balls are further disposed on the lower surface of the photonic integrated circuit chip.

[0043] In some embodiments, the reflective structure includes an inclined surface, a reflective layer is disposed on the inclined surface, and the reflective layer is disposed opposite to the waveguide, so that the light emitted by the waveguide can be reflected by the reflective layer and then emit along the second direction.

[0044] In some embodiments, the light-transmitting layer also covers the upper surface of the electronic integrated circuit chip.

[0045] In some embodiments, the light-transmitting layer covers the upper surface of the reflective structure, or the upper surface of the reflective structure is flush with the upper surface of the light-transmitting layer.

[0046] In some embodiments, a fiber welding area is further disposed on the surface of the light-transmitting layer, and the light emitted by the waveguide is reflected by the reflective structure and then emits along the second direction and propagates in the light-transmitting layer to the fiber welding area.

[0047] To solve the above problems, the present invention provides a chip packaging method, including the following steps:

[0048] Provide a substrate, the upper surface of the substrate includes a first packaging area and a second packaging area;

[0049] Set a chip stacking structure in the first packaging area and set an optoelectronic wafer bonding structure in the second packaging area, and the optoelectronic wafer bonding structure adopts the optoelectronic wafer bonding structure of the present invention.

[0050] In some embodiments, the following steps are further included:

[0051] A molding compound is formed on the surface of the substrate, and the molding compound covers the chip stack structure and the optoelectronic wafer bonding structure, and exposes the upper surfaces of the chip stack structure and the optoelectronic wafer bonding structure.

[0052] In some embodiments, the molding compound in the corresponding area of the light reflecting structure of the optoelectronic wafer bonding structure is removed to expose the upper surface of the light reflecting structure.

[0053] In some embodiments, the following steps are further included:

[0054] Weld the optical fiber to the optical fiber welding area.

[0055] To solve the above problems, the present invention provides a chip packaging structure, including:

[0056] A substrate, the surface of the substrate includes a first packaging area and a second packaging area;

[0057] A chip stack structure, disposed in the first packaging area;

[0058] An optoelectronic wafer bonding structure, disposed in the second packaging area, and the optoelectronic wafer bonding structure adopts the optoelectronic wafer bonding structure of the present invention.

[0059] In some embodiments, it further includes:

[0060] A molding compound, formed on the surface of the substrate, the molding compound covers the chip stack structure and the optoelectronic wafer bonding structure, and exposes the upper surfaces of the chip stack structure and the optoelectronic wafer bonding structure;

[0061] An optical fiber, welded to the optical fiber welding area.

[0062] In the above technical solution, the optoelectronic wafer bonding structure and its bonding method change the light output direction through the light reflecting structure so that the light output direction is vertically upward, and the trench is wrapped by the light transmissive layer to facilitate the setting of the molding compound in the subsequent packaging process, thereby ensuring the packaging strength; at the same time, it can also ensure that the light output area can be protected from being polluted during the corresponding process.

[0063] The chip packaging structure and packaging method of the above technical solution form a chip-wafer hybrid bonding structure in advance with the electronic integrated circuit chip and the photonic integrated circuit wafer, and during the packaging process, it can avoid the problem of incompatibility between the electronic integrated circuit chip as a 2.5D silicon interposer and the production line.

[0064] In addition, the optoelectronic wafer bonding structure changes the light-emitting direction through a reflective structure to make the light-emitting direction vertically upward, and wraps the trench through a light-transmitting layer, so that during the packaging process, the photonic integrated circuit wafer, the electronic integrated circuit chip, and the chip stacking structure can all be protected by encapsulant, significantly increasing the strength and avoiding the contamination of the light-emitting area during underfill or encapsulation.

[0065] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the present invention. Technologies, methods, and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and devices should be regarded as part of the authorization specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0066] In order to more clearly illustrate the technical solutions in the specific embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the specific embodiments. Obviously, the drawings in the following description are only some specific embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0067] Figure 1 It is a flowchart of the steps of an embodiment of the optoelectronic wafer bonding method of the present invention.

[0068] Figure 2 It is a process structure diagram of providing a photonic integrated circuit chip in a photonic integrated circuit wafer in an embodiment of the optoelectronic wafer bonding method of the present invention.

[0069] Figure 3 It is a process structure diagram of forming a trench in the third region in an embodiment of the optoelectronic wafer bonding method of the present invention.

[0070] Figure 4 It is a process structure diagram of providing an electronic integrated circuit chip and bonding the lower surface of the electronic integrated circuit chip to the upper surface of a photonic integrated circuit chip of the photonic integrated circuit wafer in an embodiment of the optoelectronic wafer bonding method of the present invention.

[0071] Figure 5 It is a process structure diagram of arranging a reflective structure in the trench in an embodiment of the optoelectronic wafer bonding method of the present invention.

[0072] Figure 6 It is a process structure diagram of arranging a reflective structure in the trench in another embodiment of the optoelectronic wafer bonding method of the present invention.

[0073] Figure 7Process structure diagram for forming a light-transmitting layer in an embodiment of the optoelectronic wafer bonding method of the present invention.

[0074] Figure 8 Process structure diagram for thinning the lower surface of the photonic integrated circuit wafer in an embodiment of the optoelectronic wafer bonding method of the present invention.

[0075] Figure 9 Structure schematic diagram of an optoelectronic bonding structure in another embodiment of the optoelectronic wafer bonding method of the present invention.

[0076] Figure 10 Step flowchart of an embodiment of the chip packaging method of the present invention.

[0077] Figure 11 Process structure diagram for providing an initial structure in an embodiment of the chip packaging method of the present invention.

[0078] Figure 12 Process structure diagram for setting an optoelectronic wafer bonding structure in a second packaging area on the surface of the substrate in an embodiment of the chip packaging method of the present invention.

[0079] Figure 13 Process structure diagram for forming a plastic package on the surface of the substrate in an embodiment of the chip packaging method of the present invention.

[0080] Figure 14 Process structure diagram for welding an optical fiber to the optical fiber welding area in an embodiment of the chip packaging method of the present invention. Detailed implementation manners

[0081] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Apparently, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative efforts shall fall within the protection scope of the present invention.

[0082] Please refer to Figure 1 , which is the step flowchart of an embodiment of the optoelectronic wafer bonding method of the present invention. As Figure 1As shown, the optoelectronic wafer bonding method includes the following steps: Step S11, providing a photonic integrated circuit wafer, the photonic integrated circuit wafer including a plurality of photonic integrated circuit chips, each of the photonic integrated circuit chips having a first region, a second region, and a third region arranged in sequence along a first direction, the first region being provided with a conductive structure, and the second region being provided with a waveguide extending along the first direction; Step S12, forming a trench in the third region, and the sidewall of the trench exposing the waveguide; Step S13, providing an electronic integrated circuit chip, and bonding the lower surface of the electronic integrated circuit chip to the upper surface of one of the photonic integrated circuit chips of the photonic integrated circuit wafer, the electronic integrated circuit chip being electrically connected to the conductive structure; Step S14, providing a reflective structure in the trench, such that the light emitted by the waveguide can be emitted along a second direction after being reflected by the reflective structure, wherein the second direction is perpendicular to the first direction; Step S15, filling the trench with a light-transmitting material to form a light-transmitting layer covering the reflective structure, and the light emitted by the waveguide is emitted along the second direction after being reflected by the reflective structure and propagates in the light-transmitting layer.

[0083] Please refer to Figure 2 and step S11, providing a photonic integrated circuit (PIC) wafer, the photonic integrated circuit wafer including a plurality of photonic integrated circuit chips 21, each of the photonic integrated circuit chips 21 having a first region 211, a second region 212, and a third region 213 arranged in sequence along a first direction D1, the first region 211 being provided with a conductive structure, and the second region 212 being provided with a waveguide 218 extending along the first direction D1.

[0084] To clearly illustrate the process of bonding an electronic integrated circuit chip to one of the photonic integrated circuit chips of the photonic integrated circuit wafer, only one of the photonic integrated circuit chips of the photonic integrated circuit wafer is shown in Figures 2 to 8 the figure.

[0085] However, in the actual bonding method provided by the present invention, the electronic integrated circuit chip is a chip formed after singulating an electronic integrated circuit wafer, and the photonic integrated circuit chip is located on the undivided photonic integrated circuit wafer. The bonding method described in the present invention is a chip-wafer hybrid bonding between the electronic integrated circuit chip and the photonic integrated circuit wafer.

[0086] In some embodiments, the photonic integrated circuit wafer is an 8-inch wafer (with a diameter of approximately 200 mm). 8-inch wafers are widely used in the field of semiconductor manufacturing, and a mature and efficient production line has been formed. Multiple photonic integrated circuit chips can be integrated on the same wafer for mass production. In the optical communication industry, it can meet the large demand for photonic integrated circuits in high-speed optical modules for 5G network construction and data center expansion. The 8-inch wafer has a moderate size, which is conducive to improving the utilization rate of raw materials, reducing costs, and can perfectly adapt to the existing semiconductor manufacturing process. When integrated with other chips or components, it can be seamlessly butt-jointed with the packaging process, improving the integration and stability of the integrated circuit system.

[0087] In some other embodiments, the photonic integrated circuit wafer can also be a 4-inch wafer (with a diameter of approximately 100 mm) or a 12-inch wafer (with a diameter of approximately 300 mm).

[0088] In some embodiments, the conductive structure further includes a first conductive pad 210 and a through-silicon via 219. The first conductive pad 210 is disposed on the upper surface S2 of the photonic integrated circuit chip 21; one end of the through-silicon via 219 is electrically connected to the first conductive pad 210, and the other end extends perpendicularly to the inside of the photonic integrated circuit chip 21 from the upper surface S2.

[0089] Specifically, a first dielectric layer 217 is formed on the upper surface S2 of the photonic integrated circuit chip 21, and the first conductive pad 210 is on the same layer as the first dielectric layer 217 and flush with its surface.

[0090] That is, the surface of the first conductive pad 210 is exposed on the surface of the first dielectric layer 217, so as to facilitate the electrical connection with the electronic integrated circuit chip during the subsequent bonding process with the electronic integrated circuit chip.

[0091] Please refer to Figure 3 And step S12, a trench 22 is formed in the third region 213, and the sidewall 220 of the trench 22 exposes the waveguide 218. In some embodiments, the trench 22 is formed in the third region 213 by dry etching.

[0092] The trench 22 is used to accommodate the subsequent formed reflective structure, and the waveguide 218 is led out through the sidewall 220, so that the light emitted by the waveguide 218 can propagate to the surface of the reflective structure, and then be reflected by the reflective structure and emitted along the second direction.

[0093] Please refer to Figure 4And step S13, providing an electronic integrated circuit chip 23, and bonding the lower surface S3 of the electronic integrated circuit chip 23 to the upper surface S2 of one of the photonic integrated circuit chips 21 of the photonic integrated circuit wafer, the electronic integrated circuit chip 23 being electrically connected to the conductive structure.

[0094] In some embodiments, the electronic integrated circuit chip 23 is a chip formed by singulating an electronic integrated circuit wafer, the photonic integrated circuit chip 21 is located on the undivided photonic integrated circuit wafer, and the bonding of the lower surface S3 of the electronic integrated circuit chip 23 to the upper surface S2 of one of the photonic integrated circuit chips 21 of the photonic integrated circuit wafer in step S13 is actually a chip-wafer hybrid bonding of the electronic integrated circuit chip 23 and the photonic integrated circuit wafer.

[0095] Specifically, a second conductive pad 230 corresponding to the position of the first conductive pad 210 on the upper surface S2 of the photonic integrated circuit chip 21 is formed on the lower surface S3 of the electronic integrated circuit chip 23, and the electronic integrated circuit chip 23 is bonded to the photonic integrated circuit chip 21 through the electrical connection between the second conductive pad 230 and the first conductive pad 210.

[0096] In addition, a second dielectric layer 231 is formed on the lower surface S3 of the electronic integrated circuit chip 23, and the second conductive pad 230 is in the same layer as the second dielectric layer 231 and flush with the surface.

[0097] That is, the surface of the second conductive pad 230 is exposed on the surface of the second dielectric layer 231 to facilitate the electrical connection with the photonic integrated circuit chip 21 during the bonding process with the photonic integrated circuit chip 21.

[0098] At the hybrid bonding interface, the second conductive pad 230 and the first conductive pad 210 are bonded to each other to achieve the electrical connection between the electronic integrated circuit chip 23 and the photonic integrated circuit chip 21; the first dielectric layer 217 and the second dielectric layer 231 are bonded to each other.

[0099] In some embodiments, the thickness of the electronic integrated circuit chip 23 is less than 50 microns. The relatively small thickness of the electronic integrated circuit chip 23 brings many advantages to the entire integrated circuit system: on the one hand, it greatly reduces the overall volume of the wafer bonding structure, meeting the development trend of modern electronic devices constantly pursuing thinness, lightness, and miniaturization; on the other hand, the relatively thin chip thickness helps to reduce the path length of signal transmission, thereby reducing the loss and delay during signal transmission, significantly improving the processing speed and efficiency during chip operation, and laying a solid foundation for achieving more efficient and faster performance of electronic devices.

[0100] Please refer to Figure 5 and step S14, in which a reflective structure 24 is arranged in the groove 22, so that the light emitted by the waveguide 218 can be emitted in the second direction D2 after being reflected by the reflective structure 24, wherein the second direction D2 is perpendicular to the first direction D1.

[0101] In some embodiments, in the step of arranging the reflective structure 24 in the groove 22, the following steps are further included:

[0102] (1) Provide a reflective structure 24, the reflective structure 24 includes an inclined surface, and a reflective layer 241 is arranged on the inclined surface.

[0103] In this embodiment, the reflective structure 24 is a prefabricated structure. Prefabricating the reflective structure 24 does not occupy the packaging production line, and the prefabricated reflective structures 24 in batches have high consistency.

[0104] In some embodiments, the material of the reflective structure 24 is polymer, which is convenient for shaping the required shape of the reflective structure 24; the reflective layer 241 is deposited on the inclined surface of the reflective structure 24 by physical vapor deposition (PVD) process or electron beam evaporation (EVP) process, and the reflective layer 241 is a metal layer, and its material can be aluminum (Al), silver (Ag), gold (Au), etc.

[0105] (2) Arrange the reflective structure 24 in the groove 22, and the reflective layer 241 faces the waveguide 218, so that the light emitted by the waveguide 218 can be emitted in the second direction D2 after being reflected by the reflective layer 241.

[0106] Arranging the prefabricated reflective structure 24 in the groove 22 can save the bonding process time and greatly improve the production efficiency and product consistency.

[0107] In this embodiment, the prefabricated reflective structure 24 is fixed in the groove by fixing glue.

[0108] In other embodiments, in the step of arranging the reflective structure 24 in the groove 22, the following steps are further included:

[0109] (1) Fill the groove 22 with a polymer substrate and perform photolithography to form a reflective structure 24, and the reflective structure 24 includes an inclined surface, and the inclined surface faces the waveguide 218.

[0110] In some embodiments, the material of the reflective structure 24 is polymer, which is convenient for shaping the required shape of the reflective structure 24.

[0111] (2) A reflective layer 241 is provided on the inclined surface.

[0112] In this embodiment, the reflective layer 241 is deposited on the inclined surface of the reflective structure 24 by physical vapor deposition (PVD) process or electron beam evaporation (EVP) process. The reflective layer 241 is a metal layer, and its material can be aluminum (Al), silver (Ag), gold (Au), etc.

[0113] An inclined surface opposite to the waveguide 218 is provided in the trench to facilitate receiving the light emitted by the waveguide 218, so that the light emitted by the waveguide 218 forms an angle with the surface of the reflective layer 241, and then the original light-emitting direction is changed after being reflected by the reflective layer 241, and it is emitted along the second direction D2.

[0114] Please refer to Figure 6 , which is a process structure diagram of setting a reflective structure in the trench in another embodiment of the optoelectronic wafer bonding method described in the present invention. As Figure 6 shown, in this embodiment, in the step of forming the trench 22 in the third region 213, a part of the substrate of the third region 213 is reserved to form the reflective structure 24, and the reflective structure 24 includes an inclined surface opposite to the waveguide 218. That is, the inclined surface of the reflective structure 24 is integrally formed when the trench 22 is formed, and the substrate of the reflective structure 24 is the silicon material of the photonic integrated circuit wafer.

[0115] After that, a reflective layer 241 is provided on the inclined surface of the reflective structure 24, and the lower surface S3 of the electronic integrated circuit chip 23 is bonded to the upper surface S2 of a photonic integrated circuit chip 21 of the photonic integrated circuit wafer, obtaining the structure as Figure 6 shown.

[0116] Please refer to Figure 7 and step S15. A light-transmitting material is filled in the trench 22 to form a light-transmitting layer 25 covering the reflective structure 24. The light emitted by the waveguide 218 is reflected by the reflective structure 24 and then emitted along the second direction D2 and propagates in the light-transmitting layer 25. Among them, Figure 7 On the basis of Figure 5 continue to illustrate.

[0117] In this embodiment, the light-transmitting material is a transparent organic material or an inorganic material or a composite material of both.

[0118] In this embodiment, the second direction D2 is the vertically upward direction. The light-emitting direction is changed by the light-reflecting structure 24 so that the light-emitting direction is vertically upward, and the light-emitting area is wrapped by the light-transmitting layer 25, facilitating the setting of the plastic package in the subsequent packaging process, thereby ensuring the packaging strength; at the same time, it can also ensure that the light-emitting area can be protected from being contaminated during the corresponding process.

[0119] In some embodiments, the light-transmitting layer 25 also covers the upper surface S4 of the electronic integrated circuit chip 23 to save processes, save process time, and improve production efficiency.

[0120] In other embodiments, an opaque material can also be used to cover the upper surface S4 of the electronic integrated circuit chip 23 to save process costs and improve the structural stability.

[0121] In some embodiments, after forming the light-transmitting layer 25, the following steps are further included: a fiber-optic welding area 250 is provided on the surface of the light-transmitting layer 25, and the light emitted by the waveguide 218 is reflected by the light-reflecting structure 24 and then emitted along the second direction D2 and propagates in the light-transmitting layer 25 to the fiber-optic welding area 250.

[0122] The fiber-optic welding area 250 is used to connect with an optical fiber in the subsequent packaging process, connect the optoelectronic wafer bonding structure with other optical devices, optical network equipment, etc., and realize the integration and construction of an optical communication system.

[0123] Figures 2 to 7 And steps S11 to S15 illustrate the process of bonding an electronic integrated circuit chip to one of the photonic integrated circuit chips of the photonic integrated circuit wafer.

[0124] Since the photonic integrated circuit wafer includes multiple photonic integrated circuit chips 21, in some embodiments, the wafer optoelectronic wafer bonding method further includes the following steps:

[0125] Provide multiple electronic integrated circuit chips 23, bond the lower surfaces S3 of the multiple electronic integrated circuit chips 23 to the upper surfaces S2 of the respective photonic integrated circuit chips 21 of the photonic integrated circuit wafer, and form a light-reflecting structure 24 and a light-transmitting layer 25 in the trenches 22 in each photonic integrated circuit chip 21.

[0126] Specifically, referring to Figures 2 to 7 And the process steps shown in steps S11 to S15, bond the multiple electronic integrated circuit chips 23 to the respective photonic integrated circuit chips 21 of the photonic integrated circuit wafer simultaneously or sequentially; as described in the foregoing, it will not be elaborated here.

[0127] In some embodiments, the multiple electronic integrated circuit chips 23 are of the same type of electronic integrated circuit chips; the multiple electronic integrated circuit chips of the same type are simultaneously bonded to the respective photonic integrated circuit chips 21 of the photonic integrated circuit wafer, and each step of the chip-wafer bonding method is performed simultaneously on the same photonic integrated circuit wafer, which can effectively improve the bonding efficiency, and further improve the productivity and product consistency.

[0128] In some other embodiments, according to specific process requirements, multiple electronic integrated circuit chips 23 of different types can also be provided on the same photonic integrated circuit wafer to meet more flexible and diverse requirements; the multiple electronic integrated circuit chips of different types are sequentially bonded to the respective photonic integrated circuit chips 21 of the photonic integrated circuit wafer.

[0129] In some embodiments, the number of the electronic integrated circuit chips 23 can correspond to the total number of the photonic integrated circuit chips 21 on the photonic integrated circuit wafer.

[0130] In some other embodiments, the number of the electronic integrated circuit chips 23 can also be less than the total number of the photonic integrated circuit chips 21 on the photonic integrated circuit wafer.

[0131] Please refer to Figure 8 , after bonding one or more of the electronic integrated circuit chips 23 to the photonic integrated circuit chips 21 of the photonic integrated circuit wafer, the optoelectronic wafer bonding method further includes the following steps: thinning the lower surface of the photonic integrated circuit wafer so that the other end of the silicon through hole 219 is exposed from the lower surface of the photonic integrated circuit wafer.

[0132] In this embodiment, the lower surface of the photonic integrated circuit wafer corresponds to and is consistent with the lower surface S1 of the photonic integrated circuit chip 21.

[0133] In some embodiments, in the step of thinning the lower surface of the photonic integrated circuit wafer, the following steps are further included:

[0134] (1) Bonding an auxiliary wafer (not shown) to the surface of the light-transmitting layer 25;

[0135] (2) Thinning the lower surface of the photonic integrated circuit wafer so that the other end of the silicon through hole 219 is exposed from the lower surface of the photonic integrated circuit wafer;

[0136] (3) Providing solder balls 26 on the lower surface of the photonic integrated circuit wafer;

[0137] (4) Removing the auxiliary wafer.

[0138] By thinning the lower surface of the photonic integrated circuit wafer, the other end of the through-silicon via 219 is exposed from the lower surface of the photonic integrated circuit wafer, and the solder ball 26 electrically connected to the through-silicon via 219 is disposed on the lower surface of the photonic integrated circuit wafer. The external circuit is connected through the solder ball 26, thereby achieving electrical connection with external devices.

[0139] In some embodiments, after thinning the lower surface of the photonic integrated circuit wafer to expose the other end of the through-silicon via 219 from the lower surface of the photonic integrated circuit wafer, the following steps are further included: a single-layer or multi-layer redistribution layer may be formed on the lower surface of the photonic integrated circuit wafer, and then the solder ball 26 is disposed on the redistribution layer.

[0140] Since the above structure is fabricated starting from the entire photonic integrated circuit wafer, in some embodiments, after the step of thinning the lower surface of the photonic integrated circuit wafer, the following steps are further included: cutting the photonic integrated circuit wafer to obtain a plurality of independent optoelectronic wafer bonding structures. Each independent optoelectronic wafer bonding structure is the optoelectronic wafer bonding structure of the present invention.

[0141] As Figure 8 shown, in the present embodiment, the light-transmitting layer 25 covers the upper surface of the light-reflecting structure 24.

[0142] In some other embodiments, as Figure 9 shown, the upper surface of the light-reflecting structure 24 is flush with the upper surface of the light-transmitting layer 25. Specifically, the method for forming the light-transmitting layer may further be:

[0143] (1) Filling the upper surface S4 of the electronic integrated circuit chip 23 and the trench 22 with a transparent material to form the light-transmitting layer 25;

[0144] (2) Grinding the light-transmitting layer 25 until the upper surface of the light-reflecting structure 24 is exposed;

[0145] (3) Forming the optical fiber welding region 250 on the surface of the light-transmitting layer 25.

[0146] The above technical solution changes the light-emitting direction to be vertically upward through the light-reflecting structure, and wraps the light-emitting region through the light-transmitting layer, so as to facilitate the setting of the plastic package in the subsequent packaging process, thereby ensuring the packaging strength; at the same time, it can also ensure that the light-emitting region can be protected from being contaminated during the corresponding process.

[0147] An embodiment of the present invention further provides an optoelectronic wafer bonding structure formed by using the above bonding method.

[0148] As Figures 8 to 9As shown, the optoelectronic wafer bonding structure includes: a photonic integrated circuit chip 21, an electronic integrated circuit chip 23, a reflective structure 24, and a light-transmitting layer 25.

[0149] The photonic integrated circuit chip 21 has a first region 211, a second region 212, and a third region 213 arranged in sequence along a first direction D1. The first region 211 is provided with a conductive structure. The second region 212 is provided with a waveguide 218 extending along the first direction D1. The third region 213 is formed with a trench 22, and the sidewall of the trench 22 exposes the waveguide 218.

[0150] The lower surface S3 of the electronic integrated circuit chip 23 is hybrid-bonded to the upper surface S2 of the photonic integrated circuit chip 21, and the electronic integrated circuit chip 23 is electrically connected to the conductive structure.

[0151] The reflective structure 24 is disposed in the trench 22 and can reflect the light emitted by the waveguide 218 and emit it along a second direction D2, where the second direction D2 is perpendicular to the first direction D1.

[0152] The light-transmitting layer 25 fills the trench 22 and covers the reflective structure 24. The light emitted by the waveguide 218 is reflected by the reflective structure 24 and emitted along the second direction D2 and propagates in the light-transmitting layer 25.

[0153] The above technical solution changes the light-emitting direction through the reflective structure so that the light-emitting direction is vertically upward, and wraps the trench with the light-transmitting layer to facilitate the setting of the plastic package in the subsequent packaging process, thereby ensuring the packaging strength; at the same time, it can also ensure that the light-emitting area can be protected from being polluted during the corresponding process.

[0154] In some embodiments, the conductive structure further includes a first conductive pad 210 and a through-silicon via 219. The first conductive pad 210 is disposed on the upper surface S2 of the photonic integrated circuit chip 21; one end of the through-silicon via 219 is electrically connected to the first conductive pad 210, and the other end exposes from the lower surface S1 of the photonic integrated circuit chip 21.

[0155] In some embodiments, a second conductive pad 230 corresponding to the position of the first conductive pad 210 on the upper surface S2 of the photonic integrated circuit chip 21 is formed on the lower surface S3 of the electronic integrated circuit chip 23, and the electronic integrated circuit chip 23 is bonded to the photonic integrated circuit chip 21 through the electrical connection between the second conductive pad 230 and the first conductive pad 210.

[0156] In addition, a first dielectric layer 217 is formed on the upper surface S2 of the photonic integrated circuit chip 21, and the first conductive pad 210 is in the same layer as the first dielectric layer 217 and flush with the surface thereof; a second dielectric layer 231 is formed on the lower surface S3 of the electronic integrated circuit chip 23, and the second conductive pad 230 is in the same layer as the second dielectric layer 231 and flush with the surface thereof.

[0157] At the hybrid bonding interface, the second conductive pad 230 and the first conductive pad 210 are bonded to each other to achieve electrical connection between the electronic integrated circuit chip 23 and the photonic integrated circuit chip 21; the first dielectric layer 217 and the second dielectric layer 231 are bonded to each other.

[0158] In some embodiments, the thickness of the electronic integrated circuit chip 23 is less than 50 micrometers. The relatively small thickness of the electronic integrated circuit chip 23 brings many advantages to the entire integrated circuit system. On the one hand, it greatly reduces the overall volume of the wafer bonding structure, meeting the development trend of modern electronic devices constantly pursuing thinness, lightness, and miniaturization. On the other hand, the relatively thin chip thickness helps to reduce the path length of signal transmission, thereby reducing the loss and delay during signal transmission, significantly improving the processing speed and efficiency during chip operation, and laying a solid foundation for achieving more efficient and faster performance of electronic devices.

[0159] In some embodiments, the reflective structure 24 includes an inclined surface, a reflective layer 241 is disposed on the inclined surface, and the reflective layer 241 is disposed opposite to the waveguide 218, so that the light emitted by the waveguide 218 can be emitted along the second direction D2 after being reflected by the reflective layer 241.

[0160] In some embodiments, the material of the reflective structure 24 is a polymer.

[0161] In some embodiments, the reflective layer 241 is a metal layer, and its material can be aluminum (Al), silver (Ag), gold (Au), etc.

[0162] In this embodiment, the second direction D2 is the vertically upward direction. By changing the light output direction through the reflective structure 24 to make the light output direction vertically upward, and wrapping the light output area with the light-transmitting layer 25, it is convenient to set the plastic package in the subsequent packaging process, thereby ensuring the packaging strength; at the same time, it can also ensure that the light output area can be protected from being contaminated during the corresponding process.

[0163] In some embodiments, the light-transmitting layer 25 also covers the upper surface S4 of the electronic integrated circuit chip 23.

[0164] In other embodiments, the upper surface S4 of the electronic integrated circuit chip 23 may also be covered with an opaque material. In some embodiments, an optical fiber welding area 250 is further provided on the surface of the light-transmitting layer 25. The light emitted by the waveguide 218 is reflected by the reflective structure 24 and then exits along the second direction D2 and propagates in the light-transmitting layer 25 to the optical fiber welding area 250.

[0165] The optical fiber welding area 250 is used to connect with an optical fiber in a subsequent packaging process, connect the optoelectronic wafer bonding structure with other optical devices, optical network devices, etc., and realize the integration and construction of an optical communication system.

[0166] In Figure 8 the illustrated embodiment, the light-transmitting layer 25 covers the upper surface of the reflective structure 24.

[0167] In Figure 9 the illustrated embodiment, the upper surface of the reflective structure 24 is flush with the upper surface of the light-transmitting layer 25.

[0168] In some embodiments, solder balls 26 electrically connected to the silicon vias 219 are further provided on the lower surface S1 of the photonic integrated circuit chip 21, and an external circuit is connected through the solder balls 26, thereby realizing electrical connection with external devices.

[0169] Based on the same inventive concept, an embodiment of the present invention further provides a chip packaging method.

[0170] Please refer to Figure 10 , which is a flowchart of the steps of an embodiment of the chip packaging method of the present invention. As Figure 10 shown, the chip packaging method includes the following steps: Step S101, providing a substrate, the upper surface of the substrate includes a first packaging area and a second packaging area; Step S102, setting a chip stacking structure in the first packaging area and setting an optoelectronic wafer bonding structure in the second packaging area, and the optoelectronic wafer bonding structure adopts the optoelectronic wafer bonding structure of the present invention.

[0171] Please refer to Figure 11 and step S101, providing a substrate 41, the upper surface S6 of the substrate 41 includes a first packaging area 411 and a second packaging area 412.

[0172] In some embodiments, the substrate 41 is a silicon interposer. The chip packaging method of the present invention forms a chip-wafer hybrid bonding structure of an electronic integrated circuit chip and a photonic integrated circuit chip in advance, and uses another substrate 41 as a 2.5D silicon interposer during the packaging process, which can avoid the problem of incompatibility between the photonic integrated circuit wafer and the production line when used as a 2.5D silicon interposer.

[0173] Please refer to Figure 12 Step S102, a chip stack structure 42 is provided in the first encapsulation area 411, and an optoelectronic wafer bonding structure 43 is provided in the second encapsulation area 412. The optoelectronic wafer bonding structure 43 adopts the optoelectronic wafer bonding structure of the embodiment shown in the present invention Figures 8 to 9 The optoelectronic wafer bonding structure shown in the embodiment; for details, please refer to the previous description and will not be elaborated here.

[0174] In some embodiments, the chip stack structure 42 is a memory. In this embodiment, the memory is a high bandwidth memory (HBM).

[0175] Please refer to Figure 13 , in some embodiments, the chip packaging method of the present invention further includes the following steps: a molding compound 44 is formed on the surface of the substrate 41. The molding compound 44 covers the chip stack structure 42 and the optoelectronic wafer bonding structure 43, and exposes the upper surfaces of the chip stack structure 42 and the optoelectronic wafer bonding structure 43.

[0176] The molding compound 44, as an important part of the entire packaging structure, usually adopts polymer materials such as epoxy resin. The main function of the molding compound 44 is to significantly enhance the overall strength of the package and protect the components from contamination. In practical applications, electronic products may face various complex usage environments, such as mechanical vibration, collision, etc. The molding compound 44 can evenly disperse external forces, prevent internal photonic integrated circuit chips, electronic integrated circuit chips, etc. from being damaged, and greatly improve the reliability and durability of the product.

[0177] Since the optoelectronic wafer bonding structure 43 is provided with a reflective structure and a light-transmitting layer in the light-emitting area, the light-emitting direction is changed by the reflective structure to make the light-emitting direction vertically upward, and the groove is wrapped by the light-transmitting layer, so that during the packaging process, the photonic integrated circuit chip, the electronic integrated circuit chip, and the chip stack structure 42 can all be protected by the encapsulant, significantly increasing the strength and avoiding contamination of the light-emitting area during underfill or encapsulation.

[0178] In some embodiments, the molding compound 44 in the area corresponding to the reflective structure of the optoelectronic wafer bonding structure 43 is removed to expose the upper surface of the reflective structure.

[0179] Please refer to Figure 14 , in some embodiments, it further includes the following steps:

[0180] (1) Solder balls 410 are provided on the lower surface S5 of the substrate 41 for connecting to an external circuit, thereby realizing electrical connection with an external device.

[0181] (2)Weld the optical fiber 45 to the optical fiber welding area 250. The optical fiber welding area 250 is used to connect with the optical fiber in the subsequent packaging process, connect the optoelectronic wafer bonding structure with other optical devices, optical network equipment, etc., and realize the integration and construction of the optical communication system.

[0182] After completing the above process steps, the chip packaging structure of the present invention can be obtained.

[0183] The above technical solution forms a chip-wafer hybrid bonding structure of the electronic integrated circuit chip and the photonic integrated circuit chip in advance, which can avoid the incompatibility problem between the photonic integrated circuit wafer and the production line when using the photonic integrated circuit wafer as a 2.5D silicon interposer during the packaging process.

[0184] In addition, the optoelectronic wafer bonding structure 43 changes the light output direction through the reflective structure to make the light output direction perpendicular upward, and wraps the trench through the light-transmitting layer, so that during the packaging process, the photonic integrated circuit chip, the electronic integrated circuit chip, and the chip stacking structure 42 can all be protected by the encapsulant, significantly increasing the strength, and can also avoid the light output area being contaminated during the underfill or encapsulation process.

[0185] An embodiment of the present invention further provides a chip packaging structure formed by the above packaging method, as Figure 14 shown, the chip packaging structure of the present invention includes: a substrate 41, a chip stacking structure 42, and an optoelectronic wafer bonding structure 43.

[0186] The surface of the substrate 41 includes a first packaging area 411 and a second packaging area 412.

[0187] The chip stacking structure 42 is disposed in the first packaging area 411, the optoelectronic wafer bonding structure 43 is disposed in the second packaging area 412, and the optoelectronic wafer bonding structure 43 adopts the optoelectronic wafer bonding structure of the embodiment shown in the present invention Figures 8 to 9 ; for details, see the previous description and will not be elaborated here.

[0188] In some embodiments, the substrate 41 is a silicon interposer. The chip packaging method of the present invention forms a chip-wafer hybrid bonding structure of the electronic integrated circuit chip and the photonic integrated circuit chip in advance, and uses another substrate 41 as a 2.5D silicon interposer during the packaging process, which can avoid the incompatibility problem between the photonic integrated circuit wafer and the production line when using the photonic integrated circuit wafer as a 2.5D silicon interposer.

[0189] In some embodiments, the chip stacking structure 42 is a memory. In this embodiment, the memory is a high bandwidth memory (HBM).

[0190] In some embodiments, the chip packaging structure further includes a plastic package body 44 and an optical fiber 45, which are formed on the surface of the substrate 41. The plastic package body 44 covers the chip stack structure 42 and the optoelectronic wafer bonding structure 43, and exposes the upper surfaces of the chip stack structure 42 and the optoelectronic wafer bonding structure 43.

[0191] The plastic package body 44, as an important part of the entire packaging structure, is usually made of polymer materials such as epoxy resin. The main function of the plastic package body 44 is to significantly enhance the overall strength of the package and protect the components from contamination. In practical applications, electronic products may face various complex usage environments, such as mechanical vibration, collision, etc. The plastic package body 44 can evenly disperse external forces, prevent internal photon integrated circuit chips, electronic integrated circuit chips, etc. from being damaged, and greatly improve the reliability and durability of the product.

[0192] Since the optoelectronic wafer bonding structure 43 is provided with a light reflecting structure and a light transmitting layer in the light emitting area, the light emitting direction is changed by the light reflecting structure to make the light emitting direction vertically upward, and the trench is wrapped by the light transmitting layer, so that during the packaging process, the photon integrated circuit chip, the electronic integrated circuit chip, and the chip stack structure 42 can all be protected by the encapsulant, significantly increasing the strength and avoiding contamination of the light emitting area during underfill or plastic packaging.

[0193] The optical fiber 45 is welded to the optical fiber welding area. The optical fiber welding area 250 is used to connect with the optical fiber in the subsequent packaging process, connect the optoelectronic wafer bonding structure with other optical devices, optical network equipment, etc., and realize the integration and construction of the optical communication system.

[0194] In some embodiments, solder balls 410 are provided on the lower surface S5 of the substrate 41 for connecting to an external circuit, thereby realizing electrical connection with external devices.

[0195] The above technical solution forms a chip-wafer hybrid bonding structure in advance with the electronic integrated circuit chip and the photon integrated circuit wafer. During the packaging process, it can avoid the incompatibility problem between the electronic integrated circuit chip and the 2.5D silicon interposer in the production line.

[0196] In addition, the optoelectronic wafer bonding structure 43 changes the light emitting direction by the light reflecting structure to make the light emitting direction vertically upward, and wraps the trench by the light transmitting layer, so that during the packaging process, the photon integrated circuit wafer, the electronic integrated circuit chip, and the chip stack structure 42 can all be protected by the encapsulant, significantly increasing the strength and avoiding contamination of the light emitting area during underfill or plastic packaging.

[0197] It should be noted that references to "an embodiment", "embodiments", "exemplary embodiments", "some embodiments", etc. in the specification indicate that the described embodiments may include specific features, structures, or characteristics, but each embodiment may not necessarily include that specific feature, structure, or characteristic. Moreover, such phrases do not necessarily refer to the same embodiment. In addition, when a specific feature, structure, or characteristic is described in connection with an embodiment, implementing such a feature, structure, or characteristic in connection with other embodiments, whether or not explicitly described, is within the knowledge of those skilled in the relevant art.

[0198] Generally, terms can be understood at least in part from their usage in context. For example, as used herein, the term "one or more" depends at least in part on context and can be used to describe any feature, structure, or characteristic in a singular sense or can be used to describe a combination of features, structures, or characteristics in a plural sense. Similarly, depending at least in part on context, terms such as "a", "an", or "the" can also be understood to express a singular usage or a plural usage.

[0199] In addition, the term "based on" can be understood as not necessarily intended to express a set of exclusive factors, but rather, alternatively, can also depend at least in part on context and allow for the existence of other factors that may not be explicitly described. It should also be noted in this specification that "connected / coupled" not only refers to one component being directly coupled to another component, but also refers to one component being indirectly coupled to another component through an intermediate component.

[0200] It should be noted that the terms "comprising" and "having" and their variations as used in the documents of the present invention are intended to cover non-exclusive inclusion. The terms "first", "second", etc. are used to distinguish similar objects and do not necessarily have to be used to describe a specific order or sequence, unless the context clearly indicates otherwise. It should be understood that such data can be interchanged under appropriate circumstances.

[0201] In addition, without conflict, the embodiments in the present invention and the features in the embodiments can be combined with each other. Moreover, in the above description, descriptions of well-known components and technologies are omitted to avoid unnecessarily confusing the concepts of the present invention. In each of the above embodiments, what each embodiment focuses on explaining is the difference from other embodiments. For the same / similar parts among the embodiments, reference can be made to each other.

[0202] The above description is only a preferred embodiment of the present invention. It should be pointed out that for those of ordinary skill in the art of this technology, without departing from the principle of the present invention, several improvements and refinements can still be made, and these improvements and refinements should also be regarded as the protection scope of the present invention.

Claims

1. An optoelectronic wafer bonding method, characterized in that, Comprising the following steps: Providing a photonic integrated circuit wafer, the photonic integrated circuit wafer comprising a plurality of photonic integrated circuit chips, each of the photonic integrated circuit chips having a first region, a second region, and a third region arranged in sequence along a first direction, the first region being provided with a conductive structure, and the second region being provided with a waveguide extending along the first direction; Forming a trench in the third region, and the sidewall of the trench exposing the waveguide; Providing an electronic integrated circuit chip, and bonding the lower surface of the electronic integrated circuit chip to the upper surface of one of the photonic integrated circuit chips of the photonic integrated circuit wafer, the electronic integrated circuit chip being electrically connected to the conductive structure; Providing a reflective structure in the trench, such that light emitted by the waveguide can be emitted along a second direction after being reflected by the reflective structure, wherein the second direction is perpendicular to the first direction; Filling the trench with a light-transmitting material to form a light-transmitting layer covering the reflective structure, and light emitted by the waveguide is emitted along the second direction after being reflected by the reflective structure and propagates in the light-transmitting layer.

2. The method according to claim 1, characterized in that, The conductive structure further comprises: A first conductive pad provided on the upper surface of the photonic integrated circuit chip; A through-silicon via, one end of which is electrically connected to the first conductive pad, and the other end of which extends perpendicularly to the upper surface into the photonic integrated circuit chip.

3. The method according to claim 1, characterized in that, The light-transmitting layer further covers the upper surface of the electronic integrated circuit chip.

4. The method according to claim 1, characterized in that, In the step of coating the trench with a light-transmitting material to form a light-transmitting layer, the following steps are further included: Providing an optical fiber welding area on the surface of the light-transmitting layer, and light emitted by the waveguide is emitted along the second direction after being reflected by the reflective structure and propagates in the light-transmitting layer to the optical fiber welding area.

5. The method according to claim 1, characterized in that In the step of providing a reflective structure in the trench, the following steps are further included: Providing a reflective structure, the reflective structure comprising an inclined surface provided with a reflective layer; disposing the reflective structure in the trench, and the reflective layer being opposite to the waveguide, such that light emitted by the waveguide can be emitted along the second direction after being reflected by the reflective layer.

6. The method according to claim 1, characterized in that, In the step of providing a reflective structure in the trench, the following steps are further included: Filling the trench with a polymer substrate and performing photolithography to form a reflective structure, and the reflective structure comprising an inclined surface opposite to the waveguide; Providing a reflective layer on the inclined surface.

7. The method according to claim 1, wherein In the step of forming a trench in the third region, the following steps are further included: retaining a part of the substrate of the third region to form the reflective structure, and the reflective structure comprising an inclined surface opposite to the waveguide, and providing a reflective layer on the inclined surface.

8. The method according to claim 5 or 6 or 7, characterized in that, The reflective layer is a metal layer.

9. The method according to claim 2, wherein The method further comprises the following steps: Providing a plurality of the electronic integrated circuit chips, and bonding the lower surfaces of the plurality of electronic integrated circuit chips to the upper surfaces of the respective photonic integrated circuit chips of the photonic integrated circuit wafer, and forming the reflective structure and the light-transmitting layer in the trench of each photonic integrated circuit chip.

10. The method according to claim 9, characterized in that The method further comprises the following steps: Thin the lower surface of the photon integrated circuit wafer so that the other end of the through-silicon via is exposed from the lower surface of the photon integrated circuit wafer.

11. The method according to claim 10, wherein In the step of thinning the lower surface of the photon integrated circuit wafer, the following steps are further included: Bond an auxiliary wafer on the surface of the light-transmitting layer; Thin the lower surface of the photon integrated circuit wafer so that the other end of the through-silicon via is exposed from the lower surface of the photon integrated circuit wafer; Set solder balls on the lower surface of the photon integrated circuit wafer; Remove the auxiliary wafer.

12. The method according to claim 10, characterized in that After the step of thinning the lower surface of the photon integrated circuit wafer, the following steps are further included: Cut the photon integrated circuit wafer to obtain a plurality of independent optoelectronic wafer bonding structures.

13. The method according to claim 1, characterized in that, The light-transmitting layer covers the upper surface of the reflective structure, or the upper surface of the reflective structure is flush with the upper surface of the light-transmitting layer.

14. An optoelectronic wafer bonding structure, characterized in that, Comprising: A photon integrated circuit chip, the photon integrated circuit chip having a first region, a second region, and a third region arranged in sequence along a first direction, the first region being provided with a conductive structure, the second region being provided with a waveguide extending along the first direction, the third region being formed with a trench, and the sidewall of the trench exposing the waveguide; An electronic integrated circuit chip, the lower surface of the electronic integrated circuit chip being bonded to the upper surface of the photon integrated circuit chip, and the electronic integrated circuit chip being electrically connected to the conductive structure; A reflective structure, disposed in the trench, capable of reflecting the light emitted by the waveguide along a second direction after being reflected by the reflective structure, wherein the second direction is perpendicular to the first direction; A light-transmitting layer, filling the trench and covering the reflective structure, and the light emitted by the waveguide is reflected by the reflective structure along the second direction and propagates in the light-transmitting layer.

15. The optoelectronic wafer bonding structure according to claim 14, wherein The conductive structure further includes: A first conductive pad, disposed on the upper surface of the photon integrated circuit chip; A through-silicon via, one end of which is electrically connected to the first conductive pad, and the other end of which is exposed from the lower surface of the photon integrated circuit chip.

16. The optoelectronic wafer bonding structure according to claim 14, wherein, Solder balls are further disposed on the lower surface of the photon integrated circuit chip.

17. The optoelectronic wafer bonding structure according to claim 14, wherein, The reflective structure includes an inclined surface, a reflective layer is disposed on the inclined surface, and the reflective layer is disposed opposite to the waveguide, so that the light emitted by the waveguide can be reflected along the second direction after being reflected by the reflective layer.

18. The optoelectronic wafer bonding structure according to claim 14, wherein, The light-transmitting layer also covers the upper surface of the electronic integrated circuit chip.

19. The optoelectronic wafer bonding structure according to claim 14, wherein, The light-transmitting layer covers the upper surface of the reflective structure, or the upper surface of the reflective structure is flush with the upper surface of the light-transmitting layer.

20. The optoelectronic wafer bonding structure according to claim 14, wherein, A fiber optic welding area is further disposed on the surface of the light-transmitting layer, and the light emitted by the waveguide is reflected by the reflective structure along the second direction and propagates in the light-transmitting layer to the fiber optic welding area.

21. A chip packaging method, characterized in that, Comprising the following steps: Provide a substrate, the upper surface of the substrate including a first packaging area and a second packaging area; Set a chip stacking structure in the first packaging area and an optoelectronic wafer bonding structure in the second packaging area, and the optoelectronic wafer bonding structure adopts the optoelectronic wafer bonding structure according to any one of claims 14 to 20.

22. The method according to claim 21, characterized in that, Further comprising the following steps: Form a plastic package on the surface of the substrate, the plastic package covering the chip stack structure and the optoelectronic wafer bonding structure, and exposing the upper surfaces of the chip stack structure and the optoelectronic wafer bonding structure.

23. The method according to claim 22, wherein Remove the plastic package in the corresponding area of the light reflecting structure of the optoelectronic wafer bonding structure, exposing the upper surface of the light reflecting structure.

24. The method according to claim 21, wherein It further includes the following steps: Weld an optical fiber to the optical fiber welding area.

25. A chip packaging structure, characterized in that, It includes: A substrate, the surface of the substrate including a first packaging area and a second packaging area; A chip stack structure, disposed in the first packaging area; An optoelectronic wafer bonding structure, disposed in the second packaging area, the optoelectronic wafer bonding structure adopting the optoelectronic wafer bonding structure according to any one of claims 14 to 20.

26. The chip packaging structure according to claim 25, wherein, It further includes: A plastic package, formed on the surface of the substrate, the plastic package covering the chip stack structure and the optoelectronic wafer bonding structure, and exposing the upper surfaces of the chip stack structure and the optoelectronic wafer bonding structure; An optical fiber, welded to the optical fiber welding area.

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