Information processing system, information processing method, and information processing program

Abstract

According to one embodiment of the present invention, an information processing system is provided. The information processing system is provided with at least one processor capable of executing a program so as to perform the following steps. In the acquisition step, test conditions of a first deterioration test performed on the secondary battery and test results based on the first deterioration test are acquired. The test condition includes a test time for performing the first deterioration test. The test result includes a capacitance degradation amount of the secondary battery. In the speed calculation step, the capacitance degradation speed of the secondary battery under the test condition is calculated on the basis of the capacitance degradation amount. In the estimating step, on the basis of the calculated capacitance degradation rate, the capacitance degradation rate of the secondary battery under at least one of untested conditions indicating the unacquired tested conditions is estimated. In the map generation step, on the basis of the calculated capacitance degradation speed and the estimated capacitance degradation speed, a degradation speed map indicating the correspondence between the test condition and the capacitance degradation speed is generated. In the priority calculation step, the priority of each of the untested conditions for performing the second degradation test is calculated on the basis of the generated degradation velocity map. In the candidate output step, candidates for the second deterioration test using at least one of the non-test conditions as the test condition are output so as to be selectable by the user on the basis of the calculated priority.

Description

Technical Field

[0001] The present invention relates to an information processing system, an information processing method, and an information processing program. Background Art

[0002] In Patent Document 1, there is disclosed a battery diagnostic device that aims to inform the degradation state of a battery while performing charge and discharge with a simple structure.

[0003] The battery diagnostic device includes: an SOC acquisition unit that acquires the SOC of the battery; a temperature acquisition unit that acquires the temperature of the battery; a storage unit that stores a degradation speed characteristic indicating the relationship between the temperature, SOC, and degradation speed of the battery; a diagnostic unit that specifies the degradation speed of the battery based on the acquired temperature, SOC, and degradation speed characteristic, and calculates the degradation degree of the battery by accumulating the degradation speed over a specified period; and an output unit that outputs information related to the degradation state of the battery based on the degradation degree.

[0004] Prior Art Documents

[0005] Patent Documents

[0006] Patent Document 1: Japanese Unexamined Patent Application Publication No. 2020-38138 Summary of the Invention

[0007] Problems to be Solved by the Invention

[0008] However, in the technology disclosed in Patent Document 1, the cost required for the battery tests necessary for generating the degradation speed characteristic may increase.

[0009] Technical Solution for Solving the Problems

[0010] According to one aspect of the present invention, an information processing system is provided.

[0011] In this information processing system, at least one processor capable of executing a program in a manner to perform the following steps is provided.

[0012] In an acquisition step, acquisition is performed of the test conditions of a first degradation test performed on a secondary battery and the test results based on the first degradation test.

[0013] The test conditions include the test time for performing the first degradation test.

[0014] The test results include the capacitance degradation amount of the secondary battery.

[0015] In a speed calculation step, based on the capacitance degradation amount, the capacitance degradation speed of the secondary battery under the test conditions is calculated.

[0016] In the estimation step, based on the calculated capacitance degradation rate, the capacitance degradation rate of the secondary battery under at least one of the untested conditions representing the unacquired test conditions is estimated.

[0017] In the graph generation step, based on the calculated capacitance degradation rate and the estimated capacitance degradation rate, a degradation rate graph representing the correspondence between the test conditions and the capacitance degradation rate is generated.

[0018] In the priority calculation step, based on the generated degradation rate graph, the priority of each of the untested conditions for performing the second degradation test is calculated.

[0019] In the candidate output step, based on the calculated priority, candidates for the second degradation test with at least one of the untested conditions as the test conditions are output in a user-selectable manner.

[0020] According to such a configuration, compared with the conventional test method, it is possible to obtain a degradation rate graph while reducing the test cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 is a structural diagram showing the information processing system 1.

[0022] Figure 2 is a block diagram showing the hardware configuration of the information processing device 2.

[0023] Figure 3 is a block diagram showing the hardware configuration of the user terminal 3.

[0024] Figure 4 is a diagram showing an example of the configuration of the degradation test device 4.

[0025] Figure 5 is a diagram showing an example of the functional units included in the processor 23.

[0026] Figure 6 is a flowchart showing an outline of the information processing executed in the information processing system 1.

[0027] Figure 7 is a flowchart showing the process of the exploration process.

[0028] Figure 8 is a flowchart showing the process of the correction process.

[0029] Figure 9 is a diagram showing an example of the estimation result of the time dependence of the capacitance degradation amount ΔC. DETAILED DESCRIPTION OF THE INVENTION

[0030] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0031] The various characteristic matters shown in the embodiments described below can be combined with each other.

[0032] However, the program for implementing the software appearing in this embodiment can be provided as a computer-readable non-transitory recording medium (Non-Transitory Computer-Readable Medium), can be provided in a manner that can be downloaded from an external server, or can be provided in a manner that the program is started by an external computer and its functions are implemented by a client terminal (so-called cloud computing).

[0033] In addition, in this embodiment, the so-called "unit" can include, for example, a component formed by combining hardware resources implemented by a circuit in a broad sense and information processing of software that can be specifically implemented by these hardware resources.

[0034] In addition, in this embodiment, various information is processed, and this information is represented, for example, by a physical value indicating a signal value of voltage / current, a high or low of a signal value that is an aggregate of bits of a binary number composed of 0 or 1, or quantum superposition (so-called qubit), and communication / operation can be performed on a circuit in a broad sense.

[0035] In addition, a circuit in a broad sense refers to a circuit implemented by at least appropriately combining a circuit, circuitry, a processor, and a memory, etc.

[0036] That is, it includes an application specific integrated circuit (ASIC), programmable logic devices (for example, simple programmable logic device (SPLD), complex programmable logic device (CPLD), and field programmable gate array (FPGA)), etc.

[0037] 1. Hardware Structure

[0038] In this section, the hardware structure will be described.

[0039] <Information Processing System 1>

[0040] Figure 1 is a structural diagram showing Information Processing System 1.

[0041] Information Processing System 1 includes an information processing device 2, a user terminal 3, and a degradation test device 4.

[0042] The information processing device 2, the user terminal 3, and the degradation test device 4 are configured to be able to communicate via an electrical communication line.

[0043] In one embodiment, the information processing system 1 is composed of one or more devices or components.

[0044] For example, if it is composed only of the information processing device 2, the information processing system 1 can be the information processing device 2.

[0045] Hereinafter, these components will be described.

[0046] <The information processing device 2>

[0047] Figure 2 It is a block diagram showing the hardware structure of the information processing device 2.

[0048] The information processing device 2 includes a communication unit 21, a storage unit 22, and a processor 23, and these components are electrically connected via a communication bus 20 inside the information processing device 2.

[0049] Each component will be further described.

[0050] The communication unit 21 is preferably a wired communication unit such as USB, IEEE1394, Thunderbolt (registered trademark), or wired LAN network communication, but may also include wireless LAN network communication, mobile communication such as 3G / LTE / 5G, and BLUETOOTH (registered trademark) communication as needed.

[0051] That is, it is more preferably implemented as a collection of these multiple communication units.

[0052] That is, the information processing device 2 communicates various information from the outside via the communication unit 21 and the network.

[0053] The storage unit 22 stores various information defined according to the above description.

[0054] For example, it can be implemented as a storage device such as a solid state drive (SSD) that stores various programs related to the information processing device 2 executed by the processor 23, or as a memory such as a random access memory (RAM) that stores information (parameters, arrays, etc.) temporarily required for program operations.

[0055] The storage unit 22 stores various programs or variables related to the information processing device 2 executed by the processor 23.

[0056] The processor 23 performs processing / control of the overall operations associated with the information processing apparatus 2.

[0057] The processor 23 is, for example, a Central Processing Unit (CPU) not shown in the figures.

[0058] The processor 23 realizes various functions related to the information processing apparatus 2 by reading a prescribed program stored in the storage unit 22.

[0059] That is, the software-based information processing stored in the storage unit 22 is specifically realized by the processor 23 as an example of hardware, and thus can be executed as each functional unit included in the processor 23.

[0060] These details will be further described in the next section.

[0061] In addition, the processor 23 is not limited to a single unit, and may be implemented in such a manner that there are multiple processors 23 for each function.

[0062] Alternatively, a combination thereof may be used.

[0063] <User terminal 3>

[0064] Figure 3 is a block diagram showing the hardware configuration of the user terminal 3.

[0065] The user terminal 3 includes a communication unit 31, a storage unit 32, a processor 33, a display unit 34, and an HMI device 35, and these components are electrically connected inside the user terminal 3 via a communication bus 30.

[0066] The descriptions of the communication unit 31, the storage unit 32, and the processor 33 are the same as those of the respective units in the information processing apparatus 2, and thus are omitted.

[0067] The display unit 34 may be included in the housing of the user terminal 3 or may be external.

[0068] The display unit 34 displays a screen of a Graphical User Interface (GUI) operable by the user.

[0069] Preferably, for example, depending on the type of the user terminal 3, a display device such as a CRT monitor, a liquid crystal display, an organic EL display, or a plasma display is used separately.

[0070] The HMI device 35 is a human machine interface device.

[0071] The HMI device 35 may be included in the housing of the user terminal 3 or may be external.

[0072] For example, the HMI device 35 can also be integrated with the display unit 34 and implemented as a touch panel.

[0073] If it is a touch panel, the user can input click operations, swipe operations, etc.

[0074] Of course, instead of the touch panel, a switch button, a mouse, a QWERTY keyboard, a voice recognition device, a gesture detection device, a gaze detection device, a biological signal detection device, a camera device, etc. can also be adopted.

[0075] That is, the HMI device 35 receives operation inputs made by the user.

[0076] The HMI device 35 transmits a signal corresponding to the operation input to the processor 33 via the communication bus 30 as a response.

[0077] The processor 33 can perform prescribed control or arithmetic operations as needed.

[0078] It can also be said that the HMI device 35 includes an input unit configured to be able to receive inputs from the user.

[0079] <Degradation test device 4>

[0080] Figure 4 is a diagram showing an example of the structure of the degradation test device 4.

[0081] The degradation test device 4 includes at least one thermostatic chamber 41, one reference thermostatic chamber 42, a charge and discharge device 43, and an impedance measurement device 44, and these constituent elements are configured to be able to communicate with each other.

[0082] Each of the thermostatic chambers 41 and the reference thermostatic chamber 42 is configured to be able to accommodate the secondary battery B.

[0083] The thermostatic chamber 41 is configured to be able to perform a degradation test on the secondary battery B.

[0084] The reference thermostatic chamber 42 is configured to be able to perform a degradation test on the secondary battery B, for example, in the same manner as the thermostatic chamber 41.

[0085] The reference thermostatic chamber 42 is configured to perform a degradation test on the secondary battery B based on the initial test conditions described later.

[0086] In addition, the secondary battery B can be any as long as it is configured to be chargeable and dischargeable, such as a lead storage battery, a nickel-cadmium storage battery, a lithium-ion storage battery, an air battery, etc.

[0087] The charge and discharge device 43 is configured to perform a degradation test on the secondary battery B by controlling the operations of the thermostatic chamber 41, the reference thermostatic chamber 42, and the secondary battery B.

[0088] The charge and discharge device 43 is configured to be able to control the temperatures of the thermostatic chamber 41 and the reference thermostatic chamber 42, for example, according to the test conditions of the degradation test.

[0089] In addition, the charge and discharge device 43 is configured to be able to control the charge and discharge of the secondary battery B according to the test conditions, such as the charge and discharge rate of the secondary battery B, and the voltage and current during charge and discharge.

[0090] The impedance measurement device 44 is configured to be able to measure the impedance and open circuit voltage (OCV) of the secondary battery B as the charge and discharge device 43 controls the secondary battery B.

[0091] The test conditions of the present embodiment include the test time for performing the first degradation test, the temperature of the thermostatic chamber 41 (in other words, the temperature of the secondary battery B), the current rate of the secondary battery B, the average SOC (State of Charge), and the SOC range.

[0092] These elements that define the test conditions are used as elements of the state space representing the test conditions when generating the degradation rate graph described later.

[0093] In addition, the test conditions may include elements other than the above elements as elements of such a state space.

[0094] For example, the test conditions may include the temperature control speed, temperature control time of the thermostatic chamber 41, etc., and the standby time when reaching the target SOC.

[0095] The test conditions are set within a preset test range.

[0096] The test range is, for example, the temperature range of the thermostatic chamber 41, the range of the current rate of the secondary battery B, the range of the average SOC, the value of the SOC range, etc.

[0097] 2. Functional Structure of the Information Processing Device 2

[0098] Figure 5 It is a diagram showing an example of the functional units included in the processor 23.

[0099] As Figure 5 shown, the processor 23 includes an acquisition unit 231, a speed calculation unit 232, an estimation unit 233, a priority setting unit 234, a priority calculation unit 235, a candidate output unit 236, a replacement determination unit 237, a correction unit 238, and a graph generation unit 239.

[0100] In this section, an overview of these functional units will be described.

[0101] The details of each functional unit will be described in conjunction with the information processing described later.

[0102] The acquisition unit 231 is configured to be able to acquire information from the user terminal 3, the degradation test device 4, or other devices.

[0103] The acquisition unit 231 is configured to be able to acquire various information by reading out various information stored in a storage area that is at least a part of the storage unit 22 and writing the read information into a work area that is at least a part of the storage unit 22.

[0104] The storage area refers to, for example, an area implemented as a storage device such as an SSD in the storage unit 22.

[0105] The work area refers to, for example, an area implemented as a memory such as a RAM.

[0106] In addition, the acquisition performed by the acquisition unit 231 includes acquiring the output results of each functional unit included in the processor 23.

[0107] The speed calculation unit 232 is configured to be able to calculate various information such as the capacitance degradation speed V based on the acquisition results of the acquisition unit 231.

[0108] The capacitance degradation speed V represents the amount of degradation per unit time of the battery capacitance C of the secondary battery B in a certain environment.

[0109] The estimation unit 233 is configured to be able to estimate various information such as the capacitance degradation speed V under a certain test condition based on various information such as the acquisition results of the acquisition unit 231 or the calculation results of the speed calculation unit 232.

[0110] The priority setting unit 234 is configured to be able to set the priority of the test conditions for the degradation test performed on the secondary battery B based on various information and the user's operations.

[0111] The priority calculation unit 235 is configured to be able to calculate the priorities corresponding to the test conditions respectively based on various information such as the priorities set by the priority setting unit 234.

[0112] Details of the priority will be described later.

[0113] The candidate output unit 236 is configured to be able to output various information such as candidates for the test conditions for the degradation test performed on the secondary battery B respectively.

[0114] This information can be presented to the user via the display unit 34 of the user terminal 3 or other devices.

[0115] In this case, for example, the candidate output unit 236 controls to display visual information such as a screen, an image including a still image or a moving image, an icon, a message, etc. on the display unit 34 of the user terminal 3.

[0116] The candidate output unit 236 may also generate only rendering information for displaying visual information on the user terminal 3.

[0117] In addition, the candidate output unit 236 may prompt the user with the output information without going through the user terminal 3 or other device users.

[0118] The replacement determination unit 237 is configured to be able to perform determination related to whether or not to replace the secondary battery B undergoing the degradation test based on various information.

[0119] The correction unit 238 is configured to be able to correct the estimation result based on the estimation unit 233 and the like based on various information.

[0120] The graph generation unit 239 is configured to be able to generate a degradation rate graph showing the correspondence between the degradation rate of the secondary battery B and the test conditions based on the calculation result of the speed calculation unit 232, the estimation result of the estimation unit 233, the correction result of the correction unit 238, and the like.

[0121] The update of the degradation rate graph is a form of the generation of the degradation rate graph.

[0122] The classification unit 240 is configured to classify the test conditions based on various information.

[0123] 3. Regarding information processing

[0124] In this section, the information processing executed in the above-described information processing system 1 will be described.

[0125] 3.1. Regarding the flow of information processing

[0126] Figure 6 It is a flowchart showing an outline of the flow of information processing executed in the information processing system 1.

[0127] In addition, this information processing may include any exception processing not shown.

[0128] Exception processing includes interruption of this information processing and omission of each process.

[0129] The selection or input performed by this information processing may be based on an operation performed by the user or may be automatically performed without depending on the user's operation.

[0130] [Step S1]

[0131] First, the process proceeds to step S1, and the processor 23 measures the initial capacitance C_ini of the secondary battery B respectively stored in the thermostat 41 and the reference thermostat 42 in advance.

[0132] These secondary batteries B have not undergone a degradation test in the past.

[0133] For example, the processor 23 first controls the thermostat 41 and the reference thermostat 42 to bring the temperature of the secondary battery B to a specified set temperature.

[0134] Next, the processor 23 sets the current value used for charging and discharging the secondary battery B based on the nominal capacity C_noninal of the secondary battery B.

[0135] Next, the processor 23 performs constant current and constant voltage charging until the SOC reaches 100% at the set current value and constant current and constant voltage discharging until the SOC reaches 0%, and sets the discharge capacitance at this time as the initial capacitance C_ini.

[0136] [Step S2]

[0137] Next, the process proceeds to step S2, and the processor 23, as the acquisition unit 231, acquires the preset initial test conditions.

[0138] The initial test conditions are the test conditions for the initial degradation test.

[0139] Hereinafter, for the sake of convenience of explanation, the degradation test performed until the previous time is referred to as the first degradation test, and the degradation test to be executed next is referred to as the second degradation test.

[0140] The above-mentioned initial test is an example of the first degradation test.

[0141] In addition, the first degradation test can also be said to be a degradation test performed in the past.

[0142] [Step S3]

[0143] Next, the process proceeds to step S3, and the processor 23 executes the degradation test based on the acquired initial test conditions.

[0144] The test results of the executed degradation test and its test conditions are stored in the storage unit 22 or the like, for example.

[0145] [Step S4]

[0146] Next, the process proceeds to step S4, and the processor 23 measures the capacitance degradation amount ΔC of each secondary battery B obtained through the degradation test in step S3.

[0147] The measurement method is arbitrary. For example, the processor 23 measures the battery capacitance C after the degradation test by the same method as measuring the initial capacitance C_ini, and subtracts the battery capacitance C from the initial capacitance C_ini to measure the capacitance degradation amount ΔC.

[0148] In addition, the measurement of the battery capacitance C and the capacitance degradation amount ΔC of the secondary battery B is not limited to being directly performed by the processor 23.

[0149] For example, the processor 23 can also control the degradation test device 4 in such a way that the charge / discharge device 43 and the impedance measurement device 44 measure the battery capacitance C, etc., and obtain the measurement results output from the degradation test device 4.

[0150] [Step S5]

[0151] Next, the process proceeds to step S5. The processor 23, as the speed calculation unit 232, calculates the capacitance degradation speed V of each secondary battery B based on the initial test conditions and the capacitance degradation amount ΔC.

[0152] [Step S6]

[0153] Next, the process proceeds to step S6. The processor 23, as the estimation unit 233, estimates the capacitance degradation speed V under untested conditions based on the calculated capacitance degradation speed V.

[0154] The untested conditions represent test conditions that have not been obtained in the present information processing in the past. For example, they are test conditions for which test results are not stored in the storage unit 22 or the like.

[0155] The method for estimating the capacitance degradation speed V under untested conditions is arbitrary. For example, the processor 23 performs machine learning by using the calculated capacitance degradation speed V as learning data, and generates and updates a learned model representing a physical model of the preset secondary battery B.

[0156] The learned model is configured to output parameters related to the secondary battery B, such as the capacitance degradation speed V, by inputting test conditions.

[0157] The processor 23 estimates the capacitance degradation speed V under untested conditions by inputting the untested conditions into such a learned model.

[0158] The specific method for generating and updating the learned model is arbitrary. For example, linear regression, ridge regression, Gaussian process regression, neural networks, support vector machines, etc. can be cited.

[0159] For example, the method for estimating the capacitance degradation speed V based on Gaussian process regression can be cited as the method disclosed in non-patent literature such as “J. Wang, D. Fleet, and A. Hertzmann, “Gaussian Process Dynamical Models”, NIPS 2005” etc.

[0160] In addition, the processor 23 can also estimate the capacitance degradation speed V under untested conditions based on the calculated capacitance degradation speed V by using a statistical method based on the above regression analysis without relying on machine learning or the like.

[0161] [Step S7]

[0162] Next, the process proceeds to step S7. The processor 23, acting as the graph generation unit 239, generates a degradation rate graph M based on the test conditions and the capacitance degradation rate V corresponding to the test conditions.

[0163] The degradation rate graph M represents the correspondence between the test conditions and the capacitance degradation rate V.

[0164] The degradation rate graph M can be in any form such as a function, a lookup table, a learned model, etc.

[0165] In addition, in the case where there is an existing degradation rate graph M, the processor 23 can also update the existing degradation rate graph M to the generated degradation rate graph M.

[0166] [Step S8]

[0167] Next, the process proceeds to step S8. The processor 23, acting as the acquisition unit 231, obtains information related to the first degradation test by referring to the storage unit 22 and the like.

[0168] For example, the processor 23, acting as the acquisition unit 231, obtains the test conditions of the first degradation test performed on the secondary battery B and the test results obtained from the first degradation test.

[0169] Specifically, the processor 23 obtains the test conditions of multiple first degradation tests performed on multiple secondary batteries B respectively and the respective capacitance degradation amounts ΔC of the secondary batteries obtained from the multiple first degradation tests.

[0170] In the present embodiment, the processor 23 not only obtains the test conditions and test results of the most recent first degradation test, but also obtains the history of the first degradation tests performed on the secondary battery B.

[0171] The history of the first degradation tests includes the test conditions and test results of multiple first degradation tests performed in the past.

[0172] [Step S9]

[0173] Next, the process proceeds to step S9. The processor 23 determines whether the information related to the first degradation test has been accumulated more than a specified number based on the obtained test conditions and test results of the first degradation test.

[0174] For example, when the processor 23 performs any of the processes included in this information processing more than a specified number of times on one secondary battery B, it is determined that the past test results have been accumulated more than a specified number.

[0175] The specified number can be arbitrarily set according to the accuracy of the information related to the measurement error, and is 2 or more, more preferably 3 or more.

[0176] [Step S10]

[0177] When it is determined that the cumulative number of past test results is equal to or greater than a specified number, the process proceeds to Step S10. As a classification unit 240, the processor 23 classifies candidates for test conditions of the second degradation test according to the measurement error of the capacitance degradation amount ΔC.

[0178] Here, an example of the process of Step S10 will be described.

[0179] First, the processor 23 makes a determination related to the measurement error of the capacitance degradation amount ΔC for each test condition.

[0180] Thereby, the processor 23 classifies the test conditions that belong to the first classification indicating a large measurement error and the test conditions that belong to the second classification indicating a small measurement error among the test conditions within the exploration range.

[0181] For example, the processor 23 makes this determination based on (1) whether the estimated result of the current capacitance degradation rate V is less than or equal to the average value of the estimated results of the capacitance degradation rate V under all test conditions, and (2) whether the absolute value of the difference between the estimated result of the current capacitance degradation rate V and the estimated result of the previous capacitance degradation rate V under the test condition in question is less than or equal to a specified multiple (0 or more and less than 1) of the estimated result of the current capacitance degradation rate V.

[0182] The processor 23 determines that the test conditions that satisfy both conditions (1) and (2) belong to the test conditions of the first classification and classifies them.

[0183] On the other hand, the processor 23 determines that the test conditions that do not satisfy at least one of conditions (1) and (2) belong to the test conditions of the second classification and classifies them.

[0184] (1) is a condition indicating whether the test condition has a large relative measurement error of the capacitance degradation amount ΔC.

[0185] It is a condition based on the following idea: the measurement error of the battery capacitance is generated at a constant level regardless of the magnitude of the degradation amount.

[0186] (2) is a condition indicating whether the change in the estimated result of the capacitance degradation rate V under the test condition is small relative to the past estimated result, indicating the stability of the estimated result.

[0187] In addition, the processor 23 can also extract the test conditions common to temperature, average SOC, and SOC amplitude, and classify the extracted test conditions based on a specific test condition among the extracted test conditions.

[0188] For example, the processor 23 processes the test condition with a higher current rate among the extracted test conditions (specifically, the highest test condition) as a specific test condition.

[0189] Moreover, when the processor 23 classifies the specific test condition as the first classification as the classification unit 240, the processor 23 classifies the test conditions with a current rate lower than the specific test condition among the extracted test conditions (in this case, all the extracted test conditions) as the first classification in the same way as the specific test condition.

[0190] At this time, even if there are test conditions among the extracted test conditions that are not classified as the first classification, the processor 23 classifies the test conditions that meet the above conditions among the extracted test conditions as the first classification.

[0191] This is because the capacitance degradation rate V increases monotonically with respect to the current rate regardless of the type of the secondary battery B. In other words, there is a tendency that the smaller the current rate, the smaller the capacitance degradation rate V.

[0192] Thereby, the load of the classification process can be reduced.

[0193] [Step S11]

[0194] After step S10, the process proceeds to step S11.

[0195] On the other hand, when it is determined that the number of past test results has not accumulated more than a specified number, the process of step S10 is omitted, and the process proceeds to step S11.

[0196] In step S11, the processor 23 sets the priority as the priority setting unit 234.

[0197] The priority functions as an index when exploring candidates for the test conditions of the second degradation test described later.

[0198] The priority is defined by at least one parameter representing the advantages or disadvantages based on the second degradation test, such as the reliability of the degradation rate map M obtained by performing the second degradation test on the secondary battery B and the cost of performing the second degradation test.

[0199] The priority of the present embodiment is defined by at least the standard deviation of the capacitance degradation rate V estimated by the estimation unit 233, the slope of the capacitance degradation rate V in the degradation rate map M, and the reciprocal of the capacitance degradation rate V.

[0200] For example, the priority is defined by the weighted linear sum of these parameters.

[0201] The processor 23 performs normalization of the parameters so that these parameters can be compared with each other. For example, the processor 23 processes them so that these parameters each take a value from 0 to 1.

[0202] Hereinafter, for ease of explanation, the "slope of the capacitance degradation rate V in the degradation rate graph M" will be simply referred to as the "slope of the capacitance degradation rate V".

[0203] The slope of the capacitance degradation rate V can also be said to be the differential value (or gradient) of the capacitance degradation rate V with respect to a parameter that represents a certain test condition in the limit.

[0204] The slope of the capacitance degradation rate V can be represented by a scalar, can also be represented by a vector such as a gradient vector, and can also be represented by a higher-order tensor.

[0205] The standard deviation of the capacitance degradation rate V represents the reliability of the estimation result of the capacitance degradation rate V under this test condition.

[0206] It is indicated that as this value increases, the reliability of the estimation result of the capacitance degradation rate V under this test condition will decrease.

[0207] Therefore, for test conditions with lower reliability of the estimation result of the capacitance degradation rate V, it is more preferable to calculate the capacitance degradation rate V through a degradation test.

[0208] Therefore, the priority is set such that the larger the standard deviation of the capacitance degradation rate V, the greater this priority.

[0209] In other words, the standard deviation of the capacitance degradation rate V is one of the statistics of the capacitance degradation rate V and is one of the parameters representing the reliability of the degradation rate graph M obtained by performing a second degradation test on the secondary battery B.

[0210] The slope of the capacitance degradation rate V represents the degree of change in the degradation rate around the test condition.

[0211] There is a tendency that the accuracy of the estimation result of the capacitance degradation rate V around this test condition decreases as this value increases.

[0212] Therefore, the slope of the capacitance degradation rate V is one of the parameters representing the reliability of the degradation rate graph M obtained by performing a second degradation test on the secondary battery B.

[0213] Under test conditions where the slope of the capacitance degradation rate V is large, by performing a degradation test, the calculation result of the capacitance degradation rate V can be made more abundant, and the estimation accuracy of the degradation rate graph M can be efficiently improved.

[0214] Therefore, the priority is set to increase as the slope of the capacitance degradation rate V increases.

[0215] A method for calculating the standard deviation and slope of the capacitance degradation rate V based on the capacitance degradation amount ΔC of the first degradation test is a way to obtain the reliability of the generated degradation rate graph M.

[0216] Therefore, the reliability of the degradation rate graph M is calculated based on at least one of the statistic of the calculated capacitance degradation rate V and the slope of the calculated capacitance degradation rate V with respect to the parameter related to the test conditions of the degradation rate graph M.

[0217] The reciprocal of the capacitance degradation rate V indicates that the load on the secondary battery B based on the degradation test is small, and it is one of the indicators representing the cost of performing the second degradation test.

[0218] The larger the value of the reciprocal of the capacitance degradation rate V, the smaller the capacitance degradation amount ΔC under the constant test time in the degradation test.

[0219] Therefore, the larger this value, the smaller the load applied to the secondary battery B through the corresponding degradation test, and thus it is easy to perform more degradation tests on one secondary battery B.

[0220] The correspondence between the priority and these parameters is specified by the priority correspondence.

[0221] The priority correspondence of this embodiment represents the correspondence between the priority and the reliability of the degradation rate graph M obtained from the second degradation test on the secondary battery B and the cost of performing this second degradation test. For example, it is specified by the weights (in other words, coefficients) of the respective parameters in the linear sum included in the priority.

[0222] In this embodiment, the processor 23, as the priority setting unit 234, sets the priority correspondence based on the user's designation.

[0223] For example, the user specifies the weights of the respective parameters included in the priority through input to the HMI device 35.

[0224] The processor 23 updates the weights of the respective parameters included in the priority correspondence to make them the specified weights, and sets the priority based on the updated parameters.

[0225] The processor 23, as the priority calculation unit 235, calculates the priority based on the set priority correspondence.

[0226] [Step S12]

[0227] Next, the process proceeds to step S12. The processor 23 calculates the priority corresponding to the test conditions only within the exploration range based on the set priority, and explores the candidates for the test conditions of the second degradation test to be performed on each secondary battery B based on this priority.

[0228] Hereinafter, for the sake of convenience, the process of exploring the candidate will be simply referred to as the exploration process.

[0229] In other words, as the priority calculation unit 235, the processor 23 calculates the priority of each untested condition for the second degradation test based on the generated degradation rate map M.

[0230] In the present embodiment, the processor 23 calculates the priority of each untested condition for the second degradation test based on at least one of the reliability of the degradation rate map M obtained by further performing the second degradation test on the secondary battery B under at least one untested condition and the cost of performing the second degradation test.

[0231] In addition, in step S10, when classifying the test conditions for the second degradation test, the exploration range is limited to the test conditions belonging to one of the classifications.

[0232] In the present embodiment, the test conditions classified as having a smaller measurement error are used as the exploration range.

[0233] [Step S13]

[0234] Next, the process proceeds to step S13, and the processor 23, as the candidate output unit 236, outputs the exploration result in step S10.

[0235] Thereby, based on the calculated priority, the processor 23 outputs, in a user-selectable manner, candidates for the second degradation test with at least one of the untested conditions as the test conditions.

[0236] In the present embodiment, the candidates for the second degradation test output are presented to the user via the display unit 34.

[0237] The user can select the candidates for the second degradation test displayed on the display unit 34 by operating the HMI device 35.

[0238] For example, the processor 23 outputs the candidates whose calculated priority is higher than a specified threshold and the top n candidates (n is an arbitrary natural number) in a manner that the user can grasp preferentially.

[0239] [Step S14]

[0240] Next, the process proceeds to step S14, and the acquisition unit 231 acquires the selection of the test conditions from the user in step S13.

[0241] [Step S15]

[0242] Next, the process proceeds to step S15, and the processor 23 sets the test conditions for each thermostat 41 and the reference thermostat 42 based on the acquired selection of the test conditions.

[0243] The processor 23 of the present embodiment sets reference test conditions for the reference thermostat 42.

[0244] The reference test conditions are common in the first degradation test and the second degradation test, and are set to perform a degradation test on the secondary battery B housed in the reference thermostat 42 under the same test conditions.

[0245] The reference test conditions of the present embodiment are consistent with the initial test conditions for the secondary battery B housed in the reference thermostat 42 in step S3.

[0246] In other words, at least one of the test conditions is a reference test condition set independently of the candidate test conditions selected by the user.

[0247] [Step S16]

[0248] Next, the process proceeds to step S16, and the processor 23, as the replacement determination unit 237, determines whether it is necessary to replace the secondary battery B housed in the thermostat 41 or the reference thermostat 42.

[0249] For example, when the ratio (C_deg_total / C_ini) of the total capacitance degradation amount ΔC obtained from past degradation tests (the so-called total degradation amount) to the initial capacitance C_ini becomes equal to or greater than a predetermined value, the processor 23 determines that it is necessary to replace the secondary battery B.

[0250] On the other hand, when C_deg_total / C_ini is lower than the predetermined value, the processor 23 determines that it is not necessary to replace the secondary battery B.

[0251] The predetermined value can be set arbitrarily.

[0252] In this way, the processor 23, as the replacement determination unit 237, determines whether to replace the secondary battery B for the degradation test based on the obtained capacitance degradation amount ΔC.

[0253] [Step S17]

[0254] When it is determined that at least one secondary battery B needs to be replaced, the process proceeds to step S17, and the replacement determination unit 237 prompts the user through the display unit 34 to replace the secondary battery B that needs to be replaced, and requests the replacement of the secondary battery B.

[0255] After that, when the user replaces the secondary battery B, the process proceeds to step S18.

[0256] [Step S18]

[0257] In step S18, the processor 23 measures the initial capacitance C_ini of the replaced secondary battery B.

[0258] The method for measuring the initial capacitance C_ini is arbitrary. For example, it is the same as the method described in step S1.

[0259] After that, the process proceeds to step S19.

[0260] In addition, when it is determined that no secondary battery B needs to be replaced, the processes of step S17 and step S18 are omitted, and the process proceeds to step S19.

[0261] [Step S19]

[0262] In step S19, the processor 23 performs a second degradation test on each secondary battery B based on the test conditions set in step S15.

[0263] [Step S20]

[0264] Next, the process proceeds to step S20, and the processor 23 measures the capacitance degradation amount ΔC of each secondary battery B based on the second degradation test.

[0265] The test result including this measurement result and the corresponding second test conditions are stored in the storage unit 22 or the like.

[0266] The processor 23, as an acquisition unit 231, acquires the test conditions of the first degradation test performed on the secondary battery B and the test results based on the first degradation test by referring to the storage unit 22 or the like.

[0267] The test results include the capacitance degradation amount ΔC of the secondary battery B.

[0268] [Step S21]

[0269] Next, the process proceeds to step S21, and the processor 23, as a speed calculation unit 232, calculates the capacitance degradation speed V of the secondary battery B under the test conditions based on the capacitance degradation amount ΔC.

[0270] For example, the processor 23 calculates the capacitance degradation speed V based on the test time ΔT of the previously performed second degradation test, the capacitance degradation amount ΔC obtained from the second degradation test, and the cumulative capacitance degradation amount ΔC_T which is the cumulative value of the capacitance degradation amount ΔC until the second degradation test is performed.

[0271] In the present embodiment, the processor 23 further calculates the cumulative test time T_s which is the cumulative value of the test times of the first degradation tests performed on the secondary battery B in the past.

[0272] The cumulative test time T_s is defined, for example, as the time until the capacitance degradation amount ΔC of a new secondary battery B that has not undergone a degradation test reaches the cumulative capacitance degradation amount ΔC_T.

[0273] The cumulative capacitance deterioration amount ΔC_T and the cumulative test time T_s are one way of the history of the first deterioration test.

[0274] Therefore, it can be said that the speed calculation unit 232 of the processor 23 also calculates the capacitance deterioration speed V based on the history.

[0275] For example, the processor 23 calculates the capacitance deterioration speed V and the cumulative test time T_s based on the time dependence of the battery capacitance C and its first-order variation as follows.

[0276] [Mathematical formula 1]

[0277]

[0278] [Mathematical formula 2]

[0279] ΔC T +ΔC = V × (T s +ΔT) a

[0280] a is the order of the time dependence of the cumulative capacitance deterioration amount ΔC_T with respect to the capacitance deterioration speed V.

[0281] Based on these conditional expressions, the capacitance deterioration speed V and the cumulative test time T_s are obtained as follows.

[0282] [Mathematical formula 3]

[0283]

[0284] [Mathematical formula 4]

[0285]

[0286] In this embodiment, the initial value of α is set to 0.5.

[0287] [Step S22]

[0288] Next, the process proceeds to step S22. The processor 23, as the estimation unit 233, estimates the capacitance deterioration speed V of the secondary battery B under the test conditions of the second deterioration test based on the calculated capacitance deterioration speed V.

[0289] As described above, the set test conditions are untested conditions.

[0290] Therefore, the processor 23, as the estimation unit 233, estimates the capacitance deterioration speed V of the secondary battery B under at least one of the untested conditions representing unacquired test conditions based on the calculated capacitance deterioration speed V.

[0291] The measured capacitance degradation amount ΔC, the calculated capacitance degradation speed V, and the estimated capacitance degradation speed V are stored in the storage unit 22 etc. in a state associated with each test condition as test results.

[0292] [Step S23]

[0293] Next, the process proceeds to step S23, and the processor 23 determines whether there is a test result of a first degradation test other than the degradation test performed in step S3 as a past test result by referring to the storage unit 22 etc.

[0294] In other words, the processor 23 determines whether the process of step S19 has been performed in the past during a series of information processing.

[0295] [Step S24]

[0296] If it is determined that there is a test result of a first degradation test other than the degradation test performed in step S3, the process proceeds to step S24, and the processor 23 performs a correction process on the estimated result of the capacitance degradation speed V in step S22 as the correction unit 238.

[0297] Thereby, the processor 23, as the correction unit 238, corrects the calculated capacitance degradation speed V of the secondary battery B based on the capacitance degradation amount ΔC of the secondary battery B obtained from the first degradation test under the reference test conditions, and outputs the corrected capacitance degradation speed V.

[0298] The processor 23 corrects the calculated or estimated capacitance degradation speed V in such a way that, for example, the order a is updated by this correction process, and the time dependence represented by the updated order a is shown.

[0299] Details of this correction process will be described later.

[0300] After that, the process proceeds to step S25.

[0301] In addition, if it is determined that there is no test result of a first degradation test other than the degradation test performed in step S3, the process of step S24 is omitted, and the process proceeds to step S25.

[0302] [Step S25]

[0303] Next, the process proceeds to step S25, and the processor 23 generates a degradation speed graph M based on the calculated capacitance degradation speed V and the estimated capacitance degradation speed V as the graph generation unit 239.

[0304] In the present embodiment, since the degradation speed graph M has already been generated in step S7, the processor 23 updates the existing degradation speed graph M to the newly generated degradation speed graph M.

[0305] [Step S26]

[0306] Next, the process proceeds to step S26, and the processor 23 determines whether the past test results have accumulated more than a specified number.

[0307] The past test results and the specified number are the same as the test results and the specified number used in the determination in step S9.

[0308] [Step S27]

[0309] If it is determined that the past test results have accumulated more than a specified number, the process proceeds to step S27, where the measurement error of the capacitance degradation amount ΔC under untested conditions is determined, and the untested conditions with larger measurement errors are extracted.

[0310] The specific method of this process is arbitrary. For example, the processor 23 estimates the measurement error of the capacitance degradation amount ΔC under untested conditions based on the degradation rate graph in the same way as in step S10. As the classification unit 240, the untested conditions are classified into a first classification and a second classification according to the estimation result, and the untested conditions classified as the first classification are extracted as the untested conditions with larger measurement errors.

[0311] When performing such classification, the processor 23 classifies at least based on the condition of (2) above.

[0312] Therefore, this classification reflects the reliability of the degradation rate graph.

[0313] [Step S28]

[0314] Next, the process proceeds to step S28, and the processor 23 estimates the capacitance degradation rate V under untested conditions belonging to the first classification based on the reliability of the above-mentioned degradation rate graph M and the above-mentioned measurement error, and updates the degradation rate graph M based on the estimation result.

[0315] For example, the processor 23 adds the estimated capacitance degradation rate V based on the existing degradation rate graph M as the learning data of the degradation rate graph M.

[0316] Thereby, the processor 23 updates the learned model representing the physical model of the secondary battery B.

[0317] Then, based on the updated learned model, the processor 23 regenerates the degradation rate graph M again and updates the existing degradation rate graph M.

[0318] In this way, by adding the estimated value of the capacitance degradation rate V that ensures a constant level of accuracy as learning data, the accuracy of the degradation rate graph M can be further improved.

[0319] In other words, the processor 23, as the estimation unit 233, estimates the capacitance degradation rate V of the secondary battery B under untested conditions based on the degradation rate map M, and as the classification unit 240, classifies the untested conditions into a first classification and a second classification based on the estimated capacitance degradation rate V of the secondary battery B.

[0320] Here, the first classification is a classification representing untested conditions with a large error in the capacitance degradation rate V compared to untested conditions belonging to the second classification.

[0321] Then, the processor 23, as the map generation unit 239, updates the degradation rate map M based on the reliability of the degradation rate map M and the capacitance degradation rate V estimated at least for untested conditions belonging to the first classification.

[0322] According to such a structure, it is possible to update the degradation rate map M using the estimation result of the capacitance degradation rate V for untested conditions with a large error in the capacitance degradation rate V, and thus it is possible to further improve the accuracy of the degradation rate map M.

[0323] In the present embodiment, the processor 23 actually conducts a degradation test in a region of test conditions with a small measurement error of the capacitance degradation rate V, and uses an estimation result of the capacitance degradation rate V with a higher reliability than that of test conditions with a larger measurement error to add learning data corresponding to the test conditions.

[0324] The processor 23 updates the degradation rate map M using the newly added learning data based on such test results and estimation results.

[0325] Thereby, the accuracy of the degradation rate map can be further improved.

[0326] Here, an example of the process for extracting test conditions for estimating the capacitance degradation rate V from test conditions belonging to the first classification will be described.

[0327] First, the processor 23 initially sets the extraction number of test conditions.

[0328] The extraction number is arbitrary, for example, if it is less than the total number of test conditions of the degradation tests performed so far.

[0329] Next, one of the parameters with a specified priority (the standard deviation of the capacitance degradation rate V in the present embodiment) with the largest value is selected for the test condition.

[0330] Next, the processor 23 obtains the capacitance degradation rate V under the selected test condition as the virtual capacitance degradation rate V_m based on the latest degradation rate map M.

[0331] Next, the processor 23 appends the obtained virtual capacitance degradation rate V_m to the learning data and updates the standard deviation of the capacitance degradation rate V.

[0332] As a result, sometimes the standard deviation of the capacitance degradation rate V around the selected test conditions becomes smaller.

[0333] After that, the processor 23 selects again, in the updated state, the test condition with the largest standard deviation of the capacitance degradation rate V until the number of the selected test conditions reaches the extraction number, and repeats the above process.

[0334] Thus, by reflecting the test conditions for which the degradation test is not actually performed in the degradation rate graph M, the cost of the degradation test can be reduced and the accuracy of the degradation rate graph M can be improved.

[0335] [Step S29]

[0336] Next, the process proceeds to step S29, and the processor 23 determines whether the end condition has been reached.

[0337] The end condition is arbitrary. For example, when the average value of the standard deviations of the capacitance degradation rates V under all the test conditions within the exploration range in the latest degradation rate graph M becomes equal to or less than a specified ratio with respect to the average value of the standard deviations of the capacitance degradation rates V in the initial degradation rate graph M, the processor 23 determines that the end condition is satisfied.

[0338] The specified ratio can be set arbitrarily, such as 1%, 5%, 10%, etc.

[0339] When it is determined that the end condition is satisfied, the information processing system 1 outputs the latest degradation rate graph M as the final result and ends this information processing.

[0340] On the other hand, when it is determined that the end condition is not satisfied, the process returns to step S8, and by repeating the above process, a second degradation test is further performed to update the degradation rate graph M.

[0341] In this cycle, the processor 23 processes the second degradation test performed in the most recent step S19 as the first degradation test.

[0342] By processing such information, the test results of the first degradation test and the like are accumulated in the storage unit 22 and the like.

[0343] 3.2. Details of the exploration process

[0344] In this chapter, the details of the exploration process in step S12 are described.

[0345] Figure 7It is a flowchart showing the process of exploration processing.

[0346] [Step S101]

[0347] First, in step S101, the processor 23 determines whether the exploration object, which is a candidate for the test conditions, is the first secondary battery B.

[0348] When the exploration object is the first secondary battery B, the virtual capacitance degradation rate V_m described later is not generated.

[0349] Therefore, the processor 23 can also determine whether the virtual capacitance degradation rate V_m has been generated.

[0350] When it is determined that the exploration object, which is a candidate for the test conditions, is the first secondary battery B, the process proceeds to step S102.

[0351] On the other hand, when it is determined that the exploration object, which is a candidate for the test conditions, is not the first secondary battery B, in other words, the exploration object is the second transferred secondary battery B, the process proceeds to step S110.

[0352] [Step S102]

[0353] Here, the case where the exploration object, which is determined as a candidate for the test conditions in time series, is the first secondary battery B and the process proceeds to step S102 will be described.

[0354] In step S102, the processor 23 calculates the standard deviation, slope, and reciprocal of the capacitance degradation rate V for each test condition based on the estimated result of the existing capacitance degradation rate V, and performs normalization.

[0355] In addition, the specific manner of these processes is as described above.

[0356] [Step S103]

[0357] Next, the process proceeds to step S103, and the processor 23 calculates the priority for each test condition based on the normalized values.

[0358] The priority uses the priority set in step S11.

[0359] [Step S104]

[0360] Next, the process proceeds to step S104, and the processor 23 assigns the test condition with the highest priority to the secondary battery B that is the exploration object.

[0361] In addition, the candidates for the assigned test conditions are not limited to one, and can also be multiple.

[0362] [Step S105]

[0363] Next, the process proceeds to step S105, and the processor 23 determines whether test conditions have been assigned to all of the secondary batteries B.

[0364] [Step S106]

[0365] If it is determined that test conditions have not been assigned to all of the secondary batteries B, the process proceeds to step S106, and based on the latest deterioration rate map M, the capacitance deterioration rate V under the assigned test conditions is estimated.

[0366] [Step S107]

[0367] Next, the process proceeds to step S107, and the processor 23 adds the newly estimated capacitance deterioration rate V as learning data to the capacitance deterioration rate V used for generating the deterioration rate map M.

[0368] [Step S108]

[0369] Next, the process proceeds to step S108, and the processor 23 generates a virtual deterioration rate map M based on the added capacitance deterioration rate V.

[0370] Accordingly, the optimal test conditions during the assigned deterioration test can be assigned to other secondary batteries B.

[0371] In addition, the processor 23 may update the virtual deterioration rate map M to the latest deterioration rate map M.

[0372] After that, the process returns to step S101 to determine whether it is the first secondary battery B.

[0373] [Step S110]

[0374] In the case where the process of step S101 is performed via step S108, the determination result is negative, and as described above, the process proceeds to step S110.

[0375] In step S110, the processor 23 calculates the standard deviation, slope, and reciprocal of the capacitance deterioration rate V based on the virtual deterioration rate map M generated in step S108, and performs standardization.

[0376] These processes are the same as those in step S102.

[0377] After that, the processes of step S103 to step S105 are performed.

[0378] If it is determined in step S105 that test conditions have been assigned to all of the secondary batteries B, the process of step S12 ends, the assigned test conditions are output as the exploration result, and the process proceeds to step S13.

[0379] 3.3. Details of the calibration process

[0380] In this chapter, the details of the calibration process performed in step S24 will be described.

[0381] Figure 8 is a flowchart showing the process of the calibration process.

[0382] [Step S201]

[0383] First, in step S201, the processor 23 estimates the time dependence of the capacitance degradation amount ΔC based on the test results of the degradation test under the benchmark test conditions up to this point.

[0384] For example, for a data set represented by the capacitance degradation amount ΔC and the cumulative test time Ts, this time dependence is estimated by optimizing the order a based on the least squares method or the like.

[0385] Figure 9 is a diagram showing an example of the estimation result of the time dependence of the capacitance degradation amount ΔC.

[0386] As Figure 9 shown, the test results of the degradation test under the benchmark test conditions are represented as point P1.

[0387] For such multiple points P1, the time dependence of the capacitance degradation amount ΔC when the order a of the test time is changed from 0.5 in a specified step is represented as a function L1.

[0388] The processor 23 estimates the order a with the smallest error between the function L1 and the point P1 as the order representing the latest time dependence.

[0389] [Step S202]

[0390] Return Figure 8 , then, the process proceeds to step S202, and the processor 23 determines whether the time dependence has changed by comparing the order a estimated in step S201 with the closest order a (0.5 in the initial setting).

[0391] For example, when the absolute value of the difference between the order a estimated by the processor 23 in step S201 and the closest order a is within the allowable value, it is determined that the time dependence has not changed, and the process proceeds to step S203.

[0392] [Step S203]

[0393] In step S203, the processor 23 generates calibration information indicating the change in the time dependence.

[0394] The correction information can also be said to be an instruction for changing the order a and correcting the capacitance degradation speed V accompanying the change in step S204 described below.

[0395] In addition, instead of constantly updating the order a from the initial value (0.5 in this embodiment), the processor 23 can temporarily update the order a when the result of the determination in step S202 determines that there is a change in time dependence.

[0396] [Step S204]

[0397] After that, the process proceeds to step S204, and the processor 23 corrects the capacitance degradation speed V under the test conditions conducted in the past based on the generated correction information, and obtains the matching with the time dependence specified by the order a estimated in step S201.

[0398] Thus, the time dependence based on the type of the secondary battery B can be reflected in the degradation speed graph M.

[0399] After that, the correction process of step S24 is ended.

[0400] In addition, in step S202, when the absolute value of the difference between the order a estimated in step S201 and the closest order a is within the allowable value, the processes of step S203 and step S204 are omitted, the processor 23 does not perform correction, and the correction process of step S24 is ended.

[0401] 4. Others

[0402] The above information processing method is only an example and is not limited thereto.

[0403] The processor 23 can also calculate the capacitance degradation amount ΔC based on the impedance and open circuit voltage of the secondary battery B.

[0404] These values are measured by the charge and discharge device 43 or the impedance measurement device 44.

[0405] For example, the processor 23 calculates the capacitance degradation amount ΔC based on the impedance and open circuit voltage by referring to the correspondence between the battery capacitance C and the impedance and open circuit voltage of the secondary battery B constructed in advance.

[0406] This correspondence is represented, for example, by a learned model constructed in advance according to any learning algorithm such as random forest or support vector machine, or a data table obtained by performing pre-measurement, etc.

[0407] In step S13, as the candidate output unit 236, the processor 23 further outputs a candidate for the second degradation test based on the transition time t12.

[0408] The transfer time t12 is the time required for transferring from the first degradation test to the second degradation test, and is one of the indexes indicating the cost of conducting the second degradation test.

[0409] In this case, the transfer time t12 is one of the parameters of a specified priority.

[0410] In this case, the priority is specified, for example, not only by the standard deviation of the capacitance degradation speed V, the slope of the capacitance degradation speed V, and the reciprocal of the capacitance degradation speed V as described above, but also by the weighted linear sum of the reciprocals of the transfer time t12.

[0411] The shorter the time for transferring from the first degradation test to the second degradation test, the larger the reciprocal of the transfer time t12.

[0412] Therefore, the shorter the transfer time t12 of the test conditions, the higher the priority.

[0413] In this case, in step S11 for example, as the priority calculation unit 235, the processor 23 further calculates the transfer time t12 based on the test conditions of the first degradation test and the test conditions of the second degradation test.

[0414] For example, the processor 23 calculates the transfer time t12 by dividing the difference between the temperature of the test conditions of the first degradation test and the temperature of the test conditions of the second degradation test by the upper limit value of the heating rate based on the thermostat 41.

[0415] In addition, the processor 23 may also calculate the transfer time t12 based on the average SOC or the SOC amplitude included in the test conditions.

[0416] For example, the processor 23 compares the SOC of the secondary battery B after the end of the first degradation test and the SOC at the start time of the second degradation test, and calculates the transfer time t12 based on the current rate of charging the secondary battery B.

[0417] As the transfer time t12 used as a parameter of the priority, the processor 23 may adopt the maximum value among these respective transfer times t12, or may also adopt the sum of these transfer times t12.

[0418] The processor 23 further calculates the priority corresponding to the test conditions of the second degradation test based on the transfer time t12 calculated in this way, and in step S12, explores candidates for the test conditions of the second degradation test based on the calculated priority.

[0419] The priority may not be specified by the linear sum of the above parameters. For example, it may also be specified by any function or table such as the non - linear combination of the above parameters.

[0420] For example, the priority can also be defined by the linear sum of the squares of the above parameters.

[0421] The method for determining whether to replace the secondary battery B is not limited to the above method and is arbitrary.

[0422] For example, the processor 23 calculates the state of health (SOH) of the secondary battery B based on the total C_deg_total of the capacitance degradation amount ΔC or the internal resistance of the secondary battery B, and can also make this determination based on whether the SOH is above a predetermined value.

[0423] The internal resistance of the secondary battery B can be calculated, for example, by comparing the closed-circuit voltage and the open-circuit voltage measured by the charge and discharge device 43 or the impedance measurement device 44 when a constant current flows through the secondary battery B.

[0424] In addition to the obtained capacitance degradation amount ΔC, the processor 23 can also determine whether to replace the secondary battery B based on the test conditions of a further selected second degradation test.

[0425] For example, the processor 23 can also change the predetermined value used as the comparison object with C_deg_total / C_ini according to the load of the preset test conditions.

[0426] The structure of the degradation test device 4 is arbitrary as long as it can measure the capacitance degradation amount ΔC, and the charge and discharge device 43 and the impedance measurement device 44 can also be combined.

[0427] In addition, the degradation test device 4 may not include the impedance measurement device 44.

[0428] In addition, the function of measuring the capacitance degradation amount ΔC included in the degradation test device 4 can also be implemented by other devices such as the information processing device 2.

[0429] In other words, the differences between the information processing device 2, the user terminal 3, and the degradation test device 4 are only for convenience of explanation and are not limited thereto.

[0430] The information processing device 2 can be in a local mode or a cloud mode.

[0431] As the information processing device 2 in the cloud mode, for example, the above functions and processes can also be provided in the form of SaaS (Software as a Service), cloud computing, etc.

[0432] In the above embodiment, the information processing device 2 performs various storage / controls, but multiple external devices can also be used instead of the information processing device 2.

[0433] That is, various information or programs can also be distributed and stored in multiple external devices using blockchain technology or the like.

[0434] The above-described embodiments are not limited to the information processing system 1, and can also be an information processing method or an information processing program.

[0435] The information processing method includes each step of the information processing system 1.

[0436] The information processing program causes at least one computer to execute each step of the information processing system 1.

[0437] The above-described information processing system 1 or the like can also be provided in the following various ways.

[0438] (1) An information processing system, wherein the system includes at least one processor capable of executing a program in a manner to perform the following steps. In an acquisition step, acquisition is performed on test conditions of a first degradation test performed on a secondary battery and test results based on the first degradation test. Here, the test conditions include a test time for performing the first degradation test, and the test results include a capacitance degradation amount of the secondary battery. In a speed calculation step, based on the capacitance degradation amount, a capacitance degradation speed of the secondary battery under the test conditions is calculated. In an estimation step, based on the calculated capacitance degradation speed, at least one capacitance degradation speed of the secondary battery under untested conditions representing unacquired test conditions is estimated. In a graph generation step, based on the calculated capacitance degradation speed and the estimated capacitance degradation speed, a degradation speed graph representing the correspondence between the test conditions and the capacitance degradation speed is generated. In a priority calculation step, based on the generated degradation speed graph, priorities of the untested conditions for performing a second degradation test are calculated. In a candidate output step, based on the calculated priorities, candidates for the second degradation test with at least one of the untested conditions as test conditions are output in a manner selectable by a user.

[0439] According to this structure, it is possible to more effectively select the conditions for the next degradation test to be performed from untested conditions.

[0440] Therefore, it is possible to more effectively improve the accuracy of the degradation speed graph.

[0441] (2) The information processing system according to the above (1), wherein in the priority calculation step, the priority is calculated based on at least one of the reliability of the degradation speed graph obtained by further performing a second degradation test on the secondary battery under at least one of the untested conditions and the cost of performing the second degradation test.

[0442] With this structure, the interpretability of the significance of the conditions for the subsequent degradation test to be conducted can be improved.

[0443] (3) The information processing system according to (1) or (2) above, wherein, in the obtaining step, the history of the first degradation test performed on the secondary battery is further obtained, and in the speed calculation step, the capacitance degradation speed is further calculated based on the history.

[0444] With this structure, it is possible to generate a degradation speed map using a secondary battery that has been degraded by a past degradation test, and thus the cost of conducting the degradation test can be reduced.

[0445] (4) The information processing system according to any one of (1) to (3) above, wherein, in the obtaining step, the test conditions of a plurality of first degradation tests respectively performed on a plurality of secondary batteries and the capacitance degradation amounts of the respective secondary batteries obtained from the plurality of first degradation tests are obtained. Here, at least one of the test conditions is a reference test condition set regardless of the candidate test conditions selected by the user. Further, in the correction step, the calculated capacitance degradation speed of the secondary battery is corrected based on the capacitance degradation amount of the secondary battery obtained from the first degradation test under the reference test condition.

[0446] With this structure, the degradation speed calculation result obtained from a short-time degradation test is corrected based on the information obtained from a long-term degradation test under the same test conditions, whereby the accuracy of the degradation speed map can be further improved.

[0447] (5) The information processing system according to any one of (1) to (4) above, wherein, in the replacement determination step, it is further determined whether to replace the secondary battery for the second degradation test based on the obtained capacitance degradation amount.

[0448] With this structure, it is easy to conduct a degradation test with an appropriate load on the secondary battery.

[0449] (6) The information processing system according to any one of (1) to (5) above, wherein the reliability of the degradation speed map is calculated based on at least one of the statistic of the estimated capacitance degradation speed and the slope of the calculated capacitance degradation speed with respect to the parameter related to the test conditions of the degradation speed map.

[0450] With this structure, a degradation speed map with higher accuracy can be obtained.

[0451] (7) The information processing system according to any one of (1) to (6) above, wherein, in the priority calculation step, further based on the test conditions of the first degradation test and the test conditions of the second degradation test, calculate the transfer time required to transfer from the first degradation test to the second degradation test, and in the candidate output step, further based on the transfer time, output the candidate for the second degradation test.

[0452] According to this structure, it is possible to effectively conduct the degradation test while considering the time required for the entire degradation test.

[0453] (8) The information processing system according to any one of (1) to (7) above, wherein, in the acquisition step, further acquire the reliability of the generated degradation rate map, in the estimation step, based on the degradation rate map, estimate the capacitance degradation rate of the secondary battery under the untested conditions, and further in the classification step, based on the estimated capacitance degradation rate of the secondary battery, classify the untested conditions into a first classification and a second classification. Here, the first classification is a classification representing untested conditions with a large error in the capacitance degradation rate compared to the untested conditions belonging to the second classification, and in the map generation step, update the degradation rate map based on the reliability of the degradation rate map and the capacitance degradation rate estimated at least for the untested conditions belonging to the first classification.

[0454] According to this structure, for untested conditions with a large error in the capacitance degradation rate, it is possible to update the degradation rate map using the estimation result of the capacitance degradation rate, so that the accuracy of the degradation rate map can be further improved.

[0455] (9) The information processing system according to any one of (1) to (8) above, wherein, further in the priority setting step, set the priority correspondence based on the user's designation. Here, the priority correspondence represents at least the correspondence between the priority and the reliability of the degradation rate map obtained by further conducting the second degradation test on the secondary battery and the cost of conducting this second degradation test, and in the priority calculation step, calculate the priority based on the set priority correspondence.

[0456] According to this structure, it is possible to output a suitable candidate for the second degradation test according to the elements that the user values.

[0457] (10) An information processing method, wherein the method includes each step of the information processing system according to any one of (1) to (9) above.

[0458] (11) An information processing program, wherein the program causes at least one computer to execute each step of the information processing system described in any one of the above (1) to (9).

[0459] Of course, it is not limited to this.

[0460] Finally, various embodiments of the present invention have been described, but these are presented as examples and are not intended to limit the scope of the invention.

[0461] The new embodiment can be implemented in various other ways, and various omissions, substitutions, and changes can be made without departing from the gist of the invention.

[0462] This embodiment or its modifications are included in the scope and gist of the invention, and are included in the invention described in the claims and its equivalents.

[0463] [Reference Signs]

[0464] 1: Information processing system

[0465] 2: Information processing device

[0466] 20: Communication bus

[0467] 21: Communication unit

[0468] 22: Storage unit

[0469] 23: Processor

[0470] 231: Acquisition unit

[0471] 232: Speed calculation unit

[0472] 233: Estimation unit

[0473] 234: Priority setting unit

[0474] 235: Priority calculation unit

[0475] 236: Candidate output unit

[0476] 237: Replacement determination unit

[0477] 238: Correction unit

[0478] 239: Graph generation unit

[0479] 3: User terminal

[0480] 30: Communication bus

[0481] 31: Communication unit

[0482] 32: Storage unit

[0483] 33: Processor

[0484] 34: Display unit

[0485] 35: HMI device

[0486] 4: Degradation test device

[0487] 41: Constant temperature bath

[0488] 42: Reference constant temperature bath

[0489] 43: Charge and discharge device

[0490] 44: Impedance measurement device

[0491] B: Secondary battery

[0492] L1: Function

[0493] P1: Point

Claims

1. An information processing system, wherein, the system includes at least one processor capable of executing a program in a manner to perform the following steps, in an acquisition step, acquire the test conditions of a first degradation test performed on a secondary battery and the test results based on the first degradation test. Here, the test conditions include the test time for performing the first degradation test, the test results include the amount of capacitance degradation of the secondary battery, in a speed calculation step, calculate the capacitance degradation speed of the secondary battery under the test conditions based on the amount of capacitance degradation, in an estimation step, estimate the capacitance degradation speed of the secondary battery under at least one of the untried conditions representing untried test conditions that have not been acquired, based on the calculated capacitance degradation speed, in a graph generation step, generate a degradation speed graph representing the correspondence between the test conditions and the capacitance degradation speed, based on the calculated capacitance degradation speed and the estimated capacitance degradation speed, in a priority calculation step, calculate the priority of each of the untried conditions for performing a second degradation test, based on the generated degradation speed graph, in a candidate output step, output, in a manner selectable by a user, candidates for the second degradation test with at least one of the untried conditions as the test conditions, based on the calculated priority.

2. The information processing system according to claim 1, wherein, in the priority calculation step, calculate the priority based on at least one of the reliability of the degradation speed graph obtained by further performing a second degradation test on the secondary battery under at least one of the untried conditions and the cost of performing the second degradation test.

3. The information processing system according to claim 1 or claim 2, wherein, in the acquisition step, further acquire the history of the first degradation test performed on the secondary battery, in the speed calculation step, further calculate the capacitance degradation speed based on the history.

4. The information processing system according to any one of claims 1 to 3, wherein, in the acquisition step, acquire the test conditions of a plurality of first degradation tests respectively performed on a plurality of secondary batteries and the amount of capacitance degradation of each of the secondary batteries obtained from the plurality of first degradation tests. Here, at least one of the test conditions is a reference test condition set regardless of the candidates for the test conditions selected by the user, further in a correction step, correct the calculated capacitance degradation speed of the secondary battery based on the amount of capacitance degradation of the secondary battery obtained from the first degradation test under the reference test condition.

5. The information processing system according to any one of claims 1 to 4, wherein, further in a replacement determination step, determine whether to replace the secondary battery for performing the second degradation test, based on the acquired amount of capacitance degradation.

6. The information processing system according to any one of claims 1 to 5, wherein, The reliability of the deterioration rate graph is calculated based on at least one of the statistic of the estimated capacitance deterioration rate and the slope of the calculated capacitance deterioration rate with respect to the parameter related to the test conditions of the deterioration rate graph.

7. The information processing system according to any one of claims 1 to 6, wherein in the priority calculation step, further based on the test conditions of the first deterioration test and the test conditions of the second deterioration test, calculate the transfer time required to transfer from the first deterioration test to the second deterioration test, in the candidate output step, further based on the transfer time, output the candidate for the second deterioration test.

8. The information processing system according to any one of claims 1 to 7, wherein in the acquisition step, further acquire the reliability of the generated deterioration rate graph, in the estimation step, based on the deterioration rate graph, estimate the capacitance deterioration rate of the secondary battery under the untested conditions, further in the classification step, based on the estimated capacitance deterioration rate of the secondary battery, classify the untested conditions into a first classification and a second classification. Here, the first classification is a classification representing untested conditions with a large error in the capacitance deterioration rate compared to the untested conditions belonging to the second classification, in the graph generation step, update the deterioration rate graph based on the reliability of the deterioration rate graph and the capacitance deterioration rate estimated at least for the untested conditions belonging to the first classification.

9. The information processing system according to any one of claims 1 to 8, wherein further in the priority setting step, set a priority correspondence relationship based on a user's designation. Here, the priority correspondence relationship represents at least the correspondence relationship of the priority with respect to the reliability of the deterioration rate graph obtained by further performing the second deterioration test on the secondary battery and the cost of performing this second deterioration test, in the priority calculation step, calculate the priority based on the set priority correspondence relationship.

10. An information processing method, wherein the method includes the steps of the information processing system according to any one of claims 1 to 9.

11. An information processing program, wherein the program causes at least one computer to execute the steps of the information processing system according to any one of claims 1 to 9.

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