Package including a lid structure having a compartment and method for manufacturing the package

Abstract

A package, the package including: a substrate; a first integration device coupled to the first surface of the substrate; a cover structure coupled to the substrate, where the cover structure includes a first compartment, the first compartment including a side surface and an inner top surface; and a thermal interface material coupled to (i) the first integrated device and (ii) the side surface and the inner top surface of the first compartment of the cover structure. The substrate includes at least one dielectric layer and a plurality of interconnects.

Description

[0001] Cross - Reference to Related Applications

[0002] This application claims the benefit and priority of U.S. Non - Provisional Application Serial No. 18 / 085,284, filed on December 20, 2022, with the United States Patent and Trademark Office, the entire content of which is incorporated herein by reference as if set forth in full below and for all applicable purposes. Technical Field

[0003] Various features relate to packages having an integrated device and a lid structure. Background Art

[0004] Packages can include a substrate and an integrated device. These components are coupled together to provide a package that can perform various functions. The performance of the package and its components can depend on how these components are coupled together. The integrated device generates heat, and too much heat can have a negative impact on the performance of the integrated device and / or the package. There is a continuing need for packages and / or integrated devices having improved thermal performance. Summary of the Invention

[0005] Various features relate to packages having an integrated device and a lid structure.

[0006] One example provides a package that includes: a substrate; a first integrated device coupled to a first surface of the substrate; a lid structure coupled to the substrate, wherein the lid structure includes a first compartment that includes a side surface and an inner top surface; and a thermal interface material coupled to (i) the first integrated device and (ii) the side surface and the inner top surface of the first compartment of the lid structure. The substrate includes at least one dielectric layer and a plurality of interconnects.

[0007] Another example provides a device that includes a package. The package includes: a substrate; a first integrated device coupled to a first surface of the substrate; a lid structure coupled to the substrate, wherein the lid structure includes a first compartment that includes a side surface and an inner top surface; and a thermal interface material coupled to (i) the first integrated device and (ii) the side surface and the inner top surface of the first compartment of the lid structure. The substrate includes at least one dielectric layer and a plurality of interconnects.

[0008] Another example provides a method for manufacturing a package. The method provides a substrate that includes at least one dielectric layer and a plurality of interconnects. The method couples a first integrated device to a first surface of the substrate. The method couples a lid structure to the substrate, wherein the lid structure includes a first compartment that includes a side surface and an inner top surface. The coupling of the lid structure includes coupling the lid structure to the first integrated device through a thermal interface material. The thermal interface material is coupled to the side surface and the inner top surface of the first compartment of the lid structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Various features, natures, and advantages will become apparent when the following detailed description is understood in conjunction with the accompanying drawings, in which like reference characters correspond throughout.

[0010] Figure 1 A cross-sectional view of an exemplary package including an integrated device and a lid structure having a compartment is illustrated.

[0011] Figure 2 A cross-sectional view of an exemplary package including an integrated device and a lid structure having a compartment is illustrated.

[0012] Figure 3 A cross-sectional view of an exemplary lid structure having a compartment is illustrated.

[0013] Figure 4 A view of an exemplary lid structure having a compartment is illustrated.

[0014] Figure 5 A cross-sectional view of an exemplary lid structure having a compartment is illustrated.

[0015] Figure 6 A view of an exemplary lid structure having a compartment is illustrated.

[0016] Figure 7 A junction temperature map distribution of an integrated device coupled to a lid structure without a cavity is illustrated.

[0017] Figure 8 A junction temperature map distribution of an integrated device coupled to a lid structure having a cavity is illustrated.

[0018] Figure 9 A stress map distribution of a thermal interface material coupled to an integrated device and a lid structure without a cavity is illustrated.

[0019] Figure 10 A stress map distribution of a thermal interface material coupled to an integrated device and a lid structure having a cavity is illustrated.

[0020] Figures 11A - 11B An exemplary process for manufacturing a package including an integrated device and a lid structure having a compartment is illustrated.

[0021] Figure 12 An exemplary flowchart illustrating a method for manufacturing a package including an integrated device and a lid structure having a compartment is shown.

[0022] Figure 13 Various electronic devices that can integrate the die, electronic circuits, integrated devices, integrated passive devices (IPDs), passive components, packages, and / or device packages described herein are illustrated. Detailed Description

[0023] In the following description, specific details are given to provide a thorough understanding of various aspects of the present disclosure. However, one of ordinary skill in the art will understand that these aspects may be practiced without these specific details. For example, circuits may be shown in block diagrams to avoid obscuring these aspects with unnecessary details. In other instances, well-known circuits, structures, and techniques may not be shown in detail so as not to obscure these aspects of the present disclosure.

[0024] The present disclosure describes a package that includes: a substrate; a first integrated device coupled to a first surface of the substrate; a lid structure coupled to the substrate, wherein the lid structure includes a first compartment that includes a side surface and an inner top surface; and a thermal interface material coupled to the first integrated device and the first compartment of the lid structure. The thermal interface material is coupled to the side surface and the inner top surface of the first compartment of the lid structure. The substrate includes at least one dielectric layer and a plurality of interconnects. Using the first compartment in the lid structure helps improve heat dissipation from the integrated device to the lid structure through the thermal interface material. As will be described further below, the side surface of the lid structure helps compress the thermal interface material, which in turn improves the effectiveness of heat dissipation from the integrated device to the lid structure through the thermal interface material. The improved heat dissipation can improve the performance of the integrated device and / or the package.

[0025] Exemplary Package Including a Lid Structure Having a Compartment

[0026] Figure 1 A cross-sectional view of a package 100 including a lid structure having at least one compartment is illustrated. Package 100 includes a substrate 102, an integrated device 103, a passive device 105, an adhesive 106, a passive device 107, a lid structure 109, and a thermal interface material 110.

[0027] Package 100 is coupled to a board 108 (e.g., a printed circuit board) by a plurality of solder interconnects 101. Board 108 includes at least one board dielectric layer 180 and a plurality of board interconnects 182. Package 100 is coupled to the plurality of board interconnects 182 of board 108 (e.g., a printed circuit board) by a plurality of solder interconnects 101.

[0028] The substrate 102 includes a first surface (e.g., a top surface) and a second surface (e.g., a bottom surface). The substrate 102 includes at least one dielectric layer 120 and a plurality of interconnects 122 (e.g., a plurality of substrate interconnects). The at least one dielectric layer 120 may include prepreg material. In some embodiments, the first surface of the substrate 102 includes a solder mask layer 126, and the second surface of the substrate 102 includes a solder mask layer 124. The substrate 102 may be a laminated substrate. Different embodiments may use different types of substrates. Different embodiments may use different at least one dielectric layer 120.

[0029] The integrated device 103 is coupled to the first surface (e.g., the top surface) of the substrate 102 by a plurality of solder interconnects 130. For example, the integrated device 103 is coupled to the substrate 102 by a plurality of pillar interconnects 132 and a plurality of solder interconnects 130. The plurality of solder interconnects 130 may be coupled to one or more interconnects from the plurality of interconnects 122. The integrated device 103 includes a front side and a back side. The front side of the integrated device 103 faces the substrate 102.

[0030] The passive device 105 is coupled to the first surface of the substrate 102 by a plurality of solder interconnects 150. The passive device 105 may be a capacitor and / or an inductor. The passive device 105 may be a discrete passive device. The passive device 107 is coupled to the first surface of the substrate 102 by a plurality of solder interconnects 170. The passive device 107 may be a capacitor and / or an inductor. The passive device 107 may be a discrete passive device.

[0031] The cover structure 109 is coupled to the first surface of the substrate 102 by an adhesive 106. The cover structure 109 includes a top portion and a foot portion (e.g., feet). Examples of the top portion and the foot portion of the cover structure 109 are described in further detail below at least in Figures 3 - 4 The foot portion of the cover structure 109 is located above the peripheral portion of the substrate 102. The adhesive 106 is coupled to the foot portion of the cover structure 109 and the substrate 102. The cover structure 109 may include metal. The cover structure 109 is configured to provide heat dissipation for the integrated device 103 through a thermal interface material 110. For example, heat generated at the integrated device 103 may be dissipated through the thermal interface material 110 and the cover structure 109. The cover structure 109 may be configured as an electromagnetic interference (EMI) shield for the package 100 and / or the integrated device 103.

[0032] The lid structure 109 includes a compartment 190 (e.g., a first compartment). The compartment 190 may include a cavity in the lid structure 109. For example, the compartment 190 may be a cavity in the top portion of the lid structure 109. The compartment 190 is located above the integrated device 103. The thermal interface material 110 may be located in the compartment 190 of the lid structure 109. The thermal interface material 110 may be coupled to the integrated device 103 and the lid structure 109. The thermal interface material 110 may be coupled to the back side of the integrated device 103 and the side surface of the integrated device 103. The thermal interface material 110 may be coupled to the surface of the compartment 190 of the lid structure 109. For example, the thermal interface material 110 may be coupled to the side surface of the compartment 190 of the lid structure 109 (e.g., coupled to the side surface of the lid structure 109) and the inner top surface of the compartment 190. In some embodiments, a portion of the integrated device 103 may be located in the compartment 190 of the lid structure 109. The compartment 190 may include the thermal interface material 110 and a portion of the integrated device 103. In some embodiments, the integrated device 103 is the only integrated device and / or passive device located in the compartment 190. The side surface of the compartment 190 may laterally surround a portion of the integrated device 103 and / or the thermal interface material 110. For example, the side surface of the compartment 190 may only laterally surround a portion of the integrated device 103 and / or the thermal interface material 110. However, it should be noted that the compartment 190 that only laterally surrounds a portion of the integrated device 103 and / or the thermal interface material 110 may laterally surround the gas (e.g., air) that may be present in the compartment 190. The thermal interface material 110 is a material for enhancing and / or improving the thermal coupling between two or more components. In Figure 1 the example, the thermal interface material 110 is used to improve the thermal coupling between the integrated device 103 and the lid structure 109. Different embodiments may use different thermal interface materials. The thermal interface material may include thermal paste, thermal adhesive, thermal filler, and / or heat tape. The thermal interface material is a thermally conductive material.

[0033] As will be further described below, the use of the compartment 190 helps to improve the compression of the thermal interface material 110, which helps to reduce the thermal resistance of the thermal interface material 110 and helps to improve the heat transfer ability of the thermal interface material 110.

[0034] The coupling of the lid structure 109 to the substrate 102 may form another compartment 160 (e.g., a second compartment). The compartment 160 may be a space defined at least by the lid structure 109 and the substrate 102. The integrated device 103, the passive device 105, and the passive device 107 may be located in the compartment 160 (e.g., may be located in the space defined at least by the lid structure 109 and the substrate 102). The foot portion (e.g., the foot) of the lid structure 109 may laterally surround the integrated device 103, the passive device 105, and the passive device 107.

[0035] Figure 2A cross-sectional view of package 200 is illustrated, which includes a lid structure having at least one compartment. Package 200 includes a substrate 102, an integrated device 103, a passive device 105, an adhesive 106, a passive device 107, a lid structure 209, and a thermal interface material 110. Package 200 is similar to package 100. However, in Figure 2 it, package 200 includes a lid structure having a different design from that of the Figure 1 lid structure.

[0036] Package 200 is coupled to a board 108 (e.g., a printed circuit board) through a plurality of solder interconnects 101. Board 108 includes at least one board dielectric layer 180 and a plurality of board interconnects 182. Package 200 is coupled to the plurality of board interconnects 182 of board 108 (e.g., a printed circuit board) through a plurality of solder interconnects 101.

[0037] Substrate 102 includes a first surface (e.g., a top surface) and a second surface (e.g., a bottom surface). Substrate 102 includes at least one dielectric layer 120 and a plurality of interconnects 122 (e.g., a plurality of substrate interconnects). The at least one dielectric layer 120 may include prepreg material. In some embodiments, the first surface of substrate 102 includes a solder mask layer 126, and the second surface of substrate 102 includes a solder mask layer 124. Substrate 102 may be a laminated substrate. Different embodiments may use different types of substrates.

[0038] Integrated device 103 is coupled to the first surface (e.g., the top surface) of substrate 102 through a plurality of solder interconnects 130. For example, integrated device 103 is coupled to substrate 102 through a plurality of pillar interconnects 132 and a plurality of solder interconnects 130. The plurality of solder interconnects 130 may be coupled to one or more interconnects from the plurality of interconnects 122. Integrated device 103 includes a front side and a back side. The front side of integrated device 103 faces substrate 102.

[0039] Passive device 105 is coupled to the first surface of substrate 102 through a plurality of solder interconnects 150. Passive device 105 may be a capacitor and / or an inductor. Passive device 105 may be a discrete passive device. Passive device 107 is coupled to the first surface of substrate 102 through a plurality of solder interconnects 170. Passive device 107 may be a capacitor and / or an inductor. Passive device 107 may be a discrete passive device.

[0040] Lid structure 209 is coupled to the first surface of substrate 102 through an adhesive 106. Lid structure 209 includes a top portion and a foot portion (e.g., a foot). Examples of the top portion and the foot portion (e.g., a foot) of lid structure 209 are described below at least in Figures 5 - 6It is further described in detail in []. The foot portion of the cover structure 209 is located above the peripheral portion of the substrate 102. The adhesive 106 is coupled to the foot portion of the cover structure 209 and the substrate 102. In some specific embodiments, the adhesive 106 may be coupled to the solder mask layer 126. In some specific embodiments, the adhesive 106 may be coupled to the dielectric layer of the substrate 102. The cover structure 209 may include metal. The cover structure 209 is configured to provide heat dissipation for the integrated device 103 through the thermal interface material 110. For example, the heat generated at the integrated device 103 may be dissipated through the thermal interface material 110 and the cover structure 209. The cover structure 209 may be configured as an electromagnetic interference (EMI) shield for the package 200 and / or the integrated device 103.

[0041] The cover structure 209 includes at least one protrusion 292 and a compartment 290 (e.g., a first compartment). At least one protrusion 292 may extend from the top portion of the cover structure 209. The compartment 290 may be defined by at least one protrusion 292. At least one protrusion 292 may define the side surface and / or the side wall of the compartment 290. At least one protrusion 292 may be a continuous portion and / or an adjacent portion. At least one protrusion 292 may be a plurality of protrusions. At least one protrusion 292 may be defined by a plurality of protrusions, with gaps and / or intervals between adjacent protrusions. At least one protrusion 292 may be configured to form the boundary of the compartment 290. At least one protrusion 292 may extend towards the substrate 102. The compartment 290 is located above the integrated device 103. The thermal interface material 110 may be located in the compartment 290 of the cover structure 209. The thermal interface material 110 may be coupled to the integrated device 103 and the cover structure 209. The thermal interface material 110 may be coupled to the back side and the side surface of the integrated device 103. The thermal interface material 110 may be coupled to the surface of the compartment 290 of the cover structure 209. For example, the thermal interface material 110 may be coupled to the side surface of the compartment 290 of the cover structure 109 (e.g., coupled to the side surface of at least one protrusion 292) and the inner top surface of the compartment 290. In some specific embodiments, a portion of the integrated device 103 may be located in the compartment 290 of the cover structure 209. The compartment 290 may include the thermal interface material 110 and a portion of the integrated device 103. In some specific embodiments, the integrated device 103 is the only integrated device and / or passive device located in the compartment 290. The side surface of the compartment 290 may laterally surround a portion of the integrated device 103 and / or the thermal interface material 110. For example, at least one protrusion 292 may only laterally surround a portion of the integrated device 103 and / or the thermal interface material 110. However, it should be noted that at least one protrusion 292 that only laterally surrounds a portion of the integrated device 103 and / or the thermal interface material 110 may laterally surround the gas (e.g., air) that may be present.

[0042] As will be further described below, the use of compartment 290 helps to improve the compression of the thermal interface material 110, which helps to reduce the thermal resistance of the thermal interface material 110 and helps to improve the heat transfer ability of the thermal interface material 110.

[0043] The coupling of the lid structure 209 to the substrate 102 can form another compartment 260. The compartment 260 can be a space defined at least by the lid structure 209 and the substrate 102. The integrated device 103, the passive device 105, and the passive device 107 can be located in the compartment 260 (e.g., can be located in a space defined at least by the lid structure 209 and the substrate 102). The feet portion (e.g., feet) of the lid structure 209 can laterally surround the integrated device 103, the passive device 105, and the passive device 107.

[0044] Figure 3 An exemplary cross-sectional view of the lid structure 109 is illustrated. The lid structure 109 includes a feet portion 301 and a top portion 302. The lid structure 109 further includes a compartment 190. The compartment 190 is defined by an inner top surface 303 and an inner side surface 304 (e.g., side surface). The inner top surface 303 and the inner side surface 304 can be located in the top portion 302 of the lid structure 109. The compartment 190 (e.g., the first compartment) can include a cavity defined by the inner top surface 303 and the inner side surface 304 of the lid structure 109. Figure 3 The compartment 194 is also illustrated. The compartment 194 (e.g., the second compartment) can be a space defined by at least the feet portion 301 (e.g., feet) of the lid structure 109. The compartment 190 can be located above the compartment 194. The compartment 190 can be configured to include a thermal interface material (e.g., 110) such that the thermal interface material is coupled to the inner top surface 303 and the inner side surface 304.

[0045] The use of the compartment 190 helps to improve the compression of the thermal interface material 110, which helps to reduce the thermal resistance of the thermal interface material 110 and helps to improve the heat transfer ability of the thermal interface material 110. For example, the inner side surface 304 helps to provide additional compression on the thermal interface material between the integrated device (e.g., 103) and the lid structure 109, which helps to reduce the thermal resistance of the thermal interface material and helps to increase the heat transfer ability of the thermal interface material between the integrated device and the lid structure.

[0046] Figure 4 An exemplary perspective view of the lid structure 109 is illustrated. Figure 4 The lid structure 109 is illustrated from a bottom corner and / or an inner corner. The lid structure 109 includes a compartment 190 and a compartment 194. The compartment 194 can correspond to and / or be similar to the compartment 160.

[0047] Figure 5An exemplary cross-sectional view of the lid structure 209 is illustrated. The lid structure 209 includes a foot portion 501 and a top portion 502. The lid structure 209 includes at least one protrusion 292. The at least one protrusion 292 can be at least one protrusion extending from the top portion 502. The at least one protrusion 292 can be considered a part of the top portion 502. The lid structure 209 further includes a compartment 290. The compartment 290 is defined by an inner top surface 503 and an inner side surface 504 (e.g., a side surface). The inner top surface 503 can be a part of the top portion. The inner side surface 504 can be the side surface of the at least one protrusion 292. Figure 5 A compartment 294 is also illustrated. The compartment 294 (e.g., a second compartment) can be a space defined by at least the foot portion 501 (e.g., the foot) of the lid structure 209. The compartment 290 can be located above the compartment 294. The compartment 290 can be configured to include a thermal interface material (e.g., 110) such that the thermal interface material is coupled to the inner top surface 503 and the inner side surface 504.

[0048] The use of the compartment 290 helps to improve the compression of the thermal interface material 110, which helps to reduce the thermal resistance of the thermal interface material 110 and helps to improve the heat transfer ability of the thermal interface material 110. For example, the inner side surface 504 of the at least one protrusion 292 helps to provide additional compression on the thermal interface material between the integrated device (e.g., 103) and the lid structure 209, which helps to reduce the thermal resistance of the thermal interface material and helps to increase the heat transfer ability of the thermal interface material between the integrated device and the lid structure.

[0049] Figure 6 An exemplary perspective view of the lid structure 209 is illustrated. Figure 6 The lid structure 209 is illustrated from a bottom corner and / or an inner corner. The lid structure 209 includes a compartment 290, at least one protrusion 292, and a compartment 294. The compartment 294 can correspond to and / or be similar to the compartment 260.

[0050] Figure 7 An exemplary junction temperature map distribution of an integrated device coupled to the lid structure without a cavity is illustrated. The junction temperature map distribution 700 illustrates an exemplary temperature on the front side of the integrated device 103. The junction temperature map distribution 700 illustrates a spot 703 on the integrated device 103, which can be a hot spot.

[0051] Figure 8Illustrates an exemplary junction temperature map distribution of an integrated device coupled to a lid structure having a cavity, such as lid structure 109. The junction temperature map distribution 800 illustrates exemplary temperatures on the front side of the integrated device 103. The junction temperature map distribution 800 also illustrates a spot 703 on the integrated device 103. The junction temperature map distribution 800 illustrates that the spot 703 is less hot (compared to the spot 703 on the junction temperature map distribution 700). The reduction in the temperature of the spot 703 may be due to the improved heat dissipation ability by using the lid structure 109 (or lid structure 209). Note that Figure 7 and Figure 8 the temperature map distributions are exemplary. Different specific implementations may have different temperature map distributions.

[0052] Figure 9 Illustrates an exemplary stress map distribution of a quadrant of a thermal interface material coupled to an integrated device and a lid structure without a cavity. The stress map distribution 900 illustrates exemplary stresses on the thermal interface material (e.g., 110) coupled to the back side of the integrated device 103. The stresses may include compressive stresses (e.g., compressive stress) and tensile stresses (e.g., tensile stress). Compressive stresses may be represented as negative values in the stress map distribution 900, while tensile stresses may be represented as positive values in the stress map distribution 900. As shown in the stress map distribution 900, there are compressive stresses near the center of the integrated device 103 and tensile stresses (or less compressive stresses) near the edges of the integrated device 103. The stress map distribution 900 illustrates a spot 903 on the thermal interface material 110 near the center of the integrated device 103.

[0053] Figure 10 Illustrates an exemplary stress map distribution of a thermal interface material coupled to an integrated device and a lid structure having a cavity, such as lid structure 109. The stress map distribution 1000 illustrates exemplary stresses on the thermal interface material (e.g., 110) coupled to the back side of the integrated device 103. The stresses may include compressive stresses (e.g., compressive stress) and tensile stresses (e.g., tensile stress). Compressive stresses may be represented as negative values in the stress map distribution 1000, while tensile stresses may be represented as positive values in the stress map distribution 1000. The stress map distribution 1000 illustrates a spot 903 on the thermal interface material 110 near the center of the integrated device 103. The inner surface of the lid structure helps to increase the compression of the thermal interface material between the integrated device 103 and the lid structure 109, which helps to reduce the thermal resistance of the thermal interface material and helps to increase the heat transfer ability of the thermal interface material. Figure 9 and Figure 10 Illustrates that when using a lid structure having a cavity and / or compartment, the spot 903 has greater compression of the thermal interface material, as at least in Figures 1 - 2As described. This compression increase near and / or around the center of the integrated device (and throughout the integrated device) helps to improve the heat transfer ability of the thermal interface material, which in turn helps to improve heat dissipation from the integrated device to the cover structure. Note that Figure 9 and Figure 10 The stress map distributions are exemplary. Different specific implementations may have different stress map distributions.

[0054] An integrated device (e.g., 103) may include a die (e.g., a semiconductor bare die). The integrated device may include a power management integrated circuit (PMIC). The integrated device may include an application processor. The integrated device may include a modem. The integrated device may include radio frequency (RF) devices, passive devices, filters, capacitors, inductors, antennas, transmitters, receivers, gallium arsenide (GaAs)-based integrated devices, surface acoustic wave (SAW) filters, bulk acoustic wave (BAW) filters, light-emitting diode (LED) integrated devices, silicon (Si)-based integrated devices, silicon carbide (SiC)-based integrated devices, memories, power management processors, and / or combinations thereof. An integrated device (e.g., 103, 105, 107) may include at least one electronic circuit (e.g., a first electronic circuit, a second electronic circuit, etc.). The integrated device may include transistors. The integrated device may be an example of an electrical component and / or an electrical device. In some particular implementations, the integrated device may be a chiplet. Chiplets may be manufactured using a process that provides better yield compared to other processes used to manufacture other types of integrated devices, which may reduce the overall cost of manufacturing chiplets. Different chiplets may have different sizes and / or shapes. Different chiplets may be configured to provide different functions. Different chiplets may have different interconnect densities (e.g., interconnects having different widths and / or pitches). In some particular implementations, a number of chiplets may be used to perform the functionality of one or more chips (e.g., one or more integrated devices). Thus, for example, a single integrated device may be divided into a number of chiplets. As described above, using a number of chiplets that perform a number of functions may reduce the overall cost of a package compared to using a single chip to perform all the functions of the package. In some particular implementations, one or more chiplets and / or one or more integrated devices (e.g., 103) described in the present disclosure may be manufactured using the same technology node or two or more different technology nodes. For example, an integrated device may be manufactured using a first technology node, and a chiplet may be manufactured using a second technology node that is less advanced than the first technology node. In such examples, the integrated device may include components (e.g., interconnects, transistors) having a first minimum size, and the chiplet may include components (e.g., interconnects, transistors) having a second minimum size, where the second minimum size is greater than the first minimum size. In some particular implementations, the same technology node or different technology nodes may be used to manufacture one integrated device and another integrated device of a package. In some particular implementations, the same technology node or different technology nodes may be used to manufacture one chiplet and another chiplet of a package.

[0055] Exemplary process for manufacturing a package including a lid structure having a compartment

[0056] In some specific implementations, manufacturing the package includes several processes. Figures 11A - 11B Exemplary procedures for providing or manufacturing a package including a lid structure are illustrated. In some specific implementations, Figures 11A - 11B the procedures can be used to provide or manufacture the Figure 1 package 100 described in the present disclosure. However, procedures can be used to provide or manufacture any package (e.g., 200) described in the present disclosure.

[0057] It should be noted that Figures 11A - 11B the procedures can combine one or more processes to simplify and / or clarify the method for providing or manufacturing the package. In some specific implementations, the order of the processes can be changed or improved.

[0058] Figure 11A Stage 1 of illustrates the state after manufacturing or providing the substrate 102. The substrate 102 includes at least one dielectric layer 120, a plurality of interconnects 122, and solder mask layers 124 and 126. The substrate 102 can include a first surface (e.g., top surface) and a second surface (e.g., bottom surface). The names of the first surface and the second surface of the substrate 102 are exemplary. In some specific implementations, the first surface and the second surface of the substrate 102 can be exchanged. Different specific implementations can use different substrates. In some specific implementations, the substrate can include a laminated substrate, an embedded trace substrate, a coreless substrate, and / or a cored substrate.

[0059] Stage 2 illustrates the state after coupling the integrated device 103, the passive device 105, and the passive device 107 to the first surface of the substrate 102. The integrated device 103 can be coupled to the first surface (e.g., top surface) of the substrate 102 through a plurality of solder interconnects 130 and a plurality of pillar interconnects 132. The passive device 105 can be coupled to the first surface of the substrate 102 through a plurality of solder interconnects 150. The passive device 107 can be coupled to the first surface of the substrate 102 through a plurality of solder interconnects 170. One or more solder reflow processes can be used to couple the integrated device 103, the passive device 105, and / or the passive device 107 to the substrate 102.

[0060] Stage 3 illustrates the state after coupling the adhesive 106 to the first surface of the substrate 102. A deposition process can be used to form and / or provide the adhesive 106 above the first surface of the substrate 102. The adhesive 106 can be formed and / or provided along the periphery of the substrate 102 and / or near the edge of the substrate 102. In some specific implementations, the adhesive 106 can be coupled to the solder mask layer 126. In some specific implementations, the adhesive 106 can be coupled to the dielectric layer of the substrate 102.

[0061] As Figure 11BAs shown, stage 4 illustrates the state after forming and / or providing the thermal interface material 110 above the integrated device 103. The thermal interface material 110 may be formed above the back side of the integrated device 103. A deposition process and / or an injection process may be used to provide the thermal interface material 110 above the integrated device 103.

[0062] Stage 5 illustrates the state after coupling the lid structure 109 to the substrate 102. The lid structure 109 is coupled to the substrate 102 such that the foot portion of the lid structure 109 is coupled to the substrate 102 by the adhesive 106. The foot portion of the lid structure 109 may be positioned along the periphery of the substrate 102. The lid structure 109 includes a compartment 190 located above the integrated device 103. The thermal interface material 110 is located between the integrated device 103 and the lid structure 109. The thermal interface material 110 is coupled to the back side and the side surface of the integrated device 103. The thermal interface material 110 is coupled to the inner top surface (e.g., 303) and the inner side surface (e.g., 304) of the lid structure 109. The thermal interface material 110 is located between the side surface of the integrated device 103 and the inner side surface (e.g., 304) of the lid structure 109. The inner side surface of the lid structure 109 helps to provide additional compression on the thermal interface material 110, which helps to reduce the thermal resistance of the thermal interface material 110 and helps to increase the heat transfer capacity of the thermal interface material 110. In some specific embodiments, a portion of the side surface of the integrated device 103 and a portion of the inner side surface of the lid structure 109 may have the same horizontal plane. In some specific embodiments, a portion of the side surface of the integrated device 103, a portion of the thermal interface material 110, and a portion of the inner side surface of the lid structure 109 may have the same horizontal plane. Note that in some specific embodiments, the thermal interface material 110 may be provided in the compartment 190 of the lid structure 109, and the lid structure 109 is coupled to the substrate 102 such that the lid structure 109 is also coupled to the integrated device 103 through the thermal interface material 110. In such cases, forming the thermal interface material 110 in stage 4 before the coupling of the lid structure 109 may be optional. Instead of the lid structure 109, the lid structure 209 may be coupled to the substrate 102 in stage 5.

[0063] Stage 6 illustrates the state after coupling a plurality of solder interconnects 101 to the second surface of the substrate 102. A solder reflow process may be used to couple the plurality of solder interconnects 101 to the substrate 102.

[0064] Exemplary flowchart of a method for a package including a lid structure having a compartment

[0065] In some specific embodiments, manufacturing a package includes several processes. Figure 12 An exemplary flowchart of a method 1200 for providing or manufacturing a package including a lid structure is illustrated. In some specific embodiments, Figure 12The method 1200 can be used to provide or manufacture the Figure 1 package 100 described in the present disclosure. However, the method 1200 can be used to provide or manufacture any package (e.g., 200) described in the present disclosure.

[0066] It should be noted that Figure 12 the method can combine one or more processes to simplify and / or clarify the method for providing or manufacturing the package. In some specific embodiments, the order of the processes can be changed or improved.

[0067] The method (at 1205) provides a substrate (e.g., 102) including at least one dielectric layer and a plurality of interconnects. Figure 11A Stage 1 of the

[0068] The method (at 1210) couples at least one integrated device and / or at least one passive device to the first surface of the substrate (e.g., 102). Figure 11A Stage 2 of the

[0069] The method (at 1215) forms an adhesive and couples the adhesive to the substrate. Figure 11A Stage 3 of the

[0070] The method (at 1220) forms a thermal interface material over the backside of the integrated device.Figure 11B Stage 4 illustrates and describes an example of a thermal interface material 110 formed over the integrated device 103. The thermal interface material 110 may be formed over the back side of the integrated device 103. A deposition process and / or an injection process may be used to provide the thermal interface material 110 over the integrated device 103.

[0071] The method (at 1225) couples a lid structure to a substrate, wherein the lid structure is coupled to the substrate by an adhesive. The lid structure includes a first compartment that includes a side surface and an inner top surface, and wherein a thermal interface material is coupled to the side surface and the inner top surface of the first compartment of the lid structure. Figure 11B Stage 5 illustrates and describes an example of a lid structure 109 coupled to a substrate 102. The lid structure 109 is coupled to the substrate 102 such that the foot portion of the lid structure 109 is coupled to the substrate 102 by an adhesive 106. The foot portion of the lid structure 109 may be positioned along the periphery of the substrate 102. The lid structure 109 includes a compartment 190 located over the integrated device 103. A thermal interface material 110 is located between the integrated device 103 and the lid structure 109. The thermal interface material 110 is coupled to the back side and the side surface of the integrated device 103. The thermal interface material 110 is coupled to the inner top surface (e.g., 303) and the inner side surface (e.g., 304) of the lid structure 109. The thermal interface material 110 may be located in the compartment 190. The thermal interface material 110 is located between the side surface of the integrated device 103 and the inner side surface (e.g., 304) of the lid structure 109. The inner side surface of the lid structure 109 helps to provide additional compression on the thermal interface material 110, which helps to reduce the thermal resistance of the thermal interface material 110 and helps to increase the heat transfer capacity of the thermal interface material 110. In some embodiments, a portion of the side surface of the integrated device 103 and a portion of the inner side surface of the lid structure 109 may be in the same horizontal plane. In some embodiments, a portion of the side surface of the integrated device 103, a portion of the thermal interface material 110, and a portion of the inner side surface of the lid structure 109 may be in the same horizontal plane. Instead of the lid structure 109, a lid structure 209 may be (at 1225) coupled to the substrate 102.

[0072] The method (at 1230) couples a plurality of solder interconnects to the substrate. Figure 11B Stage 6 illustrates and describes an example of a plurality of solder interconnects 101 coupled to the second surface of the substrate 102. A solder reflow process may be used to couple the plurality of solder interconnects 101 to the substrate 102.

[0073] Exemplary electronic device

[0074] Figure 13Illustrates various electronic devices that can be integrated with any one of the aforementioned devices, integrated devices, integrated circuit (IC) packages, integrated circuit (IC) devices, semiconductor devices, integrated circuits, dies, interposers, packages, stacked packages (PoP), system-in-package (SiP), or system-on-chip (SoC). For example, mobile phone device 1302, laptop computer device 1304, fixed-position terminal device 1306, wearable device 1308, or motor vehicle 1310 may include device 1300 as described herein. For example, device 1300 can be any one of the devices and / or integrated circuit (IC) packages described herein. Figure 13 The devices 1302, 1304, 1306, and 1308 and the vehicle 1310 illustrated in Figure 13 are merely exemplary. Other electronic devices can also feature device 1300, which includes but is not limited to a group of devices (e.g., electronic devices) including the following: mobile devices, handheld personal communication system (PCS) units, portable data units (such as personal digital assistants), global positioning system (GPS)-enabled devices, navigation devices, set-top boxes, music players, video players, entertainment units, fixed-position data units (such as meter reading equipment), communication devices, smartphones, tablet computers, computers, wearable devices (e.g., watches, glasses), Internet of Things (IoT) devices, servers, routers, electronic devices implemented in motor vehicles (e.g., autonomous vehicles), or any other device that stores or retrieves data or computer instructions or any combination thereof.

[0075] Figures 1 - 6 , Figures 11A - 11B and / or Figures 12 - 13 One or more of the components, processes, features, and / or functions illustrated in ,

[0075] , Figures 1 - 6 , Figures 11A - 11B , Figures 12 - 13 can be rearranged and / or combined into a single component, process, feature, or function, or implemented in several components, processes, or functions. Additional elements, components, processes, and / or functions can also be added without departing from the present disclosure. It should also be noted that Figures 1 - 6 , Figures 11A - 11B and / or Figures 12 - 13 and their corresponding descriptions in the present disclosure are not limited to dies and / or ICs. In some specific implementations, Figures 1 - 6 , Figures 11A - 11B and / or Figures 12 - 13 and their corresponding descriptions can be used to manufacture, create, provide, and / or produce devices and / or integrated devices. In some specific implementations, the device can include dies, integrated devices, integrated passive devices (IPD), die packages, integrated circuit (IC) devices, device packages, integrated circuit (IC) packages, wafers, semiconductor devices, stacked package (PoP) devices, heat dissipation devices, and / or interposers.

[0076] Note that the drawings in the present disclosure may represent actual and / or conceptual representations of various parts, components, objects, devices, packages, integrated devices, integrated circuits, and / or transistors. In some instances, the drawings may not be to scale. In some instances, not all components and / or parts are shown for clarity. In some instances, the positioning, location, size, and / or shape of the various parts and / or components in the drawings may be exemplary. In some specific implementations, the various components and / or parts in the drawings may be optional.

[0077] The term "exemplary" is used herein to mean "serving as an example, instance, or illustration". Any particular implementation or aspect described herein as "exemplary" is not necessarily to be construed as superior to or better than other aspects of the disclosure. Similarly, the term "aspect" does not require that all aspects of the disclosure include the recited features, advantages, or modes of operation. The term "coupled" is used herein to refer to a direct or indirect coupling (e.g., a mechanical coupling) between two objects. For example, if object A physically contacts object B and object B contacts object C, then objects A and C may still be considered to be coupled to each other even if they do not directly physically contact each other. An object A that is coupled to object B may be coupled to at least a portion of object B. The term "electrically coupled" may mean that two objects are directly or indirectly coupled together such that an electric current (e.g., a signal, power, ground) can be passed between the two objects. Two objects that are electrically coupled may or may not have an electric current flowing between the two objects. The use of the terms "first", "second", "third", and "fourth" (and / or anything above the fourth) is arbitrary. Any of the components described may be the first component, the second component, the third component, or the fourth component. For example, a component that is referred to as the second component may be the first component, the second component, the third component, or the fourth component. The terms "enclose", "enclosing", and / or any derivatives thereof mean that an object may partially enclose or fully enclose another object. The terms "top" and "bottom" are arbitrary. A component located at the top may be above a component located at the bottom. A top component may be considered a bottom component and vice versa. As described in the disclosure, a first component located "above" a second component may mean that the first component is located above or below the second component, depending on how the bottom or top is arbitrarily defined. In another example, a first component may be above (e.g., on top of) a first surface of the second component, while a third component may be above (e.g., below) a second surface of the second component, where the second surface is opposite the first surface. It should also be noted that the term "above" as used in the context of one component being on another component in this application may be used to mean that the component is on and / or in another component (e.g., on the surface of the component or embedded in the component). Thus, for example, a first component above the second component may mean: (1) the first component is above the second component but does not directly contact the second component; (2) the first component is above (e.g., on the surface of) the second component; and / or (3) the first component is in (e.g., embedded in) the second component. A first component located "in" a second component may be partially located in the second component or fully located in the second component. A value of about X to XX may refer to a value between X and XX, including X and XX. The values between X and XX may be discrete or continuous. As used in the disclosure, the term "about 'value X'" or "substantially value X" means within 10 percent of "value X".For example, a value of about 1 or approximately 1 will mean a value in the range of 0.9 to 1.1.

[0078] In some specific embodiments, an interconnect is an element or component in a device or package that allows or facilitates an electrical connection between two points, elements, and / or components. In some specific embodiments, an interconnect may include traces, vias, pads, pillars, metallization layers, redistribution layers, and / or under bump metallization (UBM) layers / interconnects. In some specific embodiments, an interconnect may include a conductive material that may be configured to provide a circuit path for signals (e.g., data signals), ground, and / or power. An interconnect may include more than one element or component. An interconnect may be defined by one or more interconnects. An interconnect may include one or more metal layers. An interconnect may be part of a circuit. Different specific embodiments may use different processes and / or procedures to form an interconnect. In some specific embodiments, chemical vapor deposition (CVD) processes, physical vapor deposition (PVD) processes, sputtering processes, spraying, and / or plating processes may be used to form an interconnect.

[0079] It should also be noted that the various disclosures contained herein may be described as processes depicted as operation diagrams, flowcharts, structural diagrams, or block diagrams. Although a flowchart may describe operations as a sequential process, many of the operations may be performed in parallel or concurrently. In addition, the order of the operations may be rearranged. A process terminates when its operations are complete.

[0080] Further examples are described below to facilitate understanding of the present disclosure.

[0081] Aspect 1: A package, the package comprising: a substrate; a first integrated device coupled to a first surface of the substrate; a lid structure coupled to the substrate, wherein the lid structure includes a first compartment that includes side surfaces and an inner top surface; and a thermal interface material coupled to (i) the first integrated device and (ii) the side surfaces and the inner top surface of the first compartment of the lid structure. The substrate includes at least one dielectric layer and a plurality of interconnects.

[0082] Aspect 2: The package according to aspect 1, wherein the first compartment includes a cavity in the lid structure.

[0083] Aspect 3: The package according to aspects 1 to 2, wherein the lid structure includes at least one protrusion, and wherein the first compartment is defined by the at least one protrusion of the lid structure.

[0084] Aspect 4: The package according to aspect 3, wherein the side surface of the first compartment is the side surface of the at least one protrusion of the lid structure.

[0085] Aspect 5: The package according to aspects 1 to 4, wherein the first compartment of the lid structure laterally surrounds only the integrated device and the thermal interface material.

[0086] Aspect 6: The package according to aspects 1 to 4, the package further comprising at least one passive device coupled to the first surface of the substrate, wherein the lid structure includes a second compartment that laterally surrounds the integrated device and the at least one passive device, and wherein the first compartment of the lid structure laterally surrounds only the integrated device and the thermal interface material.

[0087] Aspect 7: The package according to aspects 1 to 6, wherein the thermal interface material is coupled to the back side and the side surfaces of the integrated device.

[0088] Aspect 8: The package according to aspects 1 to 7, wherein the lid structure includes metal.

[0089] Aspect 9: The package according to aspects 1 to 8, wherein the package includes an adhesive that is coupled to the first surface of the substrate, and wherein the lid structure is coupled to the substrate by the adhesive.

[0090] Aspect 10: The package according to aspects 1 to 9, wherein the lid structure includes a top portion and a foot portion, and wherein the lid structure is coupled to the substrate such that the foot portion is located above the peripheral portion of the substrate.

[0091] Aspect 11: An apparatus, the apparatus comprising: a package including a substrate; a first integrated device coupled to a first surface of the substrate; a lid structure coupled to the substrate, wherein the lid structure includes a first compartment having a side surface and an inner top surface; and a thermal interface material coupled to (i) the first integrated device and (ii) the side surface and the inner top surface of the first compartment of the lid structure. The substrate includes at least one dielectric layer and a plurality of interconnects.

[0092] Aspect 12: The apparatus according to aspect 11, wherein the first compartment includes a cavity in the lid structure.

[0093] Aspect 13: The apparatus according to aspects 11 to 12, wherein the lid structure includes at least one protrusion, wherein the first compartment is defined by the at least one protrusion of the lid structure, and wherein the side surface of the first compartment is the side surface of the at least one protrusion of the lid structure.

[0094] Aspect 14: The device according to aspects 11 to 13, wherein the thermal interface material is coupled to the back side of the integrated device and the side surface of the integrated device.

[0095] Aspect 15: The device according to aspects 11 to 14, wherein the device is selected from the group consisting of: a music player, a video player, an entertainment unit, a navigation device, a communication device, a mobile device, a mobile phone, a smart phone, a personal digital assistant, a fixed-position terminal, a tablet computer, a computer, a wearable device, a laptop computer, a server, an Internet of Things (IoT) device, and a device in a motor vehicle.

[0096] Aspect 16: A method for manufacturing a package. The method provides a substrate including at least one dielectric layer and a plurality of interconnects. The method couples a first integrated device to a first surface of the substrate. The method couples a lid structure to the substrate, wherein the lid structure includes a first compartment having a side surface and an inner top surface. Coupling the lid structure includes coupling the lid structure to the first integrated device via a thermal interface material. The thermal interface material is coupled to the side surface and the inner top surface of the first compartment of the lid structure.

[0097] Aspect 17: The method according to aspect 16, wherein the thermal interface material is coupled to the back side of the integrated device and the side surface of the integrated device.

[0098] Aspect 18: The method according to aspects 16 to 17, wherein the first compartment includes a cavity in the lid structure.

[0099] Aspect 19: The method according to aspects 16 to 18, wherein the lid structure includes at least one protrusion, and wherein the first compartment is defined by the at least one protrusion of the lid structure.

[0100] Aspect 20: The method according to aspects 16 to 19, wherein the thermal interface material is coupled to the integrated device before coupling the lid structure to the substrate, and / or wherein the thermal interface material is coupled to the lid structure before coupling the lid structure to the substrate.

[0101] The various features of the present disclosure described herein can be implemented in different systems without departing from the present disclosure. It should be noted that the above aspects of the present disclosure are merely examples and should not be construed as limiting the present disclosure. The description of the aspects of the present disclosure is intended to be illustrative and not to limit the scope of the appended claims. Thus, the teachings can be readily applied to other types of devices, and many substitutions, modifications, and variations will be apparent to those skilled in the art.

Claims

1. An encapsulation, the encapsulation comprising: A substrate, the substrate comprising: At least one dielectric layer; and A plurality of interconnects; A first integrated device, the first integrated device being coupled to a first surface of the substrate; A lid structure, the lid structure being coupled to the substrate, wherein the lid structure includes a first compartment, the first compartment including a side surface and an inner top surface; and A thermal interface material, the thermal interface material being coupled to (i) the first integrated device and (ii) the side surface and the inner top surface of the first compartment of the lid structure.

2. The encapsulation according to claim 1, wherein the first compartment includes a cavity in the lid structure.

3. The encapsulation according to claim 1, Wherein the lid structure includes at least one protrusion, and Wherein the first compartment is defined by the at least one protrusion of the lid structure.

4. The encapsulation according to claim 3, wherein the side surface of the first compartment is the side surface of the at least one protrusion of the lid structure.

5. The encapsulation according to claim 1, wherein the first compartment of the lid structure only laterally surrounds the integrated device and the thermal interface material.

6. The encapsulation according to claim 1, the encapsulation further comprising at least one passive device coupled to the first surface of the substrate, Wherein the lid structure includes a second compartment that laterally surrounds the integrated device and the at least one passive device, and Wherein the first compartment of the lid structure only laterally surrounds the integrated device and the thermal interface material.

7. The encapsulation according to claim 1, wherein the thermal interface material is coupled to the back side and the side surface of the integrated device.

8. The encapsulation according to claim 1, wherein the lid structure includes metal.

9. The encapsulation according to claim 1, Wherein the encapsulation includes an adhesive, the adhesive being coupled to the first surface of the substrate, and Wherein the lid structure is coupled to the substrate by the adhesive.

10. The encapsulation according to claim 1, Wherein the lid structure includes a top portion and a foot portion, and Wherein the lid structure is coupled to the substrate such that the foot portion is located above the peripheral portion of the substrate.

11. A device, the device comprising: An encapsulation, the encapsulation comprising: A substrate, the substrate comprising: At least one dielectric layer; and A plurality of interconnects; A first integrated device, the first integrated device being coupled to a first surface of the substrate; A lid structure, the lid structure being coupled to the substrate, wherein the lid structure includes a first compartment, the first compartment including a side surface and an inner top surface; and A thermal interface material, the thermal interface material being coupled to (i) the first integrated device and (ii) the side surface and the inner top surface of the first compartment of the lid structure.

12. The device according to claim 11, wherein the first compartment includes a cavity in the lid structure.

13. The device according to claim 11, Wherein the lid structure includes at least one protrusion, wherein the first compartment is defined by the at least one protrusion of the lid structure, and wherein the side surface of the first compartment is the side surface of the at least one protrusion of the lid structure.

14. The apparatus of claim 11, wherein the thermal interface material is coupled to a back side of the integrated device and a side surface of the integrated device.

15. The apparatus of claim 11, wherein the apparatus is selected from the group consisting of: a music player, a video player, an entertainment unit, a navigation device, a communication device, a mobile device, a mobile phone, a smart phone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, a laptop computer, a server, an Internet of Things (IoT) device, and a device in a motor vehicle.

16. A method for manufacturing a package, the method comprising: providing a substrate comprising: at least one dielectric layer; and a plurality of interconnects; coupling a first integrated device to a first surface of the substrate; coupling a lid structure to the substrate, wherein the lid structure comprises a first compartment having a side surface and an inner top surface; and wherein coupling the lid structure comprises coupling the lid structure to the first integrated device via a thermal interface material, and wherein the thermal interface material is coupled to the side surface and the inner top surface of the first compartment of the lid structure.

17. The method of claim 16, wherein the thermal interface material is coupled to a back side of the integrated device and a side surface of the integrated device.

18. The method of claim 16, wherein the first compartment comprises a cavity in the lid structure.

19. The method of claim 16, wherein the lid structure comprises at least one protrusion, and wherein the first compartment is defined by the at least one protrusion of the lid structure.

20. The method of claim 16, wherein the thermal interface material is coupled to the integrated device before coupling the lid structure to the substrate, and / or wherein the thermal interface material is coupled to the lid structure before coupling the lid structure to the substrate.

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