Deep groove capacitor structure failure analysis method and system

Abstract

The invention discloses a deep trench capacitor structure failure analysis method and system, and the method comprises the steps: carrying out the grinding of the section of a trench of a DTC device through the combination of voltage contrast and a plane grinding technology, enabling the cross section to become smooth and flat, opening the section of the deep trench, providing an ideal sample surface for the subsequent electron beam absorption current in the deep trench, and improving the detection precision. The nanoprobe is adopted to directly test a current path, and a failure position which cannot be represented in a deep groove device or a material in the prior art in a traditional method can be effectively positioned, so that the failure representation rate is greatly improved, and the problem that the deep defect of the deep groove cannot be positioned in the traditional method is solved.

Description

Technical Field

[0001] The present invention relates to a method for analyzing the failure of a deep trench capacitor structure, belonging to the field of integrated circuit failure analysis. Background Art

[0002] Compared with the traditional planar MIM capacitor, the deep trench capacitor (DTC) increases the total surface area by etching deep trenches on the substrate wafer, thereby improving the energy storage capacity and discharge efficiency. This design enables the deep trench capacitor to store more charges and quickly release the stored charges when needed, providing a more stable power supply for the circuit. Usually, DTC devices can be integrated into the chip or used in the form of a single chip integrated with other chips through system-level packaging. However, the aspect ratio of deep trench devices is usually much greater than 10:1. Due to their complex three-dimensional structure, when a failure occurs inside the deep trench (such as failures caused by the interfaces and interactions between different materials such as silicon, nitrogen, and oxides), conventional failure analysis techniques cannot effectively locate the failure point and cannot characterize it physically.

[0003] For the traditional analysis method of DTC capacitors, taking Figure 1 the deep trench capacitor shown as an example, for surface failure points, hot spot localization can be performed, the metal layer can be removed, and electrical tools such as focused ion beam (FIB) combined with SEM, TEM, EDS, and nano-probe technology can be used for characterization to reveal the failure site and mechanism; while for failure points inside deeper trench capacitor devices, such as electrical failures caused by oxide layer breakdown and material-related anomalies, especially leakage failures, conventional analysis methods cannot effectively locate them, resulting in the inability to effectively characterize the failure site. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a method for analyzing the failure of a deep trench capacitor structure to solve the problem that it is difficult to accurately locate the failure hot spots deep inside the deep trench.

[0005] To solve the above problems, the present invention provides a method for analyzing the failure of a deep trench capacitor structure, including: Step 1, confirm the lead-out ends of the upper and lower electrodes of the deep trench capacitor to be analyzed for failure, measure the current-voltage curve of the deep trench capacitor, and confirm its electrical failure characteristics; Perform a thinning process on the back of the substrate of the deep trench capacitor, use a light-emitting microscope to locate the failure hot spots in the image of the back of the device, complete the rough positioning of the failure hot spots at this time, and set Mark alignment points on the back of the device to mark the roughly positioned failure hot spots; Step 2: Strip the metal layers on the surface of the deep trench capacitor layer by layer. If a failure point is found, stop stripping; if no failure point is found, continue stripping until the contact hole CT layer; observe the contact hole voltage contrast with the help of SEM / FIB, locate the abnormal contrast image, and further perform precise positioning; Step 3: Perform nanoprobe test on the position of abnormal contrast image to confirm its leakage path; use electron beam to absorb current to detect abnormal leakage point at the abnormal position. If a failure hot spot can be found on the front of the device, stop and perform TEM sample preparation observation on the failure position; If no failure hotspots are found, proceed to the next step; Step 4, sharpening the failure hotspots of the image on the back of the device according to step 1, and converging the failure hotspots; Step 5, confirm the arrangement of the deep trench capacitors and determine the position of the plane grinding of the deep trenches; According to the mark alignment point formed on the back of the device in step 1 and the voltage contrast image on the front of the device, the device is polished until it is close to the failure hotspot position on the back, exposing the cross section of the device; Step 6: Repeat the use of EBAC (electron beam absorption current) to detect failure hotspots on the exposed device cross-section. The nanoprobe is placed in contact with the side wall of the contact hole. At this time, the current at the abnormal open and short circuit failure position will be derived to form a current abnormality contrast area, and the abnormality can be characterized. Afterwards, TEM sample preparation and observation are performed based on the location of the failure hotspot.

[0006] Furthermore, the aspect ratio of the deep trench of the deep trench capacitor is at least greater than 2:1.

[0007] Furthermore, in step 1, a mark alignment point is set on the back of the device, and its shape and size are determined according to the size of the device, and the distance between the mark alignment point and the failure hotspot is within the range of 0.1 to 100 um; The mark alignment points are used to locate and identify failure hot spots during failure analysis.

[0008] Furthermore, the mark alignment points are four grid points forming a cross, and the failure hotspot is surrounded in a central area determined by the four grid points.

[0009] Furthermore, in step 4, the failure hot spots are sharpened, and the degree of sharpening is in the range of 0 to 100%.

[0010] Furthermore, in step 4, the sharpening process includes using a physical or chemical method to enhance the visibility of the failure hotspot.

[0011] Furthermore, step 4 is omitted.

[0012] Further, in step 5, when performing planar grinding on the cross-section of the device, it is necessary to ensure the grinding position accuracy and the flatness and cleanliness of the cross-section.

[0013] Further, in step 6, if there is no contact hole at the current position, the nano-probe is brought into contact with the upper and lower capacitor plates.

[0014] A deep trench capacitor failure analysis system, the failure analysis system comprising: A grinding device, which performs planar grinding on the deep trench cross-section of the deep trench capacitor; A sharpening device for sharpening the pattern of the failure hot spot; A marking device for setting mark alignment points on the back of the device; A probe test device for performing nano-probe testing on the failure hot spot.

[0015] The aspect ratio of the deep trench of the deep trench capacitor is greater than 2:1.

[0016] The deep trench capacitor failure analysis method and system of the present invention utilize planar grinding (polish) technology to grind the trench of the DTC device in cross-section, making its cross-section smooth and flat, providing an ideal sample surface for subsequent electron beam induced current (EBAC) inside the deep trench. It can effectively locate the failure positions that were previously unable to be characterized inside the deep trench device or material by traditional methods, thereby greatly improving the failure characterization success rate and solving the problem that traditional methods cannot locate defects deep in the deep trench. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is a schematic diagram of the cross-sectional structure of an existing deep trench capacitor and the surface and deep failure hot spots.

[0018] Figure 2 is a schematic diagram of performing back thinning in step 1 of the present invention and marking the mark alignment points of the failure hot spot.

[0019] Figure 3 is a schematic diagram of locating an abnormal contrast image through voltage contrast in step 2 of the present invention.

[0020] Figure 4 is a schematic diagram of the physical object of four-terminal nano-probe detection in step 3 of the present invention.

[0021] Figure 5 is based on the present invention Figure 4 Four-terminal nano-probe detection to obtain the current-voltage curve to confirm the leakage path and find the abnormal position.

[0022] Figure 6It is a schematic diagram of the sharpening process of the roughly located hot spot image in step 1 in step 4 of the present invention.

[0023] Figure 7 It is a schematic diagram of the present invention for step 5 to perform planar grinding (polish) on the deep trench with abnormal voltage contrast to obtain a cross-section.

[0024] Figure 8 It is a schematic diagram after the planar grinding (polish) of the deep trench is completed in step 5 of the present invention.

[0025] Figure 9 It is a schematic diagram of the present invention for step 6 to repeatedly perform EBAC detection on the cross-section of the deep trench using a nano-probe to obtain hot spots of failure.

[0026] Figure 10 It is a schematic diagram of the process flow of the method of the present invention. Detailed implementation manners

[0027] The following provides the detailed implementation manners of the present invention in conjunction with the accompanying drawings, and clearly and completely describes the technical solutions in the present invention. However, the present invention is not limited to the following implementation manners. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all the embodiments. According to the following description and the claims, the advantages and features of the present invention will be clearer. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise ratios, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.

[0028] The present invention can be implemented in different forms and should not be construed as limited to the embodiments presented herein. On the contrary, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of the present invention to those skilled in the art. In the accompanying drawings, for clarity, the dimensions and relative dimensions of layers and regions may be exaggerated, and the same reference numerals throughout the drawings denote the same elements. In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be construed as a limitation of the present application. In addition, the terms "first", "second", "third" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance.

[0029] The present invention provides a method for analyzing the failure of deep trench capacitors and a preparation scheme for deep trench device samples. Through steps such as refined failure hot spot marking, grinding, and microprobe electrical positioning, a standard analysis system for deep trench device analysis is formed through examples. With the help of this method, the problem of deep trench capacitor failure that could not be analyzed in the past can be effectively solved.

[0030] The deep trench involved in the deep trench capacitor of the present invention has an aspect ratio greater than 2:1. In fact, the aspect ratio of general deep trenches is much greater than 2:1.

[0031] The specific implementation manner of the method of the present invention is as follows: Step 1, confirm the lead-out terminals of the upper and lower electrodes of the deep trench capacitor device DTC, and measure the current-voltage curve of the failed DTC device to confirm its electrical failure characteristics; Thin the back of the substrate of the deep trench capacitor device, and use a luminescence microscope to locate the hot spots on the back of the device. At this time, rough positioning is completed, and Mark alignment points are formed on the back of the device. The Mark alignment points are used to mark and label the defective areas under the rough points to facilitate the positioning and identification of hot spot areas during subsequent failure analysis. The marking method can be arbitrary. The shape and size of the mark alignment points on the back of the device are determined according to the device size, and the shape of the mark alignment points is generally 0.1 um to 100 um away from the failure hot spot.

[0032] The present invention uses four points forming a cross to mark the defective areas of the rough points, as Figure 2 shown.

[0033] Step 2, layer-by-layer strip the metal layer on the front surface of the device. If problems are found, stop; if no problems are found, strip to the contact hole CT level; observe the voltage contrast of the contact hole (CT) with the help of SEM / FIB, locate the abnormal contrast image, and further perform precise positioning, as Figure 3 shown.

[0034] Step 3, perform a nano-probe test on the position of the abnormal contrast image to confirm its leakage path, as Figure 4 shown. Use four-terminal probing of the nano-probe to hit the position with the abnormal contrast image. After nano-probe testing, the current leakage path is from the upper plate 3 to the lower plate 2, as Figure 5 shown; use EBAC (electron beam induced current) to detect the abnormal leakage points at the abnormal position. If the failure point can be found on the front surface of the device, stop, and prepare a TEM sample for observation of the failure position. If not, continue to the next step.

[0035] Step 4, according to Figure 2 sharpen the failure hot spot, converge the failure hot spot, and make the failure hot spot image clearer. As Figure 6Sharpening involves using physical or chemical methods to enhance the visibility of failure hot spots, with the degree of sharpening ranging from 0% to 100% depending on the specific situation.

[0036] The sharpening step is not necessary and can be skipped depending on the specific situation and you can proceed directly to the next step.

[0037] Step 5: Confirm the arrangement of deep trench capacitors, such as Figure 7 As shown, the wireframe location is the deep trench area which is the failure hotspot.

[0038] According to the mark alignment point formed on the back of the device in step 1, combined with the voltage contrast image on the front of the device, the device is plane-polished until it stops close to the hot spot on the back, exposing the cross section of the device. Precision grinding equipment is used to polish the cross section of the device to ensure the grinding position accuracy and the flatness and cleanliness of the cross section, and to ensure the quality of the formed cross section.

[0039] like Figure 8 The figure shows the cross section of the deep trench capacitor device and the position of the alignment mark on the back of the device after polishing. The back is facing up, and the cross-shaped mark alignment point marks the location of the deep trench where the failure hotspot is located. The cross-section is exposed by cross-section grinding, and one of the four alignment points is removed by grinding.

[0040] Step 6: For the exposed device cross section, Figure 9 As shown, the electron beam absorption current EBAC is repeatedly used to detect abnormal leakage points, and the nanoprobe is contacted with the side wall of the contact hole. If there is no contact hole at the current position, it will contact the upper and lower plates of the capacitor. At this time, the current at the abnormal open short circuit failure position will be derived to form a current abnormal contrast area, and the abnormality can be characterized. Afterwards, TEM sample preparation and observation are performed according to the located abnormal point.

[0041] A deep trench capacitor failure analysis system is provided. The system is used to implement the above-mentioned deep trench capacitor failure analysis process. Compared with the existing failure analysis system, the system also has at least the following components: Marking equipment is used to set the mark alignment point on the back of the device.

[0042] Grinding equipment, mainly polish precision grinding equipment, is used for cross-section polishing of deep trench capacitor components. Precision grinding equipment can ensure the cross-section grinding accuracy and grinding effect of deep trench capacitors.

[0043] The sharpening device includes an image processing program for sharpening the graphics of the failure hotspot and converging the failure hotspot.

[0044] It also includes other conventional failure analysis tools, such as voltage contrast equipment, nanoprobe equipment, FIB, SEM, TEM, EDS, etc.

[0045] Through the above method of the present invention, the failure position inside the deep groove device or material that could not be characterized in the past by the traditional method can be effectively located, thereby greatly improving the failure characterization success rate. The present invention uses the plane polishing technology to grind the profile of the DTC device groove, so that its cross section becomes smooth and flat, providing an ideal sample surface for the subsequent electron beam absorption current (EBAC) inside the deep groove. In the current image, there is a leakage area inside the deep groove, and the current will be derived to form a bright area, so as to achieve rapid positioning, solving the problem that the traditional method cannot locate the defects deep in the deep groove.

[0046] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A method for failure analysis of a deep trench capacitor structure, characterized in that: Include: Step 1, confirming the lead-out terminals of the upper and lower plates of the deep trench capacitor to be analyzed, measuring the current-voltage curve of the deep trench capacitor, and confirming its electrical failure characteristics; The back side of the deep trench capacitor is thinned, and the image of the back side of the device is imaged using a light emitting microscope to locate the failure hotspot. At this point, the failure hotspot is roughly located, and a Mark alignment point is set on the back side of the device to mark the roughly located failure hotspot. Step 2, peeling off the metal layers on the surface of the deep trench capacitor layer by layer, and stopping if a failure point is found; If no failure point is found, continue to peel the layer until the contact hole CT layer; observe the contact hole voltage contrast with the help of SEM / FIB, locate the abnormal contrast image, and further perform precise positioning; Step 3: Perform nanoprobe test on the position of abnormal contrast image to confirm its leakage path; use electron beam to absorb current to detect abnormal leakage point at the abnormal position. If a failure hot spot can be found on the front of the device, stop and perform TEM sample preparation observation on the failure position; If no failure hotspots are found, proceed to the next step; Step 4, sharpening the failure hotspots of the image on the back of the device according to step 1, and converging the failure hotspots; Step 5, confirm the arrangement of the deep trench capacitors and determine the position of the plane grinding of the deep trenches; According to the mark alignment point formed on the back of the device in step 1 and the voltage contrast image on the front of the device, the device is cross-sectioned and plane-polished until it stops near the failure hotspot position on the back, exposing the cross section of the deep trench of the device; Step 6, for the exposed device cross section, repeatedly use electron beam to absorb current to detect failure hotspots, and contact the nanoprobe to the side wall of the contact hole. At this time, the current at the abnormal open and short circuit failure position will be derived to form a current abnormality contrast area, and the abnormality can be characterized; then, according to the located failure hotspot, TEM sample preparation and observation are carried out.

2. The method for failure analysis of the deep trench capacitor structure according to claim 1, wherein: The deep trench capacitor has a depth-to-width ratio of at least 2:

1.

3. The method for failure analysis of the deep trench capacitor structure according to claim 1, wherein: In the step 1, a mark alignment point is set on the back of the device, and its shape and size are determined according to the size of the device, and the distance between the mark alignment point and the failure hotspot is within the range of 0.1 to 100 um; The mark alignment points are used to locate and identify failure hot spots during failure analysis.

4. The method for failure analysis of the deep trench capacitor structure according to claim 3, wherein: The mark alignment points are four grid points forming a cross, and the failure hotspot is surrounded in a central area determined by the four grid points.

5. The method for failure analysis of the deep trench capacitor structure according to claim 1, wherein: In step 4, the failure hot spots are sharpened, and the degree of sharpening is in the range of 0 to 100%.

6. The method for failure analysis of the deep trench capacitor structure according to claim 1, wherein: In step 4, the sharpening process includes using physical or chemical methods to enhance the visibility of the failure hotspot.

7. The method for failure analysis of the deep trench capacitor structure according to claim 1, wherein: Omit the step 4.

8. The method for analyzing the failure of the deep trench capacitor structure according to claim 1, wherein: In step 5, the device is plane-polished on the cross section, and the grinding position accuracy and the smoothness and cleanliness of the cross section must be ensured.

9. The method for failure analysis of the deep trench capacitor structure according to claim 1, wherein: In step 6, if there is no contact hole at the current position, the nanoprobe is placed in contact with the upper and lower plates of the capacitor.

10. A deep trench capacitor failure analysis system, characterized in that: The failure analysis system comprises: A grinding device, wherein the grinding device performs plane grinding of a deep trench cross section of a deep trench capacitor; A sharpening device, used for sharpening the graphics of the failure hot spots; Marking equipment, used to set the mark alignment point on the back of the device; Probe test equipment for performing nano-probe testing on failure hotspots.

11. A deep trench capacitor failure analysis system according to claim 10, characterized in that: The aspect ratio of the deep trench of the deep trench capacitor is greater than 2:1.

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