Mask and overlay error measurement method

Abstract

The invention provides a mask and an overlay error measurement method, and relates to the technical field of detection. The mask plate comprises a test pattern structure arranged in the middle area of the mask plate, the test pattern structure is used for forming an overlay mark on a wafer, and the test pattern structure comprises a first overlay pattern group, a first reference pattern group, a second overlay pattern group and a second reference pattern group which are sequentially arranged in the circumferential direction of a rotation center, the first reference pattern group and the second reference pattern group are of a central symmetry structure, and marks, mapped on the wafer, of the first overlay pattern group and the second overlay pattern group are arranged in a mutually offset mode and do not coincide with the marks, mapped on the wafer, of the first reference pattern group and the second reference pattern group. According to the invention, a plurality of different pattern groups are integrated on a single mask plate at the same time, and three overlay layer marks can be directly formed in the quadrant region corresponding to the wafer, so that more effective overlay mark image information is obtained, and the detection precision of the overlay error is improved.

Description

Technical Field

[0001] This application relates to the field of detection technology, and specifically relates to a reticle and a method for measuring overlay error. Background Art

[0002] In the lithography process flow, first, a layer of photoresist is coated on the surface of a wafer (also known as a silicon wafer). Subsequently, using the light source provided by an exposure equipment, light is passed through a reticle with a circuit pattern engraved on it, that is, the commonly referred to photomask (abbreviated as mask), and irradiated onto the wafer. Through the photosensitive reaction of the photoresist material to light, the circuit pattern on the reticle is accurately transferred into the photoresist layer, thereby forming the required photoresist pattern.

[0003] Before performing the lithography process, all patterns designed with circuit graphics are made on the reticle. Circuit graphic design usually involves multi-layer stacking technology. In this process, it is necessary to accurately control the offset in the X and Y directions between each layer, that is, the overlay accuracy. The detection of overlay accuracy is crucial for the research and development of semiconductor equipment, as well as the daily maintenance and equipment acceptance of semiconductor factories. Summary of the Invention

[0004] Embodiments of this application provide a reticle and a method for measuring overlay error, which are used to improve the detection accuracy of overlay error.

[0005] In some embodiments, a reticle is provided, which includes a test pattern structure disposed in the middle area of the reticle. The test pattern structure is used to form overlay marks on the wafer. The test pattern structure includes a first overlay pattern group, a first reference pattern group, a second overlay pattern group, and a second reference pattern group sequentially arranged circumferentially along the rotation center. The rotation center is the center of the reticle. When the reticle is in the initial position, the areas corresponding to the first overlay pattern group, the first reference pattern group, the second overlay pattern group, and the second reference pattern group on the wafer are defined as the first quadrant area, the second quadrant area, the third quadrant area, and the fourth quadrant area respectively. Among them, the first reference pattern group and the second reference pattern group are centrosymmetric structures; when the first overlay pattern group and the second overlay pattern group rotate around the rotation center to the second quadrant area or the fourth quadrant area respectively, the marks mapped by the first overlay pattern group and the second overlay pattern group on the wafer are in a mutually offset layout and do not coincide with the marks mapped by the first reference pattern group and the second reference pattern group on the wafer.

[0006] In some embodiments, the first reference pattern group includes at least four first sub-reference patterns, and each of the first sub-reference patterns is arranged along a first direction and a second direction, and the first direction is perpendicular to the second direction.

[0007] In some embodiments, the first set of lithography pattern group includes at least four first sub-lithography patterns, and each of the first sub-lithography patterns is arranged along the first direction and the second direction. The first sub-lithography pattern arranged along the first direction corresponds to the first sub-reference pattern arranged along the second direction, and the first sub-lithography pattern arranged along the second direction corresponds to the first sub-reference pattern arranged along the first direction;

[0008] The second set of lithography pattern group includes at least four second sub-lithography patterns, and each of the second sub-lithography patterns is arranged along the first direction and the second direction. The second sub-lithography pattern arranged along the first direction corresponds to the first sub-reference pattern arranged along the second direction, and the second sub-lithography pattern arranged along the second direction corresponds to the first sub-reference pattern arranged along the first direction.

[0009] In some embodiments, the first reference pattern group further includes a first sub-reference border, and each of the first sub-reference patterns is disposed around the outer periphery of the first sub-reference border. When each of the first sub-lithography patterns and each of the second sub-lithography patterns rotate around the rotation center to the first quadrant region, each of the first sub-lithography patterns and each of the second sub-lithography patterns are located inside the inner periphery of the first sub-reference border;

[0010] Or, each of the first sub-reference patterns is disposed around the inner periphery of the first sub-reference border. When each of the first sub-lithography patterns and each of the second sub-lithography patterns rotate around the rotation center to the first quadrant region, each of the first sub-lithography patterns and each of the second sub-lithography patterns are located outside the outer periphery of the first sub-reference border.

[0011] In some embodiments, the first set of lithography pattern group further includes a first lithography center. The four first sub-lithography patterns form a centrosymmetric structure with one of the first sub-lithography patterns as a reference object, rotating around the first lithography center with a rotation angle of 90° and sequentially rotating and moving three times;

[0012] The second set of lithography pattern group further includes a second lithography center. The four second sub-lithography patterns form a centrosymmetric structure with one of the second sub-lithography patterns as a reference object, rotating around the second lithography center with a rotation angle of 90° and sequentially rotating and moving three times.

[0013] In some embodiments, the first reference pattern group further includes a first reference center, and the four first sub-reference patterns form a centrosymmetric structure which is formed by taking one of the first sub-reference patterns as a reference object, rotating and moving it three times around the first reference center with a rotation angle of 90°.

[0014] In some embodiments, the rotation radii of the multiple first sub-patterning patterns in the first patterning pattern group are smaller than the rotation radii of the multiple second sub-patterning patterns in the second patterning pattern group;

[0015] The rotation radii of the multiple second sub-patterning patterns in the second patterning pattern group are smaller than the rotation radii of the multiple first sub-reference patterns in the first reference pattern group.

[0016] In some embodiments, the difference between the rotation radii of the multiple first sub-patterning patterns and the rotation radii of the multiple second sub-patterning patterns is smaller than the difference between the rotation radii of the multiple second sub-patterning patterns and the rotation radii of the multiple first sub-reference patterns.

[0017] In some embodiments, the first reference pattern group includes a first reference center and four first sub-reference units, and the four first sub-reference units form a centrosymmetric structure which is formed by taking one of the first sub-reference units as a reference object, rotating and moving it three times around the first reference center with a rotation angle of 90°.

[0018] In some embodiments, the first patterning pattern group includes a first patterning center and four first sub-patterning units. The four first sub-patterning units are respectively centrosymmetric structures, and the first patterning pattern group is a centrosymmetric structure. The symmetry center of the first patterning pattern group is the first patterning center;

[0019] The second patterning pattern group includes a second patterning center and four second sub-patterning units. The four second sub-patterning units are respectively centrosymmetric structures, and the second patterning pattern group is a centrosymmetric structure. The symmetry center of the second patterning pattern group is the second patterning center;

[0020] The distances from the first patterning center, the second patterning center, and the first reference center to the rotation center are equal.

[0021] In some embodiments, the four first sub-patterning units have the same shape and structure, and the four first sub-patterning units form a centrosymmetric structure which is formed by taking one of the first sub-patterning units as a reference object, rotating and moving it three times around the first patterning center with a rotation angle of 90°.

[0022] The four second sub-nested etching units have the same shape and structure. The four second sub-nested etching units are a centrosymmetric structure formed by taking one of the second sub-nested etching units as a reference object, rotating and moving around the second nested center in sequence three times with a rotation angle of 90°.

[0023] Among them, the radii of rotation of each of the first sub-reference units around the first reference center, the radii of rotation of each of the first sub-nested etching units around the first nested center, and the radii of rotation of each of the second sub-nested etching units around the second nested center are equal.

[0024] In some embodiments, it further includes an alignment pattern structure. The alignment pattern structure is disposed on the outer periphery of the test pattern structure, and the alignment pattern structure is used to perform mask alignment.

[0025] In some embodiments, the alignment pattern structure includes two first alignment marks. The two first alignment marks are respectively located on opposite sides of the test pattern structure. The straight line where the two first alignment marks are located is parallel to and does not coincide with the first center line. The first center line is a reference line passing through the rotation center in the mask plane.

[0026] In some embodiments, a nested etching error measurement method is provided, including the following steps:

[0027] Provide a mask as described in any one of the foregoing embodiments;

[0028] After placing the mask at the initial position, obtain the reference layer mark;

[0029] After placing the mask at the first position, obtain the first nested layer mark. The first position is obtained by rotating 90° forward from the initial position;

[0030] After placing the mask at the second position, obtain the second nested layer mark. The second position is obtained after rotating 90° in the reverse direction from the position. The second direction is opposite to the first direction;

[0031] Measure the reference layer mark, the first nested layer mark, and the second nested layer mark to obtain the nested etching error.

[0032] In some embodiments, the step of obtaining the reference layer mark after placing the mask at the initial position includes:

[0033] Place the wafer coated with photoresist on the wafer stage;

[0034] Place the mask at the initial position of the mask stage;

[0035] After performing mask alignment, expose and develop;

[0036] And / or, obtaining the first set of layer alignment marks after placing the mask in the first position includes:

[0037] Removing the mask from the mask stage and then placing the mask in the first position;

[0038] Removing the wafer with the fiducial mark layer from the wafer stage and then loading the wafer in situ;

[0039] Performing mask alignment and wafer alignment and then exposing;

[0040] And / or, obtaining the second set of layer alignment marks after placing the mask in the second position includes:

[0041] Removing the mask from the mask stage and then placing the mask in the second position;

[0042] Removing the wafer with the fiducial layer marks and the first set of layer alignment marks from the wafer stage and then loading the wafer in situ;

[0043] Performing mask alignment and wafer alignment and then exposing and developing.

[0044] In some embodiments, measuring the fiducial layer marks, the first set of layer alignment marks, and the second set of layer alignment marks to obtain the overlay error includes:

[0045] Obtaining the fiducial features in the fiducial layer marks, the first set of overlay features in the first set of layer alignment marks, and the second set of overlay features in the second set of layer alignment marks, and calculating the error between the first set of overlay features and the second set of overlay features, the error between the fiducial features and the first set of overlay features, and / or the error between the fiducial features and the second set of overlay features in at least one quadrant region.

[0046] In the present application, multiple graphic groups are integrated on a single mask at the same time, and corresponding alignment marks can be directly formed on the wafer. By rotating the mask multiple times, the fiducial layer marks and two sets of layer alignment marks can be directly formed in the second quadrant region and the fourth quadrant region, so as to obtain more effective overlay mark image information and improve the detection accuracy of the overlay error. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0048] Figure 1 It is a schematic structural diagram of a mask in some embodiments of the present application;

[0049] Figure 2 is Figure 1 Schematic diagram of the alignment marks formed by the mask on the wafer in the embodiment;

[0050] Figure 3 is the schematic diagram of the structure of the mask in another embodiment of the present application;

[0051] Figure 4 is Figure 3 Schematic diagram of the alignment marks formed by the mask on the wafer in the embodiment;

[0052] Figure 5 is the schematic diagram of the structure of the mask in yet another embodiment of the present application;

[0053] Figure 6 is Figure 5 Schematic diagram of the alignment marks formed by the mask on the wafer in the embodiment;

[0054] Figure 7 is the schematic diagram of the structure of the mask in still another embodiment of the present application;

[0055] Figure 8 is Figure 7 Schematic diagram of the alignment marks formed by the mask on the wafer in the embodiment;

[0056] Figure 9 is the schematic diagram of the flow of the overlay error measurement method in some embodiments of the present application;

[0057] Figure 10 is Figure 9 Schematic diagram of the refined flow of step S200 in the embodiment;

[0058] Figure 11 is Figure 9 Schematic diagram of the refined flow of step S300 in the embodiment;

[0059] Figure 12 is Figure 9 Schematic diagram of the refined flow of step S400 in the embodiment. Detailed implementation manners

[0060] The present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be particularly noted that the following embodiments are only used to illustrate the present application, but do not limit the scope of the present application. Similarly, the following embodiments are only partial embodiments of the present application rather than all embodiments. All other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present application.

[0061] The terms "first", "second", and "third" in the embodiments of the present application are only for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first", "second", and "third" may explicitly or implicitly include at least one such feature. In the description of the present application, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise specifically defined. All directional indications (such as up, down, left, right, front, back...) in the embodiments of the present application are only used to explain the relative positional relationship and movement conditions between components in a specific posture (as shown in the drawings). If the specific posture changes, the directional indications will also change accordingly. The terms "include" and "have" in the embodiments of the present application and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but optionally further includes unlisted steps or units, or optionally further includes other steps or components inherent to these processes, methods, products, or devices.

[0062] Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the present application. The phrase appears in various places in the specification and is not necessarily referring to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0063] Please refer to Figure 1 and Figure 2 , Figure 1 is a schematic structural diagram of a photomask in some embodiments of the present application, Figure 2 is Figure 1 a schematic diagram of the overlay marks formed by the photomask on the wafer in the embodiment.

[0064] An embodiment of the present application provides a reticle 100, which includes a test pattern structure 10 disposed in the middle region 101 of the reticle 100. The test pattern structure 10 is used to form alignment marks on the wafer 200. The test pattern structure 10 includes a first alignment pattern group 11, a first reference pattern group 12, a second alignment pattern group 13, and a second reference pattern group 14 that are sequentially arranged circumferentially along the rotation center 103. The rotation center 103 is the center of the reticle 100. It is defined that when the reticle 100 is in the initial position, the regions corresponding to the first alignment pattern group 11, the first reference pattern group 12, the second alignment pattern group 13, and the second reference pattern group 14 on the wafer 200 are the first quadrant region 201, the second quadrant region 202, the third quadrant region 203, and the fourth quadrant region 204 in sequence. The first reference pattern group 12 and the second reference pattern group 14 are centrosymmetric structures, and their symmetry center is the rotation center 103. When the first alignment pattern group 11 and the second alignment pattern group 13 respectively rotate around the rotation center 103 to the second quadrant region 202 or the fourth quadrant region 204, the marks mapped by the first alignment pattern group 11 and the second alignment pattern group 13 on the wafer 200 are in an offset layout with each other and do not coincide with the marks mapped by the first reference pattern group 12 and the second reference pattern group 14 on the wafer 200.

[0065] It should be noted that the first alignment pattern group 11, the second alignment pattern group 13, the first reference pattern group 12, and the second reference pattern group 14 are fixedly formed in the middle region 101 of the reticle 100. The first quadrant region 201, the second quadrant region 202, the third quadrant region 203, and the fourth quadrant region 204 divided on the wafer 200 are divided according to the initial position of the reticle 100. Therefore, according to the different positions of the reticle 100, the test pattern structures 10 corresponding to each quadrant region can be different. The first alignment pattern group 11 and the second alignment pattern group 13 respectively rotating around the rotation center 103 to the second quadrant region 202 means that the first alignment pattern group 11 and the second alignment pattern group 13 successively rotate to the positions corresponding to the second quadrant region 202 of the wafer 200. Similarly, the first alignment pattern group 11 and the second alignment pattern group 13 respectively rotating around the rotation center 103 to the fourth quadrant region 204 means that the first alignment pattern group 11 and the second alignment pattern group 13 successively rotate to the positions corresponding to the fourth quadrant of the wafer 200.

[0066] Please refer to Figure 2 , Figure 2The medium purple marks represent the reference layer marks 205, the green marks represent the first set of layer marks 206, and the blue marks represent the second set of layer marks 207. Based on the mask 100 in this embodiment, when forming the alignment marks, the mask 100 can be first placed at the initial position of the mask stage and then the reference layer marks 205 are obtained on the wafer 200; then the mask 100 is placed at the first position and the first set of layer marks 206 are obtained on the wafer 200, and the first position is obtained by rotating the initial position forward by 90°; then the mask 100 is placed at the second position and the second set of layer marks 207 are obtained on the wafer 200, and the second position is obtained by rotating the initial position backward by 90°, and the second direction is opposite to the first direction. As Figure 2 shown, the positive direction is the counterclockwise direction ( Figure 2 the R direction in

[0067] ), and the negative direction is the clockwise direction. The inspection of the alignment accuracy is of irreplaceable importance for the research and development of semiconductor equipment and the routine maintenance and acceptance of semiconductor factories. Considering that each position in the mask library in the machine should be available for customers as much as possible, the mask 100 for detecting the alignment accuracy should also occupy only one library position as much as possible, which requires realizing single-board alignment. In the single-board alignment process in the related art, generally only two sets of layer marks are measured. In this application, multiple graphic groups are integrated on a single mask 100, and the corresponding alignment marks can be directly formed on the wafer 200. By rotating the mask multiple times, the reference layer marks and two sets of layer marks can be directly formed in the second quadrant area 202 and the fourth quadrant area 204, so as to obtain more effective alignment mark image information and improve the detection accuracy of the alignment error.

[0068] At the same time, the alignment error in the lithography machine is generally affected by various factors such as the performance of the photoresist, the deviation of the mask pattern, and the error of the lithography machine itself. When fabricating the current layer of lithography, the existing patterns on the wafer 200 substrate may come from different processes. In the related art, the influence of different processes on the alignment error is ignored, or different masks 100 need to be used in combination to calculate the alignment error under different processes, which undoubtedly increases the number of masks 100 and makes the error measurement process cumbersome. In this application, the forming process of the reference layer marks 205 can be different from the forming processes of the first set of layer marks 206 and the second set of layer marks 207, and thus the alignment error under the influence of different factors can be accurately measured by the method of controlling variables.

[0069] Combined with Figure 2As shown, fiducial layer marks 205, a first set of lithography layer marks 206, and a second set of lithography layer marks 207 are formed in the second quadrant region 202 and the fourth quadrant region 204 on the wafer 200 without overlapping each other. During each lithography error measurement process, the marks in these two quadrant regions can be measured simultaneously. If it is necessary to measure the lithography errors of four different quadrant regions, only two different wafers 200 need to be provided for measurement successively. Among them, the two wafers 200 are the first wafer and the second wafer respectively. The first quadrant region 201 of the first wafer is determined according to the initial position of the mask 100. The first quadrant region 201 of the second wafer corresponds to the second quadrant region 202 or the fourth quadrant region 204 of the first wafer 200. By measuring the lithography errors in the second quadrant region 202 and the fourth quadrant region 204 of the first wafer, and the lithography errors in the second quadrant region 202 and the fourth quadrant region 204 of the second wafer (i.e., the lithography errors in the first quadrant region 201 and the third quadrant region 203 of the first wafer), the measurement of the lithography errors of all quadrant regions can be achieved.

[0070] As Figure 2 shown, a rectangular coordinate system is established with the position corresponding to the rotation center 103 on the wafer 200 as the origin. The X-axis and Y-axis of the rectangular coordinate system divide the wafer 200 into a first quadrant region 201, a second quadrant region 202, a third quadrant region 203, and a fourth quadrant region 204. The measurement directions of the lithography marks formed on the wafer 200 include a measurement direction along the first direction and a measurement direction along the second direction. Optionally, the first direction can be parallel to the X direction, and the second direction can be parallel to the Y direction. In the second quadrant region 202 or the fourth quadrant region 204, by measuring the image information of the fiducial layer mark 205 in the X direction, the X coordinate of the symmetry center A can be determined; similarly, by measuring the image information of the fiducial layer mark 205 in the Y direction, the Y coordinate of the symmetry center A can be determined. In this way, the coordinates of the symmetry center A can be obtained as (XA, YA). Then, the same operation is performed on the first layer of lithography marks: the X coordinate of the symmetry center B is measured in the X direction, and the Y coordinate of the symmetry center B is measured in the Y direction, so as to determine the coordinates of the symmetry center B as (XB, YB). Finally, the above process is repeated for the second layer of lithography marks, and measurements are respectively performed in the X and Y directions to obtain the coordinates of the symmetry center C as (XC, YC). According to the symmetry center A (XA, YA) and the symmetry center B (XB, YB), the lithography error between the fiducial layer mark 205 and the first set of lithography layer marks 206 is obtained; through the symmetry center B (XB, YB) and the symmetry center C (XC, YC), the lithography error between the first set of lithography layer marks 206 and the second set of lithography layer marks 207 is obtained; through the symmetry center A (XA, YA) and the symmetry center C (XC, YC), the lithography error between the fiducial layer mark 205 and the second set of lithography layer marks 207 is obtained.

[0071] Please refer to Figure 1 , in some embodiments, the first reference pattern group 12 includes at least four first sub-reference patterns 121, and each of the first sub-reference patterns 121 is arranged along a first direction and a second direction respectively.

[0072] Since the second reference pattern group 14 and the first reference pattern group 12 are centrosymmetric structures, similarly, the second reference pattern group 14 includes at least four second sub-reference patterns 141, and each of the second sub-reference patterns 141 is arranged along the first direction and the second direction respectively.

[0073] In some embodiments, the first set of lithography pattern group 11 includes at least four first sub-lithography patterns 111, and each of the first sub-lithography patterns 111 is arranged along the first direction and the second direction respectively. The first sub-lithography pattern 111 arranged along the first direction corresponds to the first sub-reference pattern 121 arranged along the second direction, and the first sub-lithography pattern 111 arranged along the second direction corresponds to the first sub-reference pattern 121 arranged along the first direction. Here, the correspondence means that in the lithography marks formed by each first sub-lithography pattern 111 and the first sub-reference pattern 121 in the same quadrant region, the corresponding first sub-lithography pattern 111 and the first sub-reference pattern 121 are in an offset layout.

[0074] The second set of lithography pattern group 13 includes at least four second sub-lithography patterns 131, and each of the second sub-lithography patterns 131 is arranged along the first direction and the second direction respectively. The second sub-lithography pattern 131 arranged along the first direction corresponds to the first sub-reference pattern 121 arranged along the second direction, and the second sub-lithography pattern 131 arranged along the second direction corresponds to the first sub-reference pattern 121 arranged along the first direction.

[0075] In the measurement direction along the first direction or the measurement direction along the second direction, the number of the first sub-reference patterns 121 in the first reference pattern group 12 is the same as the number of the second sub-reference patterns 141 in the second reference pattern group 14, the number of the first sub-lithography patterns 111 in the first set of lithography pattern group 11, and the number of the second sub-lithography patterns 131 in the second set of lithography pattern group 13.

[0076] As Figure 1 shown, in this embodiment, the first sub-reference pattern 121, the second sub-reference pattern 141, the first sub-lithography pattern 111, and the second sub-lithography pattern 131 are all grid-shaped patterns. There are four first sub-reference patterns 121, two of which are arranged along the first direction, and the other two first reference patterns are arranged along the second direction.

[0077] In some embodiments, along the first direction or the second direction, there may be three, four, etc. of the first sub-reference patterns 121 and the second sub-reference patterns 141, and specific limitations are not made here. By increasing the number of sub-reference patterns in the measurement direction, the amount of effective information extraction in the collection of the overlay mark images can be increased, and the measurement accuracy of each symmetry center, that is, the position accuracy of symmetry center A, symmetry center B, and symmetry center C, can be improved.

[0078] Please refer to Figure 3 and Figure 4 , Figure 3 which is a schematic structural diagram of a mask in another embodiment of the present application. Figure 4 is Figure 3 a schematic diagram of the overlay marks formed by the mask in the embodiment on the wafer. In some embodiments, the first direction and the second direction may also intersect with the X direction and the Y direction, as long as the first direction and the second direction maintain a perpendicular relationship with each other. Combining Figure 4 it can be seen that by keeping the first direction and the second direction perpendicular, after the mask 100 rotates 90° forward or backward around the rotation center 103, the first overlay pattern group 11, the first reference pattern group 12, the second overlay pattern group 13, and the second reference pattern group 14 on the mask 100 can respectively form overlay marks along the first direction and the second direction on the wafer 200, so that the symmetry centers of the overlay marks corresponding to each pattern group can be determined.

[0079] Please refer back to Figure 1 and Figure 2 , in some embodiments, the first reference pattern group 12 further includes a first sub-reference border 122, and each first sub-reference pattern 121 is disposed around the outer periphery of the first sub-reference border 122. When each first sub-overlay pattern 111 and each second sub-overlay pattern 131 rotate to the first quadrant area 201 around the rotation center 103, each first sub-overlay pattern 111 and each second sub-overlay pattern 131 are located inside the first sub-reference border 122. Alternatively, each first sub-reference pattern 121 is disposed around the inner periphery of the first sub-reference border 122. When each first sub-overlay pattern 111 and each second sub-overlay pattern 131 rotate to the first quadrant area 201 around the rotation center 103, each first sub-overlay pattern 111 and each second sub-overlay pattern 131 are located outside the first sub-reference border 122.

[0080] Similarly, the second reference pattern group 14 further includes a second sub-reference border 142. Each second sub-reference pattern 141 is disposed around the outer periphery of the second sub-reference border 142. When each first sub-overlay pattern 111 and each second sub-overlay pattern 131 rotate around the rotation center 103 to the fourth quadrant region 204, each first sub-overlay pattern 111 and each second sub-overlay pattern 131 are located inside the inner periphery of the second sub-reference border 142. Alternatively, each first reference pattern 121 is disposed around the inner periphery of the second sub-reference border 142. When each first sub-overlay pattern 111 and each second sub-overlay pattern 131 rotate around the rotation center 103 to the fourth quadrant region 204, each first sub-overlay pattern 111 and each second sub-overlay pattern 131 are located outside the outer periphery of the second sub-reference border 142.

[0081] Optionally, the first sub-reference border 122 and the second sub-reference border 142 are in a rectangular structure.

[0082] In this embodiment, by providing the first sub-reference border 122 and the second sub-reference border 142, it is beneficial to distinguish the reference pattern group from the overlay marks formed by the two overlay pattern groups on the wafer 200, thereby facilitating subsequent measurement operations.

[0083] Please continue to refer to Figure 1 and Figure 2 In some embodiments, the first overlay pattern group 11 further includes a first overlay center 113. The four first sub-overlay patterns 111 are a centrosymmetric structure formed by taking one of the first sub-overlay patterns 111 as a reference object and rotating and moving three times around the first overlay center 113 with a rotation angle of 90°. It should be noted that in this embodiment, the first overlay center 113 is the rotation center 103 of each first sub-overlay pattern 111 in the first overlay pattern group 11 on the mask 100, which corresponds to the symmetric center of the overlay marks formed by the first overlay pattern group 11 on the wafer 200.

[0084] The second overlay pattern group 13 further includes a second overlay center 133. The four second sub-overlay patterns 131 are a centrosymmetric structure formed by taking one of the second sub-overlay patterns 131 as a reference object and rotating and moving three times around the second overlay center 133 with a rotation angle of 90°.

[0085] In some embodiments, the first reference pattern group 12 further includes a first reference center 124. The four first sub-reference patterns 121 are a centrosymmetric structure formed by taking one of the first sub-reference patterns 121 as a reference object and rotating and moving three times around the first reference center 124 with a rotation angle of 90°.

[0086] Similarly, the second reference pattern group 14 further includes a second reference center 144. The four second sub-reference patterns 141 form a centrosymmetric structure by rotating and moving three times in sequence around the second reference center 144 with a rotation angle of 90° with one of the second sub-reference patterns 141 as the reference object.

[0087] In the reticle 100 provided in this embodiment, the first reference pattern group 12 and the second reference pattern group 14 include multiple sub-reference patterns, and the multiple sub-reference patterns in each reference pattern group are centrosymmetrically arranged with their respective reference centers. Similarly, the first set of patterned groups 11 and the second set of patterned groups 13 include multiple sub-patterned patterns, and the multiple sub-patterned patterns in each patterned group are centrosymmetrically arranged with their respective patterning centers, which can reduce the preparation difficulty of the graphic structure on the reticle 100.

[0088] In some embodiments, the rotation radius of the multiple first sub-patterned patterns 111 in the first set of patterned groups 11 is smaller than the rotation radius of the multiple second sub-patterned patterns 131 in the second set of patterned groups 13. The rotation radius of the multiple second sub-patterned patterns 131 in the second set of patterned groups 13 is smaller than the rotation radius of the multiple first sub-reference patterns 121 in the first reference pattern group 12. Of course, the rotation radius of the multiple second sub-markers in the second set of patterned groups 13 is smaller than the rotation radius of the multiple second sub-reference patterns 141 in the second reference pattern group 14. In this way, when forming the patterned markers on the wafer 200, in the second quadrant region 202 of the wafer 200, the first patterned layer marker 206, the second patterned layer marker 207, and the reference layer marker 205 are arranged in sequence from the inside to the outside, avoiding interference between the patterned layer markers and affecting the accuracy of the measured overlay error.

[0089] Furthermore, the difference between the rotation radii of the multiple first sub-patterned patterns 111 is smaller than the difference between the rotation radii of the multiple second sub-patterned patterns 131 and the multiple first sub-reference patterns 121. In this way, interference between the reference layer marker 205 and the first patterned layer marker 206 and the second patterned layer marker 207 can be further avoided.

[0090] Please refer to Figure 5 and Figure 6 , Figure 5 which is a schematic structural diagram of a reticle in another embodiment of the present application, Figure 6 is Figure 5Schematic diagram of the alignment marks formed by the mask on the wafer in the embodiment. In some embodiments, the first reference pattern group 12 includes a first reference center 124 and four first sub-reference units 123. The four first sub-reference units 123 are a centrosymmetric structure formed by taking one of the first sub-reference units 123 as a reference object, rotating around the first reference center 124, and sequentially rotating and moving three times with a rotation angle of 90°. Among them, any first sub-reference unit 123 includes four sub-measurement patterns 1001, two of the sub-measurement patterns 1001 extend along the first direction, and the other two sub-measurement patterns 1001 extend along the second direction. Optionally, any first sub-reference unit 123 has a centrosymmetric structure.

[0091] Similarly, the second reference pattern group 14 includes a second reference center 144 and four second sub-reference units 143. The four second sub-reference units 143 are a centrosymmetric structure formed by taking one of the second sub-reference units 143 as a reference object, rotating around the second reference center 144, and sequentially rotating and moving three times with a rotation angle of 90°. Among them, any second sub-reference unit 143 includes four sub-measurement patterns 1001, two of the sub-measurement patterns 1001 extend along the first direction, and the other two sub-measurement patterns 1001 extend along the second direction. Optionally, any second sub-reference unit 143 has a centrosymmetric structure.

[0092] It can be understood that in other embodiments, the number of sub-measurement patterns 1001 in the first sub-reference unit 123 can be more than four, such as 8, 12, etc., and the number of sub-measurement patterns 1001 in the second sub-reference pattern 141 can also be more than four.

[0093] In some embodiments, the first alignment pattern group 11 includes a first alignment center 113 and four first sub-alignment units 112. The four first sub-alignment units 112 are respectively centrosymmetric structures, and the first alignment pattern group 11 is a centrosymmetric structure. The symmetry center of the first alignment pattern group 11 is the first alignment center 113. The second alignment pattern group 13 includes a second alignment center 133 and four second sub-alignment units 132. The four second sub-alignment units 132 are respectively centrosymmetric structures, and the second alignment pattern group 13 is a centrosymmetric structure. The symmetry center of the second alignment pattern group 13 is the second alignment center 133. The distances from the first alignment center 113, the second alignment center 133, the first reference center 124, and the second reference center 144 to the rotation center 103 are equal.

[0094] Please continue to refer to Figure 5 and Figure 6, in some embodiments, the four first sub-nesting units 112 have the same shape and structure. The four first sub-nesting units 112 are a centrosymmetric structure formed by taking one of the first sub-nesting units 112 as a reference object, rotating and moving around the first nesting center 113 three times in sequence with a rotation angle of 90°. Moreover, any first sub-nesting unit 112 includes four sub-measurement patterns 1001. The first sub-nesting unit 112 is a centrosymmetric structure formed by taking one of the sub-measurement patterns 1001 as a reference object, rotating and moving around the center of the first sub-nesting unit 112 three times in sequence with a rotation angle of 90°. The rotation radii of the sub-measurement patterns 1001 in each first sub-nesting unit 112 are the same.

[0095] Similarly, the four second sub-nesting units 132 have the same shape and structure. The four second sub-nesting units 132 are a centrosymmetric structure formed by taking one of the second sub-nesting units 132 as a reference object, rotating and moving around the second nesting center 133 three times in sequence with a rotation angle of 90°. Moreover, any second sub-nesting unit 132 includes four sub-measurement patterns 1001. The second sub-nesting unit 132 is a centrosymmetric structure formed by taking one of the sub-measurement patterns 1001 as a reference object, rotating and moving around the center of the second sub-nesting unit 132 three times in sequence with a rotation angle of 90°. The rotation radii of the sub-measurement patterns 1001 in each second sub-nesting unit 132 are the same.

[0096] Among them, the rotation radii of each first sub-reference unit 123 around the first reference center 124, the rotation radii of each second sub-reference unit 143 around the second reference center 144, the rotation radii of each first sub-nesting unit 112 around the first nesting center 113, and the rotation radii of each second sub-nesting unit 132 around the second nesting center 133 are equal.

[0097] Moreover, the rotation radii of the sub-measurement patterns 1001 in each first sub-nesting unit 112 around the center of the first sub-nesting unit 112, the rotation radii of the sub-measurement patterns 1001 in the second sub-nesting unit 132 around the center of the second sub-nesting unit 132, and the rotation radii of each first sub-reference unit 123 around the center of the first sub-reference unit 123 are different. Exemplarily, the rotation radius of the sub-measurement pattern 1001 in the first sub-nesting unit 112 is less than the rotation radius of the sub-measurement pattern 1001 in the second sub-nesting unit 132, and at the same time, the rotation radius of the sub-measurement pattern 1001 in the second sub-nesting unit 132 is less than the rotation radius of the sub-measurement pattern 1001 in the first sub-reference unit 123.

[0098] Please refer to Figure 7 and Figure 8 , Figure 7 is a schematic structural diagram of a mask in another embodiment of the present application. Figure 8 is Figure 7Schematic diagram of the alignment marks formed by the reticle on the wafer in the embodiment. In some embodiments, two of the four first sub-alignment units 112 are arranged in central symmetry, and the center of symmetry is the first alignment center 113; the other two first sub-alignment units 112 are also arranged in central symmetry, and the center of symmetry is also the first alignment center 113. The shapes and structures of the two groups of symmetrically arranged first sub-alignment units 112 can be different. Specifically, any first sub-alignment unit 112 includes four sub-measurement patterns 1001, and each first sub-alignment unit 112 is a centrosymmetric structure formed by taking one of the sub-measurement patterns 1001 as a reference object and rotating and moving three times in sequence around the center of the first sub-alignment unit 112 with a rotation angle of 90°. The rotation radii of the sub-measurement patterns 1001 in two adjacent first sub-alignment units 112 are different, and the rotation radii of the sub-measurement patterns 1001 in the same group of symmetrically arranged first sub-alignment units 112 are the same.

[0099] Similarly, two of the four second sub-alignment units 132 are arranged in central symmetry, and the center of symmetry is the second alignment center 133; the other two second sub-alignment units 132 are also arranged in central symmetry, and the center of symmetry is also the second alignment center 133. The shapes and structures of the two groups of symmetrically arranged second sub-alignment units 132 can be different. Specifically, any second sub-alignment unit 132 includes four sub-measurement patterns 1001, and each second sub-alignment unit 132 is a centrosymmetric structure formed by taking one of the sub-measurement patterns 1001 as a reference object and rotating and moving three times in sequence around the center of the second sub-alignment unit 132 with a rotation angle of 90°. The rotation radii of the sub-measurement patterns 1001 in two adjacent second sub-alignment units 132 are different, and the rotation radii of the sub-measurement patterns 1001 in the same group of symmetrically arranged second sub-alignment units 132 are the same.

[0100] In some embodiments, there can be more than four, such as nine, sixteen, etc. of the first sub-reference units 123, the second sub-reference units 143, the first sub-alignment units 112, and the second sub-alignment units 132. Each first sub-reference unit 123 rotates and corresponds to one of the second sub-reference units 143, the first sub-alignment units 112, and the second sub-alignment units 132, so that when the first alignment pattern group 11 and the second alignment pattern group 13 are rotated around the rotation center 103 to the second quadrant region 202 or the fourth quadrant region 204 respectively, the marks mapped by the first alignment pattern group 11 and the second alignment pattern group 13 on the wafer 200 are arranged in a mutually offset layout and they do not coincide with the marks mapped by the first reference pattern group 12 or the second reference pattern group 14 on the wafer 200.

[0101] Please refer to Figure 1 and Figure 2, in some embodiments, it further includes an alignment pattern structure 20, the alignment pattern structure 20 is disposed on the outer periphery of the test pattern structure 10, and the alignment pattern structure 20 is used to perform the alignment of the mask 100. It can be understood that a reference mark is fixed on the mask stage of the lithography machine as an absolute coordinate system for position calibration, and the alignment pattern structure 20 on the mask 100 can correspond to the reference mark on the mask stage to perform mask alignment.

[0102] Among them, the alignment pattern structure 20 includes two first alignment marks 21, the two first alignment marks 21 are respectively located on opposite sides of the test pattern structure 10, and the straight line where the two first alignment marks 21 are located is parallel to and does not coincide with the first center line, and the first center line is a reference line passing through the rotation center 103 in the plane of the mask 100. Specifically, the first center line can be parallel to the X direction. In this way, the corresponding overlay marks of any one of the first alignment marks 21 in the first set of layer marks 206 and the other first alignment mark 21 in the second set of layer marks 207 are symmetrically arranged, and the two are symmetric about the Y axis.

[0103] It should be noted that the alignment pattern structure 20 in the present application can not only cooperate with the reference mark on the mask stage to perform mask alignment, but also calculate other errors concerned in the exposure process such as rotation error, step stitching accuracy, and scaling error through the corresponding symmetric pattern marks in the first set of layer marks 206 and the second set of layer marks 207. Since the alignment pattern structure 20 is disposed outside the test pattern structure 10, the rotation radius of the alignment pattern structure 20 is greater than the rotation radius of the test pattern structure 10. During the process of rotating the mask 100 around the rotation center 103, the displacement of the alignment pattern structure 20 is more obvious, making the rotation error of the alignment pattern structure 20 easier to observe and correct, and thus making the rotation error calculated through the overlay marks corresponding to the alignment pattern structure 20 more accurate. Specifically, the alignment pattern structure 20 is located in the scribe lane region 102, and the scribe lane region 102 corresponds to the interval region between adjacent chips on the wafer 200, and is used to divide the wafer 200 into individual chips by mechanical cutting or laser cutting after manufacturing.

[0104] Further, the alignment pattern structure 20 further includes two second alignment marks 22. The two second alignment marks 22 are respectively located on opposite sides of the test pattern structure 10. The line where the two second alignment marks 22 are located is parallel to and does not coincide with the second center line. The second center line is a reference line passing through the rotation center 103 in the plane of the mask 100 and perpendicular to the first center line. Specifically, in combination with the foregoing implementation style where the first center line is parallel to the X direction, the second center line can be parallel to the Y direction. In this way, the overlay marks corresponding to any one of the second alignment marks 22 in the first set of layer marks 206 and the other second alignment mark 22 in the second set of layer marks 207 are symmetrically arranged, and the two are symmetric about the X-axis.

[0105] In this embodiment, the first alignment mark 21 and the second alignment mark 22 are grating structures extending in the Y direction. In other embodiments, the first alignment mark 21 and the second alignment mark 22 can also be special-shaped structures such as crosshairs and box-in-box.

[0106] In other implementation styles, the first center line can be parallel to the Y direction, the second center line can be parallel to the X direction, or the first center line and the second center line can intersect with the X direction and the Y direction, as long as the first center line and the second center line maintain a perpendicular relationship with each other.

[0107] Wherein, the distance from the end of the second alignment mark 22 close to the second center line to the second center line is greater than the distance from the end of the first alignment mark 21 far from the first center line to the first center line; or, the distance from the end of the first alignment mark 21 close to the first center line to the first center line is greater than the distance from the end of the second alignment mark 22 far from the second center line to the second center line. Such a setting can stagger the corresponding marks during rotational overlay, ensuring that the multi-layer overlay marks of the first alignment mark 21 and the second alignment mark 22 corresponding on the wafer 200 do not interfere with each other.

[0108] Please refer to Figure 2 and Figure 9 , Figure 9 are schematic flowcharts of an overlay error measurement method in some embodiments of the present application. In some embodiments, an overlay error measurement method is provided, including the following steps:

[0109] S100. Provide the mask 100 as in any of the foregoing embodiments;

[0110] S200. After placing the mask 100 at the initial position, obtain the reference layer mark 205;

[0111] S300. After placing the mask 100 at the first position, obtain the first set of layer marks 206. The first position is obtained by rotating the initial position forward by 90°;

[0112] S400. After placing the reticle 100 at the second position, obtain the second set of layer alignment marks 207. The second position is obtained by rotating the position by 90° in the reverse direction, and the second direction is opposite to the first direction.

[0113] S500. Measure the fiducial layer marks 205, the first set of layer alignment marks 206, and the second set of layer alignment marks 207 to obtain the overlay error.

[0114] In this embodiment, an imaging inspection module on the lithography machine or a third-party detection device such as a feature measurement machine can be used to measure, analyze, and statistically process the fiducial layer marks 205, the first set of layer alignment marks 206, and the second set of layer alignment marks 207, so as to achieve the measurement of the overlay accuracy. In the overlay error measurement method of this embodiment, only by rotating a reticle 100 relative to the wafer 200, non-overlapping fiducial layer marks 205, the first set of layer alignment marks 206, and the second set of layer alignment marks 207 can be formed in the second quadrant region 202 and the fourth quadrant region 204 of the wafer 200. Among them, the development process batches of the first set of layer alignment marks 206 and the second set of layer alignment marks 207 are the same. Thus, when calculating the overlay error between the first set of layer alignment marks 206 and the second set of layer alignment marks 207, the influence brought by process differences can be excluded. The overlay error between the fiducial layer marks 205 and the first set of layer alignment marks 206 and / or the overlay error between the fiducial layer marks 205 and the second set of layer alignment marks 207 can be measured together as the overlay error of the overlay layer relative to the fiducial layer, and the statistics of its distribution can help analyze the source of the overlay error.

[0115] Please refer to Figure 10 , Figure 10 is Figure 9 The schematic flow chart of the refinement of step S200 in the embodiment. In some embodiments, obtaining the fiducial layer marks 205 after placing the reticle 100 at the initial position includes:

[0116] S201. Place the wafer 200 coated with photoresist on the wafer stage.

[0117] S202. Place the reticle 100 at the initial position on the reticle stage.

[0118] S203. Perform mask alignment, then expose and develop.

[0119] Please refer to Figure 11 , Figure 11 is Figure 9 The schematic flow chart of the refinement of step S300 in the embodiment. In some embodiments, obtaining the first set of layer alignment marks 206 after placing the reticle 100 at the first position includes:

[0120] S301. Remove the reticle 100 from the reticle stage and then place the reticle 100 at the first position.

[0121] S302. After removing the wafer 200 with the fiducial mark layer from the wafer stage, load the wafer 200 in-situ.

[0122] S303. Perform mask alignment and wafer 200 alignment, and then expose.

[0123] Please refer to Figure 12 , Figure 12 Yes Figure 9 FIG. is a schematic flow chart showing the refinement of step S400 in the embodiment. In some embodiments, obtaining the second set of layer marks 207 after placing the mask 100 at the second position includes:

[0124] S401. Remove the mask 100 from the mask stage and then place the mask 100 at the second position.

[0125] S402. After removing the wafer 200 with the fiducial layer mark 205 and the first set of layer marks 206 from the wafer stage, load the wafer 200 in-situ.

[0126] S403. Perform mask alignment and wafer 200 alignment, and then expose and develop.

[0127] It should be noted that in this embodiment, the wafer undergoes two development processes. The first is to develop the fiducial layer mark 205 in step S203, and the second is to develop the first set of layer marks 206 and the second set of layer marks 207 simultaneously in step S403. This can minimize the time interval between the formation processes of the first set of layer marks 206 and the second set of layer marks 207 to reduce the effect of the slow change of the photoresist over time, and it does not come into contact with any solution, such as development or cleaning, during the process, to ensure the consistency of the active state of the photoresist. In this way, it can be ensured that the formation processes of the first set of layer marks 206 and the second set of layer marks 207 are the same, thereby improving the accuracy of measuring the overlay error under the same process. At the same time, the overlay error distribution of the first set of layer marks 206 and / or the second set of layer marks 207 relative to the fiducial layer mark 205 can be measured and statistically analyzed to analyze the source of the overlay error.

[0128] In addition, some known single - die overlay methods based on translation in the current industry ignore the systematic error terms, resulting in the fact that the measured overlay accuracy values are often smaller than the actual situation. In this embodiment, by removing the reticle 100 and reinstalling it on the reticle stage after appropriate rotation, a new reticle 100 loading can be simulated. Similarly, by removing the wafer 200 and then re - uploading it in place, a new wafer 200 loading can be simulated. The positions between the reticle 100 and the reticle stage and between the wafer 200 and the wafer stage change, and re - enter the pre - alignment stage. Thus, all systematic errors introduced during the reticle 100 transfer and pre - alignment processes are reset, avoiding the omission of error checks.

[0129] In some embodiments, measuring the fiducial layer mark 205, the first overlay layer mark 206, and the second overlay layer mark 207 to obtain the overlay error includes:

[0130] Obtaining the fiducial features in the fiducial layer mark 205, the first overlay features in the first overlay layer mark 206, and the second overlay features in the second overlay layer mark 207, and calculating the error between the first overlay features and the second overlay features, the error between the fiducial features and the first overlay features, and / or the error between the fiducial features and the second overlay features in at least one quadrant region.

[0131] The overlay error measurement method in this application does not need to cooperate with the etching or growth process. The detection of overlay error can be completed only by using exposure and development, imaging inspection, and analysis and statistics of overlay results. As mentioned above, the reference feature includes the image information of the reference layer mark 205 in the first direction and the second direction. The first overlay feature includes the image information of the first overlay layer mark 206 in the first direction and the second direction. The second overlay feature includes the image information of the second overlay layer mark 207 in the first direction and the second direction. The first direction can be parallel to the X direction, and the second direction can be parallel to the Y direction. In the second quadrant area 202 or the fourth quadrant area 204, by measuring the image information of the reference layer mark 205 in the X direction and the Y direction, the coordinates of the symmetry center A can be determined as (XA, YA). Then, by measuring the image information of the first layer overlay mark in the X direction and the Y direction, the coordinates of the symmetry center B are determined as (XB, YB). Finally, repeat the above process for the second layer overlay mark, measure in the X and Y directions respectively, and obtain the coordinates of the symmetry center C as (XC, YC). The overlay error between the reference layer mark 205 and the first overlay layer mark 206 is obtained according to the symmetry center A (XA, YA) and the symmetry center B (XB, YB); the overlay error between the first overlay layer mark 206 and the second overlay layer mark 207 is obtained through the symmetry center B (XB, YB) and the symmetry center C (XC, YC); the overlay error between the reference layer mark 205 and the second overlay layer mark 207 is obtained through the symmetry center A (XA, YA) and the symmetry center C (XC, YC).

[0132] The above are only some embodiments of this application, and thus do not limit the protection scope of this application. Any equivalent device or equivalent process transformation made by using the content of the specification and drawings of this application, or directly or indirectly applied in other related technical fields, shall be similarly included in the patent protection scope of this application.

Claims

1. A mask, characterized in that, It includes a test pattern structure provided in the middle area of the reticle. The test pattern structure is used to form alignment marks on the wafer. The test pattern structure includes a first alignment pattern group, a first reference pattern group, a second alignment pattern group, and a second reference pattern group arranged in sequence circumferentially along the rotation center. The rotation center is the center of the reticle. When the reticle is in the initial position, the areas corresponding to the first alignment pattern group, the first reference pattern group, the second alignment pattern group, and the second reference pattern group on the wafer are the first quadrant area, the second quadrant area, the third quadrant area, and the fourth quadrant area respectively. Among them, the first reference pattern group and the second reference pattern group are centrosymmetric structures; when the first alignment pattern group and the second alignment pattern group respectively rotate around the rotation center to the second quadrant area or the fourth quadrant area, the marks mapped by the first alignment pattern group and the second alignment pattern group on the wafer are in an offset layout with each other, and they do not coincide with the marks mapped by the first reference pattern group and the second reference pattern group on the wafer.

2. The mask according to claim 1, characterized in that, The first reference pattern group includes at least four first sub-reference patterns, and each of the first sub-reference patterns is arranged along a first direction and a second direction respectively, and the first direction and the second direction are perpendicular to each other.

3. The reticle according to claim 2, wherein The first alignment pattern group includes at least four first sub-alignment patterns, and each of the first sub-alignment patterns is arranged along the first direction and the second direction respectively. The first sub-alignment patterns arranged along the first direction correspond to the first sub-reference patterns arranged along the second direction, and the first sub-alignment patterns arranged along the second direction correspond to the first sub-reference patterns arranged along the first direction; The second alignment pattern group includes at least four second sub-alignment patterns, and each of the second sub-alignment patterns is arranged along the first direction and the second direction respectively. The second sub-alignment patterns arranged along the first direction correspond to the first sub-reference patterns arranged along the second direction, and the second sub-alignment patterns arranged along the second direction correspond to the first sub-reference patterns arranged along the first direction.

4. The mask according to claim 3, wherein The first reference pattern group further includes a first sub-reference border, and each of the first sub-reference patterns is arranged around the outer periphery of the first sub-reference border. When each of the first sub-alignment patterns and each of the second sub-alignment patterns rotate around the rotation center to the first quadrant area, each of the first sub-alignment patterns and each of the second sub-alignment patterns are located inside the inner periphery of the first sub-reference border; or, each of the first sub-reference patterns is arranged around the inner periphery of the first sub-reference border. When each of the first sub-alignment patterns and each of the second sub-alignment patterns rotate around the rotation center to the first quadrant area, each of the first sub-alignment patterns and each of the second sub-alignment patterns are located outside the outer periphery of the first sub-reference border.

5. The reticle according to claim 3 or 4, characterized in that, The first set of etched pattern groups further includes a first set of etching centers. The four first sub-etched patterns are a centrosymmetric structure formed by taking one of the first sub-etched patterns as a reference object, rotating and moving around the first set of etching centers three times in sequence with a rotation angle of 90°. The second set of etched pattern groups further includes a second set of etching centers. The four second sub-etched patterns are a centrosymmetric structure formed by taking one of the second sub-etched patterns as a reference object, rotating and moving around the second set of etching centers three times in sequence with a rotation angle of 90°.

6. The reticle according to claim 5, characterized in that, The first reference pattern group further includes a first reference center. The four first sub-reference patterns are a centrosymmetric structure formed by taking one of the first sub-reference patterns as a reference object, rotating and moving around the first reference center three times in sequence with a rotation angle of 90°.

7. The mask according to claim 5, wherein The rotation radii of the multiple first sub-etched patterns in the first set of etched pattern groups are smaller than the rotation radii of the multiple second sub-etched patterns in the second set of etched pattern groups. The rotation radii of the multiple second sub-etched patterns in the second set of etched pattern groups are smaller than the rotation radii of the multiple first sub-reference patterns in the first reference pattern group.

8. The reticle according to claim 6, wherein The difference between the rotation radii of the multiple first sub-etched patterns and the rotation radii of the multiple second sub-etched patterns is smaller than the difference between the rotation radii of the multiple second sub-etched patterns and the rotation radii of the multiple first sub-reference patterns.

9. The photomask according to claim 1, wherein The first reference pattern group includes a first reference center and four first sub-reference units. The four first sub-reference units are a centrosymmetric structure formed by taking one of the first sub-reference units as a reference object, rotating and moving around the first reference center three times in sequence with a rotation angle of 90°.

10. The reticle according to claim 9, wherein The first set of etched pattern groups includes a first set of etching centers and four first sub-etched units. The four first sub-etched units are respectively centrosymmetric structures, and the first set of etched pattern groups is a centrosymmetric structure. The symmetry center of the first set of etched pattern groups is the first set of etching centers. The second set of etched pattern groups includes a second set of etching centers and four second sub-etched units. The four second sub-etched units are respectively centrosymmetric structures, and the second set of etched pattern groups is a centrosymmetric structure. The symmetry center of the second set of etched pattern groups is the second set of etching centers. The distances from the first set of etching centers, the second set of etching centers, and the first reference center to the rotation center are equal.

11. The reticle according to claim 10, wherein The four first sub-etched units have the same shape and structure. The four first sub-etched units are a centrosymmetric structure formed by taking one of the first sub-etched units as a reference object, rotating and moving around the first set of etching centers three times in sequence with a rotation angle of 90°. The four second sub-etched units have the same shape and structure. The four second sub-etched units are a centrosymmetric structure formed by taking one of the second sub-etched units as a reference object, rotating and moving around the second set of etching centers three times in sequence with a rotation angle of 90°. Among them, the radii of rotation of the respective first sub-reference units around the first reference center, the radii of rotation of the respective first sub-lithography units around the first lithography center, and the radii of rotation of the respective second sub-lithography units around the second lithography center are equal.

12. The reticle according to any one of claims 1-4 or 9-11, characterized in that, It further includes an alignment pattern structure, which is disposed on the outer periphery of the test pattern structure and is used to perform mask alignment.

13. The reticle according to claim 12, characterized in that, The alignment pattern structure includes two first alignment marks, and the two first alignment marks are respectively located on opposite sides of the test pattern structure. The straight line where the two first alignment marks are located is parallel to and does not coincide with the first center line, and the first center line is a reference line passing through the rotation center in the mask plane.

14. A method for measuring overlay error, characterized in that, It includes the following steps: Provide a mask as described in any one of claims 1-13; Obtain a reference layer mark after placing the mask in the initial position; Obtain a first lithography layer mark after placing the mask in the first position, and the first position is obtained by rotating 90° forward from the initial position; Obtain a second lithography layer mark after placing the mask in the second position, and the second position is obtained after rotating 90° backward from the position; Measure the reference layer mark, the first lithography layer mark, and the second lithography layer mark to obtain a lithography error.

15. The lithography error measurement method according to claim 14, wherein The step of obtaining a reference layer mark after placing the mask in the initial position includes: Place a wafer coated with photoresist on the wafer stage; Place the mask in the initial position on the mask stage; Perform mask alignment and then expose and develop; And / or, the step of obtaining a first lithography layer mark after placing the mask in the first position includes: Remove the mask from the mask stage and then place the mask in the first position; Remove the wafer with the reference mark layer from the wafer stage and then load the wafer in place; Perform mask alignment and wafer alignment and then expose; And / or, the step of obtaining a second lithography layer mark after placing the mask in the second position includes: Remove the mask from the mask stage and then place the mask in the second position; Remove the wafer with the reference layer mark and the first lithography layer mark from the wafer stage and then load the wafer in place; Perform mask alignment and wafer alignment and then expose and develop.

16. The overlay error measurement method according to claim 14 or 15, characterized in that, The step of measuring the reference layer mark, the first lithography layer mark, and the second lithography layer mark to obtain a lithography error includes: Obtain the reference feature in the reference layer mark, the first lithography feature in the first lithography layer mark, and the second lithography feature in the second lithography layer mark, and calculate the error between the first lithography feature and the second lithography feature, the error between the reference feature and the first lithography feature, and / or the error between the reference feature and the second lithography feature in at least one quadrant region.

Images