Wafer bonding method for preventing silicon removal edge crack

Abstract

The invention provides a wafer bonding method for preventing silicon removal edge cracking, and the method comprises the steps: carrying out the edge grinding of a first wafer, and forming a groove which extends from the edge of the first wafer to the axis direction of the first wafer by a preset width and extends from a first bonding layer of the first wafer to a silicon plate layer, the thickness of the silicon plate layer corresponding to the bottom of the groove is greater than a first preset thickness; bonding the first bonding layer of the first wafer and the second bonding layer of the second wafer; and performing silicon removal grinding operation on the first wafer to expose the device layer of the first wafer. By applying the wafer bonding method for preventing the silicon removal edge crack, the edge crack condition when the silicon substrate is removed after wafer bonding can be optimized.

Description

Technical Field

[0001] The invention relates to the field of semiconductor technology, and in particular to a wafer bonding method for preventing desiliconization edge cracking. Background Art

[0002] In the chip manufacturing process, two wafers are bonded together and the silicon substrate of one of the wafers is removed to expose the device layer for the next process. Figure 1 As shown, after wafer A and wafer B are bonded via bonding layer 10, grinding is required to remove the silicon plate layer of wafer A. Since the desiliconization process uses mechanical grinding, the chamfer position of the wafer edge is arc-shaped, the chamfer position cannot be bonded together, and the device layer is relatively thin. In the process of desiliconization, there is no fulcrum at the edge position, which is prone to edge cracking. Figure 2 As shown in C in the middle. Edge cracking can easily damage the device layer at the edge, affecting the product yield.

[0003] Therefore, a more optimized bonding and desiliconization method needs to be considered. Summary of the invention

[0004] The first object of the present invention is to provide a wafer bonding method for preventing silicon removal edge cracks which can optimize the edge cracking that occurs when the silicon substrate is removed after wafer bonding.

[0005] In order to achieve the above-mentioned first purpose, the wafer bonding method for preventing desiliconization edge cracks provided by the present invention includes: performing edge grinding on the first wafer to form a groove extending from the edge of the first wafer to the axial direction of the first wafer with a preset width and extending from the first bonding layer of the first wafer to the silicon plate layer, and the silicon plate layer thickness corresponding to the bottom of the groove is greater than the first preset thickness; bonding the first bonding layer of the first wafer and the second bonding layer of the second wafer; performing desiliconization grinding operation on the first wafer to expose the device layer of the first wafer.

[0006] It can be seen from the above scheme that the wafer bonding method for preventing desiliconization edge cracks of the present invention first grinds the edge of the first wafer before bonding the wafers to form an edge groove, and the groove extends from the first bonding layer of the first wafer to the silicon plate layer, so that when the desiliconization process is performed, the groove can buffer the grinding pressure, and further, part of the edge is removed in advance, and the device layer is not easily damaged when cracking, thereby optimizing the edge cracking situation when removing the silicon substrate after wafer bonding.

[0007] In a further solution, the first wafer is subjected to a desiliconizing grinding operation to expose the device layer of the first wafer, including: performing edge grinding and removing the silicon plate layer corresponding to the bottom of the groove; performing surface grinding on the side of the silicon plate layer of the first wafer facing away from the second wafer to completely remove the silicon plate layer.

[0008] It can be seen that when performing the de-silicon grinding operation, first grinding and removing the edge of the silicon plate layer corresponding to the bottom of the groove can prevent edge cracking caused by grinding pressure when the entire silicon plate layer is removed.

[0009] In a further solution, before the step of grinding and removing the edge of the silicon plate layer corresponding to the bottom of the groove, it further includes: performing surface grinding on the side of the silicon plate layer of the first wafer facing away from the second wafer, and retaining a silicon plate layer with a second preset thickness, where the second preset thickness is greater than the first preset thickness.

[0010] It can be seen that before the step of grinding and removing the edge of the silicon plate layer corresponding to the bottom of the groove, a part of the thickness of the silicon plate layer can be removed first to avoid a large edge thickness of the silicon plate layer, which may lead to an increased probability of edge cracking due to an excessive grinding time.

[0011] In a further solution, before the step of bonding the first bonding layer of the first wafer and the second bonding layer of the second wafer, it further includes: performing a cleaning operation on the first wafer and the second wafer.

[0012] It can be seen that before bonding the first bonding layer of the first wafer and the second bonding layer of the second wafer, performing a cleaning operation on the wafers can avoid dust affecting the bonding effect of the wafers.

[0013] In a further solution, the step of edge grinding the first wafer includes: controlling the grinding direction to move from a position close to the center of the first wafer towards a direction away from the center.

[0014] It can be seen that when edge grinding the first wafer, grinding from a position close to the center of the first wafer towards a direction away from the center can prevent cracks from extending towards the center position of the first wafer when cracking occurs.

[0015] In a further solution, the value range of the preset width is from 2 mm to 2.5 mm.

[0016] It can be seen that according to the metal sputtering process of the semiconductor, metal sputtering will not be performed at a position 3 mm away from the edge of the wafer. Therefore, it is better that the preset width of the groove is from 2 mm to 2.5 mm.

[0017] In a further solution, the first preset thickness is from 250 μm to 300 μm.

[0018] It can be seen that if the first preset thickness is too small, the probability of edge cracking will increase. Setting the first preset thickness to be from 250 μm to 300 μm can optimize the process. Description of the Drawings

[0019] Figure 1It is a schematic structural diagram in the existing wafer bonding state.

[0020] Figure 2 It is a schematic cross-sectional structural diagram when cracking occurs during the de-siliconization process after the existing wafers are bonded.

[0021] Figure 3 It is a flowchart of an embodiment of the wafer bonding method for preventing de-siliconization edge cracking according to the present invention.

[0022] Figure 4 It is a schematic cross-sectional structural diagram obtained in step S1 in the embodiment of the wafer bonding method for preventing de-siliconization edge cracking according to the present invention.

[0023] Figure 5 It is a schematic cross-sectional structural diagram obtained in step S2 in the embodiment of the wafer bonding method for preventing de-siliconization edge cracking according to the present invention.

[0024] Figure 6 It is a schematic cross-sectional structural diagram obtained in step S4 in the embodiment of the wafer bonding method for preventing de-siliconization edge cracking according to the present invention.

[0025] Figure 7 It is a flowchart of the operation step of de-siliconizing and grinding the first wafer in the embodiment of the wafer bonding method for preventing de-siliconization edge cracking according to the present invention.

[0026] Figure 8 It is a schematic cross-sectional structural diagram obtained in step S51 in the embodiment of the wafer bonding method for preventing de-siliconization edge cracking according to the present invention.

[0027] Figure 9 It is a schematic cross-sectional structural diagram obtained in step S52 in the embodiment of the wafer bonding method for preventing de-siliconization edge cracking according to the present invention.

[0028] Figure 10 It is a schematic cross-sectional structural diagram obtained in step S53 in the embodiment of the wafer bonding method for preventing de-siliconization edge cracking according to the present invention.

[0029] The present invention will be further described below in conjunction with the drawings and embodiments. Specific embodiments

[0030] Embodiment of the wafer bonding method for preventing de-siliconization edge cracking:

[0031] As Figure 3 shown, in this embodiment, when the wafer bonding method for preventing de-siliconization edge cracking works, first step S1 is executed to obtain the first wafer and the second wafer. When bonding is required, two wafers to be bonded are prepared. In this embodiment, refer to Figure 4, the first wafer includes a first silicon plate layer 1, a first device layer 2, and a first bonding layer 3. The first device layer 2 covers the first silicon plate layer 1, and the first bonding layer 3 covers the first device layer 2. The second wafer includes a second silicon plate layer 4, a second device layer 5, and a second bonding layer 6. The second device layer 5 covers the second silicon plate layer 4, and the second bonding layer 6 covers the second device layer 5.

[0032] After obtaining the first wafer and the second wafer, step S2 is performed. Edge grinding is performed on the first wafer to form a groove 7 that extends from the edge of the first wafer toward the center axis of the first wafer with a preset width and extends from the first bonding layer 3 of the first wafer to the first silicon plate layer 1. The thickness of the silicon plate layer corresponding to the bottom 71 of the groove 7 is greater than the first preset thickness. The structure obtained after edge grinding the first wafer is as Figure 5 shown. In order to optimize the edge of the first wafer and reduce the probability of edge cracking during desiliconization, edge grinding treatment also needs to be performed on the first wafer to obtain a groove 7 that can buffer the grinding pressure. Preferably, the value range of the preset width is 2 mm to 2.5 mm, and the first preset thickness is 250 μm to 300 μm. According to the metal sputtering process of semiconductors, metal sputtering will not be performed at a position 3 mm away from the edge of the wafer. Therefore, the preset width of the groove is preferably 2 mm to 2.5 mm. If the first preset thickness is too small, the probability of edge cracking will increase. When the first preset thickness is 250 μm to 300 μm, the probability of edge cracking can be reduced.

[0033] In this embodiment, the step of edge grinding the first wafer includes: controlling the grinding direction to move from a position close to the center of the first wafer to a position away from the center. When edge grinding the first wafer, using a grinding wheel to grind from a position close to the center of the first wafer to a position away from the center can prevent the crack from extending toward the center position of the first wafer when edge grinding causes cracking, thereby preventing the crack from increasing.

[0034] It should be noted that when edge grinding the first wafer, the silicon plate layer corresponding to the bottom 71 of the groove 7 is not removed together because during the bonding process, a fixture is needed to fix the first wafer. If the silicon plate layer corresponding to the bottom 71 of the groove 7 is removed together, there will be no fixture with a suitable size to fix the first wafer.

[0035] After grinding out the groove 7, step S3 is performed to clean the first wafer and the second wafer. In order to avoid dust affecting the bonding effect of the wafers, before bonding the first bonding layer 3 of the first wafer and the second bonding layer 6 of the second wafer, the wafers need to be cleaned. When cleaning the wafers, ultrapure water can be used for cleaning, which is a well-known technology to those skilled in the art and will not be elaborated here.

[0036] After cleaning the first wafer and the second wafer, step S4 is performed to bond the first bonding layer 3 of the first wafer and the second bonding layer 6 of the second wafer. In order to connect the first device layer 2 of the first wafer and the second device layer 5 of the second wafer, it is necessary to bond the first bonding layer 3 of the first wafer and the second bonding layer 6 of the second wafer. The wafer bonding process is a well-known technology to those skilled in the art and will not be elaborated here. Refer to Figure 6 After the first wafer and the second wafer are bonded, a new bonding layer 8 is obtained.

[0037] After the first wafer and the second wafer are bonded, step S5 is performed to perform a de-silicon grinding operation on the first wafer to expose the first device layer 3 of the first wafer. After wafer bonding, in order to facilitate further processing, it is necessary to expose the first device layer 3 of the first wafer. Therefore, a de-silicon grinding process is required.

[0038] In this embodiment, refer to Figure 7 When performing a de-silicon grinding operation on the first wafer to expose the device layer of the first wafer, first perform step S51 to perform surface grinding on the side of the first silicon plate layer 1 of the first wafer facing away from the second wafer, and retain the first silicon plate layer 1 with a second preset thickness, where the second preset thickness is greater than the first preset thickness. The second preset thickness can be set as needed. Removing a part of the thickness of the first silicon plate layer 1 can avoid the problem that the edge thickness of the first silicon plate layer 1 is too large, resulting in too long grinding time and an increased probability of edge cracking. After removing a part of the thickness of the first silicon plate layer 1, the obtained structure is as Figure 8 shown.

[0039] Next, perform step S52 to perform edge grinding and removal on the first silicon plate layer 1 corresponding to the bottom 71 of the groove 7. Performing edge grinding and removal on the first silicon plate layer 1 corresponding to the bottom 71 of the groove 7 can prevent edge cracking due to grinding pressure when the first silicon plate layer 1 is completely removed. The mechanism obtained after performing edge grinding and removal on the first silicon plate layer 1 corresponding to the bottom 71 of the groove 7 is as Figure 9 shown.

[0040] Next, perform step S53 to perform surface grinding on the side of the first silicon plate layer 1 of the first wafer facing away from the second wafer to completely remove the first silicon plate layer 1. By performing surface grinding on the first silicon plate layer 1, the first device layer 3 of the first wafer is completely exposed, thus completing the de-silicon process. After completely removing the first silicon plate layer 1, the obtained structure is as Figure 10 shown.

[0041] The wafer bonding method for preventing edge cracking during desiliconization in the present invention, before wafer bonding, first performs edge grinding on the first wafer to form an edge groove 7 that extends from the first bonding layer 3 of the first wafer to the first silicon plate layer 1. When the desiliconization process is carried out, the groove 7 can buffer the grinding pressure. Moreover, by removing part of the edge in advance, it is not easy to damage the device layer during cracking, thereby optimizing the edge cracking situation that occurs when removing the silicon substrate after wafer bonding.

[0042] It should be noted that the above is only the preferred embodiment of the present invention, but the design concept of the invention is not limited thereto. Any non-substantive modification made to the present invention using this concept also falls within the protection scope of the present invention.

Claims

1. A wafer bonding method for preventing de-silicon edge cracking, characterized in that, Including: Edge grinding is performed on the first wafer to form a groove extending from the edge of the first wafer towards the axis of the first wafer with a preset width and extending from the first bonding layer of the first wafer towards the silicon plate layer, and the thickness of the silicon plate layer corresponding to the bottom of the groove is greater than a first preset thickness; Bond the first bonding layer of the first wafer and the second bonding layer of the second wafer; Perform desiliconization grinding operation on the first wafer to expose the device layer of the first wafer.

2. The wafer bonding method for preventing desiliconization edge cracking according to claim 1, wherein: The step of performing desiliconization grinding operation on the first wafer to expose the device layer of the first wafer includes: Edge grinding and removing the silicon plate layer corresponding to the bottom of the groove; Surface grinding is performed on the side of the silicon plate layer of the first wafer facing away from the second wafer to completely remove the silicon plate layer.

3. The wafer bonding method for preventing desiliconization edge cracking according to claim 2, wherein: Before the step of edge grinding and removing the silicon plate layer corresponding to the bottom of the groove, it further includes: Surface grinding is performed on the side of the silicon plate layer of the first wafer facing away from the second wafer to retain the silicon plate layer with a second preset thickness, wherein the second preset thickness is greater than the first preset thickness.

4. The wafer bonding method for preventing desiliconization edge cracking according to any one of claims 1 to 3, wherein: Before the step of bonding the first bonding layer of the first wafer and the second bonding layer of the second wafer, it further includes: Performing a cleaning operation on the first wafer and the second wafer.

5. The wafer bonding method for preventing desiliconization edge cracking according to any one of claims 1 to 3, wherein: The step of edge grinding the first wafer includes: Controlling the grinding direction to move from a position close to the center of the first wafer towards a position away from the center.

6. The wafer bonding method for preventing desiliconization edge cracking according to any one of claims 1 to 3, wherein: The value range of the preset width is 2 mm to 2.5 mm.

7. The wafer bonding method for preventing desiliconization edge cracking according to any one of claims 1 to 3, wherein: The first preset thickness is 250 microns to 300 microns.

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