Single-photon avalanche diode, preparation method thereof and photoelectric detector

Abstract

The invention provides a single-photon avalanche diode and a preparation method thereof, and a photoelectric detector, and the single-photon avalanche diode comprises an N-type substrate layer which is provided with a light incident side and a backlight side; the device structure layer is embedded in the N-type substrate layer; the device structure layer comprises an N-type doped avalanche multiplication region and a P-type heavily-doped light absorption region which are sequentially arranged in the direction from the light incident side to the backlight side, and the N-type doped avalanche multiplication region surrounds the P-type heavily-doped light absorption region. Holes of the P-type heavily-doped light absorption region can be quickly relaxed by dielectric, and after electrons drifting to the N-type doped avalanche multiplication region generate electrons and holes after an avalanche multiplication effect occurs, the generated holes can be quickly relaxed by dielectric after drifting back to the P-type heavily-doped light absorption region. And the problem that the response rate of the device is limited due to the fact that the hole mobility of the semiconductor material is lower than the electron mobility can be solved.

Description

Technical Field

[0001] The present application relates to the technical field of photodetectors, and particularly relates to a single-photon avalanche diode, a preparation method thereof, and a photodetector. Background Art

[0002] Direct Time of Flight (DTOF) technology, as a new technology for spatial distance detection, is widely used in applications such as automobiles, medical imaging devices, and VR. Its key core device is a photodetector array, which is used to detect reflected photons to achieve distance detection. Therefore, the required photodetector needs to have advantages such as small delay time and high responsivity. The single-photon avalanche diode (SPAD) has the advantages of a small photosensitive surface and high sensitivity (the carrier avalanche multiplication effect can occur when triggered by a single photon in Geiger mode), and is widely used in photodetectors, gradually becoming a popular research direction in DTOF technology.

[0003] In the related art, the SPAD triggers an avalanche current through the simultaneous avalanche multiplication effect of photo-generated holes and photo-generated electrons. However, the hole mobility of semiconductor materials is much smaller than the electron mobility, and the slower hole transit time fundamentally limits the response rate of the SPAD, resulting in an increase in time jitter, causing imaging delay and asymmetric response, and reducing the time resolution and imaging sensitivity.

[0004] Therefore, how to improve the response rate of the SPAD is a technical problem that those skilled in the art need to solve urgently. Summary of the Invention

[0005] The present application provides a single-photon avalanche diode, a preparation method thereof, and a photodetector, which can effectively solve the technical problem of low response rate existing in the related art SPAD.

[0006] In a first aspect, the present application provides a single-photon avalanche diode, which includes: an N-type substrate layer having a light-incident side and a backlight side; and a device structure layer embedded in the N-type substrate layer; wherein, the device structure layer includes an N-type doped avalanche multiplication region and a P-type heavily doped light absorption region sequentially arranged in the direction from the light-incident side towards the backlight side, and the N-type doped avalanche multiplication region surrounds the P-type heavily doped light absorption region.

[0007] Optionally, the material of the P-type heavily doped light absorption region includes a nano-scale light-absorbing material.

[0008] Optionally, the light-absorbing material includes graphene.

[0009] Optionally, the single-photon avalanche diode further includes a covering layer disposed on the light incident side of the N-type substrate layer. The covering layer includes an antireflection film, and the orthographic projection of the antireflection film on the device structure layer covers the P-type heavily doped light absorption region.

[0010] Optionally, the covering layer further includes a metal reflection layer, and the metal reflection layer is disposed on the same layer as the antireflection film.

[0011] Optionally, the single-photon avalanche diode further includes an isolation structure. The isolation structure surrounds the N-type substrate layer, and the isolation structure includes a metal rod. The metal reflection layer is electrically connected to the metal rod.

[0012] Optionally, the device structure layer further includes an N-type heavily doped region. The N-type heavily doped region surrounds the N-type doped avalanche multiplication region. Wherein, the orthographic projection of the metal reflection layer on the device structure layer covers the N-type heavily doped region.

[0013] Optionally, the single-photon avalanche diode further includes an N-type contact electrode. The N-type contact electrode is disposed on a side of the N-type heavily doped region away from the N-type substrate layer, and the N-type contact electrode is electrically connected to the N-type heavily doped region.

[0014] Optionally, the device structure layer further includes an N-type doped transition region. The N-type doped transition region is disposed between the N-type doped avalanche multiplication region and the P-type heavily doped light absorption region. Wherein, the doping concentration of the N-type doped avalanche multiplication region is less than the doping concentrations of the N-type doped transition region and the P-type heavily doped light absorption region.

[0015] Optionally, the ratio of the thickness of the N-type doped transition region to the thickness of the N-type doped avalanche multiplication region is 1:15 to 1:25.

[0016] Optionally, the device structure layer further includes an electron diffusion barrier region. The electron diffusion barrier region is disposed on a side of the P-type heavily doped light absorption region away from the N-type doped avalanche multiplication region, and the P-type heavily doped light absorption region surrounds the electron diffusion barrier region.

[0017] Optionally, the device structure layer further includes a P-type heavily doped region. The P-type heavily doped region is disposed on a side of the electron diffusion barrier region away from the P-type heavily doped light absorption region, and the electron diffusion barrier region surrounds the P-type heavily doped region.

[0018] Optionally, the single-photon avalanche diode further includes a P-type contact electrode. The P-type contact electrode is disposed on a side of the P-type heavily doped region away from the electron diffusion barrier region, and the P-type contact electrode is electrically connected to the P-type heavily doped region.

[0019] Optionally, the doping concentration of the N-type doped avalanche multiplication region is lower than that of other regions in the device structure layer.

[0020] In a second aspect, the present application provides a method for manufacturing a single-photon avalanche diode. The method for manufacturing the single-photon avalanche diode includes the following steps:

[0021] Providing an N-type substrate layer, the N-type substrate layer having a light incident side and a backlight side;

[0022] Forming an N-type doped avalanche multiplication region in the N-type substrate layer;

[0023] Forming an N-type doped transition region and an etching pit in the N-type doped avalanche multiplication region, so as to form a structure in which the N-type doped avalanche multiplication region, the N-type doped transition region, and the etching pit are sequentially arranged in the direction from the light incident side to the backlight side, and the N-type doped avalanche multiplication region surrounds the N-type doped transition region, and the N-type doped transition region surrounds the etching pit;

[0024] Forming a P-type heavily doped light absorption region in the etching pit, so as to form a structure in which the N-type doped avalanche multiplication region, the N-type doped transition region, and the P-type heavily doped light absorption region are sequentially arranged in the direction from the light incident side to the backlight side, and the N-type doped avalanche multiplication region surrounds the N-type doped transition region, and the N-type doped transition region surrounds the P-type heavily doped light absorption region.

[0025] In a third aspect, the present application provides a photodetector. The photodetector includes a driving circuit layer, a lens, and the single-photon avalanche diode according to any one of the above. Among them, the driving circuit layer is disposed on the backlight side of the single-photon avalanche diode, the lens is disposed on the light incident side of the single-photon avalanche diode, and the driving circuit layer includes at least one of a printed circuit board and a power management chip.

[0026] The present application provides a single-photon avalanche diode, a preparation method thereof, and a photodetector. The single-photon avalanche diode includes an N-type substrate layer and a device structure layer. The N-type substrate layer has a light incident side and a backlight side, and the device structure layer is embedded in the N-type substrate layer. Wherein, the device structure layer includes an N-type doped avalanche multiplication region and a P-type heavily doped light absorption region arranged in sequence in the direction from the light incident side towards the backlight side, and the N-type doped avalanche multiplication region surrounds the P-type heavily doped light absorption region. In the single-photon avalanche diode provided in the embodiment of the present application, when the light incident from the light incident side of the N-type substrate layer is incident on the P-type heavily doped light absorption region disposed on one side of the N-type doped avalanche multiplication region and surrounded by the N-type doped avalanche multiplication region, electron-hole pairs will be generated due to the photoelectric effect. The majority carriers in the P-type heavily doped light absorption region are holes. Since the dielectric relaxation time of the majority carriers in the heavily doped region is on the order of picoseconds, the holes in the P-type heavily doped light absorption region will be quickly dielectrically relaxed. The electrons will drift to the N-type doped avalanche multiplication region under the action of an external electric field and then an avalanche multiplication effect will occur, generating electrons and holes. However, the generated holes will also be quickly dielectrically relaxed after drifting back to the P-type heavily doped light absorption region. Therefore, the dielectric relaxation effect can be utilized to improve the problem of the response rate limitation of the single-photon avalanche diode caused by the hole mobility of the semiconductor material being lower than the electron mobility, thereby improving the response rate of the single-photon avalanche diode. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present application. For those skilled in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0028] Figure 1 It is a schematic plan view of the backlight side of the single-photon avalanche diode provided in the embodiment of the present application.

[0029] Figure 2 It is a schematic plan view of the light incident side of the single-photon avalanche diode provided in the embodiment of the present application.

[0030] Figure 3 It is a schematic cross-sectional view of the single-photon avalanche diode provided in the embodiment of the present application.

[0031] Figure 4 It is a schematic energy band diagram of each region of the single-photon avalanche diode provided in the embodiment of the present application.

[0032] Figure 5a It is a schematic cross-sectional view of the single-photon avalanche diode corresponding to step S01 provided in the embodiment of the present application.

[0033] Figure 5b It is a schematic cross-sectional view of the single-photon avalanche diode corresponding to step S02 provided by an embodiment of the present application.

[0034] Figure 5c It is a schematic cross-sectional view of the single-photon avalanche diode corresponding to step S03 provided by an embodiment of the present application.

[0035] Figure 5d It is a schematic cross-sectional view of the single-photon avalanche diode corresponding to step S04 provided by an embodiment of the present application.

[0036] Figure 5e It is a schematic cross-sectional view of the single-photon avalanche diode corresponding to step S05 provided by an embodiment of the present application.

[0037] Figure 5f It is a schematic cross-sectional view of the single-photon avalanche diode corresponding to step S06 provided by an embodiment of the present application.

[0038] Figure 5g It is a schematic cross-sectional view of the single-photon avalanche diode corresponding to step S07 provided by an embodiment of the present application.

[0039] Figure 5h It is a schematic cross-sectional view of the single-photon avalanche diode corresponding to step S08 provided by an embodiment of the present application.

[0040] Figure 6 It is a schematic cross-sectional view of one kind of photodetector provided by an embodiment of the present application.

[0041] Figure 7 It is a schematic cross-sectional view of one kind of photodetector provided by an embodiment of the present application.

[0042] Description of reference numerals:

[0043] Single-photon avalanche diode 100; N-type substrate layer 10; light incident side 11; backlight side 12; device structure layer 20; N-type doped avalanche multiplication region 21; P-type heavily doped light absorption region 22; N-type heavily doped region 23; N-type doped transition region 24; electron diffusion barrier layer 25; P-type heavily doped region 26; cover layer 30; antireflection film 31; metal reflection layer 32; isolation structure 40; metal rod 41; P-type contact electrode 50; N-type contact electrode 60; drive circuit layer 200; packaging layer 300; lens 400; printed circuit board K1; power management chip K2; quenching circuit K3; power supply circuit K4; electrical interface K5; Detailed implementation manners

[0044] The following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part rather than all of the embodiments of the present application. All other embodiments obtained by those skilled in the art based on the embodiments in the present application without creative efforts belong to the scope of protection of the present application. In addition, it should be understood that the specific implementation manners described herein are only used to illustrate and explain the present application, and are not used to limit the present application. In the present application, unless otherwise stated, the orientation terms such as "upper" and "lower" generally refer to the upper and lower in the actual use or working state of the device, for example, the drawing direction in the accompanying drawings; while "inner" and "outer" refer to the outline of the device.

[0045] The following disclosure provides many different embodiments or examples for implementing different structures of the present application. To simplify the disclosure of the present application, the components and settings of specific examples are described below. Of course, they are only examples and are not intended to limit the present application. In addition, the present application may repeat reference numerals and / or reference letters in different examples. This repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present application provides examples of various specific processes and materials, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials. The following will be described in detail respectively. It should be noted that the description order of the following embodiments does not limit the preferred order of the embodiments.

[0046] The present application provides a single-photon avalanche diode, a preparation method thereof, and a photodetector, so as to improve the problem of the response rate limitation of the single-photon avalanche diode caused by the hole mobility of the semiconductor material being lower than the electron mobility, thereby improving the response rate of the single-photon avalanche diode.

[0047] Figure 1 is a planar schematic diagram of the backlight side of the single-photon avalanche diode provided by the embodiment of the present application; Figure 2 is a planar schematic diagram of the light-incident side of the single-photon avalanche diode provided by the embodiment of the present application; Figure 3 is a cross-sectional schematic diagram of the single-photon avalanche diode provided by the embodiment of the present application. Refer to Figures 1-3As shown in the first aspect, an embodiment of the present application provides a single-photon avalanche diode 100, which includes an N-type substrate layer 10 and a device structure layer 20. The N-type substrate layer 10 has a light incident side 11 and a backlight side 12, and the device structure layer 20 is embedded in the N-type substrate layer 10. Among them, the device structure layer 20 includes an N-type doped avalanche multiplication region 21 and a P-type heavily doped light absorption region 22 arranged in sequence in the direction from the light incident side 11 towards the backlight side 12, and the N-type doped avalanche multiplication region 21 surrounds the P-type heavily doped light absorption region 22.

[0048] In the single-photon avalanche diode 100 provided by the embodiment of the present application, when the light incident from the light incident side 11 of the N-type substrate layer 10 enters the P-type heavily doped light absorption region 22 which is arranged on one side of the N-type doped avalanche multiplication region 21 and surrounded by the N-type doped avalanche multiplication region 21, electron-hole pairs will be generated due to the photoelectric effect. The majority carriers in the P-type heavily doped light absorption region 22 are holes. Since the dielectric relaxation time of the majority carriers in the heavily doped region is on the order of picoseconds, the holes in the P-type heavily doped light absorption region 22 will be quickly dielectrically relaxed. The electrons will drift to the N-type doped avalanche multiplication region 21 under the action of the external electric field and then an avalanche multiplication effect will occur, generating electrons and holes. However, the generated holes will also be quickly dielectrically relaxed after drifting back to the P-type heavily doped light absorption region 22. Therefore, the dielectric relaxation effect can be utilized to improve the problem of the response rate limitation of the single-photon avalanche diode 100 caused by the hole mobility of the semiconductor material being lower than the electron mobility, and thus improve the response rate of the single-photon avalanche diode 100.

[0049] In some embodiments of the present application, the material of the P-type heavily doped light absorption region 22 includes a nano-scale light absorbing material.

[0050] In the single-photon avalanche diode 100 provided by the embodiment of the present application, when the light incident from the light incident side 11 of the N-type substrate layer 10 enters the nano-scale light absorbing material, the light has almost no reflection in the narrow space between the nano-scale structures, thereby improving the absorption efficiency of the P-type heavily doped light absorption region 22 for the light. Optionally, the effective absorption efficiency of the nano-scale light absorbing material for the light is above 80%. For example, the effective absorption efficiency of the nano-scale light absorbing material for the light is 85%-95%.

[0051] In some embodiments of the present application, the light absorbing material includes graphene.

[0052] In the single-photon avalanche diode 100 provided by the embodiment of the present application, since the light-absorbing material includes graphene, and graphene has a wide absorption spectrum range and has a high absorption degree for light in the range of 300 to 2500 nm. That is, graphene basically covers the entire solar spectrum and can absorb visible light, infrared light, ultraviolet light and many other invisible lights, thereby further improving the absorption efficiency of the P-type heavily doped light absorption region 22 for the light incident on the light incident side 11 of the N-type substrate layer 10. Moreover, since graphene can absorb invisible light, the single-photon avalanche diode 100 can have the detection ability for invisible light, and thus the single-photon avalanche diode 100 has the advantage of not hurting the human eye and being applicable to living scenarios. In addition, when the material of the N-type substrate layer 10 is a silicon-based material, since the carbon element in graphene and the silicon element in the N-type substrate layer 10 are both group IV elements and have a high lattice match, defects can be reduced. Optionally, the light-absorbing material may further include molybdenum disulfide at the nanoscale, etc.

[0053] In some embodiments of the present application, the single-photon avalanche diode 100 further includes a covering layer 30 disposed on the light incident side 11 of the N-type substrate layer 10. The covering layer 30 includes an antireflection film 31, and the orthographic projection of the antireflection film 31 on the device structure layer 20 covers the P-type heavily doped light absorption region 22.

[0054] In the single-photon avalanche diode 100 provided by the embodiment of the present application, since the covering layer 30 disposed on the light incident side 11 of the N-type substrate layer 10 includes an antireflection film 31, and the orthographic projection of the antireflection film 31 on the device structure layer 20 covers the P-type heavily doped light absorption region 22, therefore, the antireflection film 31 can be used to reduce the surface reflectivity and further improve the absorption efficiency of the P-type heavily doped light absorption region 22 for the light incident on the light incident side 11 of the N-type substrate layer 10.

[0055] In some embodiments of the present application, the material of the antireflection film 31 may include at least one of yttrium aluminum garnet and silver gallium sulfide. Exemplarily, as described above, the light-absorbing material may include graphene, and correspondingly, the light transmission spectrum range of the antireflection film 31 should be adapted to that of graphene. By using the antireflection film 31 including yttrium aluminum garnet and / or silver gallium sulfide in the present application, the light transmission spectrum range of the antireflection film 31 can be greatly increased.

[0056] In some embodiments of the present application, the covering layer 30 further includes a metal reflection layer 32, and the metal reflection layer 32 is disposed on the same layer as the antireflection film 31.

[0057] In the single-photon avalanche diode 100 provided by the embodiment of the present application, since the covering layer 30 further includes a metal reflection layer 32 disposed on the same layer as the anti-reflection film 31, the metal reflection layer 32 can block some of the light in the external light for reflecting stray light, thereby improving the problem of increased output noise caused by the delayed input of scattered light. Optionally, the metal reflection layer 32 can be disposed around the anti-reflection film 31, and the material of the metal reflection layer 32 includes tungsten. For example, the metal reflection layer 32 is a tungsten metal reflection layer 32.

[0058] In some embodiments of the present application, the single-photon avalanche diode 100 further includes an isolation structure 40. The isolation structure 40 surrounds the N-type substrate layer 10, and the isolation structure 40 includes a metal rod 41. The metal reflection layer 32 is electrically connected to the metal rod 41.

[0059] In the single-photon avalanche diode 100 provided by the embodiment of the present application, the isolation structure 40 surrounding the N-type substrate layer 10 is used to introduce a pure electrical reference plane to suppress optical signal crosstalk and / or electrical signal crosstalk between the single-photon avalanche diodes 100. In addition, since the metal reflection layer 32 is electrically connected to the metal rod 41, the metal reflection layer 32 can serve as an electrode of the metal rod 41 and provide a pure electrical reference potential for it. Optionally, the metal rod 41 in the isolation structure 40 can be a tungsten rod, and the materials of the metal reflection layer 32 and the metal rod 41 can be the same. Optionally, the isolation structure 40 includes metal rods 41 disposed on both sides of the N-type substrate layer 10 and an isolation layer surrounding the metal rods 41. The material of the isolation layer can be silicon dioxide. Of course, the material of the isolation layer can also include at least one of silicon nitride, silicon oxynitride, hafnium acid, titanium dioxide, and other materials with a dielectric constant greater than 3.9.

[0060] In some embodiments of the present application, the device structure layer 20 further includes an N-type heavily doped region 23. The N-type heavily doped region 23 surrounds the N-type doped avalanche multiplication region 21. Among them, the orthographic projection of the metal reflection layer 32 on the device structure layer 20 covers the N-type heavily doped region 23.

[0061] In the single-photon avalanche diode 100 provided in the embodiment of the present application, the N-type heavily doped region 23 is used to form an ohmic contact to reduce the contact resistance. Exemplarily, the electron current in the single-photon avalanche diode 100 can flow out from the N-type doped avalanche multiplication region 21 via the N-type heavily doped region 23 and the N-type contact electrode 60 disposed in the N-type heavily doped region 23, and be detected and read by an external circuit, and the N-type heavily doped region 23 can effectively reduce the contact resistance with the N-type contact electrode 60, which is conducive to the electron current being detected and read by the external circuit. In addition, since the orthographic projection of the metal reflective layer 32 on the device structure layer 20 covers the N-type heavily doped region 23, the efficiency of the metal reflective layer 32 in reflecting stray light can be further improved, and the problem of increased output noise caused by the delayed input of scattered light can be further improved.

[0062] In some embodiments of the present application, the single-photon avalanche diode 100 also includes an N-type contact electrode 60, which is arranged on a side of the N-type heavily doped region 23 away from the N-type substrate layer 10, and the N-type contact electrode 60 is electrically connected to the N-type heavily doped region 23.

[0063] In the single-photon avalanche diode 100 provided in the embodiment of the present application, the N-type contact electrode 60 electrically connected to the N-type heavily doped region 23 is electrically connected to an external circuit so that the electron current derived through the N-type contact electrode 60 can be detected and read by the external circuit.

[0064] In some embodiments of the present application, the device structure layer 20 also includes an N-type doped transition zone 24, and the N-type doped transition zone 24 is arranged between the N-type doped avalanche multiplication zone 21 and the P-type heavily doped light absorption zone 22, wherein the doping concentration of the N-type doped avalanche multiplication zone 21 is less than the doping concentration of the N-type doped transition zone 24 and the doping concentration of the P-type heavily doped light absorption zone 22.

[0065] In the single-photon avalanche diode 100 provided by the embodiments of the present application, by providing an N-type doped transition region 24 with a doping concentration greater than that of the N-type doped avalanche multiplication region 21 between the N-type doped avalanche multiplication region 21 and the P-type heavily doped optical absorption region 22, the space charge region formed at the PN junction interface can be effectively reduced. Exemplarily, if there is no N-type doped transition region 24, the P-type heavily doped optical absorption region 22 will be in direct contact with the N-type doped avalanche multiplication region 21. At this contact interface, since the doping concentration of the P-type heavily doped optical absorption region 22 is greater than that of the N-type doped avalanche multiplication region 21, according to the PN junction interface theory, the space charge region will extend greatly into the interior of the N-type doped avalanche multiplication region 21, which will lead to a reduction in the effective volume of the N-type doped avalanche multiplication region 21, and further reduce the avalanche multiplication distance of the N-type doped avalanche multiplication region 21, reduce the avalanche current, and lower the device sensitivity. The N-type doped transition region 24 can effectively improve the problem of the reduction in the effective volume of the N-type doped avalanche multiplication region 21, increase the avalanche current, and improve the device sensitivity of the single-photon avalanche diode 100.

[0066] It should be noted that the formula for calculating the width of the space charge region is: ε s |E| = qN A x p = qN D x n , where, N A and N D are the doping concentrations of the P-type heavily doped optical absorption region 22 and the N-type doped avalanche multiplication region 21 respectively, and Xp and Xn are the widths of the space charge regions of the P-type heavily doped optical absorption region 22 and the N-type doped avalanche multiplication region 21 respectively. Optionally, the doping concentration of the N-type doped transition region 24 is greater than the doping concentrations of the P-type heavily doped optical absorption region 22 and the N-type doped avalanche multiplication region 21.

[0067] In some embodiments of the present application, the ratio of the thickness of the N-type doped transition region 24 to the thickness of the N-type doped avalanche multiplication region 21 is 1:15 to 1:25.

[0068] In the single-photon avalanche diode 100 provided by the embodiment of the present application, when the thickness of the N-type doped transition region 24 is relatively thin with respect to the thickness of the N-type doped avalanche multiplication region 21, the extension of the space charge region into the interior of the N-type doped avalanche multiplication region 21 can be effectively restricted, and the influence of the P-type heavily doped light absorption region 22 on the avalanche multiplication effect of the N-type doped avalanche multiplication region 21 can be effectively reduced. Therefore, in the present application, the ratio of the thickness of the N-type doped transition region 24 to the thickness of the N-type doped avalanche multiplication region 21 is controlled within the range of 1:15 to 1:25. It should be noted that the thickness of the N-type doped transition region 24 and the thickness of the N-type doped avalanche multiplication region 21 refer to the thickness of the N-type doped transition region 24 and the thickness of the N-type doped avalanche multiplication region 21 in the cross-sectional direction perpendicular to the interface between the N-type doped transition region 24 and the N-type doped avalanche multiplication region 21. Exemplarily, the ratio of the thickness of the N-type doped transition region 24 to the thickness of the N-type doped avalanche multiplication region 21 is 1:15, 1:16, 1:17, 1:18, 1:19, 1:20, 1:21, 1:22, 1:23, 1:24, 1:25, etc. Optionally, the thickness of the N-type doped transition region 24 is 10 to 500 nm, such as 10 nm, 200 nm, 400 nm, 500 nm; the corresponding thickness of the N-type doped avalanche multiplication region 21 is 150 nm, 200 nm, 250 nm, 300 nm, 400 nm, 500 nm, 600 nm, 750 nm, 800 nm, 1000 nm, 1250 nm, etc.

[0069] Figure 4 It is a schematic energy band diagram of each region of the single-photon avalanche diode provided by the embodiment of the present application. Combining Figures 1-4 As shown, in some embodiments of the present application, the device structure layer 20 further includes an electron diffusion blocking region, and the electron diffusion blocking region is disposed on a side of the P-type heavily doped light absorption region 22 away from the N-type doped avalanche multiplication region 21, and the P-type heavily doped light absorption region 22 surrounds the electron diffusion blocking region.

[0070] In the single-photon avalanche diode 100 provided by the embodiments of the present application, in the P-type heavily doped optical absorption region 22, photo-generated electrons drift and diffuse, and the diffusion current has no directionality, which will ultimately affect the number of electrons reaching the N-type doped avalanche multiplication region 21, and further affect the internal quantum efficiency of the single-photon avalanche diode 100, that is, reduce the responsivity of the single-photon avalanche diode 100. According to the heterojunction principle, when two materials come into contact with each other, their Fermi levels will form a potential well or a potential barrier after being unified. In the present application, an electron diffusion blocking region is formed on the side of the P-type heavily doped optical absorption region 22 away from the N-type doped avalanche multiplication region 21, and the P-type heavily doped optical absorption region 22 surrounds the electron diffusion blocking region, so as to form a heterojunction interface on the side of the P-type heavily doped optical absorption region 22 away from the N-type doped avalanche multiplication region 21, and then utilize its potential barrier effect on electrons to make the photo-generated electrons in the P-type heavily doped optical absorption region 22 drift and diffuse towards the N-type doped avalanche multiplication region 21 as much as possible, improving the collection efficiency of photo-generated electrons entering the electron avalanche multiplication region, and further improving the internal quantum efficiency and responsivity of the single-photon avalanche diode 100. Optionally, the electron diffusion blocking region can be formed by doping germanium (Ge) in silicon (Si) to adjust the energy band of the electron diffusion blocking region, so that the electron diffusion blocking region has a potential barrier effect on electrons.

[0071] In some embodiments of the present application, the device structure layer 20 further includes a P-type heavily doped region 26, the P-type heavily doped region 26 is disposed on the side of the electron diffusion blocking region away from the P-type heavily doped optical absorption region 22, and the electron diffusion blocking region surrounds the P-type heavily doped region 26. The single-photon avalanche diode 100 further includes a P-type contact electrode 50, the P-type contact electrode 50 is disposed on the side of the P-type heavily doped region 26 away from the electron diffusion blocking region, and the P-type contact electrode 50 is electrically connected to the P-type heavily doped region 26.

[0072] In the single-photon avalanche diode 100 provided by the present application, the P-type heavily doped region 26 disposed on the side of the electron diffusion blocking region away from the P-type heavily doped optical absorption region 22 is electrically connected to the P-type contact electrode 50 disposed on the side of the P-type heavily doped region 26 away from the electron diffusion blocking region, so as to form an ohmic contact with the P-type contact electrode 50 and reduce the contact resistance. Optionally, the P-type contact electrode 50 is used for accessing an electric field.

[0073] In some embodiments of the present application, the doping concentration of the N-type doped avalanche multiplication region 21 is lower than the doping concentrations of other regions in the device structure layer 20.

[0074] In the single-photon avalanche diode 100 provided by the embodiments of the present application, since the N-type doped avalanche multiplication region 21 in the device structure layer 20 needs to rely on the electric field formed by an applied voltage to operate, but since the doping concentration of the N-type doped avalanche multiplication region 21 is lower than that of other regions in the device structure layer 20, and the lower the doping concentration of a region, the higher its resistivity. According to the voltage division theorem, the higher the resistivity of a region, the greater its voltage division. Correspondingly, the voltage division of the N-type doped avalanche multiplication region 21 with a lower doping concentration is even greater. Therefore, the electric field is mainly concentrated in the N-type doped avalanche multiplication region 21. Furthermore, the electrons in the N-type doped avalanche multiplication region 21 will be rapidly accelerated, thereby generating avalanche ionization. Therefore, the dielectric relaxation phenomenon basically will not occur. In addition, compared with the regions with a higher doping concentration, the regions with a lower doping concentration have a lower probability of occurring the dielectric relaxation effect.

[0075] In some embodiments of the present application, the doping concentration of the N-type doped avalanche multiplication region 21 is lower than that of other regions in the device structure layer 20, and the doping concentration of the N-type doped avalanche multiplication region 21 is lower than that of the N-type substrate layer 10.

[0076] In the single-photon avalanche diode 100 provided by the embodiments of the present application, since the doping concentration of the N-type doped avalanche multiplication region 21 is also lower than that of the N-type substrate layer 10, it is thus possible to further increase the voltage division of the N-type doped avalanche multiplication region 21 by reducing the doping concentration of the N-type doped avalanche multiplication region 21, thereby further reducing the probability of the dielectric relaxation phenomenon occurring in the N-type doped avalanche multiplication region 21.

[0077] In some embodiments of the present application, the N-type substrate layer 10 includes a silicon-based substrate and dopants doped in the silicon-based substrate. The dopants include at least one of arsenic (As) and phosphorus (P). Of course, the dopants may also include other elements that can form N-type doping. Among them, the distribution manner of the dopants in the silicon-based substrate can be Gaussian doping. Exemplarily, in the direction from the backlight side 12 to the incident light side 11 of the N-type substrate layer 10, the doping concentration of the N-type substrate layer 10 gradually increases. Optionally, in the direction from the backlight side 12 to the incident light side 11 of the N-type substrate layer 10, the doping concentration of the N-type substrate layer 10 increases from 1×10 17 to 2×10 18, the doping depth of the N-type substrate layer 10 is 300 microns. Optionally, after the N-type substrate layer 10 is thinned, in the direction of the backlight side 12 of the N-type substrate layer 10 towards the light incident side 11 of the N-type substrate layer 10, the thickness of the N-type substrate layer 10 is 100 to 150 microns.

[0078] In some embodiments of the present application, the dopants in the N-type doped avalanche multiplication region 21 include at least one of arsenic (As) and phosphorus (P). Of course, the dopants may also include other elements that can form N-type doping. Among them, the doping concentration of the N-type doped avalanche multiplication region 21 is 1×10 16 to 1×10 18 , and the doping depth of the N-type doped avalanche multiplication region 21 is 5 to 10 microns.

[0079] In some embodiments of the present application, the dopants in the N-type doped transition region 24 include arsenic (As). Of course, the dopants may also include other elements that can form N-type doping. Among them, the doping concentration of the N-type doped transition region 24 is 1×10 18 to 1×10 20 , and the doping depth of the N-type doped transition region 24 is 3 to 7 microns.

[0080] In some embodiments of the present application, the dopants in the P-type heavily doped light absorption region 22 include at least one of P-type doping elements and / or group III elements. Optionally, the dopants in the P-type heavily doped light absorption region 22 include at least one of boron (B) and indium (In). Of course, the dopants may also include other elements that can form P-type doping. Among them, the doping concentration of the P-type heavily doped light absorption region 22 is greater than or equal to 2×10 17 , optionally, the doping concentration of the P-type heavily doped light absorption region 22 is 2×10 17 to 2×10 19 .

[0081] In some embodiments of the present application, the dopants in the N-type heavily doped region 23 include at least one of arsenic (As) and phosphorus (P). Of course, the dopants may also include other elements that can form N-type doping. Among them, the doping concentration of the N-type heavily doped region 23 is 1×10 20 to 2×10 21 .

[0082] In some embodiments of the present application, the dopants in the P-type heavily doped region 26 include boron (B). Of course, the dopants may also include other elements that can form P-type doping. Among them, the doping concentration of the P-type heavily doped region 26 is 1×10 20 to 2×1021 。

[0083] In a second aspect, an embodiment of the present application further provides a method for manufacturing a single-photon avalanche diode 100, and the method for manufacturing the single-photon avalanche diode 100 includes steps S01, S02, S03, and S04:

[0084] Figure 5a is a cross-sectional schematic diagram of the single-photon avalanche diode corresponding to step S01 provided by the embodiment of the present application. Refer to Figure 5a , step S01 includes: providing an N-type substrate layer 10, and the N-type substrate layer 10 has a light-incident side and a backlight side 12. Among them, step S01 is exemplified as providing a silicon-based substrate, adding dopants by ion implantation, performing N-type Gaussian doping on the silicon-based substrate, doping to form an N-type silicon-based substrate with a depth of 300 μm, and the doping concentration increases with the depth, from 1×10 17 increasing to 2×10 18 . After that, through rapid laser thermal annealing, the implanted ions are activated to form the N-type substrate layer 10. Among them, the direction in which the doping concentration increases with the depth is the direction in which the backlight side 12 of the N-type substrate layer 10 faces the light-incident side 11 of the N-type substrate layer 10.

[0085] Figure 5b is a cross-sectional schematic diagram of the single-photon avalanche diode corresponding to step S02 provided by the embodiment of the present application. Refer to Figure 5b , step S02 includes: forming an N-type doped avalanche multiplication region 21 in the N-type substrate layer 10. Among them, step S02 is exemplified as, after a cleaning process, successively by means of photolithography and ion beam implantation, photolithographically implanting to form the N-type doped avalanche multiplication region 21, with an implantation energy of 100 to 300 KeV, an implantation angle of 0° to 45°, and an implantation depth of 5 to 10 μm. The dopants in the N-type doped avalanche multiplication region 21 include at least one of arsenic (As) and phosphorus (P). Of course, the dopants may also include other elements that can form N-type doping. Among them, the doping concentration of the N-type doped avalanche multiplication region 21 is 1×10 16 to 1×10 18 , and the doping depth of the N-type doped avalanche multiplication region 21 is 5 to 10 microns.

[0086] Figure 5c is a cross-sectional schematic diagram of the single-photon avalanche diode corresponding to step S03 provided by the embodiment of the present application. Refer to Figure 5c, Step S03 includes: forming an N-type doped transition region 24 and an etching pit in the N-type doped avalanche multiplication region 21, so as to form a structure in which the N-type doped avalanche multiplication region 21, the N-type doped transition region 24, and the etching pit are arranged in sequence in the direction from the light incident side 11 towards the backlight side 12, and the N-type doped avalanche multiplication region 21 surrounds the N-type doped transition region 24, and the N-type doped transition region 24 surrounds the etching pit. Among them, Step S03 is exemplified as forming the N-type doped transition region 24 by photolithography injection, with an injection depth of 3 to 7 μm, an injection energy of 50 to 100 KeV, and an injection angle of 0 to 45°, and etching to form an etching pit with a depth of 10 to 100 nm, thereby forming a structure in which the N-type doped avalanche multiplication region 21, the N-type doped transition region 24, and the etching pit are arranged in sequence in the direction from the light incident side 11 towards the backlight side 12, and the N-type doped avalanche multiplication region 21 surrounds the N-type doped transition region 24, and the N-type doped transition region 24 surrounds the etching pit. Among them, the dopant in the N-type doped transition region 24 includes arsenic (As). Of course, the dopant may also include other elements that can form N-type doping. Among them, the doping concentration of the N-type doped transition region 24 is 1×10 18 to 1×10 20 , and the doping depth of the N-type doped transition region 24 is 3 to 7 microns.

[0087] Figure 5d is a cross-sectional schematic diagram of the single-photon avalanche diode corresponding to Step S04 provided by an embodiment of the present application. Refer to Figure 5d , Step S04 includes: forming a P-type heavily doped light absorption region 22 in the etching pit, so as to form a structure in which the N-type doped avalanche multiplication region 21, the N-type doped transition region 24, and the P-type heavily doped light absorption region 22 are arranged in sequence in the direction from the light incident side 11 towards the backlight side 12, and the N-type doped avalanche multiplication region 21 surrounds the N-type doped transition region 24, and the N-type doped transition region 24 surrounds the P-type heavily doped light absorption region 22. Among them, Step S04 is exemplified as growing the P-type heavily doped light absorption region 22 by photolithography and using atomic layer deposition technology at the etching pit. The dopant of the P-type heavily doped light absorption region 22 can be added to the precursor gas. The dopant of the P-type heavily doped light absorption region 22 includes at least one of boron (B) and indium (In). Of course, the dopant may also include other elements that can form P-type doping. The doping concentration of the P-type heavily doped light absorption region 22 is 2×10 17 to 2×10 19, the angle of the regulating reaction diffusion source does not exceed 45°, so as to form a structure in which the N-type doped avalanche multiplication region 21, the N-type doped transition region 24, and the P-type heavily doped light absorption region 22 are sequentially arranged in the direction from the light incident side 11 to the backlight side 12, and the N-type doped avalanche multiplication region 21 surrounds the N-type doped transition region 24, and the N-type doped transition region 24 surrounds the P-type heavily doped light absorption region 22.

[0088] Wherein, the method for manufacturing the single-photon avalanche diode 100 further includes step S05, step S06, step S07, and step S08 provided after step S04.

[0089] Figure 5e is a cross-sectional schematic diagram of the single-photon avalanche diode corresponding to step S05 provided by the embodiment of the present application. Refer to Figure 5e , step S05 includes: forming an electron diffusion barrier layer 25 in the P-type heavily doped light absorption region 22, so as to form a structure in which the P-type heavily doped light absorption region 22 and the electron diffusion barrier layer 25 are sequentially arranged in the direction from the light incident side 11 to the backlight side 12, and the P-type heavily doped light absorption region 22 surrounds the electron diffusion barrier region. Wherein, the electron diffusion barrier layer 25 can be formed by photolithography and grown by molecular beam epitaxy, the electron diffusion barrier layer 25 includes germanium (Ge) doped in silicon (Si), and the electron diffusion barrier layer 25 can form a heterojunction interface at the junction with the P-type heavily doped light absorption region 22. Wherein, the thickness of the N-type doped transition region 24 is 10 to 500 nm.

[0090] Figure 5f is a cross-sectional schematic diagram of the single-photon avalanche diode corresponding to step S06 provided by the embodiment of the present application. Refer to Figure 5f , step S06 includes: forming a P-type heavily doped region 26 in the electron diffusion barrier layer 25, so as to form a structure in which the electron diffusion barrier layer 25 and the P-type heavily doped region 26 are sequentially arranged in the direction from the light incident side 11 to the backlight side 12, and the electron diffusion barrier region surrounds the P-type heavily doped region 26; forming an N-type heavily doped region 23 in the N-type substrate layer 10, so as to form a structure in which the N-type heavily doped region 23 surrounds the N-type doped avalanche multiplication region 21.

[0091] Wherein, the P-type heavily doped region 26 is formed by photolithography and doping injection, the injection energy is 3 to 10 KeV, the dopants of the P-type heavily doped light absorption region 22 include at least one of boron (B) and indium (In). Of course, the dopants can also include other elements that can form P-type doping. The doping concentration of the P-type heavily doped light absorption region 22 is 2×10 17 to 2×1019 。

[0092] Among them, the N-type heavily doped region 23 is formed by photolithography and doping with dopants. The injection angle is ±1°, the injection energy is 500 to 900 keV, and rapid thermal annealing is used for activation. The dopants in the N-type heavily doped region 23 include at least one of arsenic (As) and phosphorus (P). Of course, the dopants may also include other elements that can form N-type doping. The doping concentration of the N-type heavily doped region 23 is 1×10 20 to 2×10 21 。

[0093] Figure 5g is a cross-sectional schematic diagram of the single-photon avalanche diode corresponding to step S07 provided by an embodiment of the present application. Referring to Figure 5g , step S07 includes: forming a P-type contact electrode 50 on a side of the P-type heavily doped region 26 away from the electron diffusion blocking region; forming an N-type contact electrode 60 on a side of the N-type heavily doped region 23 away from the N-type substrate layer 10; forming an isolation structure 40 surrounding the N-type substrate layer 10; and forming a metal reflection layer 32 on a light incident side 11 of the N-type substrate layer 10. Among them, the step of forming the isolation structure 40 surrounding the N-type substrate layer 10 includes: photolithographing an isolation groove pattern structure and etching to form a side deep groove by means of a plasma inductively coupled etcher, and depositing an isolation layer with a certain thickness by low-pressure chemical vapor deposition, and the isolation layer fills the side deep groove; using a polishing machine to thin the N-type substrate layer 10 from the light incident side 11 of the N-type substrate layer 10 to a thickness of 100 to 150 um, so that the isolation layer isolates another single-photon avalanche diode 100 adjacent to the single-photon avalanche diode 100; sputtering to form a metal rod 41 filled into the side deep groove by means of plasma sputtering, and the isolation layer and the metal rod 41 together form the isolation structure 40. Among them, the method of forming the metal reflection layer 32 on the light incident side 11 of the N-type substrate layer 10 is to form the metal reflection layer 32 by photolithography and sputtering on the light incident side 11 of the N-type substrate layer 10, and the metal reflection layer 32 has an opening, so that, in the direction from the light incident side 11 of the N-type substrate layer 10 towards the backlight side 12 of the N-type substrate layer 10, the metal reflection layer 32 does not overlap with the P-type heavily doped light absorption region 22.

[0094] Figure 5h is a cross-sectional schematic diagram of the single-photon avalanche diode corresponding to step S08 provided by an embodiment of the present application. Referring to Figure 5g , step S08 includes: forming an antireflection film 31 in the opening of the metal reflection layer 32.

[0095] Figure 6It is a schematic cross-sectional view of one kind of the photodetectors provided by the embodiments of the present application; Figure 7 It is a schematic cross-sectional view of one kind of the photodetectors provided by the embodiments of the present application. Combining Figures 1-4 , Figures 6-7 As shown, in a third aspect, the embodiments of the present application further provide a photodetector, which includes a driving circuit layer 200, a lens 400, and the single-photon avalanche diode 100 described in any one of the above. Wherein, the driving circuit layer 200 is disposed on the backlight side 12 of the single-photon avalanche diode 100, the lens 400 is disposed on the light incident side 11 of the single-photon avalanche diode 100, and the driving circuit layer 200 includes at least one of a printed circuit board K1 and a power management chip K2.

[0096] In the photodetector provided by the embodiments of the present application, the single-photon avalanche diode 100 can be flip-chip bonded to the driving circuit layer 200 or monolithically integrated with the driving circuit layer 200, which can effectively reduce the circuit parasitic effect, and has a higher response rate and a smaller noise output.

[0097] Referring to Figure 6 , in some embodiments of the present application, the lens 400 is disposed on a side of the encapsulation layer 300 away from the single-photon avalanche diode 100. Wherein, the driving circuit layer 200 of the photodetector includes a printed circuit board K1, a quenching circuit K3, and a power supply circuit K4. The photodetector further includes an encapsulation layer 300 and an electrical interface K5. The encapsulation layer 300 covers the printed circuit board K1, the single-photon avalanche diode 100, the quenching circuit K3, and the power supply circuit K4, and the electrical interface K5 is electrically connected to the power supply circuit K4.

[0098] Referring to Figure 7 , in some embodiments of the present application, the lens 400 is disposed on a side of the encapsulation layer 300 away from the single-photon avalanche diode 100. Wherein, the driving circuit layer 200 of the photodetector includes a power management chip K2. The photodetector further includes an encapsulation layer 300 and an electrical interface K5. The encapsulation layer 300 covers the power management chip K2 and the single-photon avalanche diode 100, and the electrical interface K5 is electrically connected to the power supply circuit K4.

[0099] In summary, the present application provides a single-photon avalanche diode, a preparation method thereof, and a photodetector. The single-photon avalanche diode includes an N-type substrate layer and a device structure layer. The N-type substrate layer has a light-incident side and a backlight side. The device structure layer is embedded in the N-type substrate layer. Among them, the device structure layer includes an N-type doped avalanche multiplication region and a P-type heavily doped light absorption region that are sequentially arranged in the direction from the light-incident side to the backlight side, and the N-type doped avalanche multiplication region surrounds the P-type heavily doped light absorption region. In the single-photon avalanche diode provided by the embodiment of the present application, when the light incident from the light-incident side of the N-type substrate layer enters the P-type heavily doped light absorption region that is arranged on one side of the N-type doped avalanche multiplication region and is surrounded by the N-type doped avalanche multiplication region, electron-hole pairs will be generated due to the photoelectric effect. The majority carriers in the P-type heavily doped light absorption region are holes. Since the dielectric relaxation time of the majority carriers in the heavily doped region is on the picosecond scale, the holes in the P-type heavily doped light absorption region will be quickly dielectrically relaxed. The electrons will drift to the N-type doped avalanche multiplication region under the action of an external electric field and then an avalanche multiplication effect will occur, generating electrons and holes. However, the holes generated will also be quickly dielectrically relaxed after drifting back to the P-type heavily doped light absorption region. Therefore, the dielectric relaxation effect can be utilized to improve the problem of the response rate limitation of the single-photon avalanche diode caused by the hole mobility of the semiconductor material being lower than the electron mobility, thereby improving the response rate of the single-photon avalanche diode.

[0100] The above has introduced in detail a single-photon avalanche diode, a preparation method thereof, and a photodetector provided by the embodiments of the present application. Specific examples are used in this article to elaborate on the principle and implementation manner of the present application. The description of the above embodiments is only used to help understand the method and its core idea of the present application; at the same time, for those skilled in the art, according to the idea of the present application, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present application.

Claims

1. A single-photon avalanche diode, characterized in that, The single photon avalanche diode comprises: An N-type substrate layer having a light incident side and a backlight side; A device structure layer, embedded in the N-type substrate layer; Among them, the device structure layer includes an N-type doped avalanche multiplication region and a P-type heavily doped light absorption region arranged in sequence in the direction from the light incident side to the backlight side, and the N-type doped avalanche multiplication region surrounds the P-type heavily doped light absorption region.

2. The single-photon avalanche diode according to claim 1, characterized in that, The material of the P-type heavily doped light absorption region includes nanoscale light absorption material.

3. The single-photon avalanche diode according to claim 2, wherein The light absorbing material includes graphene.

4. The single-photon avalanche diode according to claim 1, characterized in that, The single-photon avalanche diode further includes a covering layer arranged on the light incident side of the N-type substrate layer, the covering layer includes an anti-reflection film, and the orthographic projection of the anti-reflection film on the device structure layer covers the P-type heavily doped light absorption region.

5. The single-photon avalanche diode according to claim 4, characterized in that The cover layer further comprises a metal reflective layer, and the metal reflective layer is arranged in the same layer as the anti-reflection film.

6. The single-photon avalanche diode according to claim 5, wherein The single photon avalanche diode further includes an isolation structure, the isolation structure surrounds the N-type substrate layer, the isolation structure includes a metal rod, and the metal reflective layer is electrically connected to the metal rod.

7. The single-photon avalanche diode according to claim 5, characterized in that, The device structure layer further includes an N-type heavily doped region, and the N-type heavily doped region surrounds the N-type doped avalanche multiplication region, wherein the orthographic projection of the metal reflective layer on the device structure layer covers the N-type heavily doped region.

8. The single-photon avalanche diode according to claim 7, characterized in that, The single-photon avalanche diode further includes an N-type contact electrode, which is arranged on a side of the N-type heavily doped region away from the N-type substrate layer, and is electrically connected to the N-type heavily doped region.

9. The single-photon avalanche diode according to claim 1, characterized in that, The device structure layer also includes an N-type doped transition region, which is arranged between the N-type doped avalanche multiplication region and the P-type heavily doped light absorption region, wherein the doping concentration of the N-type doped avalanche multiplication region is less than the doping concentration of the N-type doped transition region and the doping concentration of the P-type heavily doped light absorption region.

10. The single-photon avalanche diode according to claim 9, characterized in that, The ratio of the thickness of the N-type doped transition region to the thickness of the N-type doped avalanche multiplication region is 1:15 to 1:

25.

11. The single-photon avalanche diode according to claim 1, characterized in that, The device structure layer also includes an electron diffusion blocking region, which is arranged on a side of the P-type heavily doped light absorption region away from the N-type doped avalanche multiplication region, and the P-type heavily doped light absorption region surrounds the electron diffusion blocking region.

12. The single-photon avalanche diode according to claim 11, characterized in that, The device structure layer also includes a P-type heavily doped region, which is arranged on a side of the electron diffusion blocking region away from the P-type heavily doped light absorption region, and the electron diffusion blocking region surrounds the P-type heavily doped region.

13. The single-photon avalanche diode according to claim 12, wherein The single-photon avalanche diode further includes a P-type contact electrode, which is disposed on a side of the P-type heavily doped region away from the electron diffusion blocking region, and the P-type contact electrode is electrically connected to the P-type heavily doped region.

14. The single-photon avalanche diode according to claim 1, wherein The doping concentration of the N-type doped avalanche multiplication region is lower than the doping concentration of other regions in the device structure layer.

15. A preparation method of a single-photon avalanche diode, characterized in that, The preparation method of the single photon avalanche diode comprises the following steps: Providing an N-type substrate layer, wherein the N-type substrate layer has a light incident side and a backlight side; forming an N-type doped avalanche multiplication region in the N-type substrate layer; An N-type doped transition region and an etching pit are formed in the N-type doped avalanche multiplication region to form a structure in which the N-type doped avalanche multiplication region, the N-type doped transition region, and the etching pit are sequentially arranged in the direction from the light incident side to the backlight side, and the N-type doped avalanche multiplication region surrounds the N-type doped transition region, and the N-type doped transition region surrounds the etching pit; A P-type heavily doped light absorption region is formed in the etching pit to form a structure in which the N-type doped avalanche multiplication region, the N-type doped transition region, and the P-type heavily doped light absorption region are sequentially arranged in the direction from the light incident side to the backlight side, and the N-type doped avalanche multiplication region surrounds the N-type doped transition region, and the N-type doped transition region surrounds the P-type heavily doped light absorption region.

16. A photodetector, characterized in that, It includes a driving circuit layer, a lens, and a single-photon avalanche diode according to any one of claims 1-14, wherein the driving circuit layer is arranged on the backlight side of the single-photon avalanche diode, the lens is arranged on the light incident side of the single-photon avalanche diode, and the driving circuit layer includes at least one of a printed circuit board and a power management chip.

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