Circuit board and semiconductor package including same

Abstract

A circuit board according to an embodiment includes: an insulating layer; a plurality of electrode portions including a through portion penetrating from an upper surface of the insulating layer to a partial region of the insulating layer; and a connecting member which is embedded in the insulating layer, wherein the plurality of electrode portions includes: a first electrode portion, the first electrode portion including a first through portion overlapping the connecting member in a vertical direction; and a second electrode portion including a second through portion that does not overlap the connecting member in the vertical direction, a size of the first through portion being in a range of 80% to 100% of a size of the second through portion.

Description

Technical Field

[0001] The embodiment relates to a circuit board, and more particularly, to a circuit board capable of solving the height deviation of a plurality of through electrodes connected to a semiconductor device and a semiconductor package including the circuit board. Background Art

[0002] With the progress of the performance of electrical / electronic products, technologies for mounting a larger number of semiconductor devices on a semiconductor package substrate of a limited size are being proposed and studied. However, since a general semiconductor package is based on mounting a single semiconductor device, there are limitations in obtaining desired performance.

[0003] Therefore, recently, a semiconductor package using a plurality of circuit boards to mount a plurality of semiconductor devices has been provided. The semiconductor package has a structure in which a plurality of semiconductor devices are connected to each other in a horizontal direction and / or a vertical direction on the circuit board. Therefore, the semiconductor package has the advantages of effectively using the mounting area of the semiconductor devices and transmitting high-speed signals through short signal transmission paths between the semiconductor devices.

[0004] Due to these advantages, the semiconductor package as described above is widely applied to mobile devices and the like.

[0005] In addition, as the number and / or size of each semiconductor device increase according to the trend of high integration, or as the functional parts of the semiconductor device are divided, the concept of a semiconductor package applied to products providing Internet of Things (IoT), autonomous vehicles, and high-performance servers has been extended to semiconductor chiplets.

[0006] Therefore, the mutual communication between semiconductor devices and / or semiconductor chiplets becomes important, and thus, there is a trend to provide an interposer between the circuit board of the semiconductor package and the semiconductor device.

[0007] The interposer can be used as a redistribution layer that gradually increases the width or depth of the circuit pattern from the semiconductor device to the semiconductor package to facilitate the mutual communication between the semiconductor devices and / or semiconductor chiplets, or interconnects the semiconductor device and the semiconductor package substrate, thereby smoothly transmitting an electrical signal between the semiconductor device and the semiconductor package substrate. Compared with the circuit pattern of the semiconductor device, the semiconductor package circuit board has a relatively large circuit pattern.

[0008] Meanwhile, a package substrate and / or an interposer applied to semiconductor packaging is provided with connection members connected to semiconductor devices and / or semiconductor chiplets. The connection members are used to horizontally connect multiple semiconductor devices and / or semiconductor chiplets. Therefore, the connection members can be embedded in the package circuit board and / or the interposer. At this time, the package substrate and / or the interposer is provided with a plurality of through electrodes connected to the semiconductor devices and / or semiconductor chiplets. The through electrodes include a first through electrode that overlaps with the connection member in the vertical direction, and a second through electrode that overlaps with the first through electrode in the horizontal direction and does not overlap with the connection member in the vertical direction.

[0009] At this time, the first through electrode is connected to the connection member. Therefore, the width and / or thickness of the first through electrode can be determined by the width of the connection electrode provided in the connection member and the thickness of the connection member. Therefore, the first through electrode and the second through electrode can have different widths and / or thicknesses.

[0010] As a result, the first through electrode and the second through electrode provided in the package substrate and / or the interposer can have different heights. For example, due to the difference in width and / or thickness, there may be a deviation between the height of the first through electrode and the height of the second through electrode. In addition, when there is a height deviation between the first through electrode and the second through electrode, there may be a problem that the semiconductor device and / or the semiconductor chiplet cannot be stably mounted. Therefore, there may be a problem that the operating characteristics of the semiconductor device and / or the semiconductor chiplet deteriorate. SUMMARY OF THE INVENTION

[0011] TECHNICAL PROBLEM

[0012] Embodiments provide a circuit board having a novel structure and a semiconductor package including the circuit board.

[0013] In addition, embodiments provide a circuit board in which a connection member is embedded and a semiconductor package including the circuit board.

[0014] In addition, embodiments provide a circuit board and a semiconductor package including the circuit board that can control the height deviation between a plurality of through electrodes connected to a semiconductor device.

[0015] In addition, embodiments provide a circuit board and a semiconductor package including the circuit board having improved heat dissipation characteristics.

[0016] In addition, embodiments provide a circuit board and a semiconductor package including the circuit board having improved adhesion between the circuit board and the connection member.

[0017] The technical problems to be solved by the proposed embodiments are not limited to the above technical problems, and those skilled in the art of the proposed embodiments can clearly understand other technical problems not mentioned from the following description.

[0018] Technical solution

[0019] The circuit board according to the embodiment includes: an insulating layer; a plurality of electrode portions, the plurality of electrode portions including through portions penetrating from the upper surface of the insulating layer to a partial area of the insulating layer; and a connection member embedded in the insulating layer; wherein, the plurality of electrode portions include: a first electrode portion including a first through portion overlapping with the connection member in a vertical direction; and a second electrode portion including a second through portion not overlapping with the connection member in a vertical direction, wherein the size of the first through portion is in the range of 80% to 100% of the size of the second through portion.

[0020] In addition, each of the first through portion and the second through portion is provided as a plurality, and the size of each of the plurality of first through portions is in the range of 80% to 100% of the size of each of the plurality of second through portions.

[0021] In addition, the plurality of first through portions overlap with the plurality of second through portions in a horizontal direction.

[0022] In addition, the first through portion and the second through portion have the same thickness in a vertical direction, and the first through portion and the second through portion have the same width in a horizontal direction.

[0023] In addition, the thickness of the first through portion in the vertical direction is less than the thickness of the second through portion in the vertical direction, and the width of the first through portion in the horizontal direction is greater than the width of the second through portion in the horizontal direction.

[0024] In addition, the thickness of the first through portion in the vertical direction is greater than the thickness of the second through portion in the vertical direction, and the width of the first through portion in the horizontal direction is less than the width of the second through portion in the horizontal direction.

[0025] In addition, at least one of the density and volume of the first through portion is in the range of 80% to 100% of at least one of the density and volume of the second through portion.

[0026] In addition, the first electrode portion includes a first protrusion portion provided on the first through portion and protruding on the insulating layer, and the second electrode portion includes a second protrusion portion provided on the second through portion and protruding on the insulating layer.

[0027] In addition, the height of the upper surface of the first protruding portion is the same as the height of the upper surface of the second protruding portion.

[0028] In addition, the width of the first through portion in the horizontal direction is in the range of 10 μm to 40 μm.

[0029] In addition, each of the first through portion and the second through portion has a slope such that the width gradually decreases from the upper surface toward the lower surface.

[0030] In addition, each of the first through portion and the second through portion includes a first metal layer and a second metal layer, and the second metal layer is disposed on the first metal layer and includes a metal material different from that of the first metal layer.

[0031] In addition, the lower surface of the first metal layer of each of the first through portion and the second through portion includes a convex portion that is recessed toward the lower surface of the insulating layer.

[0032] In addition, the semiconductor package further includes a first semiconductor device and a second semiconductor device disposed on the first electrode portion and the second electrode portion. The first electrode portion includes a first set of first electrode portions connected to the terminals of the first semiconductor device and a second set of first electrode portions connected to the terminals of the second semiconductor device. The second electrode portion includes a first set of second electrode portions connected to the terminals of the first semiconductor device and a second set of second electrode portions connected to the terminals of the second semiconductor device.

[0033] In addition, the second through portion of at least one of the first set of second electrode portions and the second set of second electrode portions includes a plurality of sub-through portions that vertically overlap a single protruding portion and are horizontally spaced apart from each other.

[0034] In addition, the upper surface of the single protruding portion that vertically overlaps the plurality of sub-through portions includes a recess that is recessed toward each of the plurality of sub-through portions.

[0035] Advantageous Effects

[0036] The embodiment can minimize the height deviation of the first electrode portion and the second electrode portion that penetrate from the upper surface of the insulating layer to a partial area of the insulating layer while being connected to the semiconductor device.

[0037] Specifically, the first electrode portion may vertically overlap with the connection member, and the second electrode portion may horizontally overlap with the first electrode portion without vertically overlapping with the connection member. The first electrode portion may include a first through portion that penetrates at least a part of the insulating layer and a first protrusion portion that is located on the first through portion and protrudes on the insulating layer. The second electrode portion may include a second through portion that penetrates at least a part of the insulating layer and a second protrusion portion that is located on the second through portion and protrudes on the insulating layer. At this time, the size of the second through portion may correspond to the size of the first through portion. Preferably, the size of the second through portion may be in the range of 80% to 100% of the size of the first through portion. The embodiment may minimize the height deviation between the first electrode portion and the second electrode portion caused by the size difference between the first through portion and the second through portion, thereby allowing the semiconductor device to be stably disposed on the first electrode portion and the second electrode portion.

[0038] Preferably, the thickness of the first through portion in the vertical direction may be the same as the thickness of the second through portion in the vertical direction, and the width of the first through portion in the horizontal direction may be the same as the width of the second through portion in the horizontal direction.

[0039] Alternatively, the thickness of the first through portion in the vertical direction may be less than the thickness of the second through portion in the vertical direction, and the width of the first through portion in the horizontal direction may be greater than the width of the second through portion in the horizontal direction.

[0040] Alternatively, the thickness of the first through portion in the vertical direction may be greater than the thickness of the second through portion in the vertical direction, and the width of the first through portion in the horizontal direction may be less than the width of the second through portion in the horizontal direction.

[0041] Therefore, the embodiment may allow the height of the first electrode portion and the height of the second electrode portion to be consistent. The first semiconductor device and the second semiconductor device may be stably disposed. Accordingly, the embodiment may improve the operating characteristics of the first semiconductor device and the second semiconductor device. In addition, the embodiment may allow the first semiconductor device and the second semiconductor device to operate smoothly, whereby the electronic product or the server may operate smoothly.

[0042] Alternatively, the embodiment may prevent impedance changes caused by thickness variations of the first electrode portion and the second electrode portion by making the first electrode portion and the second electrode portion have the same height, thereby further improving electrical reliability.

[0043] Meanwhile, the second through-hole portion of the second electrode portion may include a plurality of sub-through-hole portions that vertically overlap with one second pad portion. Additionally, the size of each of the plurality of sub-through-hole portions may correspond to the size of the first through-hole portion. Therefore, even though the second through-hole portion includes a plurality of sub-through-hole portions, the first electrode portion and the second electrode portion may have a consistent height. Further, a recess may be provided on the upper surface of the second protrusion portion that vertically overlaps with the plurality of sub-through-hole portions. Additionally, a conductive adhesive material such as solder may stably stay on the recess provided in the second protrusion portion. For example, the recess of the second protrusion portion may serve as a blocking function that prevents solder movement while guiding the staying position of the solder placement. Furthermore, the embodiment may improve the heat dissipation characteristics of the semiconductor package by allowing heat to be transferred through the plurality of sub-through-hole portions, and may further improve the operating characteristics of the semiconductor package.

[0044] Furthermore, since the second through-hole portion includes a plurality of sub-through-hole portions, the embodiment may prevent impedance changes caused by a reduction in the width of the second through-hole portion, thereby improving the operating characteristics of the first semiconductor device and the second semiconductor device. Additionally, the embodiment may achieve smooth operation of the first semiconductor device and the second semiconductor device, thereby achieving smooth operation of electronic products or servers. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1a is a cross-sectional view showing a semiconductor package according to a first embodiment.

[0046] Figure 1b is a cross-sectional view showing a semiconductor package according to a second embodiment.

[0047] Figure 1c is a cross-sectional view showing a semiconductor package according to a third embodiment.

[0048] Figure 1d is a cross-sectional view showing a semiconductor package according to a fourth embodiment.

[0049] Figure 1e is a cross-sectional view showing a semiconductor package according to a fifth embodiment.

[0050] Figure 2 is a cross-sectional view showing a circuit board according to a first embodiment.

[0051] Figure 3 is a plan view of the Figure 2 circuit board viewed from above.

[0052] Figure 4 is Figure 2 an enlarged cross-sectional view of the first region R1 of

[0053] Figure 5 is showingFigure 2 Cross-sectional view of the detailed layer structure of the first through electrode and the second through electrode.

[0054] Figure 6 According to the second embodiment Figure 2 Enlarged cross-sectional view of the first region of

[0055] Figure 7 According to the third embodiment Figure 2 Enlarged cross-sectional view of the first region of

[0056] Figure 8 According to the fourth embodiment Figure 2 Enlarged cross-sectional view of the first region of

[0057] Figure 9 According to the fifth embodiment Figure 2 Enlarged cross-sectional view of the first region of

[0058] Figure 10 Cross-sectional view showing a circuit board according to the sixth embodiment. Detailed implementation mode

[0059] Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings, where the same reference numerals are used to denote the same or similar elements, and redundant descriptions thereof will be omitted. The suffixes "module" and "section" of the components used in the following description are only given or mixed for the convenience of preparing the description, and there is no meaning or function of distinguishing each other. In addition, in the following description of the embodiments of the present invention, when it is determined that the gist of the embodiments disclosed herein may be difficult to understand, the detailed description of the related technology will be omitted. In addition, the accompanying drawings are included to provide a further understanding of the present invention, and the drawings are incorporated into the present specification and form a part of the present specification. It should be understood that the present invention is intended to cover all modifications, equivalent schemes or alternative schemes falling within the spirit and scope of the present invention.

[0060] Ordinal numbers including terms such as first and second may be used to describe various components, but the elements are not limited by these terms. These terms are only used to distinguish one component from another.

[0061] When a component is referred to as "connected" or "contacted" to another component, it may be directly connected or joined to the other component, but it should be understood that there may be other components between them. When a component is referred to as "directly connected" or "directly contacted" to another component, it should be understood that there may be no other components between them.

[0062] The singular representation includes the plural representation unless the context clearly implies otherwise.

[0063] In the present application, terms such as "comprising" or "having" are used to specify the presence of features, numbers, steps, operations, components, parts, or combinations thereof described in the specification. However, it should be understood that these terms do not preclude the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

[0064] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0065] Electronic device

[0066] Before describing the embodiments, an electronic device to which the semiconductor package of the embodiments is applied will be briefly described. The electronic device includes a main board (not shown). The main board can be physically and / or electrically connected to various components. For example, the main board can be connected to the semiconductor package of the embodiments. Various semiconductor devices can be mounted on the semiconductor package.

[0067] The semiconductor devices can include active devices and / or passive devices. The active devices can be semiconductor chips in the form of integrated circuits (ICs), where hundreds to millions of devices are integrated into one semiconductor device. The semiconductor devices can be logic chips, memory chips, etc. The logic chips can be central processing units (CPUs), graphics processing units (GPUs), etc. For example, the logic chip can be an application processor (AP) chip including at least one of a central processing unit (CPU), a graphics processing unit (GPU), a digital signal processor, an encryption processor, a microprocessor, and a microcontroller, or an analog-to-digital converter, an ASIC (application-specific IC), etc., or a chipset including a specific combination of those listed so far.

[0068] The memory chips can be stacked memories such as HBM. The memory chips can also include memory chips such as volatile memories (e.g., DRAM), non-volatile memories (e.g., ROM), or flash memories.

[0069] On the other hand, the product group to which the semiconductor package of the embodiments is applied can be any one of CSP (Chip Scale Package), FC-CSP (Flip Chip - Chip Scale Package), FC-BGA (Flip Chip Ball Grid Array), POP (Package On Package), and SIP (System In Package), but is not limited thereto.

[0070] In addition, the electronic device can be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a vehicle, a high-performance server, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automotive, etc. However, the embodiments are not limited thereto, and can be any other electronic device that processes data other than these.

[0071] Hereinafter, a semiconductor package including a circuit board according to an embodiment will be described. The semiconductor package of the embodiment can have various package structures including the circuit board described later.

[0072] In addition, the circuit board in one embodiment can be the first circuit board described below.

[0073] In addition, the circuit board in another embodiment can be the second circuit board described below.

[0074] Figure 1a is a cross-sectional view showing a semiconductor package according to a first embodiment, Figure 1b is a cross-sectional view showing a semiconductor package according to a second embodiment, Figure 1c is a cross-sectional view showing a semiconductor package according to a third embodiment, Figure 1d is a cross-sectional view showing a semiconductor package according to a fourth embodiment, Figure 1e is a cross-sectional view showing a semiconductor package according to a fifth embodiment.

[0075] Refer to Figure 1a , the semiconductor package according to the first embodiment can include a first circuit board 1100, a second circuit board 1200, and a semiconductor device 1300.

[0076] The first circuit board 1100 can represent a package circuit board.

[0077] For example, the first circuit board 1100 can provide a space for coupling to at least one external circuit board. The external circuit board can refer to the second circuit board 1200 coupled to the first circuit board 1100. In addition, the external circuit board can refer to the main board in the electronic device included in the lower part coupled to the first circuit board 1100.

[0078] In addition, although not shown in the figures, the first circuit board 1100 may provide a space for mounting at least one semiconductor device.

[0079] The first circuit board 1100 may include at least one insulating layer and an electrode portion disposed on the at least one insulating layer.

[0080] The second circuit board 1200 may be disposed on the first circuit board 1100.

[0081] The second circuit board 1200 may be an interposer. For example, the second circuit board 1200 may provide a space for mounting at least one semiconductor device. The second circuit board 1200 may be connected to at least one semiconductor device 1300. For example, the second circuit board 1200 may provide a space for mounting the first semiconductor device 1310 and the second semiconductor device 1320. The second circuit board 1200 may electrically connect the first semiconductor device 1310 and the second semiconductor device 1320 as well as the first circuit board 1100, while electrically connecting the first semiconductor device 1310 and the second semiconductor device 1320. That is, the second circuit board 1200 may perform a horizontal connection function between multiple semiconductor devices and a vertical connection function between a semiconductor device and a package circuit board.

[0082] Figure 1a The first semiconductor device 1310 and the second semiconductor device 1320 are shown disposed on the second circuit board 1200, but are not limited thereto. For example, one semiconductor device may be disposed on the second circuit board 1200, or alternatively, three or more semiconductor devices may be disposed.

[0083] The second circuit board 1200 may be disposed between at least one semiconductor device 1300 and the first circuit board 1100.

[0084] In one embodiment, the second circuit board 1200 may be an active interposer used as a semiconductor device. When the second circuit board 1200 is used as a semiconductor device, the semiconductor package of the embodiment may have a structure vertically stacked on the first circuit board 1100 and may have the functions of multiple logic chips. Having the functions of a logic chip may mean that it may have the functions of active devices and passive devices. In the case of active devices, different from passive devices, the characteristics of current and voltage may not be linear, and in the case of an active interposer, it may have the functions of an active device. In addition, the active interposer may perform the functions of a corresponding logic chip while performing a signal transmission function between the second logic chip disposed thereon and the first circuit board 1100.

[0085] According to another embodiment, the second circuit board 1200 may be a passive interposer. For example, the second circuit board 1200 may be used as a signal relay between the semiconductor device 1300 and the first circuit board 1100, and may have passive device functions such as resistors, capacitors, or inductors. For example, due to 5G, the Internet of Things (IOT), the improvement of image quality, and the improvement of communication speed, the number of terminals of the semiconductor device 1300 has gradually increased. That is, the number of terminals provided in the semiconductor device 1300 increases, thereby reducing the width of the terminals or the interval between multiple terminals. In this case, the first circuit board 1100 may be connected to the main board of the electronic device. The problem is that in order for the electrodes provided on the first circuit board 1100 to have a certain width and interval to be respectively connected to the semiconductor device 1300 and the main board, the thickness of the first circuit board 1100 increases or the layer structure of the first circuit board 1100 becomes complicated. Therefore, in the first embodiment, the second circuit board 1200 may be provided between the first circuit board 1100 and the semiconductor device 1300. In addition, the second circuit board 1200 may include electrodes having a fine width and interval corresponding to the terminals of the semiconductor device 1300.

[0086] The semiconductor device 1300 may be an application processor (AP) chip including at least one of a central processing unit (CPU), a graphics processing unit (GPU), a digital signal processor, an encryption processor, a microprocessor, and a microcontroller, or an analog-to-digital converter, an application-specific IC (ASIC), etc., or a chipset including a specific combination of those listed so far. The memory chip may be a stacked memory such as HBM. The memory chip may also include memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), flash memory, etc.

[0087] Meanwhile, the semiconductor package of the first embodiment may include a connection part.

[0088] For example, the semiconductor package may include a first connection part 1410 provided between the first circuit board 1100 and the second circuit board 1200. The first connection part 1410 may electrically connect the second circuit board 1200 to the first circuit board 1100 while coupling the first circuit board 1100 and the second circuit board 1200.

[0089] For example, the semiconductor package may include a second connection part 1420 provided between the second circuit board 1200 and the semiconductor device 1300. The second connection part 1420 may electrically connect the semiconductor device 1300 to the second circuit board 1200 while coupling the second circuit board 1200 and the semiconductor device 1300.

[0090] The semiconductor package may include a third connection portion 1430 disposed on the lower surface of the first circuit board 1100. The third connection portion 1430 may electrically connect the first circuit board 1100 to the main board while coupling the first circuit board 1100 and the main board.

[0091] At this time, the first connection portion 1410, the second connection portion 1420, and the third connection portion 1430 may be electrically connected between the plurality of components by using at least one bonding method among wire bonding, solder bonding, and metal-to-metal direct bonding. That is, since the first connection portion 1410, the second connection portion 1420, and the third connection portion 1430 have the function of electrically connecting a plurality of components, when metal-to-metal direct bonding is used, the connection portion of the semiconductor package may be understood as an electrical connection portion rather than solder or a lead.

[0092] The wire bonding method may refer to electrically connecting a plurality of components using a conductive wire such as gold (Au). In addition, the solder bonding method may use a material containing at least one of Sn, Ag, and Cu to electrically connect a plurality of components. Additionally, the metal-to-metal direct bonding method may refer to the recrystallization of applying heat and pressure between a plurality of components in the absence of solder, a lead, a conductive adhesive, etc., and may also refer to directly bonding between a plurality of components. Additionally, the metal-to-metal direct bonding method may refer to the bonding method through the second connection portion 1420. In this case, the second connection portion 1420 may represent a metal layer formed between a plurality of components by recrystallization.

[0093] Specifically, the first connection portion 1410, the second connection portion 1420, and the third connection portion 1430 may couple the plurality of components to each other by a thermal compression bonding method. Thermal compression bonding may refer to a method of directly coupling a plurality of components by applying heat and pressure to the first connection portion 1410, the second connection portion 1420, and the third connection portion 1430.

[0094] At this time, at least one of the first circuit board 1100 and the second circuit board 1200 may be provided with protrusions protruding outward from the insulating layer away from the corresponding circuit board, and the first connection portion 1410, the second connection portion 1420, and the third connection portion 1430 are disposed on the protrusions. The protrusions may protrude outward from the first circuit board 1100 or the second circuit board 1200.

[0095] The protrusion may be referred to as a bump. The protrusion may also be referred to as a post. The protrusion may further be referred to as a pillar. Preferably, the protrusion may refer to an electrode of the second circuit board 1200 on which a second connection portion 1420 for coupling with the semiconductor device 1300 is provided. That is, as the pitch of the terminals of the semiconductor device 1300 becomes finer, a short circuit may occur between the plurality of second connection portions 1420 respectively connected to the plurality of terminals of the semiconductor device 1300 through a conductive adhesive such as solder. Therefore, in an embodiment, thermal compression bonding may be performed to reduce the volume of the second connection portion 1420. Additionally, in order to ensure diffusion prevention and alignment that can prevent the intermetallic compound IMC (Inter Metallic Compound) formed between the conductive adhesive such as solder and the protrusion from diffusing into the interposer and / or the circuit board, the protrusion may be included in the electrode of the second circuit board 1200 on which the second connection portion 1420 is provided.

[0096] Additionally, the semiconductor package may include a connection member 1210.

[0097] The connection member may be referred to as a bridge circuit board. For example, the connection member 1210 may include a redistribution layer. The connection member 1210 may perform a function of horizontally electrically connecting a plurality of semiconductor devices to each other. For example, since the area that a semiconductor device generally should have is too large, the connection member 1210 may include a redistribution layer. Since there are significant differences between the semiconductor package and the semiconductor device in terms of the width or pitch of the circuit pattern, etc., a buffering effect of the circuit pattern is required for electrical connection. The buffering effect may mean having a size between the width or pitch of the circuit pattern of the semiconductor package and the width or pitch of the circuit pattern of the semiconductor device, and the redistribution layer may include a function of performing the buffering effect.

[0098] In one embodiment, the connection member 1210 may be an inorganic bridge. For example, the inorganic bridge may include a silicon bridge. That is, the connection member 1210 may include a silicon substrate and a redistribution layer provided on the silicon substrate.

[0099] In another embodiment, the connection member 1210 may be an organic material bridge. For example, the connection member 1210 may include an organic material. For example, the connection member 1210 may include an organic circuit board containing an organic material instead of a silicon circuit board. The connection member 1210 may be embedded in the second circuit board 1200.

[0100] For this purpose, the second circuit board 1200 may include a cavity, and the connection member 1210 may be disposed in the cavity of the second circuit board 1200. The connection member 1210 may horizontally connect a plurality of semiconductor devices disposed on the second circuit board 1200.

[0101] Reference Figure 1b , the semiconductor package according to the second embodiment may include a second circuit board 1200 and semiconductor devices 1300. In this case, compared with the semiconductor package of the first embodiment, the semiconductor package of the second embodiment may have a structure in which the first circuit board 1100 is removed.

[0102] That is, the second circuit board 1200 of the second embodiment may serve as a package circuit board while performing an interposer function.

[0103] The first connection portion 1410 disposed on the lower surface of the second circuit board 1200 may couple the second circuit board 1200 to the main board of the electronic device.

[0104] Reference Figure 1c , the semiconductor package according to the third embodiment may include a first circuit board 1100 and semiconductor devices 1300.

[0105] In this case, compared with the semiconductor package of the first embodiment, the semiconductor package of the third embodiment may have a structure in which the second circuit board 1200 is omitted.

[0106] That is, the first circuit board 1100 of the third embodiment may serve as a package circuit board while also performing the function of connecting the semiconductor devices 1300 and the main board. For this purpose, the first circuit board 1100 may include a connection member 1110 for connecting a plurality of semiconductor devices. The connection member 1110 may be an inorganic bridge or an organic material bridge connecting a plurality of semiconductor devices.

[0107] Reference Figure 1d , compared with the semiconductor package of the third embodiment, the semiconductor package of the fourth embodiment may further include a third semiconductor device 1330.

[0108] For this purpose, a fourth connection portion 1440 may be disposed on the lower surface of the first circuit board 1100.

[0109] In addition, the third semiconductor device 1330 may be disposed on the fourth connection portion 1440. That is, the semiconductor package of the fourth embodiment may have a structure in which semiconductor devices are respectively mounted on the upper side and the lower side.

[0110] In this case, the third semiconductor device 1330 may have a structure disposed on Figure 1b the lower surface of the second circuit board 1200 in the semiconductor package.

[0111] Reference Figure 1e , according to the fifth embodiment, the semiconductor package may include a first circuit board 1100. The first semiconductor device 1310 and the second semiconductor device 1320 may be disposed on the first circuit board 1100. To this end, the first connection portion 1410 may be disposed between the first circuit board 1100 and the first semiconductor device 1310 and the second semiconductor device 1320.

[0112] In addition, the connection member 1110 may be embedded in the first circuit board 1110. The connection member 1110 may horizontally connect the first semiconductor device 1310 and the second semiconductor device 1320.

[0113] In addition, the first circuit board 1100 may include a conductive coupling portion 1450. The conductive coupling portion 1450 may also protrude from the first circuit board 1100 toward the second semiconductor device 1320. The conductive coupling portion 1450 may be referred to as a bump, or alternatively, may also be referred to as a pillar. The conductive coupling portion 1450 may be provided with a structure that protrudes on the electrode disposed on the uppermost side of the first circuit board 1100.

[0114] The third semiconductor device 1330 may be disposed on the conductive coupling portion 1450. In this case, the third semiconductor device 1330 may be connected to the first circuit board 1100 through the conductive coupling portion 1450. In addition, the second connection portion 1420 may be disposed between the first semiconductor device 1310 and the second semiconductor device 1320 and the third semiconductor device 1330.

[0115] Therefore, the third semiconductor device 1330 may be electrically connected to the first semiconductor device 1310 and the second semiconductor device 1320 through the second connection portion 1420.

[0116] That is, the third semiconductor device 1330 may be connected to the first circuit board 1100 through the conductive coupling portion 1450, and may also be connected to the first semiconductor device 1310 and the second semiconductor device 1320 through the second connection portion 1420.

[0117] In this case, the third semiconductor device 1330 may receive a power signal and / or electric power through the conductive coupling portion 1450. In addition, the third semiconductor device 1330 may exchange communication signals with the first semiconductor device 1310 and the second semiconductor device 1320 through the second connection portion 1420.

[0118] The semiconductor package according to the fifth embodiment may supply a power signal and / or electric power to the third semiconductor device 1330 through the conductive coupling portion 1450, thereby providing sufficient power to drive the third semiconductor device 1330 or allowing smooth control of the power operation.

[0119] Therefore, the embodiments can improve the driving characteristics of the third semiconductor device 1330. That is, the embodiments can solve the problem of insufficient power supplied to the third semiconductor device 1330. In addition, in the embodiments, at least one of the power signal, the electric power, and the communication signal of the third semiconductor device 1330 can be provided by different paths passing through the conductive coupling part 1450 and the second connection part 1420. Thus, the embodiments can solve the problem that the communication signal is lost due to the power signal. For example, the embodiments can minimize the mutual interference between the communication signal and the power signal.

[0120] Meanwhile, the third semiconductor device 1330 in the fifth embodiment can have a POP (Package On Package) structure in which a plurality of package circuit boards are stacked, and can be disposed on the first circuit board 1100. For example, the third semiconductor device 1330 can be a memory package including a memory chip. Additionally, the memory package can be coupled to the conductive coupling part 1450. In this case, the memory package can be not connected to the first semiconductor device 1310 and the second semiconductor device 1320.

[0121] Figure 2 is a cross-sectional view of a circuit board according to the first embodiment, Figure 3 is a plan view of the Figure 2 circuit board viewed from above, Figure 4 is Figure 2 an enlarged cross-sectional view of the first region R1 of the Figure 5 is a view showing Figure 2 the detailed layer structure of the first via electrode and the second via electrode of the Figure 6 is an enlarged cross-sectional view of the first region of the Figure 2 according to the second embodiment, Figure 7 is an enlarged cross-sectional view of the first region of the Figure 2 according to the third embodiment, Figure 8 is an enlarged cross-sectional view of the first region of the Figure 2 according to the fourth embodiment, Figure 9 is an enlarged cross-sectional view of the first region of the Figure 2 according to the fifth embodiment, Figure 10 is a cross-sectional view of a circuit board according to the sixth embodiment.

[0122] Hereinafter, the circuit board disposed in the semiconductor package and the connection member embedded in the circuit board according to the embodiments will be described with reference to Figures 2 to 10 the following.

[0123] With reference to Figure 2 , the semiconductor package of the embodiments can include a circuit board 100 and a connection member 200 embedded in the circuit board 100. As shown in the referenceFigures 1a to 1e As described above, the connection member 200 may horizontally connect a plurality of semiconductor devices, and for this purpose, may include a high-density electrode pattern. In addition, the connection member 200 may include at least one of an inorganic bridge and an organic bridge.

[0124] The circuit board 100 may provide a space for embedding the connection member 200. In addition, the circuit board 100 may provide a space for mounting a plurality of semiconductor devices.

[0125] For example, a first semiconductor device and a second semiconductor device may be mounted on the circuit board 100 while being spaced apart from each other in the horizontal direction. At least one first terminal provided in the first semiconductor device and at least one second terminal provided in the second semiconductor device may be electrically connected to each other through the connection member 200. For example, the first semiconductor device and the second semiconductor device may need to exchange signals with each other, and the terminals for mutual signal exchange may be electrically connected to the connection member 200.

[0126] For this purpose, the circuit board 100 may include an insulating layer 110 and an electrode portion.

[0127] The insulating layer 110 may include multiple layers. The insulating layer 110 may include a first insulating layer 111, a second insulating layer 112, and a third insulating layer 113. The first insulating layer 111 may constitute the inner layer of the insulating substrate. The second insulating layer 112 may be provided on the first insulating layer 111. For example, the second insulating layer 112 may represent the insulating layer provided on the uppermost side of the insulating substrate. The third insulating layer 113 may be provided below the first insulating layer 111. For example, the third insulating layer 113 may represent the insulating layer provided on the lowermost side of the insulating substrate.

[0128] The first insulating layer 111 of the circuit board may have a layer structure of at least one layer. Preferably, the first insulating layer 111 of the circuit board may have a plurality of stacked structures. The stacked structures may be distinguished by the electrode portion. For example, the electrode portion may include a first electrode EP1 and a second electrode EP2. The first electrode EP1 may represent a pad and / or a trace. The second electrode EP2 may represent a via electrode. The first electrode EP1 and the second electrode EP2 may have different widths and / or different vertical cross-sectional shapes. Therefore, the stacked structures may be distinguished based on the differences in the widths and / or vertical cross-sectional shapes of the first electrode EP1 and the second electrode EP2. Through the above-described stacked structures, the circuit board of the embodiment may electrically connect at least one semiconductor device and / or a second circuit board and effectively connect them to the main board.

[0129] At this time, Figure 2The first insulating layer 111 of the circuit board is shown as having a four-layer structure, but is not limited thereto. For example, the first insulating layer 111 of the circuit board may have three or fewer layers, or may have five or more layers.

[0130] In addition, when the first insulating layer 111 includes multiple layers, each layer of the multiple layers may include the same insulating material. In this case, it may not be possible to distinguish the interfaces between the multiple layers of the first insulating layer 111. Therefore, the stacked structure can be distinguished based on the first electrode EP1 and the second electrode EP2.

[0131] In addition, when the first insulating layer 111 includes multiple layers, at least one layer of the multiple layers may include a different insulating material from at least one other layer. In this case, the interfaces between the multiple layers including different insulating materials can be distinguished.

[0132] Meanwhile, at least one layer of the multiple layers of the first insulating layer 111 may include a reinforcing member. In one embodiment, the reinforcing member may represent glass fiber. In another embodiment, the reinforcing member may represent GCP (Glass Core Primer). Additionally, in another embodiment, the multiple layers of the first insulating layer 111 may not include a reinforcing member such as glass fiber and / or GCP.

[0133] Meanwhile, the connecting member 200 may be embedded in the first insulating layer 111. For example, the first insulating layer 111 may include a receiving portion 110B in the form of a through hole to receive the connecting member 200. The connecting member 200 may be embedded in the receiving portion 110B of the first insulating layer 111. Here, embedding may mean that the connecting member 200 is completely covered by the first insulating layer 111.

[0134] The insulating layer 110 of the circuit board may include a second insulating layer 112 and a third insulating layer 113. The second insulating layer 112 and the third insulating layer 113 of the circuit board may be barrier layers. For example, the second insulating layer 112 of the circuit board may be a first barrier layer provided on the uppermost side of the circuit board. Additionally, the third insulating layer 113 of the circuit board may be a second barrier layer provided on the lowermost side of the circuit board.

[0135] At this time, the second insulating layer 112 of the circuit board may include the same insulating material as the first insulating layer 111 of the circuit board. For example, when the first insulating layer 111 of the circuit board is composed of multiple layers, the first insulating layer closest to the second insulating layer 112 among the multiple layers of the first insulating layer may include the same insulating material as the second insulating layer 112. In this case, it may not be possible to distinguish the interface between the first insulating layer 111 and the second insulating layer 112 of the circuit board. Accordingly, the third insulating layer 113 of the circuit board may include the same insulating material as the first insulating layer 111 of the circuit board.

[0136] The second insulating layer 112 and the third insulating layer 113 of the circuit board can have the function of protecting the upper surface and the lower surface of the first insulating layer 111 of the circuit board respectively. Therefore, the second insulating layer 112 and the third insulating layer 113 of the circuit board can be referred to as protective layers. The second insulating layer 112 and the third insulating layer 113 of the circuit board can be solder resist layers containing organic polymer materials. For example, the second insulating layer 112 and the third insulating layer 113 of the circuit board can include epoxy acrylate resins. Specifically, the second insulating layer 112 and the third insulating layer 113 of the circuit board can contain resins, curing agents, photoinitiators, pigments, solvents, fillers, additives, acrylic monomers, etc. However, the embodiments are not limited thereto, and the second insulating layer 112 and the third insulating layer 113 of the circuit board can be any one of a photosensitive solder resist layer, a cover-lay, and a polymer material.

[0137] The circuit board 100 can include an electrode portion.

[0138] The electrode portion can penetrate at least a part of the insulating layer 110.

[0139] The electrode portion can include a plurality of electrode portions according to position and function.

[0140] The electrode portion can include a first electrode portion 120. The first electrode portion 120 can penetrate from the upper surface of the insulating layer 110 to a partial area of the insulating layer. The first electrode portion 120 can vertically overlap with the connection member 200. The first electrode portion 120 can represent an electrode electrically connected to the connection member 200.

[0141] The first electrode portion 120 can protrude on the insulating layer 110 while penetrating at least a part of the insulating layer 110.

[0142] For example, the first electrode portion 120 can include a first through portion 121 that penetrates from the upper surface of the second insulating layer 112 to a partial area of the insulating layer. The first through portion 121 can be a through electrode that penetrates at least a part of the second insulating layer 112. The first through portion 121 can vertically overlap with the connection member 200. Preferably, the connection member 200 can include a first connection electrode 210. The first connection electrode 210 can be a pad provided on the outermost layer of the connection member 200.

[0143] The first electrode portion 120 can include a first protrusion portion 122 provided on the first through portion 121 and protruding on the second insulating layer 112.

[0144] At this time, the first through-hole portion 121 and the first protrusion portion 122 of the first electrode portion 120 may be integrally formed with each other as one electrode, and may be divided into a portion penetrating the second insulating layer 112 and a portion protruding on the second insulating layer 112.

[0145] Meanwhile, the electrode portion of the circuit board 100 may include a second electrode portion 130. The second electrode portion 130 may penetrate from the upper surface of the insulating layer 110 to a partial area of the insulating layer. The second electrode portion 130 may horizontally overlap with the first electrode portion 120. For example, the second electrode portion 130 may be an electrode provided on the same layer as the first electrode portion 120.

[0146] The second electrode portion 130 may not vertically overlap with the connection member 200. That is, the second electrode portion 130 may not be directly connected to the connection member 200. The second electrode portion 130 may represent an electrode that horizontally overlaps with the first electrode portion 120 and does not vertically overlap with the connection member 200.

[0147] The second electrode portion 130 may protrude on the insulating layer 110 while penetrating from the upper surface of the insulating layer 110 to a partial area of the insulating layer.

[0148] For example, the second electrode portion 130 may include a second through-hole portion 131 that penetrates from the upper surface of the second insulating layer 112 to a partial area of the insulating layer. The second through-hole portion 131 may be a through-hole electrode that penetrates at least a part of the second insulating layer 112. The second through-hole portion 131 may vertically overlap with the connection member 200. The second through-hole portion 131 may not vertically overlap with the first connection electrode 210 of the connection member 200.

[0149] The second electrode portion 130 may include a second protrusion portion 132 provided on the second through-hole portion 131 and protruding on the second insulating layer 112.

[0150] At this time, the second through-hole portion 131 and the second protrusion portion 132 of the second electrode portion 130 may be integrally formed with each other as one electrode, and may be divided into a portion penetrating the second insulating layer 112 and a portion protruding on the second insulating layer 112.

[0151] The first electrode portion 120 and the second electrode portion 130 may be column bumps connected to semiconductor devices.

[0152] That is, as the terminal width and terminal pitch of semiconductor devices coupled to a circuit board are miniaturized, when a semiconductor device is mounted using a conductive adhesive such as solder, the conductive adhesive may spread, which may cause a problem that multiple conductive adhesives are connected to each other. Therefore, embodiments may perform Thermal Compression Bonding to reduce the volume of the conductive adhesive. At this time, if the circuit board 100 does not include the first electrode portion 120 and the second electrode portion 130 having a structure protruding above the insulating layer 110, it may be difficult to reduce the volume of the conductive adhesive. This may be because the height of the electrode on which the conductive adhesive is disposed is positioned lower than the height of the insulating layer 110, so the volume of the conductive adhesive increases by the difference between the electrode height and the insulating layer height.

[0153] Therefore, the circuit board 100 of the embodiment may have the first electrode portion 120 and the second electrode portion 130, the first electrode portion 120 and the second electrode portion 130 having a protruding structure to ensure alignment with the terminals of the semiconductor device and having a diffusion prevention ability to prevent the intermetallic compound IMC (InterMetallic Compound) formed between the conductive adhesive and the electrode portion from diffusing into the circuit board.

[0154] Reference Figure 3 , each of the first electrode portion 120 and the second electrode portion 130 may be divided into multiple groups.

[0155] The first electrode portion 120 may include a first group of first electrode portions 120A and a second group of first electrode portions 120B. The first group of first electrode portions 120A may represent the electrode portion overlapping the first semiconductor device in the vertical direction. For example, the first group of first electrode portions 120A may represent the electrode portion connected to the first semiconductor device. The second group of first electrode portions 120B may represent the electrode portion overlapping the second semiconductor device in the vertical direction. For example, the second group of first electrode portions 120B may represent the electrode portion connected to the second semiconductor device.

[0156] The second electrode portion 130 may include a first group of second electrode portions 130A and a second group of second electrode portions 130B. The first group of second electrode portions 130A may be disposed adjacent to the first group of first electrode portions 120A. For example, the first group of second electrode portions 130A may be disposed on one side of the first group of first electrode portions 120A. The first group of second electrode portions 130A may overlap with the first semiconductor device in the vertical direction. The first group of second electrode portions 130A may be connected to the first semiconductor device. The second group of second electrode portions 130B may be disposed adjacent to the second group of first electrode portions 120B. For example, the second group of second electrode portions 130B may be disposed on the other side of the second group of first electrode portions 120B. The second group of second electrode portions 130B may overlap with the second semiconductor device in the vertical direction. The second group of second electrode portions 130B may be connected to the second semiconductor device.

[0157] Meanwhile, the height of the upper surface of the first electrode portion 120 may be the same as the height of the upper surface of the second electrode portion 130. For example, the upper surface of the first through-hole portion 121 of the first electrode portion 120 may be located on the same plane as the upper surface of the second through-hole portion 131 of the second electrode portion 130. In addition, the upper surface of the first protrusion portion 122 of the first electrode portion 120 may be located on the same plane as the upper surface of the second protrusion portion 132 of the second electrode portion 130.

[0158] Therefore, the size of the first through-hole portion 121 of the first electrode portion 120 may be the same as the size of the second through-hole portion 131 of the second electrode portion 130. Here, the same size may mean that the deviation between the size of the first through-hole portion 121 of the first electrode portion 120 and the size of the second through-hole portion 131 of the second electrode portion 130 is 20% or less, 15% or less, 10% or less, or 5% or less.

[0159] For example, the size of the first through-hole portion 121 of the first electrode portion 120 may be in the range of 80% to 100% of the size of the second through-hole portion 131 of the second electrode portion 130. If the deviation between the size of the first through-hole portion 121 of the first electrode portion 120 and the size of the second through-hole portion 131 of the second electrode portion 130 exceeds 20%, or if the size of one of the first through-hole portion 121 of the first electrode portion 120 and the second through-hole portion 131 of the second electrode portion 130 is less than 80% or greater than 100% of the size of the other of the first through-hole portion 121 of the first electrode portion 120 and the second through-hole portion 131 of the second electrode portion 130, the semiconductor device may not be stably mounted on the first electrode portion 120 and the second electrode portion 130.

[0160] Specifically, when the sizes of the first through-hole portion 121 and the second through-hole portion 131 are outside the above ranges, plating deviation may occur during the plating of the first through-hole portion 121 and the second through-hole portion 131. Each of the first through-hole portion 121 and the second through-hole portion 131 can be formed by filling the inside of each of the first through-hole and the second through-hole that penetrates at least a part of the second insulating layer 112 with a conductive material. Additionally, when the size difference between the first through-hole and the second through-hole is outside the above ranges, a difference may occur between the plating amount in the first through-hole and the plating amount in the second through-hole. Therefore, a deviation may occur between the height of the upper surface of the first protrusion portion 122 provided on the first through-hole portion 121 and the height of the upper surface of the second protrusion portion 132 provided on the second through-hole portion 131. For example, the height of the protrusion portion of the electrode portion with a relatively large size may be lower than the height of the protrusion portion of the electrode portion with a relatively small size.

[0161] If the upper surfaces of the first electrode portion 120 and the second electrode portion 130 are uneven and have a height difference, a problem may occur in that the semiconductor device is coupled to the first electrode portion 120 and the second electrode portion 130 in an inclined state. Additionally, if there is a height difference as described above, the relatively higher positioned protrusion portion may be electrically connected to the semiconductor device, but the relatively lower positioned protrusion portion may not be electrically connected to the semiconductor device. Conversely, the relatively lower positioned protrusion portion may be electrically connected to the semiconductor device, but the relatively higher positioned protrusion portion may not be electrically connected to the semiconductor device. As a result, the semiconductor device may not operate smoothly, and further, the electronic product or the server may not operate smoothly.

[0162] Additionally, the circuit board can perform impedance matching by adjusting the width or thickness of the electrode portion. At this time, if a thickness difference occurs between the first electrode portion 120 and the second electrode portion 130 due to the plating deviation according to the size difference between the first through-hole portion 121 and the second through-hole portion 131, impedance matching may not be normally performed, and an electrical reliability problem of the semiconductor package may occur due to impedance mismatch.

[0163] Therefore, the embodiment allows the difference between the size of the first through-hole portion 121 of the first electrode portion 120 and the size of the second through-hole portion 131 of the second electrode portion 130 to satisfy the above ranges, so as to minimize the height difference between the first protrusion portion 122 of the first electrode portion 120 and the second protrusion portion 132 of the second electrode portion 130, and further allows the first protrusion portion 122 and the second protrusion portion 132 to have substantially the same height.

[0164] Meanwhile, the size of the first through-hole portion 121 can represent the density and / or volume of the first through-hole portion 121. Additionally, the size of the second through-hole portion 131 can represent the density and / or volume of the second through-hole portion 131. For example, when the thickness of the first through-hole portion 121 in the vertical direction is the same as the thickness of the second through-hole portion 131 in the vertical direction, the width of the first through-hole portion 121 can be in the range of 80% to 100% of the width of the second through-hole portion 131. For example, when the thickness of the first through-hole portion 121 in the vertical direction is less than the thickness of the second through-hole portion 131 in the vertical direction, the width of the first through-hole portion 121 can be larger than the width of the second through-hole portion 131 by the thickness difference. For example, when the thickness of the first through-hole portion 121 in the vertical direction is greater than the thickness of the second through-hole portion 131 in the vertical direction, the width of the first through-hole portion 121 can be smaller than the width of the second through-hole portion 131 by the thickness difference.

[0165] In one embodiment, the thickness of the first through-hole portion 121 in the vertical direction can be the same as the thickness of the second through-hole portion 131 in the vertical direction. The width W2 of the second through-hole portion 131 in the horizontal direction can be in the range of 80% to 100% of the width W1 of the first through-hole portion 121 in the horizontal direction. Thus, the embodiment can eliminate the plating deviation between the first through-hole portion 121 and the second through-hole portion 131. Thus, the first protrusion portion 122 of the first electrode portion 120 and the second protrusion portion 132 of the second electrode portion 130 can have a consistent height.

[0166] Meanwhile, the width W1 of the first through-hole portion 121 can be determined by the width of the first connection electrode 210 provided in the connection member 200. Therefore, it may be difficult to change the width W1 of the first through-hole portion 121. Therefore, the width W1 of the first through-hole portion 121 can be determined based on the width of the first connection electrode 210 of the connection member 200, and the width W2 of the second through-hole portion 131 can be adjusted to correspond to the width W1 of the first through-hole portion 121.

[0167] For example, the width W1 of the first through-hole portion 121 may be in the range of 10 μm to 40 μm. Preferably, the width W1 of the first through-hole portion 121 may be in the range of 12 μm to 35 μm. More preferably, the width W1 of the first through-hole portion 121 may be in the range of 15 μm to 30 μm. If the width W1 of the first through-hole portion 121 is less than 10 μm, the allowable current of the signal transmitted through the first through-hole portion 121 may decrease. Additionally, if the width W1 of the first through-hole portion 121 is less than 10 μm, the resistance of the first through-hole portion 121 may increase. Additionally, if the width W1 of the first through-hole portion 121 is greater than 40 μm, it may be difficult to arrange all the plurality of first through-hole portions 121 that vertically overlap the connection member 200.

[0168] Meanwhile, the range of the width W1 of the first through-hole portion 121 is determined based on the width of the first connection electrode 210 of the connection member 200, and the width W2 of the second through-hole portion 131 may be determined to be the same or have a deviation of 20% or less.

[0169] At this time, the width of the first through-hole portion 121 and the width of the second through-hole portion 131 may correspond to the widths of the first through-hole and the second through-hole that penetrate the corresponding second insulating layer 112. At this time, the first through-hole and the second through-hole may be formed by an exposure and development process. In another embodiment, the first through-hole and the second through-hole may be formed by laser processing.

[0170] Specifically, when the first through-hole and the second through-hole are formed by an exposure and development process, the widths of the first through-hole and the second through-hole may be determined by the exposure resolution in the exposure process. However, the minimum width of the first through-hole and the second through-hole that can be formed within the general exposure process capabilities is about 50 μm. At this time, the widths of the first through-hole and the second through-hole of the embodiment are 40 μm or less. Therefore, the embodiment may form the first through-hole and the second through-hole by laser processing to form the first through-hole portion 121 and the second through-hole portion 131.

[0171] Therefore, the first through-hole and the second through-hole may have a shape in which the width varies in the thickness direction. Accordingly, the first through-hole portion 121 of the first electrode portion 120 and the second through-hole portion 131 of the second electrode portion 130 may have a shape in which the width varies in the thickness direction.

[0172] Specifically, the first through-hole portion 121 and the second through-hole portion 131 may have a slope in which the width gradually decreases from the upper surface to the lower surface. At this time, the width W1 of the first through-hole portion 121 and the width W2 of the second through-hole portion 131 may represent the width of the region having the maximum width in the entire region in the thickness direction.

[0173] Therefore, the width of the lower surface of each of the first through-hole portion 121 and the second through-hole portion 131 may be smaller than the width of the upper surface of each of the first through-hole portion 121 and the second through-hole portion 131.

[0174] Meanwhile, referring to Figure 4 , the electrode portion may further include a third electrode portion 140 disposed between the connection member 200 and the first electrode portion 120. The third electrode portion 140 may electrically connect the first connection electrode 210 of the connection member 200 and the first electrode portion 120.

[0175] In addition, the electrode portion may include a fourth electrode portion 150 that overlaps the third electrode portion 140 in the horizontal direction and does not overlap the connection member 200 in the vertical direction. The fourth electrode portion 150 may be located below the second electrode portion 130 to connect the fourth electrode portion 150 and the internal electrode of the circuit board 100.

[0176] At this time, since the first through-hole portion 121 and the second through-hole portion 131 have a width difference in the thickness direction as described above, the bonding force between the first through-hole portion 121 and the third electrode portion 140 and / or the bonding force between the second through-hole portion 131 and the fourth electrode portion 150 may be reduced. That is, as the contact area between the first through-hole portion 121 and the third electrode portion 140 decreases, cracks may occur in the lower region of the first through-hole portion 121 that contacts the third electrode portion 140 due to various factors (e.g., thermal stress). In addition, as the contact area between the second through-hole portion 131 and the fourth electrode portion 150 decreases, cracks may occur in the lower region of the second through-hole portion 131 that contacts the fourth electrode portion 150 due to various factors (e.g., thermal stress).

[0177] Therefore, as Figure 5 shown, each of the first through-hole portion 121 of the first electrode portion 120 and the second through-hole portion 131 of the second electrode portion 130 may include a plurality of metal layers.

[0178] For example, referring to Figure 5 in (a) of, the first through-hole portion 121 may include a first metal layer 121-1 disposed on the third electrode portion 140. In addition, the first through-hole portion 121 may include a second metal layer 121-2 disposed on the first metal layer 121-1. In this case, the first metal layer 121-1 and the second metal layer 121-2 may include different metal materials.

[0179] Preferably, the first metal layer 121-1 may include nickel. Additionally, the second metal layer 121-2 may include copper. The first metal layer 121-1 can improve the bonding strength between the second metal layer 121-2 and the third electrode portion 140. For example, when the second metal layer 121-2 is directly disposed on the third electrode portion 140, oxidation of the third electrode portion 140 may occur. As a result, the bonding strength between the third electrode portion 140 and the second metal layer 121-2 may be reduced. Therefore, the first metal layer 121-1 can be used to prevent oxidation of the third electrode portion 140 while improving the bonding strength between the second metal layer 121-2 and the third electrode portion 140. Additionally, the first metal layer 121-1 can solve the problem of peeling of the first through-hole portion 121 from the third electrode portion 140 due to shrinkage and expansion of the second insulating layer 112 caused by thermal stress.

[0180] Specifically, when the first metal layer 121-1 includes nickel, the adhesion between the third electrode portion 140 and the first through-hole portion 121 of the first electrode portion 120 can be improved. Additionally, when an electrical connection to the first electrode portion 120 is subsequently formed through a material such as solder, the solder may diffuse to form an inter-metallic compound, and the inter-metallic compound has problems of poor mechanical reliability and electrical reliability. In particular, if the second metal layer 121-2 is made of copper, the problem of forming an inter-metallic compound may be further exacerbated. However, if nickel is provided, diffusion of the solder can be prevented, thereby preventing the formation of an inter-metallic compound, and thus improving the electrical reliability and mechanical reliability of the semiconductor package.

[0181] At this time, the third electrode portion 140 may include a crack 140C. For example, the upper surface of the third electrode portion 140 may include a crack 140C that vertically overlaps the first through-hole portion 121 and is recessed toward the lower surface of the third electrode portion 140. The crack 140C may be filled with the first metal layer 121-1 of the first through-hole portion 121. Thereby, the contact area between the third electrode portion 140 and the first through-hole portion 121 can be increased, and thus the bonding strength can be further improved.

[0182] Additionally, referring to Figure 5In (b) thereof, the second through-hole portion 131 of the second electrode portion 130 may also include a first metal layer 133-1 and a second metal layer 133-2. The first metal layer 133-1 of the second through-hole portion 131 may be disposed on the fourth electrode portion 150. In addition, the second metal layer 133-2 of the second electrode portion 130 may be disposed on the first metal layer 133-1. A crack 150C may be provided on the upper surface of the fourth electrode portion 150, and the first metal layer 133-1 of the second through-hole portion 131 may be disposed to fill the crack 150C of the fourth electrode portion 150.

[0183] Meanwhile, the third electrode portion 140 connected to the first electrode portion 120 may include a first extension portion 141 and a first pad portion 142. The first extension portion 141 of the third electrode portion 140 may be connected to the first connection electrode 210 of the connection member 200. The first pad portion 142 of the third electrode portion 140 may be disposed between the first extension portion 141 and the first through-hole portion 121 of the first electrode portion 120 and may connect them.

[0184] Meanwhile, the fourth electrode portion 150 connected to the second electrode portion 130 may include a second extension portion 151 and a second pad portion 152. The second extension portion 151 of the fourth electrode portion 150 may be connected to the second connection electrode 160 provided on the circuit board. The second connection electrode 160 may be horizontally overlapped with the first connection electrode 210 and / or the connection member 200. The second pad portion 152 of the fourth electrode portion 150 may be disposed between the second extension portion 151 and the second electrode portion 130 and the second through-hole portion 131 and may connect them.

[0185] The first connection electrode 210 of the connection member 200 may include a plurality of electrode portions. For example, the first connection electrode 210 may include a first electrode portion 211 provided on the connection member 200. The first electrode portion 211 may refer to the uppermost electrode portion among the plurality of electrode portions provided on the connection member 200.

[0186] In addition, the first connection electrode 210 of the connection member 200 may include a second electrode portion 212 located on the first electrode portion 211. The second electrode portion 212 may protrude on the first electrode portion 211 to have a certain height. The second electrode portion 212 may be referred to as a pillar. The second electrode portion 212 may be provided on the connection member 200 to improve the alignment between the first electrode portion 211 and the third electrode portion 140. For example, the second electrode portion 212 may be provided on the first electrode portion 211 at a certain height, thereby allowing the first electrode portion 211 and the plurality of first through-hole portions 121 to be aligned in the vertical direction.

[0187] At this time, the first connection electrode 210 and the second connection electrode 160 of the connection member 200 may have different heights.

[0188] For example, there may be a difference in the depth of the accommodation portion 110B provided in the insulating layer 110 and the thickness of the connection member 200, and the first connection electrode 210 of the connection member 200 may be positioned higher or lower than the second connection electrode 160 in response to the thickness difference.

[0189] Therefore, a difference may occur between the height of the upper surface of the third electrode portion 140 and the height of the upper surface of the fourth electrode portion 150.

[0190] For example, as Figure 4 shown, the upper surface of the first connection electrode 210 of the connection member 200 may be positioned higher than the upper surface of the second connection electrode 160. In this case, the upper surface of the third electrode portion 140 may be positioned higher than the upper surface of the fourth electrode portion 150. In this case, when the widths of the first through-hole portion 121 of the first electrode portion 120 and the second through-hole portion 131 of the second electrode portion 130 are the same, the upper surface of the first electrode portion 120 may be positioned higher than the upper surface of the second electrode portion 130. Therefore, the embodiment allows the width W2 of the second through-hole portion 131 to be smaller than the width W1 of the first through-hole portion 121. For example, the width W1 of the first through-hole portion 121 is made larger than the width W2 of the second through-hole portion 131 by the height difference between the upper surface of the third electrode portion 140 and the upper surface of the fourth electrode portion 150. Thus, due to the difference in width, the embodiment can make the thickness of the first through-hole portion 121 smaller than the thickness of the second through-hole portion 131, whereby the height of the upper surface of the first protrusion portion 122 of the first electrode portion 120 can be made equal to the height of the upper surface of the second protrusion portion 132 of the second electrode portion 130.

[0191] Meanwhile, as Figure 6 shown, the upper surface of the first connection electrode 210 of the connection member 200 may be positioned lower than the upper surface of the second connection electrode 160. For example, the first connection electrode 210 may include only the first electrode portion.

[0192] In this case, the upper surface of the third electrode portion 140 may be positioned lower than the upper surface of the fourth electrode portion 150. In this case, when the width of the first through portion 121 of the first electrode portion 120 is the same as the width of the second through portion 131 of the second electrode portion 130, the upper surface of the first electrode portion 120 may be positioned lower than the upper surface of the second electrode portion 130. Therefore, the embodiment allows the width W2 of the second through portion 131 to be greater than the width W1 of the first through portion 121. For example, the width W1 of the first through portion 121 is smaller than the width W2 of the second through portion 131 by the height difference between the upper surface of the third electrode portion 140 and the upper surface of the fourth electrode portion 150. Thus, due to the difference in width, the embodiment may make the thickness of the first through portion 121 greater than the thickness of the second through portion 131, and thereby, the height of the upper surface of the first protrusion portion 122 of the first electrode portion 120 may be the same as the height of the upper surface of the second protrusion portion 132 of the second electrode portion 130.

[0193] Meanwhile, as Figure 7 shown, the upper surface of the first connection electrode 210 of the connection member 200 may be located in the same plane as the upper surface of the second connection electrode 160. Also, the third electrode portion 140 and the fourth electrode portion 150 may have the same size, and thus, the height of the upper surface of the third electrode portion 140 and the height of the upper surface of the fourth electrode portion 150 may be the same. In this case, the thickness of the first through portion 121 and the thickness of the second through portion 131 may be the same, and further, the width of the first through portion 121 and the width of the second through portion 131 may be the same.

[0194] Meanwhile, as Figure 8 shown, the second electrode portion 130 may include at least a plurality of sub-through portions.

[0195] Specifically, the above-mentioned first electrode portions 120 may be provided in a plurality of units while being spaced apart from each other, and the second electrode portions 130 may also be provided in a plurality of units while being spaced apart from each other. In addition, the size of the first through portion of each of the plurality of first electrode portions may correspond to the size of the second through portion of each of the plurality of second electrode portions.

[0196] Meanwhile, at least one of the plurality of second electrode portions 130 may include a plurality of sub-electrodes commonly connected to one second protrusion portion 132.

[0197] Specifically, the second electrode portion 130 may include a first set of second electrode portions 130A connected to the first semiconductor device and a second set of second electrode portions 130B connected to the second semiconductor device. Additionally, at least one of the first set of second electrode portions and the second set of second electrode portions may include a plurality of sub-through portions vertically overlapping with one second protrusion portion 132.

[0198] Specifically, compared to the size of a conventional through portion, the size of the second through portion 131 may be reduced to have the same size as the first through portion 121. Additionally, when the size of the second through portion 131 is reduced, the allowable current of the signal may be correspondingly reduced. Additionally, when the size of the second through portion 131 is reduced, the contact area between the second through portion 131 and the insulating layer 110 decreases, and thus, the adhesion between the second through portion 131 and the insulating layer 110 may be reduced. Additionally, when the width of the second through portion 131 is reduced, the heat transfer characteristics of the heat transferred through the second through portion 131 may be reduced, and thus, the heat dissipation characteristics may be reduced. Additionally, when the size of the second through portion 131 is reduced, a problem may occur in that the impedance matching state is correspondingly misaligned, and thus, it may be necessary to change the design of other electrode portions provided in the circuit board to perform impedance matching.

[0199] Therefore, the embodiment allows the second through portion 131 to have a plurality of sub-through portions, thereby improving the heat transfer characteristics, increasing the heat dissipation effect, and correspondingly maintaining the impedance matching state.

[0200] For example, at least one of the plurality of second electrode portions 130 may include a second protrusion portion 132 and a first sub-through portion 131a and a second sub-through portion 131b that are vertically overlapped with the second protrusion portion 132 and horizontally spaced apart from each other.

[0201] The first sub-through portion 131a and the second sub-through portion 131b may be commonly connected to one second protrusion portion 132. For example, the first sub-through portion 131a and the second sub-through portion 131b may each be vertically overlapped with one second protrusion portion 132.

[0202] Additionally, the first sub-through portion 131a and the second sub-through portion 131b may have the same thickness and the same width. For example, the first sub-through portion 131a and the second sub-through portion 131b may have the same volume. Preferably, the first sub-through portion 131a and the second sub-through portion 131b may have the same size.

[0203] In addition, the first sub-through portion 131a may have the same dimensions as the first through portion 121. In addition, the second sub-through portion 131b may have the same volume as the first through portion 121. In addition, the first sub-through portion 131a may have the same dimensions as the first through portion 121. Thus, even if the second through portion 131 of the second electrode portion 130 includes the first sub-through portion 131a and the second sub-through portion 131b, the embodiment can ensure that the first electrode portion 120 and the second electrode portion 130 have a consistent height.

[0204] However, the upper surface of the second protrusion portion 132 may have steps. For example, since the second protrusion portion 132 vertically overlaps with a plurality of sub-through portions, it may have steps. For example, the second protrusion portion 132 may include a concave region provided in a region vertically overlapping with the plurality of through portions. For example, the second protrusion portion 132 may have concave portions CP provided in each of a region vertically overlapping with the first sub-through portion 131a and a region vertically overlapping with the second sub-through portion 131b.

[0205] The concave portion CP may allow a conductive adhesive material such as solder to stably stay on the second protrusion portion 134. For example, the concave portion CP may serve as a barrier to prevent solder movement during solder placement.

[0206] Meanwhile, as Figure 9 shown, in order to improve heat dissipation characteristics and / or impedance matching, the fourth electrode portion 150 (instead of the second electrode portion 130) may include a plurality of sub-extension portions.

[0207] For example, at least one of the plurality of fourth electrode portions 150 may include a first sub-extension portion 141a and a second sub-extension portion 141b that vertically overlap with one second pad portion 152 and are horizontally spaced apart from each other. In addition, the first sub-extension portion 141a and the second sub-extension portion 141b of the fourth electrode portion 150 may improve heat dissipation characteristics while improving the accuracy of the impedance matching state changed in response to the reduction in the width of the second through portion 131.

[0208] In addition, the upper surface of the second pad portion 152 may include concave portions CP2 that vertically overlap with the first sub-extension portion 141a and the second sub-extension portion 141b. In addition, the concave portions CP2 may have a function of increasing the contact area with the second insulating layer 112, thereby preventing the second insulating layer 112 from peeling off.

[0209] In addition, the concave portions CP2 may serve as the cracks 150C of the fourth electrode portion 150 described Figure 5 above, thereby omitting a separate process for forming the cracks 150C.

[0210] Meanwhile, referring to Figure 10 , the connection member 200 may be disposed in a receiving portion provided in the first insulating layer 110. At this time, the receiving portion may be provided in at least a part of the plurality of layers of the first insulating layer 110. The receiving portion may be in a recessed shape rather than a through-hole shape. Thus, the adhesive member 170 may be disposed on the concave surface.

[0211] The adhesive member 170 may enable the connection member 200 to be firmly fixed to the insulating layer 110. The adhesive member 170 may have a different width from the connection member 200. Additionally, the width of the adhesive member 170 may be greater than the width of the connection member 200. Thereby, it is possible to prevent the connection member 200 from peeling off due to various damages applied in the operating environment of the semiconductor package.

[0212] The embodiment may minimize the height deviation between the first electrode portion and the second electrode portion that penetrates from the upper surface of the insulating layer to a partial region of the insulating layer, while connecting the first electrode portion and the second electrode portion to the semiconductor device.

[0213] Specifically, the first electrode portion may vertically overlap with the connection member, and the second electrode portion may horizontally overlap with the first electrode portion without vertically overlapping with the connection member. The first electrode portion may include a first through-hole portion that penetrates at least a part of the insulating layer and a first protrusion portion that is located on the first through-hole portion and protrudes on the insulating layer. The second electrode portion may include a second through-hole portion that penetrates at least a part of the insulating layer and a second protrusion portion that is located on the second through-hole portion and protrudes on the insulating layer. At this time, the size of the second through-hole portion may correspond to the size of the first through-hole portion. Preferably, the size of the second through-hole portion may be in the range of 80% to 100% of the size of the first through-hole portion. The embodiment may minimize the height deviation between the first electrode portion and the second electrode portion caused by the size difference between the first through-hole portion and the second through-hole portion, thereby allowing the semiconductor device to be stably disposed on the first electrode portion and the second electrode portion.

[0214] Preferably, the thickness of the first through-hole portion in the vertical direction may be the same as the thickness of the second through-hole portion in the vertical direction, and the width of the first through-hole portion in the horizontal direction may be the same as the width of the second through-hole portion in the horizontal direction.

[0215] Additionally, the thickness of the first through-hole portion in the vertical direction may be less than the thickness of the second through-hole portion in the vertical direction, and the width of the first through-hole portion in the horizontal direction may be greater than the width of the second through-hole portion in the horizontal direction.

[0216] In addition, the thickness of the first through portion in the vertical direction can be greater than the thickness of the second through portion in the vertical direction, and the width of the first through portion in the horizontal direction can be less than the width of the second through portion in the horizontal direction.

[0217] Therefore, the embodiment can allow the heights of the first electrode portion and the second electrode portion to be the same. The first semiconductor device and the second semiconductor device can be stably arranged. Thus, the embodiment can improve the operating characteristics of the first semiconductor device and the second semiconductor device. In addition, the embodiment can allow the first semiconductor device and the second semiconductor device to operate smoothly, whereby the electronic product or the server can operate smoothly.

[0218] In addition, the embodiment can prevent impedance changes caused by thickness variations of the first electrode portion and the second electrode portion by making the first electrode portion and the second electrode portion have the same height, thereby further improving the electrical reliability.

[0219] Meanwhile, the second through portion of the second electrode portion can include a plurality of sub-through portions vertically overlapping with one second pad portion. In addition, the size of each of the plurality of sub-through portions can correspond to the size of the first through portion. Therefore, even if the second through portion includes a plurality of sub-through portions, the first electrode portion and the second electrode portion can have the same height. In addition, a concave portion can be provided on the upper surface of the second protrusion portion vertically overlapping with the plurality of sub-through portions. In addition, a conductive adhesive material such as solder can stably stay on the concave portion provided in the second protrusion portion. For example, the concave portion of the second protrusion portion can serve as a blocking function, which prevents the solder from moving while guiding the staying position of the solder placement. In addition, the embodiment can improve the heat dissipation characteristics of the semiconductor package by allowing heat to be transferred through the plurality of sub-through portions, and can further improve the operating characteristics of the semiconductor package.

[0220] In addition, since the second through portion includes a plurality of sub-through portions, the embodiment can prevent impedance changes caused by a decrease in the width of the second through portion, thereby improving the operating characteristics of the first semiconductor device and the second semiconductor device. In addition, the embodiment can achieve smooth operation of the first semiconductor device and the second semiconductor device, thereby achieving smooth operation of the electronic product or the server.

[0221] On the other hand, when the circuit board having the above characteristics of the present invention is used in IT devices or household appliances (such as smart phones, server computers, TVs, etc.), functions such as signal transmission or power supply can be stably performed. For example, when the circuit board having the characteristics of the present invention performs a semiconductor packaging function, the circuit board can be used to safely protect the semiconductor chip from external moisture or contaminants, or alternatively, problems such as leakage current, electrical short circuit, and electrical open circuit between the terminals provided to the semiconductor chip can be solved. In addition, when the signal transmission function is dominant, the noise problem can be solved. Thus, the circuit board having the above characteristics of the present invention can maintain the stable functions of IT devices or household appliances, enabling the entire product and the circuit board applying the present invention to achieve functional unity or technical interlock with each other.

[0222] When the circuit board having the above characteristics of the present invention is used in a transportation device such as a vehicle, the problem of signal distortion transmitted to the transportation device can be solved, or alternatively, by safely protecting the semiconductor chip that controls the transportation device from the outside and solving problems such as leakage current, electrical short circuit, or electrical open circuit between the terminals provided to the semiconductor chip, the safety of the transportation device can be further improved. Therefore, the transportation device and the circuit board applying the present invention can achieve functional integrity or technical interlock with each other.

[0223] The characteristics, structures, and effects described in the above embodiments are included in at least one embodiment, but are not limited to one embodiment. In addition, those of ordinary skill in the art to which the embodiments pertain can even combine or modify the characteristics, structures, effects, etc. shown in each embodiment with respect to other embodiments. Therefore, it should be understood that the content related to such combinations and such modifications is included within the scope of the embodiments.

[0224] The description focuses on the embodiments, but it is merely illustrative and does not limit the embodiments. Those skilled in the art to which the embodiments pertain can understand that various modifications and applications not shown above are possible without departing from the basic characteristics of the embodiments. For example, each component specifically shown in the embodiments can be modified and implemented. In addition, it should be understood that the differences related to these changes and applications are included within the scope of the embodiments defined in the appended claims.

Claims

1. A semiconductor package, comprising: An insulating layer; A plurality of electrode portions, the plurality of electrode portions including through portions penetrating from an upper surface of the insulating layer to a partial area of the insulating layer; And A connection member embedded in the insulating layer; Wherein, the plurality of electrode portions include: A first electrode portion, the first electrode portion including a first through portion overlapping with the connection member in a vertical direction; and A second electrode portion, the second electrode portion including a second through portion not overlapping with the connection member in a vertical direction, Wherein, a size of the first through portion is in a range of 80% to 100% of a size of the second through portion.

2. The semiconductor package according to claim 1, wherein Each of the first through portion and the second through portion is provided as a plurality, Wherein, a size of each of the plurality of first through portions is in a range of 80% to 100% of a size of each of the plurality of second through portions.

3. The semiconductor package according to claim 2, wherein, The plurality of first through portions overlap with the plurality of second through portions in a horizontal direction.

4. The semiconductor package according to any one of claims 1 to 3, wherein, The first through portion and the second through portion have the same thickness in a vertical direction, Wherein, the first through portion and the second through portion have the same width in a horizontal direction.

5. The semiconductor package according to any one of claims 1 to 3, wherein, The thickness of the first through portion in the vertical direction is less than the thickness of the second through portion in the vertical direction, Wherein, the width of the first through portion in the horizontal direction is greater than the width of the second through portion in the horizontal direction.

6. The semiconductor package according to any one of claims 1 to 3, wherein, The thickness of the first through portion in the vertical direction is greater than the thickness of the second through portion in the vertical direction, Wherein, the width of the first through portion in the horizontal direction is less than the width of the second through portion in the horizontal direction.

7. The semiconductor package according to any one of claims 3 to 5, wherein, At least one of a density and a volume of the first through portion is in a range of 80% to 100% of at least one of a density and a volume of the second through portion.

8. The semiconductor package according to any one of claims 1 to 3, wherein, The first electrode portion includes a first protrusion portion provided on the first through portion and protruding on the insulating layer, Wherein, the second electrode portion includes a second protrusion portion provided on the second through portion and protruding on the insulating layer.

9. The semiconductor package according to claim 8, wherein, A height of an upper surface of the first protrusion portion is the same as a height of an upper surface of the second protrusion portion.

10. The semiconductor package according to any one of claims 1 to 3, wherein, The width of the first through portion in the horizontal direction is in a range of 10 μm to 40 μm.

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