Sensor shedding detection method for blood glucose detection

Abstract

The invention relates to a sensor falling detection method for blood glucose detection. The method comprises the following steps: acquiring a test current of a sensor; when the test current is greater than the standard value, the output end of the current processing circuit outputs a first level signal; triggering the detection circuit to perform multiple rounds of repeated detection; when the number of times accumulated by the counter is larger than or equal to a preset number threshold value, cycle detection is ended; setting to enter a fall-off detection mode, and determining that the sensor falls off under the condition that the amplified current is still smaller than the current threshold value. According to the technical scheme, large current generated by misoperation of a system circuit can be avoided, meanwhile, multiple times of detection are used, the influence of interference signals is filtered out, and false detection is avoided. And the reliability of sensor falling detection is realized.

Description

Technical Field

[0001] The present disclosure relates to the technical field of sensors, and particularly to a method for detecting sensor detachment in blood glucose detection. Background Art

[0002] Diabetes is one of the most prevalent chronic diseases globally. Diabetic patients need to wear a sensor on the human skin for blood glucose detection. Due to various reasons, the sensor may experience large current and detachment phenomena, thus affecting the safety and rehabilitation of patients. Summary of the Invention

[0003] To overcome the problems existing in the related art, the present disclosure provides a method for detecting sensor detachment in blood glucose detection to solve the problem of affecting the rehabilitation of patients caused by untimely discovery of sensor detachment in the related art.

[0004] According to the first aspect of the embodiments of the present disclosure, a method for detecting sensor detachment in blood glucose detection is provided, including:

[0005] Trigger the detection circuit to detect the sensor and obtain the test current of the sensor;

[0006] When the test current is greater than the standard value, the output end of the current processing circuit outputs a first level signal;

[0007] When the duration of the first level signal is greater than or equal to a predetermined time period, increment the counter by 1;

[0008] Trigger the detection circuit to perform multiple rounds of repeated detection;

[0009] Among them, when the accumulated number of times of the counter is greater than or equal to a predetermined quantity threshold, end the loop detection;

[0010] Set to enter the detachment detection mode, and amplify the test current by a predetermined multiple to obtain an amplified current;

[0011] When the amplified current is less than the current threshold, determine that the sensor has detached.

[0012] The technical solutions provided by the embodiments of the present disclosure may include the following beneficial effects:

[0013] In the above technical solution of the present application, a detection circuit is designed to detect the sensor and obtain the test current of the sensor. When the test current is greater than the standard value, the output end of the current processing circuit outputs a first level signal. Determine whether the first level signal is valid, count the valid level signals, which can filter out the influence of interference signals, and count the number of valid level signals. When the number accumulated by the counter is greater than or equal to a predetermined quantity threshold, the loop detection is ended. It is possible to avoid wasting resources caused by blindly entering the detachment detection mode. The test current is amplified and compared with the current threshold to determine that the sensor has detached.

[0014] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The accompanying drawings herein are incorporated into the specification and constitute a part of this specification, showing embodiments consistent with the present disclosure and used together with the specification to explain the principles of the present disclosure.

[0016] Figure 1 is a flowchart of a method for detecting sensor detachment in blood glucose detection shown according to an exemplary embodiment;

[0017] Figure 2 is a detection circuit diagram shown according to an exemplary embodiment;

[0018] Figure 3 is a current processing circuit diagram shown according to an exemplary embodiment;

[0019] Figure 4 is a counter circuit diagram shown according to an exemplary embodiment. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0020] Here, the exemplary embodiments will be described in detail, and the examples are shown in the accompanying drawings. When the following description refers to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. On the contrary, they are only examples of devices and methods consistent with some aspects of the present disclosure as detailed in the appended claims.

[0021] It should be noted that all actions of obtaining signals, information or data in this application are carried out on the premise of complying with the corresponding data protection regulations and policies of the country where it is located and obtaining authorization from the owner of the corresponding device.

[0022] Based on this, the present application proposes a method for detecting sensor detachment in blood glucose detection, see the attached Figure 1 , including:

[0023] In step S102, the trigger detection circuit detects the sensor to obtain the test current of the sensor.

[0024] In this embodiment, when the detection circuit detects the sensor, a voltage needs to be applied across the two ends of the sensor to cause the sensor to generate a test current.

[0025] In step S104, when the above test current is greater than the standard value, the output end of the current processing circuit outputs a first level signal.

[0026] In this embodiment, it can be implemented by software. The measured current is tested and calculated by the ADC and input into the processor. The standard value is stored in the processor. The software in the processor runs a comparison program to compare the magnitude relationship between the test current and the standard value. When the test current is greater than the standard value, the processor can use its built-in output port to implement system control, or control the output end of the current processing circuit to output a first level signal.

[0027] In this embodiment, it can also be implemented by a hardware circuit. In the current processing circuit, the test current is compared with the standard value. When the test current is greater than the standard value, the output end outputs a first level signal.

[0028] In step S106, when the duration of the above first level signal is greater than or equal to a predetermined time period, the counter is incremented by 1.

[0029] In this embodiment, the predetermined time period can be set flexibly. For example, it can be 10 ms. The duration of the first level signal can be statistically analyzed. When the duration is less than 10 ms, the first level signal is invalid. When the duration is greater than or equal to 10 ms, the first level signal is valid and the counter is incremented by one.

[0030] In step S108, the trigger detection circuit performs multiple rounds of repeated detection.

[0031] In this embodiment, after the counter is incremented by one, the trigger detection circuit performs detection again. If the obtained first level signal is valid, the counter performs the increment operation again, and this loop is repeated multiple times.

[0032] In step S110, when the number of times accumulated by the above counter is greater than or equal to a predetermined quantity threshold, the loop detection is ended.

[0033] In this embodiment, the predetermined quantity threshold can be set flexibly. For example, it can be set to 4. After multiple rounds of testing, when the number of times accumulated by the counter is greater than or equal to 4, it indicates that the first level signal is valid. The loop detection process of the detection circuit is ended.

[0034] In some embodiments, instead of using a hardware counter, a software approach can be adopted for counting, which is performed in the processor.

[0035] In step S112, the above test current is amplified by a predetermined multiple to obtain an amplified current.

[0036] In this embodiment, after determining that the first level signal is valid, an amplifier circuit can be used to amplify the test current to obtain an amplified current. It is also possible to use software in the processor to amplify the test current value to obtain an amplified current in software form.

[0037] In step S114, when the above amplified current is less than the current threshold, it is determined that the above sensor has fallen off.

[0038] In this embodiment, the current threshold can be set flexibly. When the amplified current is less than the current threshold, it indicates that the test current is too small, and thus it is determined that the sensor has fallen off.

[0039] The above technical solution of the present application designs a detection circuit to detect the sensor and obtain the test current of the sensor. When the test current is greater than the standard value, the output end of the current processing circuit outputs a first level signal. Determine whether the first level signal is valid, count the valid level signals, which can filter out the influence of interference signals, and count the number of valid level signals. When the number of times accumulated by the above counter is greater than or equal to the predetermined quantity threshold, the loop detection is ended. The test current is amplified and processed and compared with the current threshold to determine that the above sensor has fallen off.

[0040] In some embodiments, when the above amplified current is greater than or equal to the current threshold, it is determined that the above sensor has not fallen off.

[0041] In this embodiment, when the amplified current is greater than or equal to the current threshold, it indicates that the sensor has not fallen off.

[0042] In some embodiments, if the number of times accumulated by the counter is less than the above predetermined quantity threshold, the statistics are invalid and the detection continues.

[0043] In this embodiment, when the number of times accumulated by the counter is less than the above predetermined quantity threshold, it is considered that the current statistical data is not sufficient for effective analysis or judgment, so it is necessary to continue monitoring and counting.

[0044] The technical solution of the present application sets a predetermined quantity threshold, which is beneficial to improving the accuracy of statistical validity. If the quantity threshold is set to 1, there may be errors and false statistics. If the quantity threshold is set too high, it will cause waste of resources. Reasonably setting the quantity threshold, such as setting it to 4 times, can not only improve the statistical accuracy but also avoid waste of resources.

[0045] In some embodiments, referring to the attached Figure 2 , in the above detection circuit, it at least includes a first voltage source DAC01, a second voltage source DAC02, and a transimpedance amplifier OPA2. There is a voltage difference between the above first voltage source and the above second voltage source.

[0046] The above first voltage source is connected to the reference electrode RE of the above sensor.

[0047] The above second voltage source is connected to the working electrode WE of the above sensor.

[0048] The first voltage source DAC01 is connected to the positive input terminal of the operational amplifier OPA1; according to the concept of virtual short, after the switch SW_RE is closed and conducting, the voltage at the RE terminal of the sensor is equal to the voltage value of the first voltage source DAC01.

[0049] The operational amplifier outputs CE_OUT. In a branch connected to this output terminal, a series of switch SW_RECE and switch SW_REGND are provided. One end of the switch SW_REGND is grounded. The CE terminal of the sensor is connected to the above branch and the switch SW_CE.

[0050] In step S102, triggering the detection circuit to detect the sensor may further include the following steps:

[0051] The above first voltage source is applied to the reference electrode RE of the above sensor, and the above second voltage source is applied to the working electrode WE of the above sensor for power-on testing, and the above working electrode of the above sensor outputs a test current.

[0052] The first input terminal of the above transimpedance amplifier OPA2 inputs the above second voltage DAC02. The second input terminal is connected to the working electrode WE of the above sensor and inputs the above test current.

[0053] Between the second input terminal and the output terminal of the above transimpedance amplifier OPA2, there are a first branch composed of a resistor R and a first switch SW_TIA and a second branch composed of a second switch SW_CACB in parallel with the above first branch.

[0054] The resistance value of the above resistor R is the resistance value of the above sensor.

[0055] The first end of the above resistor R is connected to the first end of the above first switch SW_TIA, the second end of the above first switch SW_TIA is connected to the first input terminal of the above transimpedance amplifier OPA2. The second end of the above resistor R is connected to the output terminal of the above transimpedance amplifier OPA2. The output terminal of the above transimpedance amplifier OPA2 outputs a test voltage WE_OUT.

[0056] After the test voltage WE_OUT enters the first terminal of the analog-to-digital converter ADC, it is converted into a digital signal and enters the microprocessor MCU. The above DAC02 enters the second terminal of the analog-to-digital converter ADC through a resistor.

[0057] In some embodiments, in step S104, when the above test current is greater than the standard value, the current processing circuit outputs a first level signal, including the following steps:

[0058] See Appendix Figure 3 In the above current processing circuit, it includes a plurality of mirror branches and a Schmitt trigger 21.

[0059] The mirror branch is used to mirror and transfer the input test current to obtain a mirror copy current.

[0060] Compare the above mirror copy current with the set current standard value, and output a corresponding analog electrical signal to the above Schmitt trigger according to the comparison result.

[0061] The above Schmitt trigger 21 is used to convert the input analog electrical signal into a digital electrical signal.

[0062] When the above current standard value and the comparison circuit determine that the test current is greater than the standard value, output a first analog electrical signal to the above Schmitt trigger 21. The above Schmitt trigger 21 outputs a first level signal.

[0063] In this embodiment, the first level signal can be a low level signal.

[0064] The advantage of the Schmitt trigger is that the input of the Schmitt trigger is an analog quantity, and the output is a digital quantity. The value of the analog quantity has a floating range and does not precisely represent the level high or low. The Schmitt trigger converts the floating analog quantity into a digital quantity output, clarifying the first level signal of the high and low levels for subsequent use.

[0065] In some embodiments, the above current processing circuit includes: a first current mirror and a first MOS transistor Q1. The control terminal of the above first MOS transistor Q1 is connected to the first control electrical signal SWN_TERM, the source terminal is connected to the drain terminal of the second MOS transistor Q2; the drain terminal is connected to the drain terminal of the input MOS transistor Q01 in the above first current mirror.

[0066] The control terminal of the above second MOS transistor Q2 is respectively connected to the first terminal of the fifth switch S5 and the first terminal of the sixth switch S6.

[0067] The second terminal of the above fifth switch S5 is connected to the third control electrical signal CE-OUT.

[0068] The second terminal of the sixth switch S6 inputs the second control signal WE_OUT, which is the test voltage.

[0069] The source of the second MOS transistor Q2 is connected to the drain of the third MOS transistor Q3; the drain is connected to the source of the first MOS transistor Q1.

[0070] The third MOS transistor Q3, the control terminal of the third MOS transistor Q3 is connected to the fourth control signal SWP_TERM; the source is grounded; the drain is connected to the source of the second MOS transistor Q2; and the drain is respectively connected to the third switch S3 and the fourth switch S4; the third switch S3 is connected to the reference electrode RE, and the fourth switch S4 is connected to the working electrode WE.

[0071] The source of the input MOS transistor Q01 in the first current mirror is connected to the first power supply.

[0072] Among them, the first power supply is VCC.

[0073] When the input MOS transistor Q01 in the first current mirror, the first MOS transistor Q1, the second MOS transistor Q2, and the third MOS transistor Q3 form a first input branch, when the first MOS transistor Q1, the first MOS transistor Q1, the second MOS transistor Q2, and the third MOS transistor Q3 are all closed and conducting, the current flowing through the first input branch is the test current.

[0074] The source of the second MOS transistor Q2 and the drain of the third MOS transistor Q3 are respectively connected to the first end of the fourth switch S4 and the first end of the third switch S3.

[0075] The second end of the fourth switch S4 is connected to the working electrode.

[0076] The second end of the third switch S3 is connected to the reference electrode.

[0077] In some embodiments, the control terminal of the output MOS transistor Q02 in the first current mirror is connected to the control terminal of the input MOS transistor Q01 in the first current mirror.

[0078] The drain of the output MOS transistor Q2 in the first current mirror is connected to the drain of the fourth MOS transistor Q4, and the source of the fourth MOS transistor Q4 is connected to the negative pole of the second power supply.

[0079] In this embodiment, the second power supply is VB.

[0080] The control terminal of the second MOS transistor Q2 is connected to the fifth control switch S5 and the sixth control switch S6.

[0081] The second MOS transistor Q2 and the fourth MOS transistor Q4 in the first current mirror form a first mirror branch.

[0082] It further includes a fifth MOS transistor Q5 and a sixth MOS transistor Q6.

[0083] The source of the fifth MOS transistor Q5 is connected to the first power supply, the drain is connected to the source of the sixth MOS transistor Q6, and the control terminal of the sixth MOS transistor Q6 is connected to the seventh control switch S7.

[0084] The drain of the sixth MOS transistor Q6 is respectively connected to the drain of the output terminal MOS transistor Q02 and the drain of the fourth MOS transistor Q4.

[0085] It further includes a seventh MOS transistor Q7 and an eighth MOS transistor Q8.

[0086] The gates of the seventh MOS transistor Q7 and the eighth MOS transistor Q8 are connected.

[0087] The sources of the seventh MOS transistor Q7 and the eighth MOS transistor Q8 are connected to the first power supply.

[0088] The drain of the seventh MOS transistor Q7 is respectively connected to the drain of the ninth MOS transistor Q9 and the drain of the tenth MOS transistor Q10.

[0089] The drain of the eighth MOS transistor Q8 is connected to the first input terminal of the Schmitt trigger 21.

[0090] The drain of the ninth MOS transistor Q9 is connected to the negative pole of the second power supply.

[0091] The source of the tenth MOS transistor Q10 is connected to the drain of the eleventh MOS transistor Q11, and the source of the eleventh MOS transistor Q11 is connected to the negative pole of the second power supply.

[0092] The control terminal of the tenth MOS transistor Q10 is connected to the eighth control switch S8.

[0093] The control terminals of the eleventh MOS transistor Q11 are respectively connected to the control terminals of the fourth MOS transistor Q4 and the ninth MOS transistor Q9.

[0094] The source of the twelfth MOS transistor Q12 is connected to the first power supply; the drain is connected to the source of the thirteenth MOS transistor, and the control terminals are respectively connected to the control terminal of the seventh MOS transistor Q7, the control terminal of the eighth MOS transistor Q8, as well as the drain of the seventh MOS transistor Q7 and the drain of the ninth MOS transistor Q9.

[0095] The drain of the thirteenth MOS transistor Q13 is respectively connected to the drain of the fifteenth MOS transistor, the drain of the sixteenth MOS transistor, and the drain of the seventeenth MOS transistor.

[0096] The control terminal of the thirteenth MOS transistor Q13 is connected to the ninth control switch S9.

[0097] The source of the above-mentioned fifteenth MOS transistor Q15 is connected to the drain of the eighteenth MOS transistor Q18, and the source of the above-mentioned eighteenth MOS transistor Q18 is connected to the negative pole of the second power supply.

[0098] The control terminal of the above-mentioned fifteenth MOS transistor Q15 is connected to the zero-th control switch S0.

[0099] The source of the above-mentioned sixteenth MOS transistor Q16 is connected to the drain of the nineteenth MOS transistor Q19, and the source of the above-mentioned nineteenth MOS transistor Q19 is connected to the negative pole of the second power supply.

[0100] The control terminal of the above-mentioned sixteenth MOS transistor Q16 is connected to the first control switch S1.

[0101] The source of the above-mentioned seventeenth MOS transistor Q17 is connected to the drain of the twentieth MOS transistor Q20, and the source of the above-mentioned twentieth MOS transistor Q20 is connected to the negative pole of the second power supply.

[0102] The control terminal of the above-mentioned seventeenth MOS transistor Q17 is connected to the second control switch S2.

[0103] The control terminals of the above-mentioned eighteenth MOS transistor Q18, the above-mentioned nineteenth MOS transistor Q19, the above-mentioned twentieth MOS transistor Q20 and the first input terminal of the above-mentioned Schmitt trigger 21 are connected together and connected to the second power supply.

[0104] The output terminal of the above-mentioned Schmitt trigger 21 serves as the output terminal of the above-mentioned current processing circuit, and outputs CUR_DET.

[0105] In some embodiments, referring to the appendix Figure 4 , when the duration of the above-mentioned first-level signal is greater than or equal to a predetermined time period, the counter is incremented by 1, including:

[0106] A counter, a first NOR gate, a second NOR gate, a filter, a first NOT gate and a second NOT gate are provided;

[0107] The above-mentioned current detection electrical signal is input to the above-mentioned filter.

[0108] The output terminal of the above-mentioned filter is connected to the first input terminal of the above-mentioned first NOR gate, and the second input terminal of the above-mentioned first NOR gate is connected to the output terminal of the above-mentioned counter.

[0109] The above-mentioned current detection electrical signal is input to the first input terminal of the above-mentioned second NOR gate, and the second input terminal of the above-mentioned second NOR gate is connected to the output terminal of the above-mentioned first NOT gate; the input terminal of the above-mentioned first NOT gate inputs a DET_EN electrical signal.

[0110] The output terminal of the counter is also connected to the input terminal of the second NOT gate, and the output terminal of the second NOT gate outputs a first control electrical signal SWN_TERM.

[0111] The output terminal of the counter outputs a fourth control electrical signal SWP_TERM.

[0112] The above-mentioned first filter is used for filtering, filtering out the invalid electrical signals with the duration of the above-mentioned first level signal less than a predetermined time period, and obtaining the valid electrical signals with the duration of the above-mentioned first level signal greater than or equal to the predetermined time period.

[0113] Among them, the predetermined time is 10 milliseconds.

[0114] In the above detection, after every predetermined time is completed, the detection circuit is reset through the SWP_TERM and SWN_TERM signals, and the output CUR_DET of the Schmitt trigger will flip to perform the next detection. However, if the entire system is normal during this process, the change of the CUR_DET signal will be filtered by the 40-millisecond filter and the counter will not be cleared. But if the entire system is abnormal during this process and the CUR_DET output never flips, then the CUR_DET signal will not be filtered by the 40-millisecond filter, and the low-level output will clear the counter, and the Sn_DETECT status bit will transmit the corresponding status of the detection system abnormality to the MCU.

[0115] The system can restart its detection in two cases. One is that 4 low-level CUR_DETs of 10 ms are continuously detected. The counter counts. When the counter count reaches 4, the MSB bit output by the output terminal becomes high. At the same time, after locking the counter, the system makes a judgment of over-threshold current through the Sn_DETECT status bit, and will restart the system through the restart signal DET_EN after 400 ms. The second case is that the 40-ms filter detects that CUR_DET maintains a low level for 40 ms, indicating that the system is not working properly, and will restart the system through the restart signal DET_EN after 400 ms.

[0116] In some embodiments, in combination with the above circuit, the dynamic process is described in detail.

[0117] See Appendix Figure 2 and Appendix Figure 3 , when applying VRE > VWE, the current flows from I1 to RE to WE, and then to the ground. It is necessary to conduct SW_CACB and SW_RE, and disconnect SW_TIA, SW_CE, SW_RECE, and SW_REGND. Then, set RE to DACO1 and WE to DACO2.

[0118] Set the threshold currents of the zero - th switch S0, the first switch S1, and the second switch S2 according to the threshold requirements. SWP_TREM and SWN_TREM are set to low level and high level respectively. The fourth switch S4 and the sixth switch S6 are turned on, and the third switch S3, the fifth switch S5, the seventh switch S7, the eighth switch S8, and the ninth switch S9 are all turned off. At this time, the current flowing through I1 is the current flowing between WE and RE. Through the mirror branch, the current I1 is copied to the current I3, the current I3 is copied to the current I4, and the current I4 is compared with the set threshold current. According to the comparison result, different high and low levels are input into the Schmitt trigger, and there are two inverting processes in the Schmitt trigger. The Schmitt trigger outputs CUR_DET. When the measured current I1 is greater than the threshold current, CUR_DET is at low level; when the measured current I1 is less than the threshold current, CUR_DET is at high level.

[0119] When VRE < VWE, the current flows from I1 to WE, then to RE, and then to ground. Turn on SW_RECE, SW_CE, and SW_RE, and turn off SW_TIA, SW_CACB, and SW_REGND. Then set RE to DACO1 and WE to DACO2.

[0120] Set the threshold currents of the zero - th switch S0, the first switch S1, and the second switch S2 according to the threshold requirements. SWP_TREM and SWN_TREM are set to low level and high level respectively. The third switch S3 and the fifth switch S5 are turned on, and the third switch S3, the fifth switch S5, the seventh switch S7, the eighth switch S8, and the ninth switch S9 are all turned off. The current I1 is the current flowing between RE and WE. Through the mirror branch, the current I1 is copied as the current I3, and the current I3 is copied to the current I4. The current I4 is compared with the threshold current, and the Schmitt trigger outputs CUR_DET. When the measured current I1 is greater than the threshold current, CUR_DET is at low level; when the measured current I1 is less than the threshold current, CUR_DET is at high level.

[0121] See Appendix Figure 4 To prevent false detection, CUR_DET needs to be tested multiple times. If the current I1 is higher than the threshold current, CUR_DET becomes low level. At this time, the counter starts to count, and the filter is used to filter out pulses less than 10mS. If the pulse duration exceeds 10mS, the counter will increase by 1, and at the same time, set SWP_TERM to high level and SWN_TERM to low level. CUR_DET becomes high level, then set SWP_TERM to low level and SWN_TERM to high level, and restore to the normal detection state. If the loop repeats 4 times, the sensor detection circuit outputs the Sn_DETECT status bit.

[0122] See the appendix Figure 3 When the seventh switch S7, the eighth switch S8, and the ninth switch S9 are all turned on, the anti-detachment function is activated. By turning on the seventh switch S7, the eighth switch S8, and the ninth switch S9, the current I1 is amplified to a predetermined multiple, for example, 343 times, and then compared with the set threshold current. If the high level of CUR_DET is still detected, it means that 343 times the current I1 is still lower than the set threshold current, indicating that the sensor has become detached.

[0123] After considering the specification and practicing the present disclosure, those skilled in the art will readily conceive of other embodiments of the present disclosure. This application is intended to cover any variations, uses, or adaptations of the present disclosure, which follow the general principles of the present disclosure and include known common knowledge or conventional technical means in the technical field not disclosed in the present disclosure. The specification and examples are only regarded as exemplary, and the true scope and spirit of the present disclosure are pointed out by the following claims.

[0124] It should be understood that the present disclosure is not limited to the exact structures described above and shown in the drawings, and various modifications and changes can be made without departing from its scope. The scope of the present disclosure is only limited by the appended claims.

Claims

1. A method for detecting sensor detachment in blood glucose detection, characterized in that, Including: The trigger detection circuit detects the sensor to obtain the test current of the sensor; When the test current is greater than the standard value, the output end of the current processing circuit outputs a first level signal; When the duration of the first level signal is greater than or equal to a predetermined time period, the counter increments by 1; The trigger detection circuit performs multiple rounds of repeated detections; Among them, when the number of times accumulated by the counter is greater than or equal to a predetermined quantity threshold, the loop detection ends; Set to enter the dropout detection mode, and amplify the test current by a predetermined multiple to obtain an amplified current; When the amplified current is less than the current threshold, it is determined that the sensor has dropped out.

2. The method for detecting sensor detachment in blood glucose detection according to claim 1, wherein, When the amplified current is greater than or equal to the current threshold, it is determined that the sensor has not dropped out.

3. The method for detecting sensor detachment in blood glucose detection according to claim 1, wherein If the number of times accumulated by the counter is less than the predetermined quantity threshold, the statistics are invalid and the detection continues.

4. The method for detecting sensor detachment in blood glucose detection according to claim 1, wherein In the detection circuit, it includes at least a first voltage source, a second voltage source, and a transimpedance amplifier; There is a voltage difference between the first voltage source and the second voltage source; The first voltage source is connected to the reference electrode of the sensor; The second voltage source is connected to the working electrode of the sensor; The trigger detection circuit detects the sensor, including: The first voltage source is applied to the reference electrode of the sensor, and the second voltage source is applied to the working electrode of the sensor for power-on testing, and the working electrode of the sensor outputs a test current; The first input terminal of the transimpedance amplifier inputs the second voltage; the second input terminal is connected to the working electrode of the sensor and inputs the test current; A first branch composed of a resistor and a first switch and a second branch composed of a second switch in parallel with the first branch are provided between the second input terminal and the output terminal of the transimpedance amplifier; The resistance value of the resistor is the resistance value of the sensor; The first end of the resistor is connected to the first end of the first switch, and the second end of the first switch is connected to the first input terminal of the transimpedance amplifier; The second end of the resistor is connected to the output terminal of the transimpedance amplifier; The output terminal of the transimpedance amplifier outputs a test voltage.

5. The method for detecting sensor dropout in blood glucose detection according to claim 4, characterized in that When the test current is greater than the standard value, the current processing circuit outputs a first level signal, including: In the current processing circuit, it includes a plurality of mirror branches and a Schmitt trigger; The mirror branch is used to perform a mirror copy on the input test current to obtain a mirror copy current; Compare the mirror copy current with the set current standard value, and output a corresponding analog electrical signal to the Schmitt trigger according to the comparison result; The Schmitt trigger is used to convert the input analog electrical signal into a digital electrical signal; When the current standard value and the comparison circuit determine that the test current is greater than the standard value, output a first analog electrical signal to the Schmitt trigger; the Schmitt trigger outputs a first level signal.

6. The method for detecting sensor dropout in blood glucose detection according to claim 5, characterized in that The current processing circuit includes: a first current mirror; The first MOS transistor, the control terminal of the first MOS transistor is connected to the first control electrical signal SWN_TERM, and the source is connected to the drain of the second MOS transistor; the drain is connected to the drain of the input MOS transistor in the first current mirror; The second MOS transistor, the control terminal of the second MOS transistor is connected to the second control electrical signal and the third control electrical signal; the source is connected to the drain of the third MOS transistor; the drain is connected to the source of the first MOS transistor; The third MOS transistor, the control terminal of the third MOS transistor is connected to the fourth control electrical signal; the source is grounded; the drain is connected to the source of the second MOS transistor; and the drain is respectively connected to the third switch and the fourth switch; the third switch is connected to the reference electrode, and the fourth switch is connected to the working electrode; The source of the input MOS transistor in the first current mirror is connected to the first power supply; The control terminal of the second MOS transistor is respectively connected to the first end of the fifth switch and the first end of the sixth switch; The second end of the fifth switch is connected to the CE-OUT signal; The second end of the sixth switch inputs the test voltage; The source of the second MOS transistor and the drain of the third MOS transistor are respectively connected to the first end of the fourth switch and the first end of the third switch; The second end of the fourth switch is connected to the working electrode; The second end of the third switch is connected to the reference electrode.

7. The method for detecting sensor detachment in blood glucose detection according to claim 6, wherein The control terminal of the input MOS transistor in the first current mirror is connected to the control terminal of the output MOS transistor in the first current mirror; The drain of the output MOS transistor is connected to the drain of the fourth MOS transistor, and the source of the fourth MOS transistor is connected to the negative pole of the second power supply; It further includes a fifth MOS transistor and a sixth MOS transistor; The source of the fifth MOS transistor is connected to the first power supply, the drain is connected to the source of the sixth MOS transistor, and the control terminal of the sixth MOS transistor is connected to the seventh control switch; The drain of the sixth MOS transistor is respectively connected to the drain of the output MOS transistor and the drain of the fourth MOS transistor; It further includes a seventh MOS transistor and an eighth MOS transistor; The gates of the seventh MOS transistor and the eighth MOS transistor are connected; The sources of the seventh MOS transistor and the eighth MOS transistor are connected to the first power supply; The drain of the seventh MOS transistor is respectively connected to the drain of the ninth MOS transistor and the drain of the tenth MOS transistor; The drain of the eighth MOS transistor is connected to the first input terminal of the Schmitt trigger; The drain of the ninth MOS transistor is connected to the negative pole of the second power supply; The source of the tenth MOS transistor is connected to the drain of the eleventh MOS transistor, and the source of the eleventh MOS transistor is connected to the negative pole of the second power supply; The control terminal of the eleventh MOS transistor is respectively connected to the control terminals of the fourth MOS transistor and the ninth MOS transistor; The source of the twelfth MOS transistor is connected to the first power supply; the drain is connected to the source of the thirteenth MOS transistor, and the control terminal is respectively connected to the control terminals of the seventh MOS transistor and the eighth MOS transistor, and the drain of the seventh MOS transistor and the drain of the ninth MOS transistor; The drain of the thirteenth MOS transistor is respectively connected to the drain of the fifteenth MOS transistor, the drain of the sixteenth MOS transistor and the drain of the seventeenth MOS transistor; The source of the fifteenth MOS transistor is connected to the drain of the eighteenth MOS transistor, and the source of the eighteenth MOS transistor is connected to the negative pole of the second power supply; The source of the sixteenth MOS transistor is connected to the drain of the nineteenth MOS transistor, and the source of the nineteenth MOS transistor is connected to the negative pole of the second power supply; The source of the seventeenth MOS transistor is connected to the drain of the twentieth MOS transistor, and the source of the twentieth MOS transistor is connected to the negative pole of the second power supply; The control terminals of the eighteenth MOS transistor, the nineteenth MOS transistor, the twentieth MOS transistor and the first input terminal of the Schmitt trigger are connected together and connected to the second power supply; The output terminal of the Schmitt trigger serves as the output terminal of the current processing circuit.

8. The sensor detachment detection method for blood glucose detection according to claim 1, wherein When the duration of the first level signal is greater than or equal to a predetermined time period, the counter is incremented by 1, including: A counter, a first NOR gate, a second NOR gate, a filter, a first NOT gate and a second NOT gate are provided; The current detection electrical signal is input to the filter; The output terminal of the filter is connected to the first input terminal of the first NOR gate, and the second input terminal of the first NOR gate is connected to the output terminal of the counter; The current detection electrical signal is input to the first input terminal of the second NOR gate, and the second input terminal of the second NOR gate is connected to the output terminal of the NOT gate; The output terminal of the counter is also connected to the input terminal of the second NOT gate; The first filter is used for filtering to filter out the invalid electrical signal with the duration of the first level signal less than the predetermined time period, and obtain the valid electrical signal with the duration of the first level signal greater than or equal to the predetermined time period.

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