Test board card, test system and test method of hard disk backboard

Abstract

The invention relates to the technical field of hardware testing, and discloses a test board card, a test system and a test method for a hard disk backplane, and a server-side first transceiving interface in the test board card is used for receiving a control command sent by a server; the test instruction simulation module is used for generating a first test instruction according to the control command; the server side second transceiving interface is used for receiving a second test instruction sent by the server; and the controller is used for sending the first test instruction or the second test instruction to the hard disk backboard side transceiving interface, receiving first feedback information or second feedback information of the hard disk backboard, and feeding back the first feedback information or the second feedback information to the server. Therefore, under the two conditions that the VPP and the I2C of the server can not directly communicate with the hard disk backboard, the hard disk backboard can be tested, the test board card can be suitable for various types of servers, and the server can be reused when the test board card is used for testing the hard disk backboard.

Description

Technical Field

[0001] This application relates to the technical field of hardware testing, and particularly to a test board card, a test system and a test method for a hard disk backplane. Background Art

[0002] The hard disk backplane is a key component in servers and storage devices. It is mainly used to connect hard disks to the motherboard or other controllers, and at the same time provides various functions to support the normal operation and management of hard disks, ensuring the secure storage and efficient transmission of data, and simplifying the maintenance and management of servers. Hard disk backplanes are included in basically all servers, including AI servers. As an important component of the server, after the production of the PCBA (Printed Circuit Board Assembly) factory is completed, it is very important to ensure the normal function of the board card. It is necessary to conduct functional inspections on all types of supported hard disks, RAID (Redundant Array of Independent Disks) functions, indicator lights, temperature monitoring, FRU (Field Replaceable Unit) information, etc., to ensure that there are no abnormalities when assembled into the server.

[0003] In the related art, a server motherboard adapted to the hard disk backplane to be tested is used as a carrier. The power supply line, MCIO (Multi-Connector I / O) line, SATA (Serial Advanced Technology Attachment) line, I2C (Inter-Integrated Circuit) line, etc. on the hard disk backplane are connected to the corresponding interfaces on the motherboard, and the test tools running in the OS (Operating System) on the server are used to detect whether the hard disk can be normally recognized, whether the RAID function is normal, whether the indicator light can be normally lit, whether the temperature of the hard disk backplane and the hard disk can be read, whether the FRU information of the backplane can be read, etc. If another hard disk backplane to be tested is replaced, and this backplane has not been adapted on the previous server motherboard, then it cannot be tested in this test environment, and it is necessary to replace it with a motherboard adapted to the new hard disk backplane for testing. This results in various server motherboards in the factory being used as test tools, and different server motherboards cannot be reused, causing waste of the tools. Summary of the Invention

[0004] In view of this, this application provides a test board card, a test system and a test method for a hard disk backplane to solve the problem of waste of tooling caused by the non-reusability of different server motherboards when using a server motherboard as a carrier to test a hard disk backplane.

[0005] In a first aspect, the present application provides a test board for a hard disk backplane, including a first transceiver interface on the server side, a test instruction simulation module, a second transceiver interface on the server side, and a controller. The first transceiver interface on the server side is used to receive a control command sent by the server; the test instruction simulation module is connected to the first transceiver interface on the server side and is used to generate a first test instruction according to the control command; the second transceiver interface on the server side is used to receive a second test instruction sent by the server; the controller is connected to the test instruction simulation module and the second transceiver interface on the server side, and is used to send the first test instruction to the transceiver interface on the hard disk backplane side, receive the first feedback information of the hard disk backplane, and send the first feedback information to the test instruction simulation module; or send the second test instruction to the transceiver interface on the hard disk backplane side, receive the second feedback information of the hard disk backplane, and send the second feedback information to the second transceiver interface on the server side; the test instruction simulation module is further used to receive the first feedback information sent by the controller and send the first feedback information to the server through the first transceiver interface on the server side.

[0006] Through the test board for the hard disk backplane provided by the present application, the test of the hard disk backplane can be realized in both cases where the VPP (Virtual Pin Port) and I2C of the server cannot directly communicate with the hard disk backplane and where the VPP and I2C of the server can directly communicate with the hard disk backplane, so that the test board can be applicable to various types of servers. Further, when using the test board to test the hard disk backplane, the server motherboard can be reused.

[0007] In an optional implementation manner, the second transceiver interface on the server side includes a first I2C interface (i.e., a first internal integrated circuit interface) and a first VPP interface (i.e., a first virtual pin interface); the transceiver interface on the hard disk backplane side includes a second I2C interface (i.e., a second internal integrated circuit interface) and a second VPP interface (i.e., a second virtual pin interface).

[0008] Thus, the test of various functions of the hard disk backplane can be realized.

[0009] In an alternative embodiment, the test board of the hard disk backplane further includes a server-side MCIO interface (i.e., server-side multi-connector input / output interface), a bandwidth expansion module, and a server-side Slimline interface (i.e., server-side slim interface). The server-side MCIO interface is used to receive a first PCIE signal (i.e., first peripheral component interconnect express signal) sent by the server. The bandwidth expansion module is connected to the server-side MCIO interface and is used to expand the bandwidth of the first PCIE signal to obtain a second PCIE signal (i.e., second peripheral component interconnect express signal) and send the second PCIE signal to the hard disk side MCIO interface connected to the hard disk backplane. The server-side Slimline interface is used to receive a sideband signal sent by the server. The controller is also connected to the server-side Slimline interface and is used to convert the sideband signal and distribute it to the hard disk side Slimline interface connected to the hard disk backplane.

[0010] Thus, the signals of the server are output externally through the MCIO interface. The signals output by the server are decomposed into a first PCIE signal and a sideband signal. The purpose of decomposition is to adapt to the requirements of different projects for the test version. The output of each server motherboard MCIO interface may have differences in pin definitions. Therefore, the input signals are separately divided into a PCIE signal and a sideband signal and are respectively connected to the MCIO X8 interface and the Slimline interface of the test board, which facilitates flexible configuration and enhances the versatility of using the server platform.

[0011] In an alternative embodiment, the test board of the hard disk backplane further includes a server-side power supply interface and a power supply module. The server-side power supply interface is used to receive electrical energy. The power supply module is connected to the power supply interface and is used to convert the received electrical energy in voltage and provide the voltage-converted electrical energy to the hard disk side power supply interface connected to the hard disk backplane.

[0012] Thus, the power supply requirements of different hard disk backplanes can be met, and the power supply output can be personalized.

[0013] In an alternative embodiment, the test board of the hard disk backplane further includes a hot plug interface. The hot plug interface is connected to the controller and is used to receive a hard disk hot plug instruction. The controller is also used to generate a first power-on / off instruction after obtaining the first hard disk hot plug instruction. The power supply management module is located between the power supply module and the hard disk side power supply interface and is used to control the power-off or power-on of the hard disk backplane after receiving the first power-on / off instruction.

[0014] Through the hot plug interface, the controller, and the power supply management module, the power-on and power-off operations of the hard disk backplane can be completed, and the PCIE signal interruption and connection of the hard disk backplane can be realized.

[0015] In an alternative embodiment, the first transceiver interface on the server side is further configured to receive a second hard disk hot plug instruction sent by the server; the test instruction simulation module is further configured to send the second hard disk hot plug instruction to the controller; the controller is further configured to generate a second power-on / off instruction after obtaining the second hard disk hot plug instruction; and the power supply management module is further configured to control the power supply of the hard disk backplane to power off or on after receiving the second power-on / off instruction.

[0016] Thus, the server and the power supply management module can complete the power-on and power-off operations of the hard disk backplane, realizing the interruption and connection of the PCIE signal of the hard disk backplane.

[0017] In an alternative embodiment, the Slimline interface on the server side is further configured to receive a clock signal sent by the server; the test board of the hard disk backplane further includes a clock module, and the clock module is connected to the Slimline interface on the server side for converting the clock signal and distributing it to the Slimline interface on the hard disk side.

[0018] The clock module can convert and distribute the CLK signal from the MCIO X8 interface of the server motherboard according to different hard disk backplanes, so that the test board can be applicable to different hard disk backplanes.

[0019] In a second aspect, the present application further provides a hard disk backplane test system, including a server, a hard disk backplane, and a hard disk backplane test board according to the first aspect and any embodiment of the first aspect, wherein both the server and the hard disk backplane are connected to the hard disk backplane test board.

[0020] In a third aspect, the present application further provides a method for testing a hard disk backplane, which is applied to a test board, and includes the following steps: obtaining a control command sent by the server, generating a first test instruction according to the control command; sending the first test instruction to the hard disk backplane; receiving a first feedback message from the hard disk backplane, and sending the first feedback message to the server; or; obtaining a second test instruction sent by the server; sending the second test instruction to the hard disk backplane; receiving a second feedback message from the hard disk backplane, and sending the second feedback message to the server.

[0021] In an alternative embodiment, the method for testing a hard disk backplane further includes the following steps: obtaining a first hard disk hot plug instruction sent; generating a first power-on / off instruction according to the first hard disk hot plug instruction, and controlling the power supply of the hard disk backplane to power off or on according to the first power-on / off instruction; or; obtaining a second hard disk hot plug instruction sent by the server; generating a second power-on / off instruction according to the second hard disk hot plug instruction, and controlling the power supply of the hard disk backplane to power off or on according to the second power-on / off instruction. Description of the Drawings

[0022] To more clearly illustrate the specific embodiments of the present application or the technical solutions in the prior art, the following will briefly introduce the drawings required for use in the description of the specific embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0023] Figure 1 is a schematic diagram of a test fixture used when testing a hard disk backplane to be tested by a server adapted to the hard disk backplane to be tested in the related art; Figure 2 is a schematic diagram of a test process when testing a hard disk backplane to be tested by a server adapted to the hard disk backplane to be tested in the related art; Figure 3 is a schematic diagram of the structure of a hard disk backplane test board according to an embodiment of the present application; Figure 4 is a schematic diagram of the structure of an example of a hard disk backplane test board according to an embodiment of the present application; Figure 5 is a schematic diagram of the process of a hard disk backplane test method according to an embodiment of the present application; Figure 6 is a schematic diagram of the process of a test method when testing multiple hard disk backplanes according to an embodiment of the present application; Figure 7 is a schematic diagram of the structure of an electronic device provided by an embodiment of the present application. Specific Embodiments

[0024] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present application.

[0025] As described above, in the related art, a server adapted to the hard disk backplane to be tested is used to test the hard disk backplane to be tested. After the hard disk backplane to be tested is tested, if another hard disk backplane to be tested is replaced and this backplane has not been adapted on the previous server motherboard, then it cannot be tested in this test environment, and a motherboard adapted to the new hard disk backplane needs to be replaced for testing. This results in various server motherboards in the factory being used as test fixtures, and different server motherboards cannot be reused, causing waste of fixtures. Figure 1As shown, the server motherboard A can be used to test the hard disk backplane A1, hard disk backplane A2... hard disk backplane An; the server motherboard B can be used to test the hard disk backplane B1, hard disk backplane B2... hard disk backplane Bn; the server motherboard C can be used to test the hard disk backplane C1, hard disk backplane C2... hard disk backplane Cn.

[0026] In addition, in the related art, when using a server adapted to the hard disk backplane to be tested to test the hard disk backplane to be tested, the hard disk backplane cannot be directly hot-plugged. As Figure 2 shown, when testing one hard disk backplane and then replacing it with another, it is necessary to shut down the OS, power off the server motherboard AC (Alternating Current), replace the new backplane, then power on the server motherboard AC, and boot into the OS for testing, resulting in a very long overall test process time and low test efficiency.

[0027] Based on this, in this embodiment, a test board for the hard disk backplane is provided, as Figure 3 shown, including a first transceiver interface on the server side, a test instruction simulation module, a second transceiver interface on the server side, and a controller.

[0028] Among them, the first transceiver interface on the server side is used to receive the control command sent by the server; the test instruction simulation module, connected to the first transceiver interface on the server side, is used to generate a first test instruction according to the control command; the second transceiver interface on the server side is used to receive the second test instruction sent by the server; the controller, connected to the test instruction simulation module and the second transceiver interface on the server side, is used to send the first test instruction to the transceiver interface on the hard disk backplane side, receive the first feedback information of the hard disk backplane, and send the first feedback information to the test instruction simulation module; or send the second test instruction to the transceiver interface on the hard disk backplane side, receive the second feedback information of the hard disk backplane, and send the second feedback information to the second transceiver interface on the server side; the test instruction simulation module is also used to receive the first feedback information sent by the controller and send the first feedback information to the server through the first transceiver interface on the server side.

[0029] Specifically, the second transceiver interface on the server side includes a first I2C interface and a first VPP interface; the transceiver interface on the hard disk backplane side includes a second I2C interface and a second VPP interface.

[0030] In the embodiment of the present application, whether the indicator light can be normally lit, whether the hard disk backplane temperature and hard disk temperature can be read, and whether the backplane FRU information can be read during the hard disk backplane test are all obtained through I2C and VPP using specific commands.

[0031] I2C is a synchronous serial communication protocol designed for short-distance communication, typically used between different integrated circuits on the same circuit board. The I2C bus requires only two signal lines: a data line (SDA) and a clock line (SCL), both of which are bidirectional.

[0032] VPP is used for hot pluggable PCIE management.

[0033] As Figure 4 shown, the USB interface on the left side of the test board is the first transceiver interface on the server side; the I2C interface and VPP interface on the left side of the test board are the second transceiver interfaces on the server side; the I2C interface and VPP interface on the right side of the test board are the transceiver interfaces on the hard disk backplane side. Figure 4 The controller chipset in

[0034] During the testing process of the hard disk backplane, due to inconsistent command rules and CPU platforms defined in different projects, there are compatibility issues between the server and the hard disk backplane, including two cases: the VPP and I2C of the server can directly communicate with the hard disk backplane, and the VPP and I2C of the server cannot directly communicate with the hard disk backplane.

[0035] When the VPP and I2C of the server cannot directly communicate with the hard disk backplane, the first transceiver interface on the server side in the test board receives the control command sent by the server; the test instruction simulation module generates the first test instruction according to the control command; the controller is used to send the first test instruction to the transceiver interface on the hard disk backplane side, receive the first feedback information from the hard disk backplane, and send the first feedback information to the test instruction simulation module; the test instruction simulation module is also used to send the first feedback information to the server through the first transceiver interface on the server side. That is to say, at this time, the server needs to transfer the control command to the test board through the USB interface, and the test instruction simulation module simulates the VPP instruction and I2C instruction according to the control command, and then uses the simulated I2C instruction and VPP instruction to access the hard disk backplane.

[0036] When the VPP and I2C of the server can directly communicate with the hard disk backplane, the second transceiver interface on the server side in the test board receives the second test instruction sent by the server, and the controller sends the second test instruction to the transceiver interface on the hard disk backplane side, receives the second feedback information from the hard disk backplane, and sends the second feedback information to the second transceiver interface on the server side. The controller plays a role in signal passthrough, and at this time, it is equivalent to the server directly communicating with the hard disk backplane.

[0037] It can be seen that through the test board card of the hard disk backplane provided by the embodiments of the present application, the test of the hard disk backplane can be realized in both cases where the VPP and I2C of the server cannot directly communicate with the hard disk backplane and where the VPP and I2C of the server can directly communicate with the hard disk backplane, so that the test board card can be applied to various types of servers. Further, when using the test board card to test the hard disk backplane, the server motherboard can be reused.

[0038] Furthermore, an ADM (Adaptive Diagnostic Module) is set in the controller.

[0039] Among them, the adaptive diagnostic module can analyze the first feedback information and / or the second feedback information to determine whether there are potential faults (such as signal integrity problems, power anomalies, connection failures, etc.) and obtain an analysis result. Further, a diagnostic report can be generated according to the analysis result and uploaded to the server. Thus, the test board card is no longer just a "repeater", but an "intelligent agent" with autonomous judgment ability, which can improve the fault location efficiency and reduce the need for manual intervention.

[0040] In addition, on the hard disk backplane to be tested, there are two types of hard disks, SATA and NVME. In the SATA hard disk mode, identification is achieved through a RAID card. In the NVME hard disk mode, its data transmission requires a PCIE signal. Based on this, in an optional embodiment, the test board card of the hard disk backplane further includes a server-side MCIO interface, a bandwidth expansion module, and a server-side Slimline interface.

[0041] Among them, the server-side MCIO interface is used to receive the first PCIE signal sent by the server. The bandwidth expansion module is connected to the server-side MCIO interface and is used to expand the bandwidth of the first PCIE signal to obtain a second PCIE signal and send the second PCIE signal to the hard disk-side MCIO interface connected to the hard disk backplane; the server-side Slimline interface is used to receive the sideband signal sent by the server; the controller is also connected to the server-side Slimline interface and is used to convert the sideband signal and distribute it to the hard disk-side Slimline interface connected to the hard disk backplane.

[0042] Among them, the sideband signal refers to the general term for other signals except for the PCIE link, CLK clock, etc. It usually includes some low-speed signals of the hard disk backplane to be tested, such as the presence signal, I2C, power-on feedback, address signal, ID, etc. There is only one set of sideband signals from the server, which is fixed. It needs to be adapted and communicated with the sideband signals in the extended MCIO interface in the hard disk backplane. There is a one-to-many situation and direct communication is not possible. The controller needs to specify the current sideband signal from the server according to the communication requirements and communicate with a specific MCIO interface first to ensure the normal communication of all MCIO interface sidebands.

[0043] As Figure 4 shown, the MCIO X8 interface on the left side of the test board is the server-side MCIO interface; the MCIO X8 interface on the right side of the test board is the hard disk-side MCIO interface; the Slimline interface on the left side of the test board is the server-side Slimline interface; the Slimline interface on the right side of the test board is the hard disk-side Slimline interface. The PEX89072 chipset is a bandwidth expansion module, which can expand the PCIE X8 signal from the server motherboard to PCIE X64 or higher bandwidth through the SW chip, and is used to provide PCIE signals for the standard PCIE interface on the test board and the hard disk backplane.

[0044] As Figure 4 shown, the signals of the server are output externally through the MCIO interface. The PCIE signals decomposed by cable A are connected to the MCIO X8 interface on the left side of the test board, and the sideband signals decomposed by cable A are connected to the Slimline interface on the left side of the test board. The purpose of decomposing through cable A is to adapt to the requirements of different projects for the test version. The output of each server motherboard MCIO interface may have differences in pin definitions. Therefore, the input source signals are separately divided into PCIE signals and sideband signals and connected to the MCIO X8 interface and Slimline interface of the test board respectively, which is convenient for flexible configuration and enhances the versatility of using the server platform. After the bandwidth expansion module expands the PCIE signal, it is also decomposed into MCIO + slimline interfaces according to the same design idea, and then connected to the hard disk backplane to be tested through "cable A", which also plays the role of adapting to different hard disk backplane tests.

[0045] In an alternative embodiment, the test board of the hard disk backplane further includes a server-side power supply interface and a power supply module.

[0046] Among them, the server-side power supply interface is used to receive electric energy; the power supply module, connected to the power supply interface, is used to convert the received electric energy in voltage and provide the voltage-converted electric energy to the hard disk-side power supply interface connected to the hard disk backplane.

[0047] As Figure 4 shown, the power supply interface on the left side of the test board is the server-side power supply interface. The 12V power module, 5V power module, and 3V power module are power supply modules. The server-side power supply interface is connected to the external power supply interface or can also be connected to the power supply interface of the server motherboard. The power supply module can convert the 12V provided by the external or the server motherboard into 5V and 3V3, ensuring the normal operation of the test board when testing the hard disk backplane; it can be personalized with power supply output according to the power supply requirements of different hard disk backplanes.

[0048] In addition, in an optional implementation, the server-side first transceiver interface is also used to receive the second hard disk hot plug and unplug instruction sent by the server; the test instruction simulation module is also used to send the second hard disk hot plug and unplug instruction to the controller; the controller is also used to generate a second power on and off instruction after obtaining the second hard disk hot plug and unplug instruction; the power supply management module is also used to control the power supply of the hard disk backplane to power off or on after receiving the second power on and off instruction.

[0049] As Figure 4 shown, the eFuse chipset is the power supply management module.

[0050] Thus, the power supply on and off operations of the hard disk backplane can be completed through the server and the power supply management module, realizing the interruption and connection of the PCIE signal of the hard disk backplane.

[0051] Furthermore, the test board of the hard disk backplane further includes a hot plug and unplug interface. The hot plug and unplug interface is connected to the controller and is used to receive the hard disk hot plug and unplug instruction; the controller is also used to generate a power on and off instruction after obtaining the hard disk hot plug and unplug instruction; the power supply management module is located between the power supply module and the hard disk-side power supply interface and is used to control the power supply of the hard disk backplane to power off or on after receiving the power on and off instruction.

[0052] As Figure 4 shown, the hot plug and unplug button on the left side of the test board is the hot plug and unplug interface. Through the hot plug and unplug button, the controller module can be notified to complete the power supply on and off operations of the hard disk backplane, realizing the interruption and connection of the PCIE signal of the hard disk backplane.

[0053] In an optional implementation, the test board of the hard disk backplane further includes a server-side Slimline interface. The server-side Slimline interface is also used to receive the clock signal sent by the server. Thus, a clock signal can be provided when using the test board to test the hard disk backplane.

[0054] Furthermore, the test board of the hard disk backplane further includes a clock module. The clock module is connected to the server-side Slimline interface and is used to convert the clock signal and distribute it to the hard disk-side Slimline interface.Figure 4 The CLK chipset in it is the clock module. The CLK chipset can convert and distribute the CLK signal from the MCIO X8 interface of the server motherboard according to different hard disk backplanes, so that the test board can be applicable to different hard disk backplanes.

[0055] In summary, in the hard disk backplane test board provided in this embodiment, the controller can implement the following functions: receiving I2C instructions or VPP instructions sent by the first transceiver interface on the server side (such as Figure 4 the USB interface on the left side of the test board in it) and the test instruction simulation module (such as Figure 4 the USB chipset on the left side of the test board in it), processing the instructions and sending them to the hard disk backplane, and receiving the first feedback information of the hard disk backplane, and feeding it back to the server motherboard through the first transceiver interface on the server side and the test instruction simulation module; it can also directly receive instructions from the server through the second transceiver interface on the server side (such as Figure 4 the I2C interface and VPP interface on the left side of the test board in it), pass them through to the hard disk backplane, and then pass the second feedback information of the hard disk backplane through the second transceiver interface on the server side to the motherboard; receiving hard disk hot plug and unplug instructions from the hot plug interface (such as Figure 4 the hot plug button on the left side of the test board in it) or the USB module, to achieve power-off or power-on of the hard disk backplane, and interruption and connection of the PCIE signal; receiving hard disk hot plug and unplug instructions from the first transceiver interface on the server side and the test instruction simulation module, to achieve power-off or power-on of the hard disk backplane, and interruption and connection of the PCIE signal; it can also convert and distribute the sideband signal from the MCIO interface on the server side (such as Figure 4 the MCIO X8 interface on the left side of the test board in it) according to different hard disk backplanes, and give it to the hard disk side MCIO interface of the hard disk backplane (such as Figure 4 the MCIO X8 interface on the right side of the test board in it). The first transceiver interface on the server side and the test instruction simulation module can implement the following functions: The server motherboard communicates with the controller module of the test board through the first transceiver interface on the server side (such as Figure 4 the USB interface on the left side of the test board in it) and the test instruction simulation module (such as Figure 4 the USB chipset on the left side of the test board in it), and then communicates with the hard disk backplane through the controller, to achieve functions such as triggering the hard disk backplane hot plug and unplug operation, achieving I2C communication with the hard disk backplane, and achieving VPP communication with the hard disk backplane.

[0056] Based on the above hard disk backplane test board, an embodiment of the present application provides a hard disk backplane test system. The hard disk backplane test system includes a server, a hard disk backplane, and the above hard disk backplane test board, where both the server and the hard disk backplane are connected to the hard disk backplane test board.

[0057] Specifically, the server is connected to the server-side interface of the test board. Among them, the server-side interface includes a server-side first transceiver interface, a server-side second transceiver interface, a server-side MCIO interface, a server-side Slimline interface, and a server-side power supply interface. The hard disk backplane is connected to the hard disk-side interface of the test board. Among them, the hard disk-side interface includes a hard disk backplane-side transceiver interface, a hard disk-side MCIO interface, a hard disk-side Slimline interface, and a hard disk-side power supply interface.

[0058] Based on the above hard disk backplane test board, an embodiment of the present application also provides a test method for a hard disk backplane, which specifically includes the following steps: After connecting the hard disk backplane test board, the server, and the current hard disk backplane, test the current hard disk backplane; after the current hard disk backplane test is completed, input a hard disk hot plug instruction on the test board.

[0059] Specifically, this embodiment provides an embodiment of a test method for a hard disk backplane. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in a different order than here.

[0060] In this embodiment, a test method for a hard disk backplane is provided, which can be used for the above test board. Figure 5 is a flowchart of the test method for the hard disk backplane according to the embodiment of the present application, as Figure 5 shown, this process includes the following steps: Step S501: Obtain a control command sent by the server, and generate a first test instruction according to the control command.

[0061] Step S502: Send the first test instruction to the hard disk backplane.

[0062] Step S503: Receive the first feedback information of the hard disk backplane, and send the first feedback information to the server.

[0063] Figure 5 The test method of the hard disk backplane can also be replaced with the following steps: Obtain a second test instruction sent by the server; send the second test instruction to the hard disk backplane; receive the second feedback information of the hard disk backplane, and send the second feedback information to the server.

[0064] In a further embodiment, the method for testing a hard disk backplane further includes the following steps: obtaining a first hard disk hot plug instruction sent; generating a first power on / off instruction according to the first hard disk hot plug instruction, and controlling the power supply of the hard disk backplane to power off or on according to the first power on / off instruction.

[0065] In another further embodiment, the method for testing a hard disk backplane further includes the following steps: obtaining a second hard disk hot plug instruction sent by a server; generating a second power on / off instruction according to the second hard disk hot plug instruction, and controlling the power supply of the hard disk backplane to power off or on according to the second power on / off instruction.

[0066] In actual testing, after the current hard disk backplane is tested and a hard disk hot plug instruction is input on the test board, the method for testing a hard disk backplane further includes the following steps: determining whether the next hard disk backplane is of the same type as the current hard disk backplane; when the next hard disk backplane is of the same type as the current hard disk backplane, after connecting the test board, the server and the next hard disk backplane, inputting a hard disk hot plug instruction on the test board; when the next hard disk backplane is not of the same type as the current hard disk backplane, replacing the test fixture to fix the next hard disk backplane, and after connecting the test board, the server and the next hard disk backplane, inputting a hard disk hot plug instruction on the test board.

[0067] As Figure 6 shown, when testing multiple hard disk backplanes, the following steps are included: (1) If the test device of the present application is used for the first time, first install the hard disk backplane to be tested, the supporting tooling and the corresponding test fixture module; (2) After the installation is completed, power on the server AC and boot into the OS; (3) Perform functional testing of the current hard disk backplane under the OS; (4) After the testing is completed, the operator manually triggers the hard disk backplane hot plug button, or sends a serial port command to the test card in the present application under the OS to trigger the power off of the hard disk backplane and the interruption of signals such as PCIE; (5) Remove the tested hard disk backplane, and determine whether to continue testing the same type of hard disk backplane or other different types of hard disk backplanes; (6) If it is the same type of hard disk backplane, install the hard disk backplane and the supporting tooling, and the operator manually triggers the hot plug button, or sends a serial port command under the OS to trigger the connection of the PCIE signal of the hard disk backplane and power on for functional testing; (7) If it is not the same type of hard disk backplane, first remove the original hard disk backplane fixture module, replace it with a new test fixture module for the hard disk backplane, install the hard disk backplane and the supporting tooling, and the operator manually triggers the hot plug button, or sends a serial port command under the OS to trigger the connection of the PCIE signal of the hard disk backplane and power on for functional testing; (8) Repeat the test steps in (3)-(7) above.

[0068] It can be seen that when using the above test board to test the hard disk backplane, the OS in the server motherboard always remains powered on, and there is no need to perform a power-on and power-off operation every time the hard disk backplane is replaced, saving test time and improving test efficiency. Moreover, when using the above test board to test the hard disk backplane, the server motherboard serves as a common module and can remain unchanged when replacing different hard disk backplanes. Only the modules related to the hard disk backplane need to be replaced, with high reusability of the test tooling, high reusability of the main body of the test fixture, and only the test fixture modules related to the hard disk backplane need to be replaced. When developing subsequent test fixtures, only the test fixture modules related to the hard disk backplane need to be developed, with low space cost for storing test fixtures and low cost for newly opened test fixtures.

[0069] In summary, the test board, test system, and test method for the hard disk backplane provided by the embodiments of the present application have the following beneficial effects: (1) No longer need various server motherboards, saving tooling costs; (2) Do not need to frequently power on and off the server motherboard to replace the board under test, greatly saving test time and improving test efficiency; (3) Improve the reusability of the main part of the FCT (Functional Circuit Test) test fixture, and only the test fixture modules related to the hard disk backplane need to be developed, reducing the design complexity of the test fixture; (4) Reduce the number of FCT test fixtures, reduce the cost of test fixtures, reduce the space occupied by FCT test fixtures, and reduce space costs; (5) Reduce the number of FCT test fixtures, and the number of test machines also decreases accordingly, reducing the cost of production line test machines.

[0070] The test board, test system, and test method for the hard disk backplane of the present application no longer need to use various server motherboards and tooling, reducing the cost of test tooling; the present application realizes the hot plugging of the hard disk backplane and supporting tooling, and realizes that there is no need for the server motherboard to be powered on and off AC and the server startup process when replacing the hard disk backplane, saving test time; through the reusability of the server motherboard and the main part of the FCT test fixture, only the FCT test fixture modules related to the hard disk backplane need to be developed, saving the cost of test fixtures; through the present application, the decoupling of the hard disk backplane and the server motherboard is realized, including power supply, I2C, VPP, etc., solving the problem that the server motherboard and the hard disk backplane need to be adapted before testing; the reusability of the FCT test fixture is improved, the space utilization rate is increased, and the storage cost and test machine cost are reduced.

[0071] Through the description of the above embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by means of software plus a necessary general hardware platform. Of course, it can also be implemented by hardware, but in many cases, the former is a better implementation method.

[0072] The embodiments of the present application further provide a test device for a hard disk backplane. For the description of the features in the corresponding embodiments of the test device for the hard disk backplane, reference can be made to Figure 5 the relevant descriptions of the corresponding embodiments of the method, which will not be elaborated here one by one.

[0073] The embodiments of the present application further provide an electronic device, such as Figure 7 shown, including a memory 10 and a processor 20. A computer program is stored in the memory 10, and the processor 20 is configured to run the computer program to execute the steps in any of the above embodiments of the test method for the hard disk backplane.

[0074] The embodiments of the present application further provide a computer-readable storage medium, in which a computer program is stored. The computer program is configured to execute the steps in any of the above embodiments of the test method for the hard disk backplane when running.

[0075] In an exemplary embodiment, the above computer-readable storage medium may include, but is not limited to: USB flash drives, read-only memories (ROM for short), random access memories (RAM for short), mobile hard disks, magnetic disks, or optical discs, etc., various media that can store computer programs.

[0076] The embodiments of the present application further provide a computer program product. The above computer program product includes a computer program, and when the computer program is executed by a processor, it implements the steps in any of the above embodiments of the test method for the hard disk backplane.

[0077] The embodiments of the present application further provide another computer program product, including a non-volatile computer-readable storage medium. The non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, it implements the steps in any of the above embodiments of the test method for the hard disk backplane.

[0078] Those skilled in the art may further realize that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be implemented by electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described according to functions in the above description. Whether these functions are executed in a hardware or software manner depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of this application.

[0079] The above has introduced in detail a test board, a test system, and a test method for a hard disk backplane provided by this application. Specific examples have been used herein to elaborate on the principle and implementation manner of this application. The description of the above embodiments is only used to help understand the method and its core idea of this application. It should be noted that for those of ordinary skill in the art in this technical field, without departing from the principle of this application, several improvements and modifications can still be made to this application, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A test board for a hard disk backplane, characterized in that including: a first transceiver interface on the server side, configured to receive a control command sent by the server; a test instruction simulation module, connected to the first transceiver interface on the server side, configured to generate a first test instruction according to the control command; a second transceiver interface on the server side, configured to receive a second test instruction sent by the server; a controller, connected to the test instruction simulation module and the second transceiver interface on the server side, configured to send the first test instruction to a transceiver interface on the hard disk backplane side, receive a first feedback message from the hard disk backplane, and send the first feedback message to the test instruction simulation module; or send the second test instruction to the transceiver interface on the hard disk backplane side, receive a second feedback message from the hard disk backplane, and send the second feedback message to the second transceiver interface on the server side; the test instruction simulation module is further configured to receive the first feedback message sent by the controller, and send the first feedback message to the server through the first transceiver interface on the server side.

2. The test board of the hard disk backplane according to claim 1, wherein The second transceiver interface on the server side includes a first internal integrated circuit interface and a first virtual pin interface; the transceiver interface on the hard disk backplane side includes a second internal integrated circuit interface and a second virtual pin interface.

3. The test board of the hard disk backplane according to claim 1, characterized in that further including: a multi-connector input / output interface on the server side, configured to receive a first Peripheral Component Interconnect Express (PCIe) signal sent by the server; a bandwidth expansion module, connected to the multi-connector input / output interface on the server side, configured to expand the bandwidth of the first PCIe signal to obtain a second PCIe signal, and send the second PCIe signal to a multi-connector input / output interface on the hard disk side connected to the hard disk backplane; a slim interface on the server side, configured to receive a sideband signal sent by the server; the controller is further connected to the slim interface on the server side, configured to convert the sideband signal and distribute it to a slim interface on the hard disk side connected to the hard disk backplane.

4. The test board of the hard disk backplane according to claim 1, characterized in that, further including: a power supply interface on the server side, configured to receive electrical energy; a power supply module, connected to the power supply interface, configured to convert the received electrical energy in voltage, and supply the voltage-converted electrical energy to a power supply interface on the hard disk side connected to the hard disk backplane.

5. The test board of the hard disk backplane according to claim 4, characterized in that further including: a hot-swap interface, connected to the controller, configured to receive a first hard disk hot-swap instruction; the controller is further configured to generate a first power-on / off instruction after obtaining the first hard disk hot-swap instruction; a power supply management module, located between the power supply module and the power supply interface on the hard disk side, configured to control the power supply of the hard disk backplane to power off or power on after receiving the first power-on / off instruction.

6. The test board of the hard disk backplane according to claim 5, wherein: the first transceiver interface on the server side is further configured to receive a second hard disk hot-swap instruction sent by the server; the test instruction simulation module is further configured to send the second hard disk hot-swap instruction to the controller; the controller is further configured to generate a second power-on / off instruction after obtaining the second hard disk hot-swap instruction; The power supply management module is further configured to control the power of the hard disk backplane to power off or on after receiving the second power-on / off command.

7. The test board of the hard disk backplane according to claim 3, characterized in that: The server-side slim interface is further configured to receive a clock signal sent by the server. The test board further includes: A clock module, connected to the server-side slim interface, for converting the clock signal and distributing it to the hard disk-side slim interface.

8. A hard disk backplane test system, characterized in that, Comprising: The hard disk backplane test board according to any one of claims 1 to 7; A server, connected to the test board; A hard disk backplane, connected to the test board.

9. A test method for a hard disk backplane, applied to a test board, characterized in that, Comprising: Obtain a control command sent by the server, and generate a first test instruction according to the control command; Send the first test instruction to the hard disk backplane; Receive the first feedback information of the hard disk backplane, and send the first feedback information to the server; Or; Obtain a second test instruction sent by the server; Send the second test instruction to the hard disk backplane; Receive the second feedback information of the hard disk backplane, and send the second feedback information to the server.

10. The method according to claim 9, characterized in that, Further comprising: Obtain the first hard disk hot plug instruction sent; Generate a first power-on / off command according to the first hard disk hot plug instruction, and control the power of the hard disk backplane to power off or on according to the first power-on / off command; Or; Obtain the second hard disk hot plug instruction sent by the server; Generate a second power-on / off command according to the second hard disk hot plug instruction, and control the power of the hard disk backplane to power off or on according to the second power-on / off command.

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