High-Q-value on-chip integrated interleave structure coupling inductor
By designing high Q-value Interleave structure coupled inductors on the FR-4 substrate, the problem that traditional coupled inductors are difficult to meet the high coupling coefficient and miniaturization simultaneously in high-frequency circuits is solved, and high-quality inductors are realized, which are widely used in high-frequency filters, power management systems and wireless communication equipment.
Patent Information
- Application Number
- CN202510373819.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-27
- Publication Date
- 2025-07-11
AI Technical Summary
Traditional coupled inductors are difficult to meet the requirements of high coupling coefficient, miniaturization and low cost in high frequency circuits, and design complexity limits their application in high-performance and miniaturization electronic devices.
On-chip integration technology is used to design a high Q-value Interleave structure coupled inductor on the FR-4 substrate. Through symmetric layout and optimized design, high coupling of the first and second inductors is achieved, and prepared using a micro-machining process to ensure symmetry and high quality factor of conductor layout.
It realizes inductors with high coupling coefficient and high quality factor, significantly improves signal transmission quality and power conversion efficiency, and is suitable for high-frequency filters, power management systems and wireless communication equipment.
Smart Images
Figure CN120299857A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of electronic components, particularly to the design and application of inductors in high-frequency circuits and power management systems. Specifically, the present invention relates to a coupled inductor with a high coupling coefficient and high quality factor (Q value), and through on-chip integration technology and optimized design, its performance in high-frequency and high-efficiency applications is improved. Background Art
[0002] In modern electronic devices, coupled inductors, as key components, are widely used in various circuits to perform important functions such as signal transmission, filtering, and energy conversion. Traditional coupled inductors face many challenges in design and application, including low coupling coefficient, large volume, high manufacturing cost, etc., which limit their wide application in high-performance and miniaturized electronic devices.
[0003] Coupled inductors have significant advantages in the fields of power management and signal processing. They effectively cancel current ripples through magnetic coupling, thereby improving power conversion efficiency, reducing the size of magnetic components, and obtaining a fast transient response. In a multiphase power topology, the application of coupled inductors can significantly reduce current ripples, reduce conduction losses and switching losses of circuit components, and improve the efficiency and reliability of the overall system.
[0004] The design of traditional coupled inductors often adopts a combination of discrete components. Although this design method is simple, it has significant performance limitations. Optimizing the design of coupled inductors requires comprehensive consideration of the arrangement of coil structures. For example, through negative coupling design, the inductance can be increased under high-current conditions to avoid magnetic saturation, thus showing higher reliability and stability in high-current applications.
[0005] The development of on-chip integration technology has brought new possibilities to the design and application of coupled inductors. Through on-chip integration technology, complex inductor structures can be realized in a small size, significantly improving the coupling coefficient and inductor performance. However, despite various improvement schemes, in practical applications, traditional coupled inductors are still difficult to meet the requirements of high coupling coefficient, miniaturization, and low cost simultaneously.
[0006] Therefore, developing a coupled inductor with a high Q value, capable of efficient integration, and suitable for various application scenarios has become an important research direction in the current technical field. The present invention proposes a high-Q on-chip integrated Interleave structure coupled inductor, and through optimized design, the performance and application prospects of the coupled inductor are significantly improved. Summary of the Invention
[0007] In view of the above-mentioned disadvantages of the prior art, the purpose of the present invention is to provide a high-Q printed circuit board integrated coupled inductor.
[0008] To achieve the above-mentioned invention object, the technical solution of the present invention is as follows:
[0009] A high-Q on-chip integrated interleave structure coupled inductor is formed on an FR-4 substrate, and includes: a square ground loop 122 is provided at the center of the upper surface B1 of the substrate 109. An XYZ coordinate system is established with the geometric center of the square ground loop 122 as the origin. The plane where the square ground loop 122 is located is the XY plane, and the X direction is parallel to one side of the square ground loop.
[0010] A first inductor 101 and a second inductor 102 are provided inside the square ground loop 122. The first inductor 101 and the second inductor 102 have the same shape and size, the same number of turns, and are mutually coupled; the first inductor 101 and the second inductor 102 are centrosymmetric about the geometric center of the ground loop.
[0011] The first inductor 101 includes a first coil 103, a first conductor via 118, and a second conductor via 119.
[0012] Among them, the first coil 103 includes a first coil conductor 105, a first wire 107, and a first connection wire 116.
[0013] The second inductor 102 includes a second coil 104, a third conductor via 120, and a fourth conductor via 121.
[0014] Among them, the second coil 104 includes a second coil conductor 106, a second wire 108, and a second connection wire 117.
[0015] The first coil conductor 105, the first wire 107, the second coil conductor 106, the second wire 108, and the ground loop 122 are located on the upper surface B1.
[0016] On the upper surface B1: The first coil conductor 105 is a square spiral coil conductor located on the upper surface B1 of the substrate. The first conductor through-hole 118 is located at a position -2w away from the origin in the Y direction and -0.5g away from the origin in the X direction, where w is the line width and g is the line pitch. The line width and line pitch of each coil conductor are constant. The third conductor through-hole 120 is located at a position 2w away from the origin in the Y direction and 0.5g away from the origin in the X direction. The size increment of adjacent turns of the first coil conductor 105 is 2g + w. The first coil conductor 105 is rotated 180 degrees about the origin to obtain the second coil conductor 106. The first conductor through-hole 118 is rotated 180 degrees about the origin to obtain the third conductor through-hole 120. The first wire 107 is on the -Y axis extension line of the third conductor through-hole 120, and the distance from the origin in the Y direction is: 2w + 2 turns * (w + g). The termination end of the first wire 107 is flush with the starting end of the first coil conductor 105. One end of the first wire 107 that is not connected to the second conductor through-hole 119 is the termination end, and one end of the second coil conductor 106 that is not connected to the third conductor through-hole 120 is the starting end. The first wire 107 is rotated 180 degrees about the origin to obtain the second wire 108 respectively;
[0017] On the lower surface B2 of the substrate 109, there are a first connection line 116 and a second connection line 117. The starting point of the first connection line 116 is the first conductor through-hole 118. The first conductor through-hole 118 extends along the X direction until it intersects with the -Y direction extension line of the third conductor through-hole 120, and then extends in the -Y direction to the second conductor through-hole 119. The second conductor through-hole 119 is rotated 180 degrees about the origin to obtain the fourth conductor through-hole 121;
[0018] The first connection line 116 is rotated 180 degrees about the origin to obtain the second connection line 117;
[0019] The first inductor is connected to the signal terminal through the first coil starting end and termination end connection line, and the first coil starting end and termination end connection line is arranged on the upper surface of the substrate;
[0020] The second inductor is connected to the signal terminal through the second coil starting end and termination end connection line, and the second coil starting end and termination end connection line is arranged on the upper surface of the substrate.
[0021] As a preferred mode, the first inductor includes a first coil with at least 1.5 turns of windings, and the number of turns is 1.5 + n, where n is a positive integer.
[0022] As a preferred mode, the second inductor includes a second coil with at least 1.5 turns of windings, and the number of turns is 1.5 1.5 + n, where n is a positive integer.
[0023] As a preferred embodiment, the first inductor is connected to the signal terminal 101a of the first inductor 101 through the connection line between the starting end and the terminating end of the first coil, and the second inductor is connected to the signal terminal 102a of the second inductor 102 through the connection line between the starting end and the terminating end of the second coil;
[0024] The first port 110, the second port 111, and the third port 112 are the grounding terminals of the first inductor 101;
[0025] The fourth port 113, the fifth port 114, and the sixth port 115 are the grounding terminals of the second inductor 102.
[0026] As a preferred embodiment, the first coil conductor, the second coil conductor, the first connection line, and the second connection line are each a flat wire.
[0027] As a preferred embodiment, the first inductor and the second inductor have the same thickness.
[0028] As a preferred embodiment, the first conductor via 118, the second conductor via 119, the third conductor via 120, and the fourth conductor via 121 have the same aperture.
[0029] As a preferred embodiment, the Q value is greater than 50.
[0030] The beneficial effects of the present invention are as follows: The present invention provides a circuit board integrated coupled inductor, which is formed on an FR-4 substrate and prepared by a microfabrication process, with a simple design; the first coil and the second coil are mutually coupled, and the coupling coefficient is about 0.63; the single-phase inductance value is about 10.3 nH, and the peak quality factor can reach 81.5, having a high quality factor; the whole is a centrosymmetric figure with the geometric center of the substrate as the center of symmetry.
[0031] The present invention provides a high-quality factor (Q value) circuit board integrated Interleave structure coupled inductor. Through a simple design and a microfabrication process, an inductor with a high coupling coefficient and a high quality factor is realized. The inductor can significantly improve the signal transmission quality and the power conversion efficiency through a symmetric layout and an optimized design, and is widely applied to fields such as high-frequency filters, power management systems, and wireless communication devices. BRIEF DESCRIPTION OF THE DRAWINGS
[0032] Figure 1 It is a perspective view of the Interleave structure coupled inductor according to the embodiment of the present invention.
[0033] Figure 2 It is a top view of the upper surface of the Interleave structure coupled inductor according to the embodiment of the present invention.
[0034] Figure 3The top view of the lower surface of the Interleave structure coupled inductor according to an embodiment of the present invention.
[0035] Figure 4 The schematic diagram of the winding structure of the Interleave structure coupled inductor according to an embodiment of the present invention.
[0036] Figure 5 The simulation diagram of the inductance value and quality factor in the Interleave structure coupled inductor of the embodiment.
[0037] Figure 6 The simulation diagram of the coupling coefficient in the Interleave structure coupled inductor of the embodiment.
[0038] Explanation of reference numerals:
[0039] 100 is the circuit board integrated Interleave structure coupled inductor;
[0040] 101 - the first inductor; 101a is the signal terminal of the first inductor; 102 - the second inductor; 102a is the signal terminal of the second inductor; 103 - the first coil; 104 - the second coil; 105 - the first coil conductor; 106 - the second coil conductor; 107 - the first wire; 108 - the second wire; 109 is the substrate; 110 - the first port; 111 - the second port; 112 - the third port; 113 - the fourth port; 114 - the fifth port; 115 - the sixth port; 116 - the first connection line; 117 - the second connection line; 118 - the first conductor via hole; 119 - the second conductor via hole; 120 - the third conductor via hole; 121 - the fourth conductor via hole; 122 is the square ground loop;
[0041] B1 - the upper surface; B2 - the lower surface. Detailed implementation manners
[0042] The following illustrates the implementation manners of the present invention through specific specific examples. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation manners. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
[0043] As Figure 1 shown, this embodiment provides a circuit board integrated coupled inductor, which is formed on an FR-4 substrate and includes: a square ground loop 122 is provided at the center of the upper surface B1 of the substrate 109. An XYZ coordinate system is established with the geometric center of the square ground loop 122 as the origin. The plane where the square ground loop 122 is located is the XY plane, and the X direction is parallel to one side of the square ground loop;
[0044] The first inductor 101 and the second inductor 102 are arranged inside the square ground loop 122. The first inductor 101 and the second inductor 102 have the same shape and size, the same number of turns, and are mutually coupled; the first inductor 101 and the second inductor 102 are centrosymmetric about the geometric center of the ground loop;
[0045] The first inductor 101 includes a first coil 103, a first conductor through-hole 118, and a second conductor through-hole 119.
[0046] Among them, the first coil 103 includes a first coil conductor 105, a first wire 107, and a first connection wire 116.
[0047] The second inductor 102 includes a second coil 104, a third conductor through-hole 120, and a fourth conductor through-hole 121.
[0048] Among them, the second coil 104 includes a second coil conductor 106, a second wire 108, and a second connection wire 117.
[0049] The first coil conductor 105, the first wire 107, the second coil conductor 106, the second wire 108, and the ground loop 122 are located on the upper surface B1;
[0050] In the upper surface B1: The first coil conductor 105 is a square spiral coil conductor located on the upper surface B1 of the substrate. The first conductor through-hole 118 is located at a position -2w in the Y direction and -0.5g in the X direction from the origin, where w is the line width and g is the line pitch. The line width and line pitch of each coil conductor are constant. The third conductor through-hole 120 is located at a position 2w in the Y direction and 0.5g in the X direction from the origin. The size increase of each adjacent turn of the first coil conductor 105 is 2g + w. The first coil conductor 105 is rotated 180 degrees about the origin to obtain the second coil conductor 106. The first conductor through-hole 118 is rotated 180 degrees about the origin to obtain the third conductor through-hole 120. The first wire 107 is on the -Y-axis extension line of the third conductor through-hole 120 and the distance from the origin in the Y direction is: 2w + 2 * number of turns * (w + g). The termination end of the first wire 107 is flush with the starting end of the first coil conductor 105; One end of the first wire 107 that is not connected to the second conductor through-hole 119 is the termination end, and one end of the second coil conductor 106 that is not connected to the third conductor through-hole 120 is the starting end. The first wire 107 is rotated 180 degrees about the origin to obtain the second wire 108;
[0051] On the lower surface B2 of the substrate 109, a first connection line 116 and a second connection line 117 are provided; the starting point of the first connection line 116 is the first conductor via 118, and the first conductor via 118 extends in the X direction until it intersects with the extension line of the third conductor via 120 in the -Y direction, and then extends in the -Y direction to the second conductor via 119; the fourth conductor via 121 is obtained by rotating the second conductor via 119 by 180 degrees about the origin;
[0052] The first connection line 116 is rotated 180 degrees about the origin to obtain the second connection line 117;
[0053] The first inductor is connected to the signal terminal through the connection line between the starting end and the terminating end of the first coil, and the connection line between the starting end and the terminating end of the first coil is arranged on the upper surface of the substrate;
[0054] The second inductor is connected to the signal terminal through the connection line between the starting end and the terminating end of the second coil, and the connection line between the starting end and the terminating end of the second coil is arranged on the upper surface of the substrate.
[0055] Preferably, the first inductor includes a first coil with at least 1.5 turns of windings, and the number of turns is 1.5 + n, where n is a positive integer.
[0056] Preferably, the second inductor includes a second coil with at least 1.5 turns of windings, and the number of turns is 1.5 + n, where n is a positive integer.
[0057] Preferably, the first inductor is connected to the signal terminal 101a of the first inductor 101 through the connection line between the starting end and the terminating end of the first coil, and the second inductor is connected to the signal terminal 102a of the second inductor 102 through the connection line between the starting end and the terminating end of the second coil;
[0058] The first port 110, the second port 111, and the third port 112 are the grounding terminals of the first inductor 101;
[0059] The fourth port 113, the fifth port 114, and the sixth port 115 are the grounding terminals of the second inductor 102.
[0060] Preferably, the first coil conductor, the second coil conductor, the first connection line, and the second connection line are each a flat wire.
[0061] Preferably, the first inductor and the second inductor have the same thickness.
[0062] Preferably, the first conductor via 118, the second conductor via 119, the third conductor via 120, and the fourth conductor via 121 have the same aperture.
[0063] Preferably, the Q value is greater than 50.
[0064] Detailed Steps for Fabricating a High Quality Factor (Q - value) Circuit Board Integrated with an Interleave Structure Coupled Inductor
[0065] Use a substrate of FR - 4 material, which has good electrical insulation, mechanical strength, and heat resistance, and is suitable for high - frequency circuit applications. Ensure that the thickness and size of the substrate meet the design requirements;
[0066] Select high - purity copper as the conductive material. Copper has excellent electrical conductivity and good workability, making it an ideal material for inductor coils and connecting conductors;
[0067] Use CAD (Computer - Aided Design) software to draw the layout of the circuit board. The design includes the spiral structures of the first coil 103 and the second coil 104, as well as the first connecting line 116 and the second connecting line 117 on the lower surface B2 of the substrate. Ensure that the layout of all conductors is centrosymmetric to maximize the magnetic coupling effect;
[0068] Input the designed coil conductor and connecting line patterns into the photolithography mask, preparing for subsequent conductor deposition and processing;
[0069] Thoroughly clean the FR - 4 substrate with deionized water and a cleaner to remove dust, oil, and impurities on the surface. After drying, the substrate surface must be smooth and free of impurities to ensure the quality of subsequent conductor deposition;
[0070] Uniformly coat a layer of photoresist on the substrate surface. The coating thickness should be uniform to avoid uneven thickness affecting pattern transfer;
[0071] Transfer the designed conductor pattern onto the photoresist layer through a mask plate, perform exposure treatment using ultraviolet light, and then develop to remove the photoresist in the unexposed area, forming an accurate conductor pattern;
[0072] On the developed substrate, deposit a copper layer through electroplating. During electroplating, control the current density and electroplating time to ensure the thickness and uniformity of the copper layer, forming the spiral structures of the first coil 103 and the second coil 104, as well as the connecting lines on the lower surface of the substrate;
[0073] Use an acidic etching solution to remove the excess copper layer, leaving only the designed conductor pattern. Control the time and temperature during etching to prevent over - etching or incomplete etching;
[0074] Drill holes and electroplate on the upper surface B1 of the substrate to form the first conductor via 118, the second conductor via 119, the third conductor via 120, and the fourth conductor via 121, connecting the spiral coils 103, 104 on the upper surface B1 of the substrate and the connecting lines 107, 108 on the lower surface of the substrate;
[0075] The ground loop pattern is arranged on the substrate, and the ground loop 122 is formed by an electroplating process.
[0076] Figure 1 A perspective view of an Interleave structure coupled inductor according to an embodiment of the present invention is shown.
[0077] As Figure 2 shown, a top view of a circuit board integrated Interleave structure coupled inductor provided by the present invention; the circuit board integrated coupled inductor is prepared on an FR-4 substrate through a microfabrication process. The winding is made of copper material, with a thickness th of 17.5 μm to 70 μm, a width w of 100 μm to 300 μm, and a coil gap g of 100 to 300 μm. At the same number of turns, adjusting the coil width can adjust the length of the magnetic path. The smaller the width, the smaller the magnetic path length and the higher the coupling coefficient, but the saturation current of the inductor will decrease. A thicker copper wire thickness can make the inductor have a lower DC resistance.
[0078] For the circuit board integrated Interleave structure coupled inductor provided by the embodiment, the winding thickness th is 50 μm, the width w is 150 μm, and the coil gap g is 250 μm. The inductor has a relatively low DC resistance, about 6 Ω, which enables the inductor to still have a relatively low DC loss under a large DC bias.
[0079] Figure 3 A schematic diagram of the winding structure of the Interleave structure coupled inductor according to an embodiment of the present invention.
[0080] Simulation diagrams of the inductance value, quality factor, and coupling coefficient of the circuit board integrated Interleave structure coupled inductor provided by the embodiment are as Figure 4 and Figure 5 shown; due to the two-phase symmetry and the same inductance value, only the simulation results related to the primary coil Lp are given, and the simulation software used is HFSS15.0. Figure 4 Shown are the curves of the Lp inductance value and quality factor changing with frequency. The single-phase inductance value is about 10.3 nH, and the peak quality factor can reach 81.5. Figure 5 is the coupling coefficient between the primary coil Lp and the secondary coil Ls. It can be known from Figure 5 that K is about 0.63, and a relatively high coupling coefficient is achieved between the two phases.
[0081] The above embodiments only illustratively explain the principles and effects of the present invention, rather than limiting the present invention. Any person familiar with this technology can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes completed by those with ordinary knowledge in the technical field without departing from the spirit and technical ideas disclosed by the present invention should still be covered by the claims of the present invention.
Claims
1. A high-Q on-chip integrated interleave structure coupled inductor, which is formed on an FR-4 substrate, and is characterized in that Including: A square ground loop (122) is provided at the center of the upper surface B1 of the substrate (109). An XYZ coordinate system is established with the geometric center of the square ground loop (122) as the origin. The plane where the square ground loop (122) is located is the XY plane, and the X direction is parallel to one side of the square ground loop; A first inductor (101) and a second inductor (102) are provided inside the square ground loop (122). The first inductor (101) and the second inductor (102) have the same shape and size and the same number of turns, and are mutually coupled; the first inductor (101) and the second inductor (102) are centrosymmetric about the geometric center of the ground loop; The first inductor (101) includes a first coil (103), a first conductor via hole (118) and a second conductor via hole (119), wherein, the first coil (103) includes a first coil conductor (105), a first wire (107) and a first connection wire (116), The second inductor (102) includes a second coil (104), a third conductor via hole (120) and a fourth conductor via hole (121), wherein, the second coil (104) includes a second coil conductor (106), a second wire (108) and a second connection wire (117), The first coil conductor (105), the first wire (107), the second coil conductor (106), the second wire (108), and the ground loop (122) are located on the upper surface B1; In the upper surface B1: The first coil conductor (105) is a square spiral coil conductor located on the upper surface B1 of the substrate. The first conductor via hole (118) is located at a position -2w in the Y direction and -0.5g in the X direction from the origin, where w is the line width and g is the line pitch. The line width and line pitch of each coil conductor are constant. The third conductor via hole (120) is located at a position 2w in the Y direction and 0.5g in the X direction from the origin. The size increment of each adjacent turn of the first coil conductor (105) is 2g + w. The first coil conductor (105) is rotated 180 degrees about the origin to obtain the second coil conductor (106). The first conductor via hole (118) is rotated 180 degrees about the origin to obtain the third conductor via hole (120). The first wire (107) is on the -Y axis extension line of the third conductor via hole (120) and the distance from the origin in the Y direction is: 2w + 2 turns * (w + g). The termination end of the first wire (107) is flush with the starting end of the first coil conductor (105); One end of the first wire (107) that is not connected to the second conductor via hole (119) is the termination end, and one end of the second coil conductor (106) that is not connected to the third conductor via hole (120) is the starting end. The first wire (107) is rotated 180 degrees about the origin to obtain the second wire (108) respectively; On the lower surface B2 of the substrate (109), a first connection line (116) and a second connection line (117) are provided; the starting point of the first connection line (116) is a first conductor via hole (118), and the first conductor via hole (118) extends in the X direction until it intersects with the extension line of the third conductor via hole (120) in the -Y direction, and then extends in the -Y direction to the second conductor via hole (119); the second conductor via hole (119) is rotated 180 degrees about the origin to obtain a fourth conductor via hole (121); The first connection line (116) is rotated 180 degrees about the origin to obtain the second connection line (117); The first inductor is connected to the signal terminal through the connection line between the starting end and the terminating end of the first coil, and the connection line between the starting end and the terminating end of the first coil is arranged on the upper surface of the substrate; The second inductor is connected to the signal terminal through the connection line between the starting end and the terminating end of the second coil, and the connection line between the starting end and the terminating end of the second coil is arranged on the upper surface of the substrate.
2. The high-Q on-chip integrated interleave structure coupled inductor according to claim 1, characterized in that: The first inductor includes a first coil with at least 1.5 turns of windings, and the number of turns is 1.5 + n, where n is a positive integer.
3. The high-Q on-chip integrated interleave structure coupled inductor according to claim 1, wherein: The second inductor includes a second coil with at least 1.5 turns of windings, and the number of turns is 1.5 + n, where n is a positive integer.
4. The high-Q on-chip integrated interleave structure coupled inductor according to claim 1, wherein: The first inductor is connected to the signal terminal (101a) of the first inductor (101) through the connection line between the starting end and the terminating end of the first coil, and the second inductor is connected to the signal terminal (102a) of the second inductor (102) through the connection line between the starting end and the terminating end of the second coil; The first port (110), the second port (111) and the third port (112) are the grounding terminals of the first inductor (101); The fourth port (113), the fifth port (114) and the sixth port (115) are the grounding terminals of the second inductor (102).
5. The high-Q on-chip integrated interleave structure coupled inductor according to claim 1, wherein: The first coil conductor, the second coil conductor, the first connection line and the second connection line are each a flat wire.
6. The high-Q on-chip integrated interleave structure coupled inductor according to claim 1, characterized in that: The first inductor and the second inductor have the same thickness.
7. The high-Q on-chip integrated interleave structure coupled inductor according to claim 1, characterized in that: The first conductor via hole (118), the second conductor via hole (119), the third conductor via hole (120) and the fourth conductor via hole (121) have the same aperture.
8. The high-Q on-chip integrated interleave structure coupled inductor according to claim 1, characterized in that: The Q value is greater than 50.