Frequency calibration method and device of phase-locked loop, storage medium and electronic equipment

Abstract

The embodiment of the invention discloses a frequency calibration method and device of a phase-locked loop, a storage medium and electronic equipment, and relates to the field of signal processing. The method comprises the following steps: after detecting that a phase-locked loop is started, periodically monitoring a current voltage value Vtune of a voltage-controlled oscillator; if the Vtune is greater than the Vtunemax, adding a preset step value k to a current tuning sub-band serial number n set by the phase-locked loop, and controlling a voltage-controlled oscillator by using a tuning sub-band corresponding to the serial number n + k; if Vtune is less than Vtunemin, subtracting a preset step value k from a current tuning sub-band serial number n set by the phase-locked loop, and controlling the voltage-controlled oscillator by using the tuning sub-band corresponding to the n-k serial number; if Vtunemax is smaller than or equal to Vtune and smaller than or equal to Vtunemin, the current tuning sub-band sequence number set by the phase-locked loop is kept unchanged, the tuning sub-band sequence number is dynamically adjusted, the influence of external factors such as temperature change and external reference signal frequency jitter on the stability and performance of the phase-locked loop system is effectively dealt with, the lock losing problem caused by control voltage drift is avoided, and the stability and performance of the system are ensured.

Description

Technical Field

[0001] The present application relates to the field of signal processing, and in particular to a frequency calibration method, device, storage medium and electronic equipment for a phase-locked loop. Background Art

[0002] Phase-Locked Loop (PLL) is an important frequency synthesis and phase synchronization circuit, which is widely used in various electronic devices. PLL adjusts the oscillation frequency of its internal voltage-controlled oscillator (VCO) to keep a certain phase relationship with the external reference frequency (fref), thereby achieving frequency locking and synchronization.

[0003] However, in practical applications, the PLL system faces interference and influence from a variety of external factors. Among them, temperature change is a factor that cannot be ignored. As the ambient temperature changes, the circuit component parameters inside the VCO will change, causing its oscillation frequency to drift. This drift will destroy the originally stable frequency locking state of the PLL and affect the performance of the system.

[0004] In addition, the jitter of the external reference signal frequency is also an important factor affecting the stability of the PLL. Due to noise, interference and instability of the source during signal transmission, the reference signal frequency may have a certain jitter. This jitter will be transmitted to the PLL system, causing the VCO oscillation frequency to fluctuate, thereby affecting the locking accuracy and stability of the PLL.

[0005] When the PLL remains locked, the VCO control voltage (Vtune) is the key parameter for adjusting its oscillation frequency. However, due to the influence of the external factors mentioned above, Vtune will also drift. When Vtune drifts close to 0 or the power supply voltage (VDD), the VCO may not work properly, causing the PLL to lose lock. Loss of lock not only affects the system's frequency synthesis and phase synchronization functions, but may also have a serious negative impact on the overall performance of the system.

[0006] Therefore, how to effectively deal with the impact of external factors such as temperature changes and fref jitter on the PLL system, ensure that the VCO works stably in the locked state, and avoid the loss of lock caused by Vtune drift has become a technical problem that technical personnel in this field need to solve urgently. Summary of the invention

[0007] The embodiments of the present application provide a frequency calibration method, device, storage medium and electronic device for a phase-locked loop, which can solve the problem of low accuracy of long-term prediction results of offline training models in the prior art. The technical solution is as follows:

[0008] In a first aspect, an embodiment of the present application provides a frequency calibration method for a phase-locked loop. The method includes:

[0009] After detecting the start of the phase-locked loop, determining a corresponding upper limit voltage value Vtunemax and a lower limit voltage value Vtunemin according to the target output frequency of the phase-locked loop;

[0010] Periodically monitoring the current voltage value Vtune of the voltage-controlled oscillator;

[0011] If Vtune > Vtunemax, increasing the current tuning sub-band serial number n set by the phase-locked loop by a preset step value k, and controlling the voltage-controlled oscillator by using the tuning sub-band corresponding to the serial number n + k;

[0012] If Vtune < Vtunemin, subtracting the preset step value k from the current tuning sub-band serial number n set by the phase-locked loop, and controlling the voltage-controlled oscillator by using the tuning sub-band corresponding to the serial number n - k;

[0013] If Vtunemax ≤ Vtune ≤ Vtunemin, keeping the current tuning sub-band serial number set by the phase-locked loop unchanged.

[0014] In a second aspect, an embodiment of the present application provides a frequency calibration device for a phase-locked loop. The device includes:

[0015] A determination unit, configured to determine a corresponding upper limit voltage value Vtunemax and a lower limit voltage value Vtunemin according to the target output frequency of the phase-locked loop after detecting the start of the phase-locked loop;

[0016] A monitoring unit, configured to periodically monitor the current voltage value Vtune of the voltage-controlled oscillator;

[0017] An increasing unit, configured to, if Vtune > Vtunemax, increase the current tuning sub-band serial number n set by the phase-locked loop by a preset step value k, and control the voltage-controlled oscillator by using the tuning sub-band corresponding to the serial number n + k;

[0018] A decreasing unit, configured to, if Vtune < Vtunemin, subtract the preset step value k from the current tuning sub-band serial number n set by the phase-locked loop, and control the voltage-controlled oscillator by using the tuning sub-band corresponding to the serial number n - k;

[0019] A keeping unit, configured to, if Vtunemax ≤ Vtune ≤ Vtunemin, keep the current tuning sub-band serial number set by the phase-locked loop unchanged.

[0020] In a third aspect, an embodiment of the present application provides a computer storage medium. The computer storage medium stores multiple instructions, and the instructions are suitable for being loaded and executed by a processor to perform the above method steps.

[0021] In a fourth aspect, an embodiment of the present application provides a frequency calibration device, which may include: a processor and a memory; wherein, the memory stores a computer program, and the computer program is adapted to be loaded and executed by the processor to perform the above method steps.

[0022] In a fifth aspect, an embodiment of the present application provides an electronic device, including the above frequency calibration device and a phase-locked loop.

[0023] The beneficial effects brought by the technical solutions provided by some embodiments of the present application at least include:

[0024] By periodically monitoring the control voltage (Vtune) of the voltage-controlled oscillator (VCO) and dynamically adjusting the tuning sub-band number according to the preset upper and lower limit voltage values (Vtunemax and Vtunemin). When the temperature changes and causes the VCO oscillation frequency to drift, Vtune will change accordingly. If Vtune exceeds the normal range, the system adjusts the tuning sub-band number to bring the operating frequency of the VCO back to the target range, thereby maintaining the locked state of the PLL.

[0025] The jitter of the external reference signal frequency is transmitted to the PLL system, causing fluctuations in the VCO oscillation frequency. The technical solution effectively compensates for the influence of this jitter on the PLL system by real-time monitoring of Vtune and adjusting the tuning sub-band number according to its value. By dynamically adjusting the tuning sub-band, the system can keep Vtune within the normal range, ensuring the stability and locking accuracy of the PLL.

[0026] When the PLL is in the locked state, Vtune is a key parameter for adjusting the VCO oscillation frequency. However, due to the influence of external factors, Vtune may drift. When Vtune drifts close to 0 or the power supply voltage (VDD), the VCO may not work properly, resulting in the PLL losing lock. The technical solution avoids the unlocking problem caused by Vtune drift and ensures the stability and performance of the PLL system by setting Vtunemax and Vtunemin and periodically monitoring Vtune to timely adjust the tuning sub-band number. Description of the Drawings

[0027] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0028] Figure 1 It is a schematic structural diagram of the electronic device provided by the embodiment of the present application;

[0029] Figure 2 is a schematic flow chart of a frequency calibration method for a phase - locked loop provided by an embodiment of the present application;

[0030] Figure 3 is a schematic diagram of the frequency curve of a VCO provided by an embodiment of the present application;

[0031] Figure 4 is a schematic structural diagram of a frequency calibration device for a phase - locked loop provided by the present application;

[0032] Figure 5 is another schematic structural diagram of a frequency calibration device provided by the present application. Detailed implementation manners

[0033] To make the objectives, technical solutions and advantages of the present application clearer, the following will further describe the embodiments of the present application in detail with reference to the accompanying drawings.

[0034] As Figure 1 shown, an electronic device may include: a phase - locked loop and a frequency calibration device.

[0035] The phase - locked loop includes: an AFC, a frequency - discriminator phase - detector (charge pump), a loop low - pass filter, an AFC (automatic frequency calibration), a VCO (voltage - controlled oscillator), a frequency divider, and an open - loop reference voltage circuit. The switch reference voltage circuit is used to input the generated reference voltage signal to the VCO when the path between the loop low - pass filter LPF and the VCO is disconnected. The frequency calibration device is connected to the control voltage input terminal of the VCO and is also connected to the AFC in the phase - locked loop. Figure 1 The solid dots in

[0036] represent that two wires are cross - connected, and the hollow dots represent that two wires are not cross - connected.

[0037] Among them, the working process of the phase - locked loop includes:

[0038] The AFC module starts to work. It is responsible for selecting the tuning sub - band of the VCO (VCO band). The selection of the tuning sub - band is determined based on the target frequency and the tuning characteristics of the VCO. By selecting an appropriate tuning sub - band, the AFC locks the output frequency of the VCO near the target frequency. Once the output frequency of the VCO is locked near the target frequency by the AFC, the system is ready to return to the closed - loop state, usually by disconnecting the calibration reference voltage path and reconnecting the path between the LPF and the VCO. In the closed - loop state, the phase - locked loop starts its normal working process. The phase - frequency detector (charge pump) compares the output frequency of the VCO (after passing through the frequency divider) with the reference frequency, generates an error signal. After passing through the loop low - pass filter (LPF), the error signal is used to control the output frequency of the VCO. Through continuous feedback and adjustment, the phase - locked loop finally locks the output frequency of the VCO at the target frequency. When the output frequency of the VCO is stably locked at the target frequency, the phase - locked loop completes its startup and working process.

[0039] Please refer to Figure 2 , which provides a schematic flowchart of a frequency calibration method for a phase - locked loop according to an embodiment of the present application. As Figure 2 shown, the method according to the embodiment of the present application may include the following steps:

[0040] S201. After detecting the startup of the phase - locked loop, determine the corresponding upper limit voltage value Vtunemax and lower limit voltage value Vtunemin according to the target output frequency of the phase - locked loop.

[0041] Among them, after the phase - locked loop starts up, the frequency calibration device first determines the corresponding control voltage range according to the target output frequency of the phase - locked loop (i.e., the target output frequency). This range is defined by the upper limit voltage value Vtunemax and the lower limit voltage value Vtunemin, which are preset based on the tuning characteristics of the VCO.

[0042] The output frequency of the VCO has a linear relationship with its control voltage Vtune (fvco = fc + Kv×Vtune), where Kv is the gain of the VCO. The frequency calibration device determines the corresponding Vtunemax and Vtunemin according to the target output frequency by querying the pre - stored VCO tuning curve or look - up table (LUT), ensuring that when Vtune is within the normal working range, the VCO can stably output the target frequency.

[0043] In a possible embodiment, the AFC is responsible for adjusting the output frequency of the VCO during the startup process of the phase-locked loop (PLL) to gradually approach the target frequency. When the AFC completes the preliminary frequency adjustment, it sends a startup signal to the frequency calibration device. By monitoring the characteristics such as the level, edge, or pulse of this startup signal, the frequency calibration device can accurately determine whether the PLL has started and is working. This detection method is simple and reliable, ensuring that the frequency calibration device can intervene in a timely manner after the PLL starts for further frequency calibration and optimization.

[0044] Furthermore, refer to Figure 3 the schematic diagram of the frequency curve of the VCO shown. As the control voltage of the VCO ranges from Vtune min to Vtune max, the oscillation frequency output by the VCO gradually increases. The serial numbers of the tuning subbands range from band 0 to band 31, and the oscillation frequency output by the VCO gradually increases.

[0045] To ensure that the control voltage Vtune of the voltage-controlled oscillator (VCO) is always within a safe and effective operating range, two key threshold voltages are defined: Vtunemin and Vtunemax. These thresholds are determined based on the power supply voltage and ground voltage of the VCO, combined with a certain voltage margin (or called threshold voltage).

[0046] Vtunemin: represents the minimum allowable value of the control voltage, and the calculation formula is Vtunemin = Vgnd + Vth1. Among them, Vgnd is the ground voltage value of the VCO, usually close to 0V; Vth1 is a preset voltage margin to ensure that the control voltage will not be too low, thus avoiding abnormal operation or performance deterioration of the VCO.

[0047] Vtunemax: represents the maximum allowable value of the control voltage, and the calculation formula is Vtunemax = Vdd - Vth2. Among them, Vdd is the power supply voltage value of the VCO, which provides the electrical energy required for the VCO to work; Vth2 is also a preset voltage margin to ensure that the control voltage will not be too high, thus preventing performance degradation or abnormal operation of the VCO.

[0048] S202. Periodically monitor the current voltage value Vtune of the voltage-controlled oscillator.

[0049] Among them, the frequency calibration device periodically monitors the current control voltage value Vtune of the voltage-controlled oscillator (VCO) at a fixed time interval (such as every millisecond or every microsecond). The control voltage of the VCO is sampled through an analog-to-digital converter (ADC) to convert the analog voltage signal into a digital signal for subsequent processing by the frequency calibration device. This periodic monitoring can track the changes of Vtune in real time and provide a basis for dynamically adjusting the serial number of the tuning subband.

[0050] S203. If Vtune > Vtunemax, increase the current tuning sub - band serial number n set by the phase - locked loop by a preset step value k, and use the tuning sub - band corresponding to the serial number n + k to control the voltage - controlled oscillator.

[0051] Among them, when the frequency calibration device detects that Vtune > Vtunemax, it indicates that the control voltage of the VCO exceeds the upper limit of the normal working range. At this time, the frequency calibration device increases the current tuning sub - band serial number n set by the phase - locked loop by k, and uses the tuning sub - band corresponding to the serial number n + k to control the VCO. After adjusting the voltage - controlled oscillator, continue to monitor the next control voltage value of the VCO.

[0052] Increasing the tuning sub - band serial number is equivalent to selecting a higher - frequency tuning sub - band. Since the frequency ranges of the tuning sub - bands are usually arranged in an increasing order, selecting a higher - frequency tuning sub - band will reduce the control voltage of the VCO, so that the control voltage Vtune falls back to the normal working range. This adjustment is pre - designed based on the tuning characteristics of the VCO to ensure that the adjusted tuning sub - band can still be locked to the target frequency.

[0053] Among them, n and k are integers greater than 0, and k < n. Optionally, the preset step value k = 1.

[0054] For example, see Figure 3 the schematic diagram shown.

[0055] Suppose the target output frequency of the phase - locked loop is fvco1, and the tuning sub - bands band0, band1, and band2 can all be locked to this frequency. The phase - locked loop is initially locked to band0, and at this time the system starts to monitor the control voltage Vtune of the voltage - controlled oscillator (VCO).

[0056] Initial state: The phase - locked loop is locked to band0, the VCO control voltage Vtune is within the normal range, and the system stably outputs fvco1.

[0057] Abnormal situation: Due to external interference or environmental changes, Vtune gradually increases and exceeds the preset upper - limit voltage value Vtunemax. At this time, although the phase - locked loop can still be locked to fvco1, the control voltage has exceeded the normal working range, which may lead to deterioration of system performance, such as increased phase noise and decreased frequency stability.

[0058] Adjustment process: After the frequency calibration device detects that Vtune > Vtunemax, according to the preset tuning sub-band switching strategy, it increases the current tuning sub-band serial number from 0 to 1, that is, switches to band1. Since the frequency range of band1 is higher than that of band0, the VCO can be locked to fvco1 without maintaining too high a control voltage, so Vtune will automatically fall back to the normal operating voltage range. By increasing the tuning sub-band serial number, the system not only restores the normal operating range of the control voltage but also ensures the stability and performance of the phase-locked loop.

[0059] S204. If Vtune < Vtunemin, subtract the preset step value from the current tuning sub-band serial number n set by the phase-locked loop, and use the tuning sub-band corresponding to the n-k serial number to control the voltage-controlled oscillator.

[0060] Among them, when the frequency calibration device detects that Vtune < Vtunemin, it indicates that the control voltage of the VCO has exceeded the lower limit of the normal operating range. At this time, the frequency calibration device subtracts k from the current tuning sub-band serial number n set by the phase-locked loop, and uses the tuning sub-band corresponding to the n-k serial number to control the VCO. After adjusting the voltage-controlled oscillator, continue to monitor the next control voltage value of the VCO.

[0061] Reducing the tuning sub-band serial number is equivalent to selecting a tuning sub-band with a lower frequency. Selecting a tuning sub-band with a lower frequency will increase the control voltage of the VCO, so that the control voltage Vtune rises back to the normal operating range. Similar to increasing the tuning sub-band serial number, this adjustment is also pre-designed based on the tuning characteristics of the VCO to ensure that the adjusted tuning sub-band can still be locked to the target frequency.

[0062] For example, assuming that the target output frequency of the phase-locked loop is fvco2, and the tuning sub-bands band29, band30, and band31 can all be locked to this frequency. The phase-locked loop is initially locked to band31, and at this time the system also monitors the control voltage Vune of the VCO.

[0063] Initial state: The phase-locked loop is locked to band31, the control voltage Vtune of the VCO is within the normal range, and the system stably outputs fvco2.

[0064] Abnormal situation: Due to external interference or environmental changes, Vtune gradually decreases and is lower than the preset lower limit voltage value Vtunemin. Similar to Case 1, at this time, although the phase-locked loop can still be locked to fvco2, the control voltage has exceeded the normal operating range, which may lead to deterioration of system performance.

[0065] Adjustment process: When the frequency calibration device detects that Vtune < Vtunemin, according to the preset tuning sub-band switching strategy, the current tuning sub-band serial number is reduced from 31 to 30, that is, switched to band30. Since the frequency range of band30 is lower than that of band31, the VCO needs to increase the control voltage to lock to fvco2, so Vtune will automatically rise back to the normal operating voltage range. By reducing the tuning sub-band serial number, the system also restores the normal operating range of the control voltage and ensures the stability and performance of the phase-locked loop.

[0066] Optionally, the phase-locked loop of the present application has 32 tuning sub-bands, numbered from 0 to 31. Each serial number represents an independent tuning sub-band. The bandwidth of each tuning sub-band is 100 MHz. Bandwidth is a measure of the frequency range, indicating the frequency range that the sub-band can cover. In this case, each sub-band can cover a frequency range extending 50 MHz to both sides from the center frequency.

[0067] S205. If Vtunemax ≤ Vtune ≤ Vtunemin, keep the current tuning sub-band serial number set by the phase-locked loop unchanged.

[0068] Among them, when the frequency calibration device detects that Vtunemin ≤ Vtune ≤ Vtunemax, it indicates that the control voltage of the VCO is within the normal operating range. At this time, the frequency calibration device keeps the current tuning sub-band serial number set by the phase-locked loop unchanged and continues to monitor the next control voltage value of the VCO.

[0069] Within the normal operating range, the VCO can stably output the target frequency without adjusting the tuning sub-band serial number. The frequency calibration device ensures that when Vtune fluctuates due to external interference or environmental changes by continuously monitoring Vtune, it can be detected in time and the tuning sub-band serial number can be adjusted, so as to maintain the stability and performance of the phase-locked loop.

[0070] The embodiments of the present application have the following beneficial effects when evaluating the risk of bonds:

[0071] By periodically monitoring the control voltage (Vtune) of the voltage-controlled oscillator (VCO) and dynamically adjusting the tuning sub-band serial number according to the preset upper and lower limit voltage values (Vtunemax and Vtunemin). When the temperature change causes the oscillation frequency of the VCO to drift, Vtune will change accordingly. If Vtune exceeds the normal range, the system adjusts the tuning sub-band serial number to make the operating frequency of the VCO return to the target range, so as to maintain the locked state of the PLL.

[0072] Jitter in the external reference signal frequency is transmitted to the PLL system, causing fluctuations in the oscillation frequency of the VCO. The technical solution effectively compensates for the impact of this jitter on the PLL system by monitoring Vtune in real time and adjusting the tuning sub-band number according to its value. By dynamically adjusting the tuning sub-band, the system can keep Vtune within the normal range, ensuring the stability and locking accuracy of the PLL.

[0073] When the PLL is in the locked state, Vtune is a key parameter for adjusting the oscillation frequency of the VCO. However, due to external factors, Vtune may drift. When Vtune drifts close to 0 or the power supply voltage (VDD), the VCO may not work properly, resulting in PLL unlock. The technical solution avoids the unlock problem caused by Vtune drift and ensures the stability and performance of the PLL system by setting Vtunemax and Vtunemin and periodically monitoring Vtune to timely adjust the tuning sub-band number.

[0074] The following is an embodiment of the device of the present application, which can be used to execute the method embodiment of the present application. For details not disclosed in the device embodiment of the present application, please refer to the method embodiment of the present application.

[0075] Please refer to Figure 4 , which shows a schematic structural diagram of a frequency calibration device for a phase-locked loop provided by an exemplary embodiment of the present application, hereinafter referred to as device 4. This device 4 can be implemented as all or part of an electronic device through software, hardware, or a combination of both. Device 4 includes: a determination unit 401, a monitoring unit 402, an increment unit 403, a decrement unit 404, and a holding unit 405.

[0076] The determination unit 401 is configured to, after detecting the start of the phase-locked loop, determine the corresponding upper limit voltage value Vtunemax and lower limit voltage value Vtunemin according to the target output frequency of the phase-locked loop;

[0077] The monitoring unit 402 is configured to periodically monitor the current voltage value Vtune of the voltage-controlled oscillator;

[0078] The increment unit 403 is configured to, if Vtune > Vtunemax, increase the current tuning sub-band number n set by the phase-locked loop by a preset step value k, and control the voltage-controlled oscillator using the tuning sub-band corresponding to the n + k number;

[0079] The decrement unit 404 is configured to, if Vtune < Vtunemin, subtract the preset step value k from the current tuning sub-band number n set by the phase-locked loop, and control the voltage-controlled oscillator using the tuning sub-band corresponding to the n - k number;

[0080] A holding unit 405, configured to keep the current tuned sub - band serial number set by the phase - locked loop unchanged if Vtunemax≤Vtune≤Vtunemin.

[0081] In one or more possible embodiments, the tuned sub - band serial number ranges from 0 to 31, and the bandwidth of each tuned sub - band is 100 MHz.

[0082] In one or more possible embodiments, it is determined that the phase - locked loop starts according to a start signal sent by the AFC in the phase - locked loop.

[0083] In one or more possible embodiments, the current voltage value is obtained by sampling the voltage input terminal of the voltage - controlled oscillator through an ADC.

[0084] In one or more possible embodiments, a preset step value k = 1.

[0085] In one or more possible embodiments, Vtunemin = Vgnd+Vth1, Vtunemax = Vdd - Vth2; where Vgnd represents the ground voltage value of the voltage - controlled oscillator, Vdd represents the operating voltage value of the voltage - controlled oscillator, and Vth1 and Vth2 are preset threshold voltages.

[0086] It should be noted that when the device 4 provided in the above - mentioned embodiment executes the frequency calibration method of the phase - locked loop, only the division of the above - mentioned functional modules is used as an example for illustration. In actual applications, the above - mentioned functions can be allocated to different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the above - mentioned functions. In addition, the frequency calibration device of the phase - locked loop provided in the above - mentioned embodiment and the embodiment of the frequency calibration method of the phase - locked loop belong to the same concept, and the implementation process is detailed in the method embodiment, which will not be elaborated here.

[0087] The serial numbers of the embodiments of the present application are only for description and do not represent the advantages and disadvantages of the embodiments.

[0088] The embodiment of the present application also provides a computer storage medium, which can store multiple instructions, and the instructions are suitable for being loaded and executed by a processor to perform the method steps of the above - mentioned Figure 2 as shown in the embodiment, and the specific execution process can refer to the Figure 2 specific description of the shown embodiment, which will not be elaborated here.

[0089] The present application also provides a computer program product, which stores at least one instruction, and the at least one instruction is loaded and executed by the processor to implement the frequency calibration method of the phase - locked loop as described in each of the above embodiments.

[0090] Please refer to Figure 5, this application embodiment provides a schematic structural diagram of an electronic device. As Figure 5 shown, the frequency calibration device 500 may include: at least one processor 501, at least one network interface 503, a memory 504, and at least one communication bus 502.

[0091] Among them, the communication bus 502 is used to realize the connection and communication between these components.

[0092] Among them, the communication interface 503 is used to communicate with external devices or units, and may optionally include a standard wired interface and a wireless interface.

[0093] Among them, the processor 501 may include one or more processing cores. The processor 501 connects various parts within the entire frequency calibration device 500 through various interfaces and lines, and by running or executing instructions, programs, code sets, or instruction sets stored in the memory 504, and calling data stored in the memory 504, it executes various functions of the frequency calibration device 500 and processes data. Optionally, the processor 501 may be implemented in at least one of the following hardware forms: Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), and Programmable Logic Array (PLA).

[0094] Among them, the memory 504 may include Random Access Memory (RAM), and may also include Read-Only Memory. Optionally, the memory 504 includes a non-transitory computer-readable storage medium. The memory 504 can be used to store instructions, programs, code, code sets, or instruction sets. The memory 504 may include a program storage area and a data storage area. Among them, the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playback function, an image playback function, etc.), instructions for implementing the above-mentioned method embodiments, etc.; the data storage area may store data involved in the above-mentioned method embodiments. Optionally, the memory 504 may also be at least one storage device located far from the aforementioned processor 501.

[0095] In Figure 5 the shown frequency calibration device 500, the processor 501 may be used to call an application program stored in the memory 504, and specifically execute the method as Figure 2 shown, and the specific process can be referred toFigure 2 As shown, details are not repeated here.

[0096] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The program can be stored in a computer-readable storage medium. When the program is executed, it can include the processes of the embodiments of the above methods. Among them, the storage medium can be a magnetic disk, an optical disk, a read-only memory, or a random access memory, etc.

[0097] The foregoing disclosure is only for the preferred embodiments of the present application, and of course, it cannot be used to limit the scope of rights of the present application. Therefore, equivalent changes made according to the claims of the present application still fall within the scope covered by the present application.

Claims

1. A frequency calibration method for a phase-locked loop, characterized in that, including: After detecting the start of the phase-locked loop, determine the corresponding upper limit voltage value Vtunemax and lower limit voltage value Vtunemin according to the target output frequency of the phase-locked loop; Periodically monitor the current voltage value Vtune of the voltage-controlled oscillator; If Vtune > Vtunemax, increase the current tuning sub-band serial number n set by the phase-locked loop by a preset step value k, and control the voltage-controlled oscillator using the tuning sub-band corresponding to the serial number n + k; If Vtune < Vtunemin, subtract the preset step value k from the current tuning sub-band serial number n set by the phase-locked loop, and control the voltage-controlled oscillator using the tuning sub-band corresponding to the serial number n - k; If Vtunemax ≤ Vtune ≤ Vtunemin, keep the current tuning sub-band serial number set by the phase-locked loop unchanged.

2. The method according to claim 1, wherein The tuning sub-band serial number ranges from 0 to 31, and the bandwidth of each tuning sub-band is 100 MHz.

3. The method according to claim 1 or 2, characterized in that, Determine the start of the phase-locked loop according to the start signal sent by the AFC in the phase-locked loop.

4. The method according to claim 3, wherein Sample the voltage input terminal of the voltage-controlled oscillator through the ADC to obtain the current voltage value.

5. The method according to claim 4, characterized in that, The preset step value k = 1.

6. The method according to claim 1 or 2 or 5, characterized in that Vtunemin = Vgnd + Vth1, Vtunemax = Vdd - Vth2; where Vgnd represents the ground voltage value of the voltage-controlled oscillator, Vdd represents the operating voltage value of the voltage-controlled oscillator, and Vth1 and Vth2 are preset threshold voltages.

7. A frequency calibration method for a phase-locked loop, characterized in that, including: A determination unit, configured to, after detecting the start of the phase-locked loop, determine the corresponding upper limit voltage value Vtunemax and lower limit voltage value Vtunemin according to the target output frequency of the phase-locked loop; A monitoring unit, configured to periodically monitor the current voltage value Vtune of the voltage-controlled oscillator; An increasing unit, configured to, if Vtune > Vtunemax, increase the current tuning sub-band serial number n set by the phase-locked loop by a preset step value k, and control the voltage-controlled oscillator using the tuning sub-band corresponding to the serial number n + k; A decreasing unit, configured to, if Vtune < Vtunemin, subtract the preset step value k from the current tuning sub-band serial number n set by the phase-locked loop, and control the voltage-controlled oscillator using the tuning sub-band corresponding to the serial number n - k; A maintaining unit, configured to, if Vtunemax ≤ Vtune ≤ Vtunemin, keep the current tuning sub-band serial number set by the phase-locked loop unchanged.

8. A computer storage medium, characterized in that, The computer storage medium stores multiple instructions, and the instructions are adapted to be loaded and executed by a processor to perform the method steps of any one of claims 1 to 7.

9. A frequency calibration device, characterized in that, including: A processor and a memory; wherein, the memory stores a computer program, and the computer program is adapted to be loaded and executed by the processor to perform the method steps of any one of claims 1 to 7.

10. An electronic device, characterized in that, including: The frequency calibration device as claimed in claim 7 or 9, and a phase-locked loop.

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