Substrate, light emitting diode and manufacturing method thereof

Abstract

The invention provides a substrate, a light-emitting diode and a manufacturing method of the light-emitting diode. One surface of the substrate is provided with a patterned structure, the patterned structure comprises a plurality of pattern units, each pattern unit comprises a plurality of bulges, and the distance between two adjacent pattern units is greater than the distance between adjacent bulges in the same pattern unit. Each pattern unit comprises a plurality of protrusions, and the distance between every two adjacent pattern units is larger than the distance between every two adjacent protrusions in the same pattern unit, so that epitaxial structure patterning is carried out on the light-emitting diode chip, the epitaxial edge can be located in the interval between every two adjacent pattern units, the thickness of the epitaxial edge is guaranteed, and the light-emitting diode chip is manufactured. Additional damage to epitaxy caused by impact force of gas during subsequent laser lift-off is reduced, and the reliability of the light emitting diode is improved.

Description

Technical Field

[0001] The present disclosure relates to the field of light-emitting devices, and particularly to a substrate, a light-emitting diode, and a manufacturing method thereof. Background Art

[0002] Light-emitting diodes are widely used in the fields of display, decoration, communication, etc. By using different semiconductor materials and structures, light-emitting diodes can cover the entire color range from ultraviolet to infrared.

[0003] In related technologies, the epitaxial structure of a light-emitting diode is usually fabricated on a substrate, and the substrate includes a patterned substrate, and generally the patterned substrate includes patterns arranged in an array.

[0004] After patterning the epitaxial structure on the substrate, it is necessary to lift off the substrate by laser. Currently, the lifting-off process is likely to cause damage to the epitaxial structure, resulting in a decrease in the reliability of the light-emitting diode. Summary of the Invention

[0005] Embodiments of the present disclosure provide a substrate, a light-emitting diode, and a manufacturing method thereof, which reduce the risk of damage during the lifting-off of the epitaxial structure and improve the reliability. The technical solutions are as follows:

[0006] On the one hand, a substrate is provided. One surface of the substrate has a patterned structure, and the patterned structure includes a plurality of graphic units. Each graphic unit includes a plurality of protrusions, and the distance between two adjacent graphic units is greater than the distance between adjacent protrusions in the same graphic unit.

[0007] Optionally, the distance between two adjacent graphic units is 1-15 μm.

[0008] Optionally, the distance between adjacent protrusions in the same graphic unit is 0.2-3 μm.

[0009] Optionally, the patterned structure further includes at least one alignment mark.

[0010] On the other hand, a light-emitting diode is provided. The light-emitting diode includes: a first semiconductor layer, an active layer, and a second semiconductor layer; within the surface of the first semiconductor layer far from the active layer, there is at least one epitaxial graphic unit, and the distance from the epitaxial graphic unit near the edge of the light-emitting diode to the edge of the light-emitting diode is 0.5-5 μm.

[0011] Optionally, the epitaxial graphic unit includes a plurality of depressions, and the distance between adjacent depressions is 0.2-3 μm.

[0012] On the other hand, a manufacturing method of a light-emitting diode is provided. The method includes:

[0013] An epitaxial layer is grown on a temporary substrate, and one side of the temporary substrate for growing the epitaxial layer has a patterned structure. The patterned structure includes a plurality of pattern units, each pattern unit includes a plurality of protrusions, and the distance between two adjacent pattern units is greater than the distance between adjacent protrusions in the same pattern unit;

[0014] The epitaxial layer is patterned to obtain a plurality of epitaxial structures, and the edge of each epitaxial structure is located between two adjacent pattern units;

[0015] The temporary substrate is peeled off.

[0016] Optionally, the distance between two adjacent pattern units is 1-15 μm.

[0017] Optionally, there is at least one epitaxial pattern unit on the surface of the epitaxial layer, and the distance from the edge of each epitaxial structure to the epitaxial pattern unit near the edge of the light-emitting diode it encloses is 0.5-5 μm.

[0018] Optionally, the patterned structure further includes at least one alignment mark. The patterning process of the epitaxial layer includes:

[0019] Depositing a photoresist film on the epitaxial layer;

[0020] Taking the alignment mark as a reference, controlling the position of the mask plate, and exposing and developing the photoresist film to obtain a photoresist mask;

[0021] Etching the epitaxial structure under the shielding of the photoresist mask;

[0022] Removing the photoresist mask.

[0023] The beneficial effects brought by the technical solution provided by the embodiments of the present disclosure are:

[0024] In the embodiments of the present disclosure, the substrate has a patterned structure. The patterned structure includes a plurality of pattern units. Each pattern unit can correspond to a light-emitting diode chip. The pattern unit includes a plurality of protrusions. The distance between two adjacent pattern units is greater than the distance between adjacent protrusions in the same pattern unit. Thus, when patterning the epitaxial structure of the light-emitting diode chip, the epitaxial edge can be located in the interval between adjacent pattern units, thereby ensuring the thickness of the epitaxial edge, reducing the additional damage to the epitaxy caused by the impact force of gas during subsequent laser lift-off, and improving the reliability of the light-emitting diode. Description of the Drawings

[0025] To more clearly illustrate the technical solutions in the embodiments of the present disclosure, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present disclosure. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0026] Figure 1 is a top view of a substrate provided by an embodiment of the present disclosure;

[0027] Figure 2 is a flowchart of a method for manufacturing a light-emitting diode provided by an embodiment of the present disclosure;

[0028] Figure 3 is another flowchart of a method for manufacturing a light-emitting diode provided by an embodiment of the present disclosure;

[0029] Figure 4 is a structural diagram during the manufacturing process of a light-emitting diode provided by an embodiment of the present disclosure;

[0030] Figure 5 is a structural diagram during the manufacturing process of a light-emitting diode provided by an embodiment of the present disclosure;

[0031] Figure 6 is a structural diagram during the manufacturing process of a light-emitting diode provided by an embodiment of the present disclosure;

[0032] Figure 7 is a schematic structural diagram of a light-emitting diode provided by an embodiment of the present disclosure.

[0033] The reference numerals are as follows: 1000: epitaxial structure;

[0034] 100: temporary substrate;

[0035] 101: first semiconductor layer;

[0036] 102: active layer;

[0037] 103: second semiconductor layer;

[0038] 104: bonding layer;

[0039] 105: first substrate;

[0040] 201: patterned structure;

[0041] 202: graphic unit;

[0042] 203: protrusion;

[0043] 301: alignment mark;

[0044] 401: epitaxial graphic unit;

[0045] 402: Concavity. Specific Embodiment

[0046] To make the objectives, technical solutions, and advantages of the present disclosure clearer, the following will further describe the embodiments of the present disclosure in detail with reference to the accompanying drawings.

[0047] Figure 1 is a top view of a substrate provided by an embodiment of the present disclosure. Refer to Figure 1 , one side of the substrate has a patterned structure 201, the patterned structure 201 includes a plurality of graphic units 202, each graphic unit 202 includes a plurality of protrusions 203, and the distance between two adjacent graphic units 202 is greater than the distance between adjacent protrusions 203 in the same graphic unit 202.

[0048] In the embodiment of the present disclosure, the substrate has a patterned structure, the patterned structure includes a plurality of graphic units, each graphic unit may correspond to a light-emitting diode chip, the graphic unit includes a plurality of protrusions, and the distance between two adjacent graphic units is greater than the distance between adjacent protrusions in the same graphic unit, so that when patterning the epitaxial structure of the light-emitting diode chip, the epitaxial edge can be located in the interval between adjacent graphic units, thereby ensuring the thickness of the epitaxial edge, reducing the additional damage to the epitaxy caused by the impact force of gas during subsequent laser lift-off, and improving the reliability of the light-emitting diode.

[0049] It is worth noting that during manufacturing, one light-emitting diode chip can correspond to one graphic unit, so that the epitaxial edge of the light-emitting diode chip is between adjacent graphic units.

[0050] During manufacturing, one light-emitting diode chip can also correspond to multiple graphic units. Similarly, in this case, it is also necessary to make the epitaxial edge of the light-emitting diode chip between adjacent graphic units.

[0051] In the embodiment of the present disclosure, the distance L1 between two adjacent graphic units 202 can be 1 - 15 μm. Using the above distance can ensure that during subsequent segmentation, there is a sufficient distance between two adjacent graphic units, so that the epitaxial edge is located in the interval between adjacent graphic units, ensuring the thickness of the epitaxial edge. Thus, during the segmentation process, the risk of damage to the epitaxial structure caused by mechanical stress or debris splashing during cutting is reduced, further improving the reliability and stability of the light-emitting diode. At the same time, it also reduces the possibility of a decrease in luminous efficiency or chip failure caused by damage to the epitaxial structure, helping to improve the overall performance and service life of the light-emitting diode.

[0052] In the embodiments of the present disclosure, multiple graphic units 202 in the graphic structure 201 are arranged in an array. Multiple protrusions 203 in the graphic unit 202 are arranged in an array.

[0053] In other embodiments, the multiple graphic units 202 may adopt other arrangement manners.

[0054] In other embodiments, the multiple protrusions 203 in the graphic unit 202 may adopt other arrangement manners.

[0055] Exemplarily, the distance L1 between two adjacent graphic units 202 is 8 μm.

[0056] In the embodiments of the present disclosure, the distance L2 between adjacent protrusions 203 in the same graphic unit 202 may be 0.2 - 3 μm. By forming the pattern on the substrate as described above, it can be ensured that the patterned substrate can reduce the dislocation density and improve the surface morphology during epitaxial growth.

[0057] Exemplarily, the distance L2 between adjacent protrusions 203 in the same graphic unit 202 is 2 μm.

[0058] In the embodiments of the present disclosure, the graphic structure 201 further includes at least one alignment mark 301. By using the alignment mark for epitaxial structure patterning, the epitaxial edge can be located in the interval between adjacent graphic units, thereby ensuring the thickness of the epitaxial edge, reducing the additional damage to the epitaxy caused by the impact force of gas during subsequent laser lift-off, and improving the reliability of the light-emitting diode.

[0059] In the embodiments of the present disclosure, the top view of the protrusion 203 may be circular.

[0060] In other implementation manners, the top view of the protrusion 203 may also be rectangular or triangular. The embodiments of the present disclosure do not limit the shape of the protrusion 203.

[0061] In the embodiments of the present disclosure, the protrusion 203 may be a cone or a frustum of a cone.

[0062] In other implementation manners, the protrusion 203 may also be a frustum of a pyramid or a pyramid. The embodiments of the present disclosure do not limit the shape of the protrusion 203.

[0063] In the embodiments of the present disclosure, the graphic unit composed of multiple protrusions 203 may be rectangular.

[0064] In other implementation manners, the graphic unit composed of multiple protrusions 203 may also be circular or other shapes. The embodiments of the present disclosure do not limit the shape of the graphic unit.

[0065] In an embodiment of the present disclosure, the patterned structure 201 includes two alignment marks 301, and the two alignment marks 301 are symmetrically distributed on one side of the substrate. The use of alignment marks in the patterned structure facilitates alignment during the fabrication of the patterned structure.

[0066] Among them, symmetric distribution means symmetric distribution with respect to the axis of symmetry of the substrate.

[0067] In an embodiment of the present disclosure, the alignment mark may be an unetched area in the patterned structure 201, such as the rectangular area in the figure.

[0068] That is, as Figure 1 shown, the alignment mark 301 in the figure may be rectangular.

[0069] In other implementation manners, the alignment mark 301 may also be circular or triangular, and the present disclosure embodiment does not limit the shape of the alignment mark 301.

[0070] In other implementation manners, the patterned structure 201 includes three or more alignment marks 301, and the present disclosure embodiment does not limit the number of alignment marks.

[0071] In an embodiment of the present disclosure, the protrusions 203 and the alignment marks 301 in the above-mentioned patterned structure may be fabricated simultaneously.

[0072] For example, the protrusions 203 and the alignment marks 301 in the above-mentioned patterned structure may be etched using one process.

[0073] In an embodiment of the present disclosure, the substrate may be any one of substrates such as sapphire substrate, Si substrate, and SiC substrate, and the present disclosure embodiment does not limit the material of the substrate.

[0074] Exemplarily, the substrate is a sapphire substrate.

[0075] Figure 2 is a flowchart of a method for manufacturing a light-emitting diode provided by an embodiment of the present disclosure. Refer to Figure 2 , the method steps include:

[0076] S11. Grow an epitaxial layer on a temporary substrate, wherein one side of the temporary substrate for growing the epitaxial layer has a patterned structure, the patterned structure includes a plurality of graphic units, each graphic unit includes a plurality of protrusions, and the distance between two adjacent graphic units is greater than the distance between adjacent protrusions in the same graphic unit.

[0077] S12. Pattern the epitaxial layer to obtain a plurality of epitaxial structures, and the edge of each epitaxial structure is located between two adjacent graphic units.

[0078] S13. Strip the temporary substrate.

[0079] In an embodiment of the present disclosure, the temporary substrate has a patterned structure, the patterned structure includes a plurality of pattern units, each pattern unit may correspond to a light-emitting diode chip, the pattern unit includes a plurality of protrusions, and the distance between two adjacent pattern units is greater than the distance between adjacent protrusions in the same pattern unit. Thus, when patterning the epitaxial structure of the light-emitting diode chip to obtain a plurality of epitaxial structures, the edge of each epitaxial structure is located between two adjacent pattern units, so that the epitaxial edge can be located in the interval between adjacent pattern units, thereby ensuring the thickness of the epitaxial edge, reducing the additional damage to the epitaxy caused by the impact force of gas when peeling the temporary substrate, and improving the reliability of the light-emitting diode.

[0080] Figure 3 It is a flowchart of another method for manufacturing a light-emitting diode provided by an embodiment of the present disclosure. Refer to Figure 3 , the steps of the method include:

[0081] S21. Fabricate a temporary substrate.

[0082] Figure 4 It is a structural diagram during the manufacturing process of a light-emitting diode provided by an embodiment of the present disclosure. Refer to Figure 4 . The temporary substrate 100 has a patterned structure 201.

[0083] In an embodiment of the present disclosure, the temporary substrate may be any one of substrates such as a sapphire substrate, an Si substrate, and an SiC substrate, and the present disclosure does not limit the material of the substrate.

[0084] Exemplarily, the temporary substrate is a sapphire substrate.

[0085] In one example, step S21 includes:

[0086] The first step is to perform single-sided polishing on the temporary substrate.

[0087] The second step is to fabricate a patterned structure. The patterned structure includes a plurality of pattern units and two alignment marks. Each pattern unit includes a plurality of protrusions, and the distance between two adjacent pattern units is greater than the distance between adjacent protrusions in the same pattern unit.

[0088] In an embodiment of the present disclosure, the patterned structure can be formed by etching, dry etching, or plasma bombardment.

[0089] Exemplarily, the patterned structure is formed by etching.

[0090] In the embodiments of the present disclosure, the spacing between two adjacent graphic units may be 1 to 15 μm. With the above spacing, it can be ensured that in the subsequent segmentation process, there is a sufficiently large distance between two adjacent graphic units, so that the epitaxial edge is located in the interval between adjacent graphic units, ensuring the thickness of the epitaxial edge. Thus, in the segmentation process, the risk of damage to the epitaxial structure caused by mechanical stress or debris splashing during cutting is reduced, further improving the reliability and stability of the light-emitting diode. At the same time, the possibility of a decrease in luminous efficiency or chip failure caused by damage to the epitaxial structure is also reduced, which helps to improve the overall performance and service life of the light-emitting diode.

[0091] In the embodiments of the present disclosure, multiple graphic units in the patterned structure are arranged in an array. Multiple protrusions in the graphic unit are arranged in an array.

[0092] In other embodiments, multiple graphic units may adopt other arrangement modes.

[0093] In other embodiments, multiple protrusions in the graphic unit may adopt other arrangement modes.

[0094] Exemplarily, the spacing between two adjacent graphic units is 8 μm.

[0095] In the embodiments of the present disclosure, the spacing between adjacent protrusions in the same graphic unit may be 0.2 to 3 μm. Using the above spacing to form a pattern on the temporary substrate can ensure that the patterned substrate can play roles such as reducing the dislocation density and improving the surface morphology during epitaxial growth.

[0096] Exemplarily, the spacing between adjacent protrusions in the same graphic unit is 2 μm.

[0097] In the embodiments of the present disclosure, the top view of the protrusion may be circular.

[0098] In other implementation manners, the top view of the protrusion may also be rectangular or triangular. The embodiments of the present disclosure do not limit the shape of the protrusion.

[0099] In the embodiments of the present disclosure, the protrusion may be a cone or a frustum of a cone.

[0100] In other implementation manners, the protrusion may also be a frustum of a pyramid or a pyramid. The embodiments of the present disclosure do not limit the shape of the protrusion.

[0101] In the embodiments of the present disclosure, the graphic unit composed of multiple protrusions may be rectangular.

[0102] In other implementation manners, the graphic unit composed of multiple protrusions may also be circular or other shapes. The embodiments of the present disclosure do not limit the shape of the graphic unit.

[0103] In the embodiments of the present disclosure, the patterned structure includes two alignment marks, and the two alignment marks are symmetrically distributed on one side of the temporary substrate. The alignment marks are used in the patterned structure to facilitate alignment during the fabrication of the patterned structure.

[0104] Among them, symmetric distribution means symmetric distribution with respect to the axis of symmetry of the temporary substrate.

[0105] In the embodiments of the present disclosure, the alignment mark can be an unetched area in the patterned structure, such as the rectangular area in the figure.

[0106] That is, as Figure 1 shown, the alignment mark in the figure can be rectangular.

[0107] In other implementation manners, the alignment mark can also be circular or triangular, and the embodiments of the present disclosure do not limit the shape of the alignment mark.

[0108] In other implementation manners, the patterned structure includes three or more alignment marks, and the embodiments of the present disclosure do not limit the number of alignment marks.

[0109] S22. Sequentially fabricate a second semiconductor layer, an active layer, and a first semiconductor layer on the temporary substrate to form an epitaxial layer.

[0110] Figure 5 is a structural diagram in the manufacturing process of a light-emitting diode provided by the embodiments of the present disclosure. Refer to Figure 5 . The second semiconductor layer 103, the active layer 102, and the first semiconductor layer 101 are sequentially stacked on the temporary substrate 100.

[0111] In one example, step S22 includes:

[0112] The first step is to fabricate the second semiconductor layer.

[0113] In the embodiments of the present disclosure, the second semiconductor layer can be an N-type semiconductor layer.

[0114] In another example, the second semiconductor layer can be a P-type semiconductor layer.

[0115] The second step is to fabricate the active layer.

[0116] In the embodiments of the present disclosure, the active layer is a multi-quantum well layer, including a plurality of periodically alternating quantum well layers and quantum barrier layers.

[0117] Exemplarily, a plurality of quantum well layers and quantum barrier layers are alternately grown on the surface of the first semiconductor layer by using a Metal-Organic Chemical Vapor Deposition (MOCVD) device.

[0118] The third step is to fabricate the first semiconductor layer.

[0119] In an embodiment of the present disclosure, the first semiconductor layer may be a P-type semiconductor layer.

[0120] In another example, the first semiconductor layer may be an N-type semiconductor layer.

[0121] The above epitaxial layer structure is only an example. In other embodiments, according to different semiconductor material systems and device application requirements, the film layers and materials of the epitaxial layer can be adjusted and optimized accordingly.

[0122] In other embodiments, the distance from the edge of each epitaxial structure to the epitaxial graphic unit near the edge of the light-emitting diode it encloses is 0.5 - 5 μm. Using the above distance can make the edge of the epitaxial structure have a certain width in the subsequent cutting step, which is beneficial for cutting.

[0123] S23: Using the alignment mark as a reference, perform patterning on the epitaxial layer.

[0124] In one example, step S23 includes:

[0125] The first step is to deposit a photoresist film on the epitaxial layer.

[0126] The second step is to control the position of the mask plate with the alignment mark as a reference, and perform exposure and development on the photoresist film to obtain a photoresist mask.

[0127] The third step is to etch the epitaxial structure under the shielding of the photoresist mask.

[0128] In an embodiment of the present disclosure, the epitaxial structure is etched by inductively coupled plasma etching (ICP).

[0129] In an embodiment of the present disclosure, the edge of the epitaxial structure is located in the interval between adjacent graphic units, and there is a certain distance between the edge of the epitaxial structure and the patterned structure. This ensures the thickness of the epitaxial edge, thus reducing the risk of damage to the epitaxial structure caused by mechanical stress or debris spatter during the segmentation process, and further improving the reliability and stability of the light-emitting diode.

[0130] The fourth step is to remove the photoresist mask.

[0131] In the embodiments of the present disclosure, by using alignment marks to pattern the epitaxial structure, a plurality of epitaxial structures are obtained. The edge of each epitaxial structure is located between two adjacent graphic units, such that the epitaxial edge can be located in the gap between adjacent graphic units, thereby ensuring the thickness of the epitaxial edge, reducing the additional damage to the epitaxy caused by the impact force of gas during the peeling of the temporary substrate, and improving the reliability of the light-emitting diode.

[0132] S24. Fabricate a bonding layer on the epitaxial structure, and bond the epitaxial structure to the first substrate through the bonding layer.

[0133] Figure 6 is a structural diagram in the manufacturing process of a light-emitting diode provided by an embodiment of the present disclosure. Refer to Figure 6 . The bonding layer 104 covers the epitaxial structure 1000, and the first substrate 105 is connected to the bonding layer 104.

[0134] Among them, the first substrate can be any one of substrates such as a sapphire substrate, an Si substrate, etc.

[0135] Among them, the bonding temperature is 280 - 320 °C.

[0136] Exemplarily, the bonding temperature is 300 °C.

[0137] In the embodiments of the present disclosure, if the bonding temperature is too high, the semiconductor layer will be damaged; if the bonding temperature is too low, the bonding effect is not good. Bonding at the above temperature can ensure a good bonding effect and will not damage the semiconductor layer.

[0138] In the embodiments of the present disclosure, the material of the bonding layer is any one of photoresist, benzocyclobutene, and silica gel.

[0139] Exemplarily, the material of the bonding layer is silica gel.

[0140] S25. Peel off the temporary substrate.

[0141] This step S25 may include: using a laser to peel off the temporary substrate.

[0142] S26. Thin the first substrate.

[0143] In the embodiments of the present disclosure, the thickness of the thinned first substrate is 400 - 600 μm.

[0144] Exemplarily, the thickness of the thinned first substrate is 500 μm.

[0145] Optionally, after step S26, the method may further include: separating a plurality of light-emitting diodes and testing the light-emitting diodes.

[0146] Figure 7It is a schematic structural diagram of a light-emitting diode provided by an embodiment of the present disclosure. The light-emitting diode is fabricated by using the method shown in Figure 3 and referring to Figure 7 , the light-emitting diode includes:

[0147] a first semiconductor layer 101, an active layer 102, and a second semiconductor layer 103; within the surface of the first semiconductor layer 101 away from the active layer 102, there is at least one epitaxial pattern unit 401, and the distance from the epitaxial pattern unit 401 near the edge of the light-emitting diode to the edge of the light-emitting diode is 0.5 to 5 μm.

[0148] Exemplarily, the distance from the epitaxial pattern unit 401 to the edge of the light-emitting diode is 3 μm.

[0149] In the embodiment of the present disclosure, the epitaxial pattern unit 401 includes a plurality of depressions 402, and the spacing between adjacent depressions 402 may be 0.2 to 3 μm.

[0150] Exemplarily, the spacing between adjacent depressions 402 is 2 μm.

[0151] In the embodiment of the present disclosure, the light-emitting diode further includes:

[0152] a bonding layer 104 and a first substrate 105. The first semiconductor layer 101, the active layer 102, and the second semiconductor layer 103 are bonded to the first substrate 105 through the bonding layer 104.

[0153] Wherein, the second semiconductor layer 103 has an epitaxial pattern unit 401, and the epitaxial pattern unit 401 includes a plurality of depressions 402.

[0154] In the embodiment of the present disclosure, since the epitaxial structure is fabricated on the patterned substrate shown in Figure 4 , the second semiconductor layer 103 has an epitaxial pattern unit 401 corresponding to the substrate provided by Figure 4 .

[0155] The shape of the depressions 402 in the epitaxial pattern unit 401 corresponds to the protrusions 203 in Figure 4 , and the arrangement of the plurality of depressions 402 corresponds to the arrangement of the plurality of protrusions 203 in Figure 4 .

[0156] In the embodiment of the present disclosure, the first substrate 105 is a thinned substrate.

[0157] In the embodiment of the present disclosure, the first substrate 105 is bonded to the first semiconductor layer 101 through the bonding layer 104.

[0158] In the embodiments of the present disclosure, the first substrate 105 may be any one of substrates such as a sapphire patterned substrate, a Si substrate, a SiC substrate, etc., and the present disclosure does not limit the material of the substrate.

[0159] Exemplarily, the first substrate 105 is a sapphire patterned substrate.

[0160] In the embodiments of the present disclosure, the thickness of the first substrate is 400 - 600 μm.

[0161] Exemplarily, the thickness of the first substrate is 500 μm.

[0162] In the embodiments of the present disclosure, the first semiconductor layer 101 may be a P-type semiconductor layer, and the second semiconductor layer 103 may be an N-type semiconductor layer.

[0163] In another example, the first semiconductor layer 101 may be an N-type semiconductor layer, and the second semiconductor layer 103 may be a P-type semiconductor layer.

[0164] In the embodiments of the present disclosure, the active layer 102 may be a multi-quantum well layer. For example, the multi-quantum well layer may include multiple periodically alternating quantum well layers and quantum barrier layers.

[0165] In the embodiments of the present disclosure, the material of the bonding layer 104 may be any one of photoresist, benzocyclobutene, and silicone.

[0166] Exemplarily, the material of the bonding layer 104 is silicone.

[0167] The above are only optional embodiments of the present disclosure and are not intended to limit the present disclosure. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present disclosure shall be included within the protection scope of the present disclosure.

Claims

1. A substrate, characterized in that, One side of the substrate has a patterned structure (201), the patterned structure (201) includes a plurality of pattern units (202), each of the pattern units (202) includes a plurality of protrusions (203), and the distance between two adjacent pattern units (202) is greater than the distance between adjacent protrusions (203) in the same pattern unit (202).

2. The substrate according to claim 1, wherein The distance between two adjacent pattern units (202) is 1 to 15 μm.

3. The substrate according to claim 1 or 2, characterized in that, The distance between adjacent protrusions (203) in the same pattern unit (202) is 0.2 to 3 μm.

4. The substrate according to claim 1 or 2, characterized in that, The patterned structure (201) further includes at least one alignment mark (301).

5. A light emitting diode, characterized in that, The light-emitting diode includes: a first semiconductor layer (101), an active layer (102), and a second semiconductor layer (103); in the surface of the first semiconductor layer (101) far from the active layer (102), there is at least one epitaxial pattern unit (401), and the distance from the epitaxial pattern unit (401) near the edge of the light-emitting diode to the edge of the light-emitting diode is 0.5 to 5 μm.

6. The light-emitting diode according to claim 5, characterized in that, The epitaxial pattern unit (401) includes a plurality of depressions (402), and the distance between adjacent depressions (402) is 0.2 to 3 μm.

7. A method for manufacturing a light-emitting diode, characterized in that, The method includes: Growing an epitaxial layer on a temporary substrate, one side of the temporary substrate for growing the epitaxial layer has a patterned structure, the patterned structure includes a plurality of pattern units, each of the pattern units includes a plurality of protrusions, and the distance between two adjacent pattern units is greater than the distance between adjacent protrusions in the same pattern unit; Performing patterning on the epitaxial layer to obtain a plurality of epitaxial structures, and the edge of each epitaxial structure is located between two adjacent pattern units; Removing the temporary substrate.

8. The method according to claim 7, wherein The distance between two adjacent pattern units is 1 to 15 μm.

9. The method according to claim 7, characterized in that, There is at least one epitaxial pattern unit on the surface of the epitaxial layer, and the distance from the edge of each epitaxial structure to the epitaxial pattern unit near the edge of the light-emitting diode wrapped by it is 0.5 to 5 μm.

10. The method according to any one of claims 7 to 9, characterized in that The patterned structure further includes at least one alignment mark, and performing patterning on the epitaxial layer includes: Depositing a photoresist film on the epitaxial layer; Controlling the position of the mask plate with the alignment mark as a reference, exposing and developing the photoresist film to obtain a photoresist mask; Etching the epitaxial structure under the shielding of the photoresist mask; Removing the photoresist mask.

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