Semiconductor substrates and their preparation methods and methods for preparing light-emitting substrates
By forming an array of protrusions and isolation trenches on the substrate, the problem of sidewall damage to the light-emitting element caused by ICP etching is solved, the light extraction efficiency is improved, the transfer process is simplified, and the fabrication cost is reduced.
Patent Information
- Application Number
- CN202510783797.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-12
- Publication Date
- 2025-11-14
- Estimated Expiration
- 2045-06-12
AI Technical Summary
In existing technologies, the high etching energy of ICP leads to damage to the sidewalls of the light-emitting element, resulting in a decrease in light extraction efficiency.
Multiple arrayed protrusions are formed on one side surface of the substrate, and isolation trenches are set between adjacent protrusions, making the depth of the isolation trenches greater than the thickness of the epitaxial layer, so that the epitaxial layer is naturally broken during the epitaxial process, avoiding the use of ICP etching.
This effectively avoids damage to the sidewalls of the light-emitting element, improves light extraction efficiency, simplifies the transfer process of the light-emitting element, and reduces manufacturing costs.
Smart Images

Figure CN120302787B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display technology, and in particular to a semiconductor substrate and a method for preparing the same and a method for preparing a light-emitting substrate. Background Technology
[0002] With the continuous advancement of display technology, semiconductor chips are being used more and more widely. As a new generation of semiconductor products, micro light-emitting diodes (Micro LEDs) have higher brightness, better luminous efficiency, and low power consumption and long lifespan compared to ordinary light-emitting diodes (LEDs), organic light-emitting diodes (OLEDs), and liquid crystal displays (LCDs). Therefore, they are highly favored by the market.
[0003] Currently, the fabrication process of semiconductor chips typically involves epitaxy on a substrate to form a single epitaxial layer, and then using etching processes such as inductively coupled plasma (ICP) etching to divide the epitaxial layer into multiple parts for forming multiple light-emitting elements.
[0004] However, due to the high energy of ICP etching, it often causes damage to the sidewalls of the light-emitting element, resulting in a decrease in the light extraction efficiency of the light-emitting element. Summary of the Invention
[0005] This application provides a semiconductor substrate and its preparation method, as well as a method for preparing a light-emitting substrate, aiming to solve the problem in the prior art where the high ICP etching energy causes easy damage to the sidewalls of the light-emitting element, resulting in a decrease in the light extraction efficiency of the light-emitting element.
[0006] To address the aforementioned technical problems, the first technical solution provided in this application is: to provide a semiconductor substrate, comprising:
[0007] Substrate;
[0008] Multiple light-emitting elements are arranged in an array on a substrate; each light-emitting element includes an epitaxial layer, a first electrode, and a second electrode. The epitaxial layer is disposed on one side of the substrate, and the first electrode and the second electrode are disposed on the side of the epitaxial layer away from the substrate.
[0009] Among them, a plurality of arrayed protrusions are formed on one side surface of the substrate, and a plurality of light-emitting elements are disposed on the protrusions one by one.
[0010] An isolation trench is provided between adjacent bosses. In the thickness direction of the substrate, the depth of the isolation trench is greater than the thickness of the epitaxial layer, so that the epitaxial layer on the adjacent bosses is broken at the isolation trench.
[0011] In some embodiments, the substrate includes a plurality of repeating units arranged in an array, each repeating unit including at least two bosses with different mesa heights, and the at least two bosses are arranged in an array.
[0012] In some embodiments, the height difference between the platform surfaces of two adjacent bosses is greater than the thickness of the epitaxial layer; the angle between the sidewall of the boss and the platform surface of the adjacent boss is less than or equal to 90°.
[0013] In addition to the light-emitting element on the highest platform, the heights of the first and second electrodes of the other light-emitting elements are both higher than the height of the highest platform.
[0014] To address the aforementioned technical problems, the second technical solution provided in this application is: a method for preparing a semiconductor substrate. This method for preparing the semiconductor substrate includes:
[0015] Provide substrate;
[0016] The substrate is patterned to form multiple arrayed protrusions on one side of the substrate surface, and isolation grooves are formed between adjacent protrusions.
[0017] An epitaxial layer is grown on a protrusion; wherein, in the thickness direction of the substrate, the depth of the isolation trench is greater than the thickness of the epitaxial layer, so that the epitaxial layer on the adjacent protrusion is broken at the isolation trench.
[0018] The first and second electrodes are fabricated on the epitaxial layer.
[0019] In some embodiments, the step of patterning the substrate includes:
[0020] The substrate is subjected to step patterning to form multiple step-shaped protrusions arranged in an array on the substrate; multiple repeating units arranged in an array are formed on the substrate, each repeating unit including at least two protrusions with different mesa heights, and at least two protrusions are arranged in an array; the difference in mesa height between two adjacent protrusions is greater than the thickness of the epitaxial layer; the angle between the sidewall of the protrusion and the mesa of the adjacent protrusion is less than or equal to 90°.
[0021] The substrate is patterned with grooves to form isolation grooves between adjacent bosses.
[0022] In some embodiments, the epitaxial layer, the first electrode, and the second electrode form a light-emitting element; in all light-emitting elements except the one on the highest mesa, the height of the first electrode and the second electrode are both higher than the height of the highest mesa.
[0023] In some embodiments, the step of growing an epitaxial layer on the boss includes:
[0024] The first epitaxial layer grows on the protrusion;
[0025] A sacrificial layer is fabricated in the electrode region on the first epitaxial layer; the electrode region is used to fabricate the first electrode; wherein the material of the sacrificial layer is different from the material of the epitaxial layer;
[0026] A second epitaxial layer is grown on the first epitaxial layer and the sacrificial layer; wherein the thickness of the sacrificial layer is greater than the thickness of the second epitaxial layer; and the angle between the sidewall of the sacrificial layer and the surface of the first epitaxial layer away from the substrate is less than or equal to 90°.
[0027] The sacrificial layer is stripped away, and the sacrificial layer and the second epitaxial layer formed on the sacrificial layer are removed;
[0028] The steps for fabricating the first and second electrodes on the epitaxial layer include:
[0029] The first electrode is fabricated on the exposed first epitaxial layer;
[0030] A second electrode is fabricated on the second epitaxial layer.
[0031] To address the aforementioned technical problems, the third technical solution provided in this application is: a method for preparing a light-emitting substrate. The method for preparing the light-emitting substrate includes:
[0032] Provides driving substrates and semiconductor substrates;
[0033] Align and bond the light-emitting element on the semiconductor substrate with the driving substrate;
[0034] The aligned light-emitting element is peeled off from the substrate.
[0035] In some embodiments, the semiconductor substrate includes a substrate and light-emitting elements disposed on the substrate; a plurality of arrayed protrusions are formed on one side surface of the substrate, and a plurality of light-emitting elements are disposed on the protrusions in a corresponding manner; wherein, the substrate includes a plurality of repeating units arranged in an array, each repeating unit including at least two protrusions with different mesa heights, and at least two protrusions are arranged in an array.
[0036] The steps of aligning and bonding the light-emitting element on the semiconductor substrate to the driving substrate include:
[0037] Using the side of the substrate furthest from the light-emitting element as the base, the highest light-emitting element is aligned and bonded to the driving substrate; wherein, the driving substrate includes a driving circuit layer and multiple electrode groups disposed on the driving circuit layer; each electrode group includes a first driving electrode and a second driving electrode, which are respectively used for alignment and bonding with the first electrode and the second electrode of the light-emitting element; the distance between any protrusion in the repeating unit and the corresponding protrusion in the adjacent repeating unit is the transfer distance, and the distance between two adjacent electrode groups is equal to the transfer distance.
[0038] In some embodiments, the method for preparing the light-emitting substrate further includes:
[0039] Repeat the steps:
[0040] The highest light-emitting element is aligned and bonded to the driving substrate;
[0041] The aligned and bonded light-emitting elements are peeled off from the substrate;
[0042] The highest point of the highest light-emitting element is lower than the platform of the highest boss. The process includes, prior to the step of aligning and bonding the highest light-emitting element to the driving substrate:
[0043] The highest boss is etched to reduce its height, so that the highest point of the highest light-emitting element is higher than the surface of the highest boss.
[0044] The beneficial effects of this application are as follows: Unlike existing technologies, this application provides a semiconductor substrate and its fabrication method, as well as a method for fabricating a light-emitting substrate. The semiconductor substrate includes a substrate and multiple light-emitting elements. The multiple light-emitting elements are arranged in an array on the substrate. Each light-emitting element includes an epitaxial layer, a first electrode, and a second electrode. The epitaxial layer is disposed on one side of the substrate, and the first and second electrodes are disposed on the side of the epitaxial layer away from the substrate. This application forms multiple arrayed protrusions on one side surface of the substrate and provides isolation trenches between adjacent protrusions, making the depth of the isolation trenches greater than the thickness of the epitaxial layer. Therefore, when epitaxial layers are formed on the substrate using epitaxy, the epitaxial layers on adjacent protrusions can be naturally separated at the isolation trenches. In other words, by setting the isolation trenches, the semiconductor layer can be naturally separated on the substrate to form multiple epitaxial layers, eliminating the need for ICP etching to divide the semiconductor layer and form multiple epitaxial layers. This effectively avoids the problem of sidewall damage to the light-emitting elements caused by the high energy of ICP etching, thereby reducing the decrease in the light extraction efficiency of the light-emitting elements. Attached Figure Description
[0045] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.
[0046] Figure 1 This is a cross-sectional structural schematic diagram of the semiconductor substrate provided in the first embodiment of this application;
[0047] Figure 2 This is a schematic diagram of the planar structure of the semiconductor substrate provided in the second embodiment of this application;
[0048] Figure 3 yes Figure 2 Schematic diagram of the cross-sectional structure along the AA direction;
[0049] Figure 4 This is a schematic diagram of the planar structure of the semiconductor substrate provided in the third embodiment of this application;
[0050] Figure 5 This is a schematic diagram of the planar structure of the semiconductor substrate provided in the fourth embodiment of this application;
[0051] Figure 6 This is a schematic flowchart of a method for preparing a semiconductor substrate according to an embodiment of this application;
[0052] Figure 7 yes Figure 6 A flowchart illustrating one embodiment of step S20 is provided;
[0053] Figure 8 It corresponds Figure 7 A schematic diagram of the process flow provided in one embodiment;
[0054] Figure 9 yes Figure 6 A flowchart illustrating one embodiment of steps S30 and S40;
[0055] Figure 10 It corresponds Figure 9 A schematic diagram of the process flow provided in one embodiment;
[0056] Figure 11 This is a schematic flowchart of a method for preparing a light-emitting substrate according to an embodiment of this application;
[0057] Figure 12 yes Figure 11 A flowchart illustrating one embodiment of step S60 is provided;
[0058] Figure 13 It corresponds Figure 12 A schematic diagram of the process flow provided in one embodiment;
[0059] Figure 14 This is provided by another implementation method. Figure 11 A schematic diagram of the process flow for step S60;
[0060] Figure 15 This is a schematic diagram of the structure of a light-emitting substrate provided in an embodiment of this application;
[0061] Figure 16 This is a schematic diagram of the structure of a display device provided in an embodiment of this application.
[0062] Figure label:
[0063] 100, Semiconductor substrate; 10, Substrate; 20, Light-emitting element; 21, Epitaxial layer; 22, First electrode; 23, Second electrode; 12, Isolation trench; 11, Boss; 30, Repeating unit; 211, First epitaxial layer; 2111, First semiconductor layer; 212, Second epitaxial layer; 2121, Light-emitting layer; 2122, Second semiconductor layer; 24, Sacrificial layer; 300, Light-emitting substrate; 200, Driving substrate; 201, Substrate; 202, Driving circuit layer; 203, Electrode group; 2031, First driving electrode; 2032, Second driving electrode; X, First direction; Y, Second direction; A1, First height; B1, Second height; A2, Third height; B2, Fourth height; C1, Fifth height; C2, Sixth height. Detailed Implementation
[0064] The embodiments of this application will now be described in detail with reference to the accompanying drawings.
[0065] In the following description, specific details such as particular system architectures, interfaces, and technologies are presented for illustrative purposes rather than for limiting purposes, in order to provide a thorough understanding of this application.
[0066] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.
[0067] The terms "first," "second," and "third" in this application are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified. All directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of this application are only used to explain the relative positional relationships and movements between components in a specific orientation (as shown in the figures). If the specific orientation changes, the directional indications also change accordingly. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.
[0068] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0069] The present application will now be described in detail with reference to the accompanying drawings and embodiments.
[0070] Please see Figure 1 , Figure 1 This is a cross-sectional structural schematic diagram of a semiconductor substrate provided in the first embodiment of this application. In this embodiment, a semiconductor substrate 100 is provided, the semiconductor substrate 100 comprising:
[0071] Substrate 10;
[0072] Multiple light-emitting elements 20 are arranged in an array on the substrate 10. Each light-emitting element 20 includes an epitaxial layer 21, a first electrode 22, and a second electrode 23. The epitaxial layer 21 is disposed on one side of the substrate 10, and the first electrode 22 and the second electrode 23 are disposed on the side of the epitaxial layer 21 away from the substrate 10.
[0073] Among them, a plurality of arrayed protrusions 11 are formed on one side surface of the substrate 10, and a plurality of light-emitting elements 20 are disposed on the protrusions 11 in a corresponding manner.
[0074] An isolation groove 12 is provided between adjacent bosses 11. In the thickness direction of the substrate 10, the depth of the isolation groove 12 is greater than the thickness of the epitaxial layer 21, so that the epitaxial layer 21 on the adjacent bosses 11 is broken at the isolation groove 12.
[0075] The substrate 10 serves as the basic support structure for the entire substrate, providing an attachment surface for the light-emitting element 20. In some embodiments, the material of the substrate 10 may include sapphire, whose main components are one or more of aluminum oxide (Al2O3), silicon carbide (SiC), single-crystal silicon (Si), gallium nitride (GaN), gallium arsenide (GaAs), aluminum nitride (AlN), and zinc oxide (ZnO). In other embodiments, the material of the substrate 10 may also include other materials such as gallium phosphide (GaP), specifically those capable of growing the epitaxial layer 21 of the light-emitting element 20 on the substrate 10.
[0076] The light-emitting element 20 is located on one side surface of the substrate 10 and is arranged in an array on the substrate 10. The light-emitting element 20 includes an epitaxial layer 21, a first electrode 22, and a second electrode 23. The epitaxial layer 21 is formed on one side surface of the substrate 10, and the material of the epitaxial layer 21 may include P-type semiconductor materials and N-type semiconductor materials, such as P-type gallium nitride (P-GaN) and N-type gallium nitride (N-GaN), or other materials. The first electrode 22 corresponds to the P-type semiconductor layer, and the second electrode 23 corresponds to the N-type semiconductor layer; or, the first electrode 22 corresponds to the N-type semiconductor layer, and the second electrode 23 corresponds to the P-type semiconductor layer, that is, the first electrode 22 and the second electrode 23 are respectively the anode electrode and the cathode electrode, and are disposed on the side surface of the epitaxial layer 21 away from the substrate 10.
[0077] Specifically, the first electrode 22 and the second electrode 23 can be made of conductive materials, which may include metallic materials, transparent conductive materials, etc. Among them, metallic materials include one or more of gold (Au), silver (Ag), aluminum (Al), and nickel (Ni), and transparent conductive materials include one or more of indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), aluminum zinc oxide (AZO), and gallium zinc oxide (GZO). In specific implementations, the first electrode 22 and the second electrode 23 can be multilayer structures, such as multilayer metal electrodes of titanium / platinum / gold (Ti / Pt / Au), or multilayer metal electrodes of nickel / gold (Ni / Au), or multilayer sandwich structure electrodes of ITO / metal / ITO, which can be specifically set according to the actual application.
[0078] In this embodiment, a plurality of arrayed protrusions 11 are formed on one side surface of the substrate 10, and an isolation trench 12 is provided between adjacent protrusions 11. The depth of the isolation trench 12 is greater than the thickness of the epitaxial layer 21. That is, one side of the substrate 10 has a plurality of protrusions 11, which are arranged in an array, and adjacent protrusions 11 are separated by the isolation trench 12. Light-emitting elements 20 are disposed on the protrusions 11 in a corresponding manner, so that the light-emitting elements 20 are arranged in an array like the protrusions 11. Furthermore, the depth of the isolation trench 12 is greater than the thickness of the epitaxial layer 21. This allows the epitaxial layer 21 on adjacent protrusions 11 to be naturally separated at the isolation trench 12 during the fabrication of the epitaxial layer 21 of the light-emitting element 20, i.e., during the epitaxial layer 21 formation process on the substrate 10. This naturally forms multiple phase-spaced epitaxial layers 21 distributed in an array, eliminating the need to divide the semiconductor layer through ICP etching to form multiple independent epitaxial layers 21. This effectively avoids the problem of sidewall damage to the light-emitting element 20 caused by the high energy of ICP etching, thereby improving the light extraction efficiency of the light-emitting element 20.
[0079] Please see Figure 2 and Figure 3 , Figure 2 This is a schematic diagram of the planar structure of the semiconductor substrate provided in the second embodiment of this application; Figure 3 yes Figure 2 A schematic diagram of the cross-sectional structure along the AA direction. In this embodiment, the substrate 10 includes a plurality of repeating units 30 arranged in an array, each repeating unit 30 including at least two protrusions 11 with different mesa heights, and the at least two protrusions 11 are arranged in an array.
[0080] Specifically, this can be understood as follows: on one side surface of the substrate 10, every adjacent group of protrusions 11 forms a repeating unit 30, and the mesa heights of the protrusions 11 in the repeating unit 30 are all different. Alternatively, it can be understood as follows: on one side surface of the substrate 10, multiple protrusions 11 are arranged in an array, and every adjacent group of protrusions 11 with different mesa heights forms a repeating unit 30, and the repeating units 30 are arranged in an array along the first direction X and the second direction Y. That is, the mesa heights of the protrusions 11 on one side surface of the substrate 10 are different, and they are arranged periodically along the first direction X and / or the second direction Y.
[0081] The height of the protrusion 11 is defined as the distance between the surface of the protrusion 11 closest to the light-emitting element 20 and the surface of the substrate 10 furthest from the light-emitting element 20. The first direction X and the second direction Y are defined as parallel to the substrate 10 and intersecting. This embodiment uses the first direction X as the row direction of the protrusion 11 array and the second direction Y as the column direction of the protrusion 11 array as an example for illustration.
[0082] In this embodiment, by configuring the protrusions 11 on the substrate 10 as described above, the height of the light-emitting elements 20 disposed on the protrusions 11 is set to be the same as the height of the platform of the protrusions 11. This results in each group of several adjacent light-emitting elements 20, with each group containing several light-emitting elements 20 having a different height. This configuration creates a height difference between the light-emitting elements 20 at different positions on the substrate 10, and this difference changes periodically. Therefore, along the first direction X, the distance between each pair of adjacent light-emitting elements 20 of the same height in each row is the same, and along the second direction Y, the distance between each pair of adjacent light-emitting elements 20 of the same height in each column is the same. Thus, when transferring the light-emitting elements 20, they can be transferred sequentially from high to low height to the driving substrate 200, achieving selective transfer of the light-emitting elements 20 on the semiconductor substrate 100. This ensures that the density of the light-emitting elements 20 on the semiconductor substrate 100 is at least twice the sub-pixel density on the driving substrate 200, reducing the manufacturing cost of the semiconductor substrate 100.
[0083] Specifically, such as Figure 2 and Figure 3 As shown, in this embodiment, each repeating unit 30 includes two protrusions 11 with different platform heights. The two protrusions 11 with different heights are periodically arranged along the second direction Y, such that the platform heights of each column of protrusions 11 are periodically arranged with a first height A1 and a second height B1, wherein the first height A1 is higher than the second height B1.
[0084] With the above configuration, when transferring the light-emitting element 20 on the semiconductor substrate 100 to the driving substrate 200, since there is a height difference between the light-emitting elements 20, the light-emitting element 20 on the first height A1 boss 11 can be transferred to one driving substrate 200 first, and then the light-emitting element 20 on the second height B1 boss 11 can be transferred to another driving substrate 200 to achieve selective transfer.
[0085] Furthermore, along the first direction X, the distance between every two adjacent protrusions 11 in each row of protrusions 11 is the first distance; along the second direction Y, the distance between every two adjacent protrusions 11 in each column of protrusions 11 is the second distance; the first distance and the second distance may be the same or different, and can be set according to the distance between sub-pixels on the driving substrate 200 and the density design of the light-emitting element 20 on the substrate 10 as needed. Taking the two heights of the protrusion 11 in this embodiment as an example, by setting the first distance and the second distance in this way, the first distance along the first direction X is the same as the distance between every two adjacent sub-pixels on the driving substrate 200 in the first direction X. Along the second direction Y, the distance between the protrusion 11 of the first height A1 and the protrusion 11 of the first height A1 in the next cycle, and the distance between the protrusion 11 of the second height B1 and the protrusion 11 of the second height B1 in the next cycle are all the same as the distance between every two adjacent sub-pixels on the driving substrate 200 in the second direction Y. Therefore, when selectively transferring the light-emitting element 20, the first electrode 22 and the second electrode 23 of the light-emitting element 20 can be better aligned and bonded with the driving electrode on the driving substrate 200, and the alignment accuracy is higher.
[0086] Please see Figure 4 , Figure 4 This is a schematic diagram of the planar structure of a semiconductor substrate provided in the third embodiment of this application. In this embodiment, the substrate 10 includes a plurality of repeating units 30 arranged in an array, each repeating unit 30 including four protrusions 11 with different mesa heights, and these four protrusions 11 are arranged in an array.
[0087] Specifically, on the substrate 10, every four adjacent protrusions 11 with different mesa heights form a repeating unit 30. In each repeating unit 30, the four protrusions 11 have different mesa heights and are arranged in a 2×2 matrix. The mesa heights from highest to lowest are the first height A1, the second height B1, the third height A2, and the fourth height B2. That is, on the substrate 10, every four protrusions 11 are arranged periodically along the first direction X and the second direction Y, forming a repeating unit 30, and the mesa heights of the four protrusions 11 in each period are different.
[0088] In this embodiment, the semiconductor substrate 100 can transfer the light-emitting elements 20 from high to low in sequence to the light-emitting elements 20 on the first height A1 boss 11, the second height B1 boss 11, the third height A2 boss 11, and the fourth height B2 boss 11, so as to transfer them to their respective corresponding driving substrates 200.
[0089] Please see Figure 5 , Figure 5This is a schematic diagram of the planar structure of a semiconductor substrate provided in the fourth embodiment of this application. In this embodiment, each repeating unit 30 includes six protrusions 11 with different mesa heights, and these six protrusions 11 are arranged in an array.
[0090] Specifically, on the substrate 10, every six adjacent protrusions 11 with different mesa heights form a repeating unit 30. In each repeating unit 30, the six protrusions 11 have different mesa heights and are arranged in a 2×3 matrix. The mesa heights from highest to lowest are the first height A1, the second height B1, the third height A2, the fourth height B2, the fifth height C1, and the sixth height C2. That is, on the substrate 10, every six protrusions 11 are arranged periodically along the first direction X and the second direction Y, forming a repeating unit 30, and the mesa heights of the six protrusions 11 in each period are different.
[0091] Similarly, when transferring the light-emitting elements 20 on the semiconductor substrate 100 provided in this embodiment, the light-emitting elements 20 on the first height A1 boss 11, the second height B1 boss 11, the third height A2 boss 11, the fourth height B2 boss 11, the fifth height C1 boss 11, and the sixth height C2 boss 11 can be transferred sequentially from high to low to their respective driving substrates 200.
[0092] In other embodiments, the number of protrusions 11 in each repeating unit 30 can be specifically set according to the distribution density of the light-emitting elements 20 on the substrate 10 and the distribution density of the sub-pixels on the driving substrate 200, and is not specifically limited thereto. At the same time, the arrangement of at least two protrusions 11 in each repeating unit 30 can also be set according to the arrangement design of the sub-pixels on the driving substrate 200, and is not specifically limited thereto.
[0093] Please continue reading. Figure 3 In a specific embodiment, the height difference between the platforms of two adjacent bosses 11 is greater than the thickness of the epitaxial layer 21; the angle between the sidewall of the boss 11 and the platform of the adjacent boss 11 is less than or equal to 90°.
[0094] Specifically, by making the height difference between two adjacent protrusions 11 greater than the thickness of the epitaxial layer 21, the protrusion 11 with the higher protrusion has a higher protrusion surface than the upper surface of the epitaxial layer 21 on the adjacent lower protrusion 11. This further allows the epitaxial layer 21 on adjacent protrusions 11 to naturally form a discontinuity between the protrusions 11. The upper surface of the epitaxial layer 21 is the surface of the epitaxial layer 21 away from the substrate 10.
[0095] Furthermore, the angle between the sidewall of the boss 11 and the mesa of the adjacent boss 11 is less than or equal to 90°. Typically, to ensure the uniformity of the thickness of the epitaxial layer 21 on the boss 11, the mesa of the boss 11 is parallel to the surface of the substrate 10 away from the light-emitting element 20. The sidewall of the boss 11 can be perpendicular to the mesa of the boss 11, or the sidewall of the boss 11 can be inclined inwards towards the boss 11, so that the angle between the sidewall of the boss 11 and the mesa of the adjacent boss 11 is a right angle or an acute angle. This further avoids the situation where the epitaxial layer 21 grows on the sidewall of the boss 11, so that the epitaxial layers 21 on the adjacent bosses 11 are separated and formed independently on the boss 11.
[0096] Specifically, in the above embodiments, the width of the isolation groove 12 between adjacent protrusions 11 can be set according to the distribution density of the light-emitting element 20 and the spacing between adjacent sub-pixels on the driving substrate 200 to be transferred, so that the distance between two adjacent protrusions 11 of the same height is the same as the spacing between the corresponding adjacent sub-pixels on the driving substrate 200 to be transferred.
[0097] In some embodiments, the heights of the first electrode 22 and the second electrode 23 of the light-emitting elements 20, other than the light-emitting element 20 on the boss 11 with the highest platform height, are both higher than the highest platform height.
[0098] Specifically, except for the highest protrusion 11, the heights of the first electrode 22 and the second electrode 23 of the light-emitting elements 20 on the other protrusions 11 are all higher than the height of the platform of the highest protrusion 11. The height of the first electrode 22 is the distance from the end face of the first electrode 22 away from the epitaxial layer 21 to the side surface of the substrate 10 away from the light-emitting element 20, and the height of the second electrode 23 is the distance from the end face of the second electrode 23 away from the epitaxial layer 21 to the side surface of the substrate 10 away from the light-emitting element 20. That is, except for the highest protrusion 11, the first electrode 22 and the second electrode 23 of the light-emitting elements 20 on the other protrusions 11 all protrude beyond the platform of the highest protrusion 11 in a direction perpendicular to the substrate 10. With this configuration, when transferring the light-emitting element 20 on the non-highest protrusion 11, the first electrode 22 and the second electrode 23 of the light-emitting element 20 can be directly aligned and bonded to the driving electrode on the driving substrate 200, without having to etch the highest protrusion 11 to reduce its height, or using a specially structured intermediate transfer substrate to transfer the light-emitting element 20, thereby simplifying the transfer process of the light-emitting element 20 and improving the transfer efficiency.
[0099] Specifically, the semiconductor substrate 100 provided in the above embodiments can be prepared by the preparation method provided in the following embodiments. For specific preparation methods, please refer to the relevant description below.
[0100] Please see Figure 1 and Figure 6 , Figure 6 This is a schematic flowchart illustrating a method for fabricating a semiconductor substrate according to an embodiment of this application. In this embodiment, a method for fabricating a semiconductor substrate 100 is provided. The method for fabricating the semiconductor substrate 100 includes:
[0101] S10: Provides substrate 10;
[0102] S20: The substrate 10 is patterned to form a plurality of arrayed protrusions 11 on one side surface of the substrate 10, and an isolation groove 12 is formed between adjacent protrusions 11.
[0103] S30: An epitaxial layer 21 is grown on the boss 11; wherein, in the thickness direction of the substrate 10, the depth of the isolation trench 12 is greater than the thickness of the epitaxial layer 21, so that the epitaxial layer 21 on the adjacent boss 11 is broken at the isolation trench 12.
[0104] S40: Fabricate a first electrode 22 and a second electrode 23 on the epitaxial layer 21.
[0105] In step S20, the substrate 10 is patterned using nanoimprinting or photolithography to form multiple arrayed protrusions 11 on one side of the substrate 10, and isolation trenches 12 are formed between adjacent protrusions 11. The specific structure and function of the protrusions 11 and isolation trenches 12 are the same as or similar to those of the protrusions 11 and isolation trenches 12 described in the previous embodiment, and can achieve the same technical effect. For details, please refer to the relevant description above.
[0106] In step S30, an epitaxial layer 21 is grown on the protrusion 11 using an epitaxial process. The epitaxial layer 21 includes a first epitaxial layer 211 and a second epitaxial layer 212 stacked together. The first epitaxial layer 211 includes a first semiconductor layer 2111, and the second epitaxial layer 212 includes a light-emitting layer 2121 and a second semiconductor layer 2122 stacked together. Specifically, the first semiconductor layer 2111 and the second semiconductor layer 2122 are an N-type semiconductor layer and a P-type semiconductor layer, respectively. The light-emitting layer 2121 can be a quantum well layer, such as a multiple quantum well (MQW) layer. The material of the light-emitting layer 2121 can specifically be gallium nitride (GaN). The materials of the N-type and P-type semiconductor layers are the same as those involved in the N-type and P-type semiconductor layers in the above embodiments, and can be referred to the relevant description above for details.
[0107] Specifically, in step S20, by forming an isolation trench 12 between adjacent bosses 11 and making the depth of the isolation trench 12 greater than the thickness of the epitaxial layer 21, in the epitaxial process of step S30, a natural break can be formed between the semiconductor layer in the isolation trench 12 and the epitaxial layer 21 on the adjacent bosses 11. This allows the epitaxial layer 21 on the adjacent bosses 11 to be naturally broken at the isolation trench 12. It is no longer necessary to divide the entire semiconductor layer by adding an ICP etching process to form multiple independent epitaxial layers 21. This effectively avoids the problem of sidewall damage to the light-emitting element 20 caused by the high energy of ICP etching, thereby improving the light extraction efficiency of the light-emitting element 20.
[0108] In step S40, a first electrode 22 is fabricated on the exposed first semiconductor layer 2111, and a second electrode 23 is fabricated on the second semiconductor layer 2122, thereby obtaining a light-emitting element 20.
[0109] Please see Figure 7 and Figure 8 , Figure 7 yes Figure 6 A flowchart illustrating one embodiment of step S20 is provided. Figure 8 It corresponds Figure 7 A schematic diagram of the process flow provided in one embodiment. In this embodiment, step S20 specifically includes:
[0110] S21: Perform step patterning on the substrate 10 to form multiple step-shaped protrusions 11 arranged in an array on the substrate 10;
[0111] S22: The substrate 10 is patterned with grooves to form an isolation groove 12 between adjacent bosses 11.
[0112] In this embodiment, a plurality of repeating units 30 are formed on the substrate 10 in an array, each repeating unit 30 including at least two protrusions 11 with different mesa heights, and the at least two protrusions 11 are arranged in an array; the difference in mesa height between two adjacent protrusions 11 is greater than the thickness of the epitaxial layer 21; the angle between the sidewall of the protrusion 11 and the mesa of the adjacent protrusion 11 is less than or equal to 90°.
[0113] Specifically, in step S21, a patterning process can be performed on one side surface of the substrate 10 using nanoimprint lithography or photolithography to form multiple stepped protrusions 11 arranged in an array on the substrate 10. These protrusions 11 can be divided into multiple repeating units 30 arranged in an array. Each repeating unit 30 includes at least two protrusions 11 with different mesa heights, and these two protrusions with different mesa heights are arranged in an array within the repeating unit 30. Furthermore, the difference in mesa height between adjacent protrusions 11 is greater than the thickness of the epitaxial layer 21. The specific structure and function of the protrusions 11 are the same as or similar to those described in the previous embodiments, and they achieve the same technical effects. For details, please refer to the relevant description above.
[0114] In step S22, the substrate 10 is further patterned again using nanoimprinting or photolithography to form an isolation trench 12 between adjacent protrusions 11, thereby separating each protrusion 11. The depth of the isolation trench 12 is greater than the thickness of the epitaxial layer 21, and the angle between the sidewall of the protrusion 11 and the mesa of the adjacent protrusion 11 is a right angle or an acute angle.
[0115] By using steps S21 and S22, the above-described protrusion 11 structure and isolation trench 12 structure are formed on one side surface of the substrate 10. In the epitaxial process on the substrate 10, a natural break can be formed between the semiconductor layer in the isolation trench 12 and the epitaxial layer 21 on the adjacent protrusion 11, thereby causing the epitaxial layer 21 on the adjacent protrusion 11 to naturally break at the isolation trench 12.
[0116] Specifically, the epitaxial layer 21, the first electrode 22 and the second electrode 23 on each boss 11 form a light-emitting element 20; among the other light-emitting elements 20 except the light-emitting element 20 on the boss 11 with the highest platform height, the heights of the first electrode 22 and the second electrode 23 are all higher than the highest platform height.
[0117] In a specific embodiment, the height of the platform of the protrusion 11 is controlled through step S22, so that, except for the highest protrusion 11, the first electrode 22 and the second electrode 23 of the light-emitting element 20 on other protrusions 11 all protrude beyond the platform of the highest protrusion 11 in a direction perpendicular to the substrate 10. The semiconductor substrate 100 obtained through this embodiment allows the first electrode 22 and the second electrode 23 of the light-emitting element 20 to be directly aligned and bonded to the driving electrode on the driving substrate 200 when transferring light-emitting elements 20 on non-highest protrusions 11, without needing to etch the highest protrusion 11 to reduce its height, or to use a specially structured intermediate transfer substrate to transfer the light-emitting element 20, thereby simplifying the transfer process of the light-emitting element 20 and improving transfer efficiency.
[0118] Please see Figure 9 and Figure 10 , Figure 9 yes Figure 6 A flowchart illustrating one embodiment of steps S30 and S40 is provided. Figure 10 It corresponds Figure 9 A schematic diagram of the process flow provided in one embodiment. In this embodiment, step S30 specifically includes:
[0119] S31: The first epitaxial layer 211 is grown on the boss 11;
[0120] S32: A sacrificial layer 24 is formed in the electrode region on the first epitaxial layer 211; the electrode region is used to form the first electrode 22; wherein, the material of the sacrificial layer 24 is different from the material of the epitaxial layer 21;
[0121] S33: A second epitaxial layer 212 is grown on the first epitaxial layer 211 and the sacrificial layer 24; wherein the thickness of the sacrificial layer 24 is greater than the thickness of the second epitaxial layer 212; and the angle between the sidewall of the sacrificial layer 24 and the surface of the first epitaxial layer 211 away from the substrate 10 is less than or equal to 90°.
[0122] S34: Peel off the sacrificial layer 24 and remove the sacrificial layer 24 and the second epitaxial layer 212 formed on the sacrificial layer 24;
[0123] Step S40 includes:
[0124] S41: Fabricate the first electrode 22 on the exposed first epitaxial layer 211;
[0125] S42: Fabricate a second electrode 23 on the second epitaxial layer 212.
[0126] In step S31, the first epitaxial layer 211 may include a first semiconductor layer 2111, which may be an N-type semiconductor layer or a P-type semiconductor layer. In step S32, a sacrificial layer 24 is formed in the electrode region of the first epitaxial layer 211. The material of the sacrificial layer 24 may be a different material from that of the epitaxial layer 21, such as photoresist, polymethyl methacrylate (PMMA), or silicon dioxide (SiO2). The sacrificial layer 24 may be formed by patterning processes such as photolithography, and its thickness is greater than that of the second epitaxial layer 212.
[0127] In step S33, a second epitaxial layer 212 is grown on the first epitaxial layer 211 and the sacrificial layer 24. Since the thickness of the sacrificial layer 24 is greater than the thickness of the second epitaxial layer 212, the second epitaxial layer 212 on the first epitaxial layer 211 and the second epitaxial layer 212 on the sacrificial layer 24 are naturally separated. Therefore, when the sacrificial layer 24 is peeled off in step S34, the second epitaxial layer 212 on the sacrificial layer 24 is also removed, exposing the area of the first epitaxial layer 211 corresponding to the first electrode 22, facilitating the fabrication of the first electrode 22 on the first epitaxial layer 211. This embodiment eliminates the need for ICP etching to expose the first epitaxial layer 211, further avoiding sidewall damage to the light-emitting element 20 caused by high ICP etching energy, and further improving the light extraction efficiency of the light-emitting element 20.
[0128] Furthermore, the sacrificial layer 24 can be fabricated such that the angle between the sidewall of the sacrificial layer 24 and the surface of the first epitaxial layer 211 away from the substrate 10 is a right angle or an acute angle, that is, the sacrificial layer 24 is rectangular or inverted trapezoidal. In this way, in step S33, it is further ensured that the second epitaxial layer 212 on the first epitaxial layer 211 and the second epitaxial layer 212 on the sacrificial layer 24 are naturally disconnected, reducing the need for further optimization of the second epitaxial layer 212.
[0129] Please see Figure 11 , Figure 11 This is a schematic flowchart of a method for fabricating a light-emitting substrate according to an embodiment of this application. In this embodiment, a method for fabricating a light-emitting substrate 300 is provided, the method comprising:
[0130] S50: Provides a driving substrate 200 and a semiconductor substrate 100;
[0131] S60: Transfer the light-emitting element 20 on the semiconductor substrate 100 to the driving substrate 200 and align and bond it with the driving substrate 200.
[0132] The semiconductor substrate 100 is the semiconductor substrate 100 provided in the above technical solution. The structure and function of the semiconductor substrate 100 are the same as or similar to the structure and function of the semiconductor substrate 100 provided in the above embodiments, and can achieve the same technical effect. For details, please refer to the detailed description above, which will not be repeated here.
[0133] In this embodiment, the driving substrate 200 is a circuit board used to drive the light-emitting element 20 to emit light. In this embodiment, by providing the semiconductor substrate 100 provided in the above technical solution, the light-emitting element 20 on the semiconductor substrate 100 is transferred to the driving substrate 200 and aligned and bonded to the driving substrate 200, thereby obtaining a light-emitting substrate 300 with higher light extraction efficiency for its light-emitting element 20. The light-emitting substrate 300 obtained in this embodiment can be used as a backlight, light source, or display panel.
[0134] Please see Figure 12 and Figure 13 , Figure 12 yes Figure 11 A flowchart illustrating one embodiment of step S60 is provided. Figure 13 It corresponds Figure 12 A schematic diagram of the process flow provided in one embodiment. In this embodiment, the semiconductor substrate 100 includes a substrate 10 and light-emitting units disposed on the substrate 10; a plurality of arrayed protrusions 11 are formed on one side surface of the substrate 10, and a plurality of light-emitting elements 20 are disposed on the protrusions 11 in a corresponding manner; wherein, the substrate 10 includes a plurality of arrayed repeating units 30, each repeating unit 30 including at least two protrusions 11 with different mesa heights, and at least two protrusions 11 are arrayed.
[0135] Step S60 includes:
[0136] S61: Using the side of the substrate 10 furthest from the light-emitting element 20 as the base, align and bond the highest light-emitting element 20 with the driving substrate 200;
[0137] S62: Peel the aligned and bonded light-emitting element 20 from the substrate 10;
[0138] S63: Repeat steps S61 and S62.
[0139] In step S61, the driving substrate 200 includes a driving circuit layer 202 and a plurality of electrode groups disposed on the driving circuit layer 202; each electrode group includes a first driving electrode 2031 and a second driving electrode 2032, which are respectively used for alignment and bonding with the first electrode 22 and the second electrode 23 of the light-emitting element 20; the distance between any protrusion 11 in the repeating unit 30 and the corresponding protrusion 11 in the adjacent repeating unit 30 is the transfer distance, and the distance between two adjacent electrode groups is equal to the transfer distance.
[0140] The driving substrate 200 includes a substrate 201, a driving circuit layer 202, and multiple electrode groups 203 disposed on the driving circuit layer 202. The first driving electrode 2031 and the second driving electrode 2032 in the electrode groups 203 are electrically connected to the driving circuit layer 202 to transmit driving signals to the light-emitting element 20. Specifically, the first driving electrode 2031 and the second driving electrode 2032 are respectively used for alignment and bonding with the first electrode 22 and the second electrode 23 of the light-emitting element 20, so that the driving circuit layer 202 forms an electrical connection with the light-emitting element 20 through the first driving electrode 2031 and the second driving electrode 2032. For example, bonding can be performed using solder paste or anisotropic conductive adhesive to fix the light-emitting element 20 on the driving substrate 200, forming a stable electrical connection.
[0141] Specifically, in step S61, with the side of the substrate 10 away from the light-emitting element 20 as the base, the first electrode 22 and the second electrode 23 of the highest light-emitting element 20 on the substrate 10 are aligned with the corresponding first driving electrode 2031 and the second driving electrode 2032 on the driving substrate 200, and then bonded by solder paste or anisotropic conductive adhesive to form a stable electrical connection.
[0142] The transfer distance is defined as the distance between any protrusion 11 in the repeating unit 30 and a corresponding protrusion 11 in an adjacent repeating unit 30. A corresponding protrusion 11 refers to a protrusion 11 in an adjacent repeating unit 30 with the same platform height. By making the distance between two adjacent electrode groups on the driving substrate 200 the same as the transfer distance, each of the highest light-emitting elements 20 can be aligned with its corresponding electrode group on the driving substrate 200 for bonding, improving alignment accuracy and achieving selective transfer of the light-emitting elements 20 on the semiconductor substrate 100. It can be understood that the distance between two adjacent electrode groups here is the same as the distance between adjacent sub-pixels mentioned above.
[0143] In step S62, the bonded light-emitting element 20 is peeled off from the substrate 10. Specifically, the peeling method can be laser lift-off (LLO) process, in which a laser is used to irradiate the substrate 10 from the bottom side. The laser passes through the substrate 10, and the energy is absorbed at the interface of the epitaxial layer 21 / substrate 10, so that the epitaxial layer 21 / substrate 10 interface undergoes thermal decomposition or vaporization and separation, thereby peeling the light-emitting element 20 off the substrate 10.
[0144] One transfer can be completed through the above steps S61 and S62. At this time, if there are still light-emitting elements 20 on the semiconductor substrate 100 that have not been transferred, steps S61 and S62 can be repeated to transfer the highest light-emitting element 20 among the remaining light-emitting elements 20 on the semiconductor substrate 100 to another corresponding driving substrate 200. It can be understood that after each transfer of the highest light-emitting element 20 and its separation from the substrate 10, the second highest light-emitting element 20 becomes the highest light-emitting element 20, and the next transfer can be performed.
[0145] Please see Figure 14 , Figure 14 This is provided by another implementation method. Figure 11 A schematic diagram of the process flow for step S60. In this embodiment, the highest point of the highest light-emitting element 20 is lower than the platform of the highest boss 11; the method for fabricating the light-emitting substrate 300 further includes the following steps before step S61:
[0146] S64: Etch the highest boss 11 to reduce its height, so that the highest point of the highest light-emitting element 20 is higher than the surface of the highest boss 11.
[0147] In this embodiment, after the light-emitting element 20 on the boss 11 with the highest platform height is transferred, the highest point of the remaining light-emitting element 20 on the semiconductor substrate 100 is lower than the platform of the highest boss 11. That is, the end face of the first electrode 22 and the second electrode 23 of the highest light-emitting element 20 away from the substrate 10 is lower than the platform of the highest boss 11.
[0148] To complete the transfer of the remaining light-emitting elements 20, the highest boss 11 can be etched before step S61. Dry etching can be used to reduce damage to the light-emitting elements 20. After etching the highest boss 11, its height is reduced, making the highest point of the highest light-emitting element 20 higher than the platform of the highest boss 11, thus allowing for the continued selective transfer of the light-emitting elements 20.
[0149] Please see Figure 15 , Figure 15 This is a schematic diagram of the structure of a light-emitting substrate provided in an embodiment of this application. This embodiment provides a light-emitting substrate 300, which includes a driving substrate 200 and a plurality of light-emitting elements 20 disposed on the driving substrate 200. The light-emitting substrate 300 can be used in a display panel, a backlight assembly, or a light-emitting panel.
[0150] The driving substrate 200 includes a substrate 201, a driving circuit layer 202, and multiple electrode groups 203. The specific structure and function of the driving substrate 200 are the same as or similar to those of the driving substrate 200 provided in the above embodiments, and can achieve the same technical effects. Specifically, the substrate 201 of the driving substrate 200 can be a transparent substrate. For example, the substrate 201 can be a glass substrate or a flexible substrate. For example, the flexible substrate 201 can be made of materials such as polyimide (PI), polyethylene terephthalate (PET), or a surface-treated polymer soft film. The light-emitting element 20 has the same or similar structure and function as the light-emitting element 20 in the above embodiments, and can achieve the same technical effects. For details, please refer to the detailed description above; it will not be repeated here. The light-emitting substrate 300 can be prepared by the preparation method provided in the above embodiments. For specific preparation methods, please refer to the relevant description above.
[0151] Please see Figure 16 , Figure 16 This is a schematic diagram of the structure of a display device provided in an embodiment of this application. This embodiment provides a display device including a light-emitting substrate 300 as described above.
[0152] In one specific embodiment, the light-emitting substrate 300 can serve as a display panel for displaying images.
[0153] In another specific embodiment, the light-emitting substrate 300 can also serve as the lamp board of the backlight assembly; the display device further includes a display panel, with the backlight assembly disposed opposite to the display panel for providing a surface light source to the display panel. The display panel can be a liquid crystal display or other display screen requiring a light source.
[0154] The display device can be any product or component with display functionality, such as a Micro LED display panel, a Mini LED display panel, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, or a navigator. This display device can be used to display images. This disclosure does not limit the type of display device.
[0155] The above are merely embodiments of this application and do not limit the scope of patent protection of this application. Any equivalent structural or procedural changes made using the content of this application’s specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this application.
Claims
1. A semiconductor substrate, comprising: Substrate; Multiple light-emitting elements are arranged in an array on the substrate; each light-emitting element includes an epitaxial layer, a first electrode, and a second electrode, wherein the epitaxial layer is disposed on one side of the substrate, and the first electrode and the second electrode are disposed on the side of the epitaxial layer away from the substrate; The feature is that a plurality of arrayed protrusions are formed on one side surface of the substrate, and a plurality of light-emitting elements are disposed on the protrusions in a corresponding manner; An isolation groove is provided between adjacent bosses. In the thickness direction of the substrate, the depth of the isolation groove is greater than the thickness of the epitaxial layer, so that the epitaxial layer on the adjacent bosses is broken at the isolation groove. The substrate includes a plurality of repeating units arranged in an array, each repeating unit including at least two protrusions with different mesa heights, and at least two protrusions arranged in an array; the difference in mesa height between two adjacent protrusions is greater than the thickness of the epitaxial layer; the angle between the sidewall of the protrusion and the mesa of the adjacent protrusion is less than or equal to 90°.
2. The semiconductor substrate according to claim 1, characterized in that, In addition to the light-emitting element on the highest platform, the heights of the first electrode and the second electrode are both higher than the highest platform height.
3. A method for preparing a semiconductor substrate, characterized in that, include: Provide substrate; The substrate is patterned to form a plurality of arrayed protrusions on one side surface of the substrate, and an isolation groove is formed between adjacent protrusions; An epitaxial layer is grown on the protrusion; wherein, in the thickness direction of the substrate, the depth of the isolation trench is greater than the thickness of the epitaxial layer, such that the epitaxial layer on adjacent protrusions is broken at the isolation trench; A first electrode and a second electrode are fabricated on the epitaxial layer; The step of patterning the substrate includes: The substrate is subjected to a step patterning process to form a plurality of step-shaped protrusions arranged in an array on the substrate; wherein, a plurality of repeating units arranged in an array are formed on the substrate, each repeating unit includes at least two protrusions with different mesa heights, and at least two protrusions are arranged in an array; the difference in mesa height between two adjacent protrusions is greater than the thickness of the epitaxial layer; the angle between the sidewall of the protrusion and the mesa of the adjacent protrusion is less than or equal to 90°; The substrate is patterned with grooves to form the isolation grooves between adjacent bosses.
4. The method for preparing a semiconductor substrate according to claim 3, characterized in that, The epitaxial layer, the first electrode, and the second electrode form a light-emitting element; among the light-emitting elements other than the one on the highest platform, the heights of the first electrode and the second electrode are all higher than the highest platform height.
5. The method for preparing a semiconductor substrate according to claim 3 or 4, characterized in that, The step of growing an epitaxial layer on the boss includes: A first epitaxial layer is grown on the protrusion; A sacrificial layer is fabricated in the electrode region on the first epitaxial layer; the electrode region is used to fabricate the first electrode; wherein the material of the sacrificial layer is different from the material of the epitaxial layer; A second epitaxial layer is grown on the first epitaxial layer and the sacrificial layer; wherein the thickness of the sacrificial layer is greater than the thickness of the second epitaxial layer; and the angle between the sidewall of the sacrificial layer and the surface of the first epitaxial layer away from the substrate is less than or equal to 90°. The sacrificial layer is stripped away, and the sacrificial layer and the second epitaxial layer formed on the sacrificial layer are removed; The steps of fabricating the first electrode and the second electrode on the epitaxial layer include: The first electrode is fabricated on the exposed first epitaxial layer; The second electrode is fabricated on the second epitaxial layer.
6. A method for preparing a light-emitting substrate, characterized in that, include: Provides driving substrates and semiconductor substrates; The semiconductor substrate is the semiconductor substrate as described in claim 1 or 2; The light-emitting element on the semiconductor substrate is transferred to the driving substrate and aligned and bonded to the driving substrate.
7. The method for preparing the light-emitting substrate according to claim 6, characterized in that, The semiconductor substrate includes a substrate and light-emitting units disposed on the substrate; a plurality of arrayed protrusions are formed on one side surface of the substrate, and a plurality of light-emitting elements are disposed on the protrusions in a corresponding manner; wherein, the substrate includes a plurality of repeating units arranged in an array, each repeating unit includes at least two protrusions with different platform heights, and at least two protrusions are arranged in an array. The steps of transferring the light-emitting element on the semiconductor substrate to the driving substrate and aligning and bonding it with the driving substrate include: Using the side of the substrate furthest from the light-emitting element as the base, the highest light-emitting element is aligned and bonded to the driving substrate; wherein, the driving substrate includes a driving circuit layer and a plurality of electrode groups disposed on the driving circuit layer; each electrode group includes a first driving electrode and a second driving electrode, which are respectively used for alignment and bonding with the first electrode and the second electrode of the light-emitting element; the distance between any protrusion in the repeating unit and the corresponding protrusion in the adjacent repeating unit is the transfer distance, and the distance between two adjacent electrode groups is equal to the transfer distance; The aligned and bonded light-emitting element is peeled off from the substrate.
8. The method for preparing the light-emitting substrate according to claim 7, characterized in that, Also includes: Repeat the steps: The highest light-emitting element is aligned and bonded to the driving substrate; The aligned and bonded light-emitting element is peeled off from the substrate; The highest point of the highest light-emitting element is lower than the platform of the highest boss. The process includes, prior to the step of aligning and bonding the highest light-emitting element to the driving substrate: The highest boss is etched to reduce its height, so that the highest point of the highest light-emitting element is higher than the surface of the highest boss.
Citation Information
Patent Citations
Method of manufacturing semiconductor light emitting device
CN102903814A