Method and apparatus for entropy coding in two-degree grid coding

Abstract

A method includes generating a code stream, where the code stream includes an encoded three-dimensional polygon mesh according to a two-degree connection, where the two-degree connection includes a first sequence and a second sequence, where the first sequence represents a vertex degree for each vertex in the polygon mesh, where the second sequence represents a vertex degree for each vertex in the polygon mesh, and where the second sequence represents a vertex degree for each vertex in the polygon mesh. The second sequence represents the surface degree of each surface in the polygonal mesh, degree offset exists after each vertex degree in the first sequence and each surface degree in the second sequence, and the degree offset is generated according to a context adaptive binary arithmetic coding (CABAC) model. At least one degree corresponding to a vertex degree in the first sequence or a planarity in the second sequence is encoded, the CABAC model encoding the at least one degree using a difference between the at least one degree and a degree pattern indicating a number of planarity of a different type.

Description

[0001] Cross - Reference to Related Applications

[0002] This application claims priority to U.S. Provisional Application No. 63 / 598,098, filed on November 11, 2023, U.S. Provisional Application No. 63 / 598,096, filed on November 11, 2023, and U.S. Application No. 18 / 936,399, filed on November 4, 2024, the entire disclosures of each of which are incorporated herein by reference. Technical Field

[0003] This application relates to a set of advanced video coding techniques, and more particularly to entropy coding in dual degree mesh coding. Background Art

[0004] Advances in 3D capture, modeling, and rendering have contributed to the prevalence of 3D content across several platforms and devices. Today, it is possible to capture the first steps of a baby taking its first steps on one continent and allow grandparents on another continent to see (and perhaps interact) and enjoy a fully immersive experience with the child. However, to achieve this realism, the models are becoming increasingly complex, and a large amount of data is associated with the creation and consumption of these models. 3D meshes are widely used to represent such immersive content.

[0005] A mesh is composed of a number of polygons that describe the surface of a volumetric object. Each polygon is defined by its vertices in 3D space and information on how the vertices are connected (referred to as connectivity information). Optionally, vertex attributes (such as color, normal, etc.) can be associated with the mesh vertices. Attributes can also be associated with the surface of the mesh by using mapping information that parameterizes the mesh using a 2D attribute map. This mapping is typically described by a set of parametric coordinates (referred to as UV coordinates or texture coordinates) associated with the mesh vertices. The 2D attribute map is used to store high - resolution attribute information such as texture, normal, displacement, etc. Such information can be used for various purposes such as texture mapping and shading.

[0006] Dynamic mesh sequences can require a large amount of data as they may consist of a large amount of information that changes over time. Therefore, efficient compression techniques are needed to store and transmit such content. MPEG has previously developed mesh compression standards IC, MESHGRID, FAMC to address dynamic meshes with constant connectivity and time-varying geometry and vertex attributes. However, these standards do not consider time-varying attribute maps and connectivity information. Digital Content Creation (DCC) tools typically generate such dynamic meshes. Accordingly, it is challenging to generate dynamic meshes with constant connectivity using volumetric capture techniques, especially under real-time constraints. Existing standards do not support this type of content. MPEG is planning to develop a new mesh compression standard to directly handle dynamic meshes with time-varying connectivity information and an optional time-varying attribute map. The standard is for lossy and lossless compression for various applications such as real-time communication, storage, free viewpoint video, Augmented Reality (AR), and Virtual Reality (VR). Features such as random access and scalable / progressive encoding are also considered.

[0007] Some encoding methods include dual degree encoding, where face degrees and vertex degrees are encoded separately. However, this encoding technique requires improved techniques to improve encoding efficiency. Summary of the Invention

[0008] According to one aspect of the present application, a method executed by at least one processor includes: generating a bitstream, where the bitstream includes an encoded three-dimensional polygon mesh connected according to dual degrees, and when the polygon mesh includes at least two different face degrees, the dual degree connection includes a first sequence and a second sequence, where the first sequence represents the vertex degree of each vertex in the polygon mesh, the second sequence represents the face degree of each face in the polygon mesh, and after each vertex degree in the first sequence and each face degree in the second sequence there is a degree offset, encoding at least one degree corresponding to the vertex degree in the first sequence or the face degree in the second sequence according to a context-adaptive binary arithmetic coding CABAC model, and the CABAC model encodes the at least one degree using the difference between the at least one degree and a degree pattern indicating the number of different types of face degrees.

[0009] According to one aspect of the present application, a method includes: receiving a bitstream, wherein the bitstream includes an encoded three-dimensional polygon mesh according to a dual-degree connection, and when the polygon mesh includes at least two different face degrees, the dual-degree connection includes a first sequence and a second sequence, wherein the first sequence represents the vertex degree of each vertex in the polygon mesh, the second sequence represents the face degree of each face in the polygon mesh, and there is a degree offset after each vertex degree in the first sequence and each face degree in the second sequence, and encoding at least one degree corresponding to the vertex degree in the first sequence or the face degree in the second sequence according to a context-adaptive binary arithmetic coding (CABAC) model, and the CABAC model encodes the at least one degree using the difference between the at least one degree and a degree pattern indicating the number of different types of face degrees.

[0010] According to one aspect of the present application, a method executed by at least one processor includes: for a three-dimensional polygon mesh, calculating the degree of each face and the valence of each vertex in the polygon mesh; based on the calculation, reducing the degree of at least one face by folding the edges of the at least one face in the polygon mesh; and based on the calculation, reducing the edge valence of at least one vertex in the polygon mesh by merging a first face in the polygon mesh with a second face in the polygon mesh. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Other features, properties, and various advantages of the disclosed subject matter will become more apparent from the following detailed description and the accompanying drawings, in which:

[0012] Figure 1 is a schematic diagram of a block diagram of a communication system according to an embodiment of the present application.

[0013] Figure 2 is a schematic diagram of a block diagram of a streaming system according to an embodiment of the present application.

[0014] Figure 3 is an illustration of face degrees and valence in dual-degree coding according to an embodiment of the present application.

[0015] Figure 4 is a flowchart of an example process for performing dual-degree mesh simplification according to an embodiment of the present application.

[0016] Figure 5A and Figure 5B show an example of edge collapse according to an embodiment of the present application.

[0017] Figure 6A and Figure 6B shows an example of face merging according to an embodiment of the present application.

[0018] Figure 7 is a diagram of a computer system suitable for implementing an embodiment of the present application according to an embodiment of the present application. Detailed implementation manners

[0019] The following detailed description of the exemplary embodiments refers to the accompanying drawings. The same reference numbers in different drawings may identify the same or similar elements.

[0020] The foregoing disclosure provides illustration and description, but is not intended to be exhaustive or to limit the implementations to the precise forms disclosed. Modifications and variations are possible in light of the above disclosure, or may be acquired from practice of the implementations. In addition, at least one feature or component of one embodiment may be incorporated into another embodiment (or at least one feature of another embodiment) or combined with another embodiment (or at least one feature of another embodiment). Additionally, in the flowcharts and descriptions of operations provided below, it should be understood that at least one operation may be omitted, at least one operation may be added, at least one operation may be performed simultaneously (at least in part), and the order of at least one operation may be switched.

[0021] It will be apparent that the systems and / or methods described herein may be implemented in different forms of hardware, firmware, or a combination of hardware and software. The actual special control hardware or software code used to implement these systems and / or methods does not limit the implementation. Thus, the operations and behaviors of the systems and / or methods are described herein without reference to specific software code, and it should be understood that software and hardware can be designed based on the description herein to implement the systems and / or methods.

[0022] Even if specific combinations of features are recited in the claims and / or disclosed in the specification, these combinations are not intended to limit the disclosed possible implementations. In fact, many of these features may be combined in ways not specifically recited in the claims and / or disclosed in the specification. Although each dependent claim listed below may directly depend on only one claim, the disclosure of possible implementations includes the combination of each dependent claim with every other claim in the claim set.

[0023] Elements, acts, or instructions used herein are not to be construed as critical or essential unless explicitly described otherwise. Also, as used herein, the articles "a" and "an" are intended to include one or more items and may be used interchangeably with "one or more." The term "one" or similar language is used where only one item is intended. Also, as used herein, the terms "has," "have," "having," "include," "including," and the like are intended to be open-ended terms. Also, unless expressly stated otherwise, the phrase "based on" is intended to mean "at least partially based on." Also, statements such as "[at least one of A and B]" or "[at least one of A or B]" should be understood to include only A, only B, or both A and B.

[0024] References throughout this specification to "one embodiment," "an embodiment," or similar language mean that a particular feature, structure, or characteristic described in connection with the indicated embodiment is included in at least one embodiment of the present application's solution. Thus, the phrases "in one embodiment," "in an embodiment," and similar language throughout this specification may, but do not necessarily, all refer to the same embodiment.

[0025] Furthermore, the described features, advantages, and characteristics of the present application may be combined in any suitable manner in at least one embodiment. Based on the description herein, those skilled in the relevant art will recognize that the present application may be practiced without at least one specific feature or advantage of a particular embodiment. In other instances, additional features and advantages may be recognized in certain embodiments that may not be present in all embodiments of the present application.

[0026] Reference Figures 1 to 2 describes at least one embodiment of the present application for implementing the encoding and decoding structures of the present application.

[0027] Figure 1 FIG. shows a simplified block diagram of a communication system 100 according to an embodiment of the present application. The system 100 may include at least two terminals 110, 120 interconnected via a network 150. For one-way transmission of data, the first terminal 110 may encode video data (which may include mesh data) at a local location for transmission via the network 150 to another terminal 120. The second terminal 120 may receive the encoded video data of another terminal from the network 150, decode the encoded data, and display the restored video data. One-way data transmission may be common in media service applications and the like.

[0028] Figure 1 A second pair of terminals 130, 140 is shown to support two-way transmission of encoded video that may occur, for example, during a video conference. For two-way transmission of data, each terminal 130, 140 may encode video data captured at a local location for transmission via network 150 to the other terminal. Each terminal 130, 140 may also receive encoded video data transmitted by the other terminal, may decode the encoded data, and may display the restored video data at a local display device.

[0029] In Figure 1 , the terminals 110 to 140 may be, for example, servers, personal computers, and smart phones, and / or any other type of terminal. For example, the terminals (110 to 140) may be laptop computers, tablet computers, media players, and / or dedicated video conferencing devices. Network 150 represents any number of networks that convey encoded video data between terminals 110 to 140, including, for example, wired and / or wireless communication networks. The communication network 150 may exchange data in circuit-switched and / or packet-switched channels. Representative networks include telecommunications networks, local area networks, wide area networks, and / or the Internet. For the purposes of this discussion, unless otherwise explained below, the architecture and topology of network 150 may be immaterial to the operation of this application.

[0030] Figure 2 Placement of video encoders and decoders in a streaming environment is shown as an example application of the disclosed subject matter. The disclosed subject matter may be used with other video-enabled applications, including, for example, video conferencing, digital television, storing compressed video on digital media including CDs, DVDs, memory sticks, etc.

[0031] As Figure 2 shown, a streaming system 200 may include a capture subsystem 213 that includes a video source 201 and an encoder 203. The streaming system 200 may also include at least one streaming server 205, and / or, at least one streaming client 206.

[0032] Video source 201 can create, for example, a stream 202. The stream 202 includes a 3D mesh and metadata associated with the 3D mesh. The video source 201 can include, for example, a 3D sensor (such as a depth sensor) or 3D imaging technology (such as at least one digital camera), and a computing device configured to generate a 3D mesh using data received from the 3D sensor or 3D imaging technology. The sample stream 202 with a high data volume can be processed by an encoder 203 coupled to the video source 201 when compared with an encoded video bitstream. The encoder 203 can include hardware, software, or a combination thereof to implement or enforce aspects of the disclosed subject matter described in more detail below. The encoder 203 can also generate an encoded video bitstream 204. The encoded video bitstream 204 with a lower data volume can be stored on a streaming server 205 for future use when compared with the uncompressed stream 202. At least one streaming client 206 and 207 can access the streaming server 205 to retrieve video bitstreams 208 and 209 respectively, and the video bitstreams 208 and 209 can be copies of the encoded video bitstream 204.

[0033] The streaming client 207 can include a video decoder 210 and a display 212. The video decoder 210 can, for example, decode the video bitstream 209 which is an incoming copy of the encoded video bitstream 204, and create an outgoing video sample stream 211 that can be rendered on the display 212 or another rendering device (not depicted). In some streaming systems, the video bitstreams 204, 208, and 209 can be encoded according to certain video coding / compression standards.

[0034] Dual-degree mesh coding is designed to accurately encode the connectivity in a polygon mesh. Using the mathematical concept of duality, this method encodes the connectivity information by forming two different sequences: one representing vertex degrees, and the other representing face degrees (see Figure 3 ). This method can provide excellent performance even in highly irregular or worst-case meshes. The dual-degree coding performance depends to a large extent on the regularity of face degrees and vertex valence. In addition, a virtual face is usually added to approach the boundary and enable efficient traversal. Therefore, a method for modeling an efficient context for connectivity coding is needed.

[0035] According to at least one embodiment, face degree refers to the number of edges surrounding a face. For example, a face degree of 4 means a face surrounded by four edges. According to at least one embodiment, vertex valence refers to the number of edges incident to a corresponding vertex.

[0036] Embodiments of the present application relate to a method for simplifying 3D meshes to reduce the variance of face degrees and edge valences, thereby supporting dual-degree connection coding while maintaining the number of attributes.

[0037] The proposed method can be used alone or in any combination and in any order, and can be used for any polygon mesh.

[0038] According to at least one embodiment, statistics of input faces, added virtual faces, and vertex degrees are collected and then used to sequentially signal face degrees and vertex degrees. These statistics include: the dominant degree (d0), the minimum (dmin) degree and the maximum (dmax) degree, and the degrees of all attributes in degree_mtx.

[0039] In at least one example, all face degrees and vertex degrees are encoded using Context Adaptive Binary Arithmetic Coding (CABAC). A common CABAC model uses a sign, non-zero (size 2), and a golomb code context (size 7). The signaling for a given face degree is as follows, where degree_offset is equal to 3 for face degrees and 2 for vertex degrees. In at least one example, face degrees are not signaled in single face degree mode. In at least one example, the term degree mode can indicate the degree facetype with the highest frequency. For example, for a mesh with triangular faces (face degree 3) and quadrilateral faces (face degree 4), the degree mode is 3, where triangular faces occur at a higher frequency than quadrilateral faces. In at least one example, a mesh with a single face type (e.g., only triangular faces or only quadrilateral faces) can have a single degree mode.

[0040] Table 1 shows an example of an encoder program.

[0041]

[0042] Table 1 Table 2 shows an example of a decoder program.

[0043]

[0044]

[0045] Table 2

[0046] According to at least one embodiment, the single_degree_flag is set to false and the vertex degree is not signaled, as the single_degree_flag is usually false in most cases.

[0047] According to at least one embodiment, the context of CABAC is defined based on the current face degree and vertex degree as follows. 1.

[0049]

[0050] Table 3

[0051] According to at least one embodiment, the context of CABAC is defined based on the current degree of a pivot vertex and the degree of the pivot vertex, where the pivot vertex can be a vertex connected between at least two vertices. In at least one example, the pivot vertex can refer to an encoded vertex in a grid, where all connections around the vertex are encoded or decoded.

[0052] For the face degree:

[0053] contextId = min(curr_degree - degree_offset, maxFaceContext) context = faceContext[currPivotDegree][contextId]

[0054] Table 4

[0055] For the vertex degree:

[0056] contextId = min(curr_degree - degree_offset, maxVertContext) context = faceContext[currPivotDegree][contextId]

[0057] Table 5

[0058] In at least one example, maxFaceContext can be the maximum value of the contextID of at least two faces. In at least one example, maxVertContext can be the maximum value of the contextID of at least two vertices.

[0059] According to at least one embodiment, when degree_dominance is equal to degree_min or degree_max, the sign of delta_degree is derived on the decoder side. Based on these configurations, the sign bit is saved for encoding all degrees.

[0060] Table 6 shows an example of an encoder program.

[0061]

[0062] Table 6 Table 7 shows an example of a decoder program.

[0063]

[0064]

[0065] Table 7

[0066] According to at least one embodiment, since the input mesh can consist of at least two sub-meshes, there can be significant differences in their connectivity characteristics. For example, a mesh composed of a triangular mesh and a quadrilateral mesh is not a single-degree mesh, but each sub-mesh is a single-degree mesh. Thus, the entire connectivity can be skipped.

[0067] According to at least one embodiment, the signaling for sub-mesh statistics can be performed as follows.

[0068]

[0069] Table 8

[0070] According to at least one embodiment, at least two sub-meshes can be reordered / encoded in the order of increasing degree_mode. In this case, the difference between the degree_modes between two consecutive sub-meshes can be encoded.

[0071] According to at least one embodiment, the attributes of a mesh include vertex positions, texture coordinates, normal vectors, and associated texture maps. For geometric attributes such as vertex positions, a predictive coding scheme is typically employed, e.g., parallelogram prediction. In the case of a polygonal mesh, parallelogram prediction for a quadrilateral mesh may perform best.

[0072] Mesh simplification is generally required to simplify the representation of a mesh, thereby reducing the coding information for compression. Simplification can be accomplished via decimation or remeshing. Decimation can be done via edge collapsing or face merging. However, decimation only aims to approximately calculate the shape of the original mesh without considering the regularity of face degrees and vertex valences. On the other hand, previous remeshing methods focused on regularizing face degrees and vertex degrees but failed to maintain the approximate quality of the mesh under a reasonable number of attributes.

[0073] Two - degree mesh encoding relies to a large extent on the regularity of edge valence and face degree. Two - degree mesh encoding also does not consider attribute encoding. Remeshing may only help with the connectivity encoding of two - degree meshes. Extraction may only help reduce the number of attributes, but does not focus on the regularity of edge valence and face degree.

[0074] The proposed method can be used alone or in any combination order and can be used for any polygon. In this application, we propose a method for reducing an input mesh to regularized edge valence and face degree while maintaining an approximate quality with the original mesh. Embodiments involve a combination of face merging and edge collapsing.

[0075] Since high - degree faces are surrounded by low - valence vertices and vice versa, the embodiments reduce high - degree faces and high - valence vertices. This can be achieved by alternately reducing the highest - degree faces and the highest - valence vertices. The goal of the embodiments is to regularize the face degree to be close to 4 and to achieve a small variance of vertex valence and face degree.

[0076] Embodiments of this application relate to a method for simplifying 3D meshes to reduce the variance of face degree and edge valence, thereby supporting two - degree connectivity encoding while maintaining the number of attributes.

[0077] Figure 4 A flowchart of an example process 400 for simplifying 3D meshes is shown. The process includes at least one of the following operations.

[0078] Operation S402: Initialize

[0079] In at least one example, in this operation, all face degrees and the valence of all vertices are calculated. At least two faces and at least two edges can be sorted in descending order of degree. Additionally, the variance of face degree σ f and vertex valence σ v can be calculated.

[0080] Operation S404: Reduce face degree via edge collapsing

[0081] In at least one example, for the face with the highest degree f iFor all faces, calculate the cost of folding their edges and select the minimum cost edge to fold. In at least one example, search for high degree faces with low valence vertices among their neighbors.

[0082] In at least one example, the edge folding cost can be similar to the quadratic approximation error.

[0083] According to at least one embodiment, the cost of folding an edge can be the regularity of the adjusted adjacent faces and vertices. For example, the cost can be the variance of the valence of neighbor vertices and the variance of adjacent faces.

[0084] Subsequently, the degree of the current face can be updated to df i = df i - 1. For the folded vertices, for example, fold these two vertices into one (v p , v q ) → v k . Then, the degree of the new vertex can be expressed as dv k = dv q + dv p - 2.

[0085] Introduce new connections without modifying the vertices while maintaining the same number of vertices. Figure 5A and Figure 5B show examples of edge folding. For example, Figure 5A shows vertices D4 and D5. As Figure 5B shown, fold vertex D5 onto D4.

[0086] Operation S406: Reduce the edge valence via face merging.

[0087] In at least one example, for all edges with the highest valence v i , calculate the cost of merging its two adjacent faces and select the minimum cost faces to merge. In at least one example, search for high valence vertices with small degree neighbor faces.

[0088] According to at least one embodiment, the cost of face merging is the quadratic approximation error.

[0089] According to at least one embodiment, the cost of face merging can be the regularity of the adjusted adjacent faces and vertices.

[0090] Figure 6A and Figure 6B illustrates an example of face merging. For example, as Figure 6B shown, Figure 6A shows face F3 merged into face F4.

[0091] According to at least one embodiment, if the number of target faces or target vertices is reached, or the variances of face degrees and vertex valences do not change, then process 400 stops. Thus, if the number of target faces or target vertices is not reached and the variances of face degrees and vertex valences change, then operations 402, 404, and 406 of the process can be repeated.

[0092] The above - mentioned technology can be implemented as computer software by computer - readable instructions and physically stored in at least one computer - readable medium. For example, Figure 7 shows a computer system 700, which is adapted to implement certain embodiments of the present application.

[0093] The computer software can be encoded by any suitable machine code or computer language, creating code including instructions through mechanisms such as assembly, compilation, and linking. The instructions can be directly executed by a computer central processing unit (CPU), a graphics processing unit (GPU), etc., or executed through decoding, microcode, etc.

[0094] The instructions can be executed on various types of computers or their components, including, for example, personal computers, tablets, servers, smartphones, gaming devices, Internet of Things devices, etc.

[0095] Figure 7 The components shown for computer system 700 are examples and are not used to impose any limitations on the scope of use or functions of the computer software implementing the embodiments of the present application. Nor should the configuration of the components be construed as having any dependence on or requirement for any one component or combination thereof shown in the non - restrictive embodiments of computer system 700.

[0096] Computer system 700 can include certain human - machine interface input devices. Such human - machine interface input devices can respond to inputs from at least one human user through tactile inputs (such as keyboard input, swiping, data - glove movement), audio inputs (such as sound, applause), visual inputs (such as gestures), olfactory inputs (not shown). The human - machine interface device can also be used to capture certain media, which need not be directly related to conscious human input, such as audio (e.g., speech, music, ambient sound), images (e.g., scanned images, photographic images obtained from a still - image camera), videos (e.g., two - dimensional videos, three - dimensional videos including stereoscopic videos).

[0097] The human-machine interface input device may include at least one of the following (only one is drawn): keyboard 701, mouse 702, touchpad 703, touch screen 710, data glove, joystick 705, microphone 706, scanner 707, camera 708.

[0098] The computer system 700 may also include certain human-machine interface output devices. Such human-machine interface output devices can stimulate the senses of at least one human user through, for example, tactile output, sound, light, and smell / taste. Such human-machine interface output devices may include tactile output devices (e.g., tactile feedback through the touch screen 710, data glove, or joystick 705, but there may also be tactile feedback devices that do not serve as input devices). For example, these devices may be audio output devices (e.g., speaker 709, headphones (not shown)), visual output devices (e.g., screen 710 including a cathode ray tube screen, liquid crystal screen, plasma screen, organic light emitting diode screen, each of which may or may not have touch screen input function, each of which may or may not have tactile feedback function - some of which may output two-dimensional visual output or output above three dimensions through means such as stereoscopic picture output; virtual reality glasses (not shown), holographic displays, and smoke boxes (not shown)), and printers (not shown).

[0099] The computer system 700 may also include human-accessible storage devices and their associated media, such as optical media including high-density read-only / rewritable optical discs with CD / DVD (CD / DVD ROM / RW) 720 or similar media 721, thumb drives 722, removable hard disk drives or solid state drives 723, traditional magnetic media such as tapes and floppy disks (not shown), dedicated devices based on ROM / ASIC / PLD such as security software protectors (not shown), and so on.

[0100] Those skilled in the art should also understand that the term "computer-readable medium" used in connection with the disclosed subject matter does not include transmission media, carrier waves, or other transient signals.

[0101] The computer system 700 may also include an interface to at least one communication network. The network can be wireless, wired, or optical. The network can also be a local area network, a wide area network, a metropolitan area network, a vehicular network, and an industrial network, a real-time network, a delay-tolerant network, and so on. The network also includes local area networks such as Ethernet, wireless local area network, cellular networks (GSM, 3G, 4G, 5G, LTE, etc.), wired or wireless wide area digital television networks (including cable television, satellite television, and terrestrial broadcast television), vehicular and industrial networks (including CANBus), and so on. Some networks typically require an external network interface adapter for connection to some common data ports or peripheral buses 749 (e.g., the USB port of the computer system 700); other systems are typically integrated into the core of the computer system 700 by connecting to the system bus described below (e.g., an Ethernet interface is integrated into a PC computer system or a cellular network interface is integrated into a smart phone computer system). By using any of these networks, the computer system 700 can communicate with other entities. The communication can be one-way, only for receiving (e.g., wireless television), one-way only for sending (e.g., CAN bus to some CAN bus devices), or two-way, e.g., through a local or wide area digital network to other computer systems. Such communication can include communication to a cloud computing environment 755. Each of the above-mentioned networks and network interfaces can use certain protocols and protocol stacks.

[0102] The above-mentioned human-machine interface device, human-accessible storage device, and network interface 754 can be connected to the core 740 of the computer system 700.

[0103] The core 740 may include at least one central processing unit (CPU) 741, a graphics processing unit (GPU) 742, a dedicated programmable processing unit in the form of a field-programmable gate array (FPGA) 743, a hardware accelerator 744 for specific tasks, and so on. These devices, as well as a read-only memory (ROM) 745, a random access memory 746, an internal mass storage (e.g., an internal non-user-accessible hard disk drive, a solid-state drive, etc.) 747, and so on, can be connected through a system bus 748. In some computer systems, the system bus 748 can be accessed in the form of at least one physical plug for expansion with additional central processing units, graphics processing units, and so on. Peripheral devices can be directly attached to the system bus 748 of the core or connected through a peripheral bus 749. The architecture of the peripheral bus includes an external controller interface PCI, a universal serial bus USB, and so on. A graphics adapter 750 can be included in the core 740.

[0104] The CPU 741, GPU 742, FPGA 743, and accelerator 744 can execute certain instructions that, when combined, can constitute the above-mentioned computer code. This computer code can be stored in the ROM 745 or RAM 746. Transitional data can also be stored in the RAM 746, while permanent data can be stored in, for example, the internal mass storage 747. Fast storage and retrieval of any memory device can be achieved by using a cache memory that can be closely associated with at least one of the CPU 741, GPU 742, mass storage 747, ROM 745, RAM 746, etc.

[0105] The computer-readable medium may have computer code for performing various computer-implemented operations. The medium and the computer code may be specially designed and constructed for the purposes of this application or may be of the kind well-known and available to those skilled in the art of computer software.

[0106] By way of example and not limitation, a computer system having the architecture 700, particularly the core 740, can provide the functionality of a processor (including a CPU, GPU, FPGA, accelerator, etc.) to execute software contained in at least one tangible computer-readable medium. Such a computer-readable medium can be a medium associated with the above-mentioned user-accessible mass storage, as well as a specific memory of the non-volatile core 740, such as the core internal mass storage 747 or ROM 745. The software implementing the various embodiments of this application can be stored in such a device and executed by the core 740. Depending on specific requirements, the computer-readable medium can include one or more storage devices or chips. The software can cause the core 740, particularly the processors therein (including the CPU, GPU, FPGA, etc.), to execute the specific processes or specific portions of the specific processes described herein, including defining data structures stored in the RAM 746 and modifying such data structures according to software-defined processes. Additionally or alternatively, the computer system can provide functionality that is logically hardwired or otherwise embodied in a circuit (e.g., the accelerator 744) that can operate instead of or in conjunction with the software to execute the specific processes or specific portions of the specific processes described herein. In appropriate cases, references to software can include logic, and vice versa. In appropriate cases, references to the computer-readable medium can include a circuit (such as an integrated circuit (IC)) that stores and executes the software, a circuit that embodies the logic, or both. This application encompasses any suitable combination of hardware and software.

[0107] Although the present application has described at least two non-limiting embodiments, various changes, permutations, and various equivalent substitutions of the embodiments fall within the scope of the present application. Therefore, it should be understood that those skilled in the art can design various systems and methods that, although not explicitly shown or described herein, embody the principles of the present application and thus fall within the spirit and scope of the present application.

Claims

1. A method executed by at least one processor, characterized in that, The method includes: Generating a bitstream, wherein the bitstream includes an encoded three-dimensional polygon mesh according to a double-degree connection. When the polygon mesh includes at least two different face degrees, the double-degree connection includes a first sequence and a second sequence, wherein the first sequence represents the vertex degree of each vertex in the polygon mesh, and the second sequence represents the face degree of each face in the polygon mesh. Wherein, there is a degree offset after each vertex degree in the first sequence and each face degree in the second sequence. Encoding at least one degree corresponding to the vertex degree in the first sequence or the face degree in the second sequence according to a context-adaptive binary arithmetic coding (CABAC) model, and the CABAC model encodes the at least one degree using the difference between the at least one degree and a degree pattern indicating the number of different types of face degrees.

2. The method according to claim 1, wherein The bitstream includes a degree minus offset parameter, which is the difference between the degree pattern and the degree offset.

3. The method according to claim 1, wherein The degree offset in the first sequence is a first degree offset, and the degree offset in the second sequence is a second degree offset, where the first degree offset is different from the second degree offset.

4. The method according to claim 1, wherein The bitstream includes a flag indicating that the degree pattern is a single-degree pattern.

5. The method according to claim 1, characterized in that Determining a model index according to the minimum value between (i) the difference between the at least one degree and the degree pattern and (ii) a maximum index value, and selecting the CABAC model based on the model index.

6. The method according to claim 1, characterized in that The bitstream further includes: (i) a degree minimum minus mode parameter, which is the difference between the degree pattern and the minimum face degree, and (ii) a degree maximum minus mode parameter, which is the difference between the maximum face degree and the degree pattern. Wherein, when one of the degree minimum minus mode parameter and the degree maximum minus mode parameter is false, the sign of the difference between the at least one degree and the degree pattern is set to false, and When both the degree minimum minus mode parameter and the degree maximum minus mode parameter are true, the sign of the difference between the at least one degree and the degree pattern is set to true.

7. The method according to claim 1, characterized in that The polygon mesh includes a plurality of sub-meshes, and each sub-mesh including at least two different face degrees includes a corresponding first sequence and a second sequence, wherein the first sequence represents the vertex degree of each vertex in the corresponding sub-mesh, and the second sequence represents the face degree of each face in the corresponding sub-mesh.

8. A method executed by at least one processor, characterized in that, The method includes: Receiving a bitstream, wherein the bitstream includes an encoded three-dimensional polygon mesh according to a double-degree connection. When the polygon mesh includes at least two different face degrees, the double-degree connection includes a first sequence and a second sequence, wherein the first sequence represents the vertex degree of each vertex in the polygon mesh, and the second sequence represents the face degree of each face in the polygon mesh. Wherein, there is a degree offset after each vertex degree in the first sequence and each face degree in the second sequence. Encode at least one degree corresponding to a vertex degree in the first sequence or a face degree in the second sequence according to a context adaptive binary arithmetic coding (CABAC) model, where the CABAC model encodes the at least one degree using a difference between the at least one degree and a degree pattern indicating a number of different types of face degrees.

9. The method according to claim 8, wherein The bitstream includes a degree minus offset parameter, which is a difference between the degree pattern and the degree offset.

10. The method according to claim 8, wherein The degree offset in the first sequence is a first degree offset, and the degree offset in the second sequence is a second degree offset, where the first degree offset is different from the second degree offset.

11. The method according to claim 8, wherein The bitstream includes a flag indicating that the degree pattern is a single degree pattern.

12. The method according to claim 8, wherein Determine a model index based on a minimum value between (i) the difference between the at least one degree and the degree pattern and (ii) a maximum index value, and select the CABAC model based on the model index.

13. The method according to claim 8, wherein The bitstream further includes: (i) a degree minimum minus mode parameter, which is a difference between the degree pattern and a minimum face degree, and (ii) a degree maximum minus mode parameter, which is a difference between a maximum face degree and the degree pattern. Wherein, when one of the degree minimum minus mode parameter and the degree maximum minus mode parameter is false, set a sign of the difference between the at least one degree and the degree pattern to false, and when both the degree minimum minus mode parameter and the degree maximum minus mode parameter are true, set the sign of the difference between the at least one degree and the degree pattern to true.

14. The method according to claim 8, wherein The polygonal mesh includes a plurality of sub-meshes. Each sub-mesh including at least two different face degrees includes a corresponding first sequence and a second sequence, where the first sequence represents a vertex degree of each vertex in the corresponding sub-mesh, and the second sequence represents a face degree of each face in the corresponding sub-mesh.

15. A method executed by at least one processor, characterized in that, Includes: For a three-dimensional polygonal mesh, calculate a degree of each face and a valence of each vertex in the polygonal mesh; Based on the calculation, reduce the degree of at least one face by folding an edge of the at least one face in the polygonal mesh; And Based on the calculation, reduce an edge valence of at least one vertex in the polygonal mesh by merging a first face in the polygonal mesh with a second face in the polygonal mesh.

16. The method according to claim 15, wherein The reducing the degree of the at least one face further includes: calculating a cost of each edge of the at least one face, where the folded edge of the at least one face has a minimum calculated cost.

17. The method according to claim 16, characterized in that The cost is calculated by using a quadratic approximation error.

18. The method according to claim 15, wherein The reducing the edge valence of the at least one vertex further includes: calculating a merging cost of each pair of adjacent faces of the at least one vertex, where the first face and the second face are a pair of adjacent faces with a minimum calculated cost.

19. The method according to claim 18, wherein The cost is calculated by using a quadratic approximation error.

20. The method according to claim 15, wherein Repeat the calculation, the reducing the degree of the at least one face, and the reducing the edge valence of the at least one vertex until a target number of faces or a target number of vertices is reached.

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