Direct current bias elimination method, circuit and electronic equipment

Abstract

The invention provides a direct current bias elimination method and circuit and electronic equipment, and relates to the technical field of electronic circuits. The DC bias elimination method comprises the following steps: receiving a baseband signal; calculating a first difference value between the baseband signal and the current direct current bias estimation value; wherein the initial value of the direct current bias estimation value is 0; calculating a product of the first difference value and a preset coefficient; calculating the sum of the product and the current direct current bias estimation value to obtain a new direct current bias estimation value; and eliminating the DC bias in the baseband signal based on the new DC bias estimation value. Other signals in baseband signals are filtered out, and only direct current bias, namely a new direct current bias estimation value, is left. And the DC bias in the baseband signal can be eliminated by using the new DC bias estimation value. According to the scheme, the direct-current bias estimation value can be estimated without receiving the Bluetooth signal which is long enough, so that the time required for obtaining the direct-current bias estimation value is shortened, and the real-time performance of the direct-current bias estimation value is improved.

Description

Technical Field

[0001] This application relates to the technical field of electronic circuits. Specifically, it relates to a DC bias cancellation method, circuit, and electronic device. Background Art

[0002] During the generation and reception of signals, due to the instability of the internal crystal oscillator in the circuit, a DC bias is often generated. The DC bias will cause the waveform of the signal to change, thereby degrading the demodulation performance of the signal. The same problem is encountered in the baseband signal processing of Bluetooth. The existing technology for removing DC bias in Bluetooth mainly estimates the DC bias estimate value by calculating the mean value of the data segment, and then subtracts the DC bias estimate value to cancel the DC bias.

[0003] The existing DC bias estimation scheme estimates the DC bias by calculating the mean value of the data segment. Essentially, it utilizes the characteristic that the mean value of the Bluetooth signal is 0 over a sufficiently long period of time. Therefore, during actual signal reception and demodulation, it is necessary to receive the Bluetooth signal for a sufficiently long time to estimate the accurate DC bias. This makes it impossible to update the DC bias in real time during the reception of this Bluetooth signal. If there is a DC bias with a small frequency change, then the DC bias estimation method with poor real-time performance will affect the performance of DC bias estimation. For the π / 4DPSK (Differential Phase Shift Keying) and 8DPSK signals in the PDU (Protocol Data Unit) part of the EDR (Enhanced Data Rate) mode in Bluetooth, even a small estimation error will cause a large performance loss. The method of directly using the mean value scheme to estimate the DC bias will generate a large error. Summary of the Invention

[0004] This application provides a DC bias cancellation method, circuit, and electronic device to reduce the time required to obtain the DC bias estimate value.

[0005] In a first aspect, this application provides a DC bias cancellation method, including: receiving a baseband signal; calculating a first difference between the baseband signal and the current DC bias estimate value, where the initial value of the DC bias estimate value is 0; calculating the product of the first difference and a preset coefficient; calculating the sum of the product and the current DC bias estimate value to obtain a new DC bias estimate value; and canceling the DC bias in the baseband signal based on the new DC bias estimate value.

[0006] In the embodiments of the present application, by calculating a first difference between a baseband signal and a current estimated value of the DC offset, calculating a product of the first difference and a preset coefficient, and finally calculating a sum of the product and the current estimated value of the DC offset, other signals in the baseband signal are filtered out, leaving only the DC offset, that is, a new estimated value of the DC offset. Furthermore, the DC offset in the baseband signal can be eliminated by using the new estimated value of the DC offset. Since this solution can estimate the estimated value of the DC offset without receiving a Bluetooth signal for a long enough time, the time required to obtain the estimated value of the DC offset is reduced, and the real-time performance of the estimated value of the DC offset is improved.

[0007] Combined with the technical solution provided in the first aspect above, in some possible implementation manners, calculating the first difference between the baseband signal and the current estimated value of the DC offset includes: calculating and updating the average value of the baseband signal at preset time intervals; calculating a difference between the most recently updated average value and the current estimated value of the DC offset, and the difference is the first difference.

[0008] In the embodiments of the present application, by calculating the average value at preset time intervals and then calculating the first difference using the average value, the fluctuation of the estimated value of the DC offset can be reduced, making the finally obtained signal more stable.

[0009] Combined with the technical solution provided in the first aspect above, in some possible implementation manners, calculating and updating the average value of the baseband signal at preset time intervals includes: recording the baseband signal within a preset time; calculating the average value of the recorded baseband signal, and clearing the recorded baseband signal.

[0010] Combined with the technical solution provided in the first aspect above, in some possible implementation manners, the baseband signal includes a GFSK (Gaussian Frequency Shift Keying) signal part and a DPSK signal part; when in the GFSK signal part, the preset time is a first time; when in the DPSK signal part, the preset time is a second time; the first time is less than the second time.

[0011] In the embodiments of the present application, since the GFSK signal part and the DPSK signal part are components of the baseband signal, a smaller time is used in the GFSK signal part, which can make the estimated value of the DC offset closer to the actual value faster, while a larger time is used in the DPSK signal part to reduce the oscillation of the estimated value of the DC offset.

[0012] Combined with the technical solution provided in the first aspect above, in some possible implementation manners, before receiving the baseband signal, the method further includes: receiving coefficient configuration information, and the coefficient configuration information includes the preset coefficient.

[0013] Combined with the technical solution provided in the first aspect above, in some possible implementation manners, the baseband signal includes a GFSK signal part and a DPSK signal part; when in the GFSK signal part, the preset coefficient is a first preset coefficient; when in the DPSK signal part, the preset coefficient is a second preset coefficient; the first preset coefficient is greater than the second preset coefficient.

[0014] In the embodiments of the present application, since the GFSK signal part and the DPSK signal part are components of the baseband signal, by using a larger preset coefficient in the GFSK signal part, the DC bias estimation value can be made closer to the actual value faster, and by using a smaller preset coefficient in the DPSK signal part, the oscillation of the DC bias estimation value can be reduced.

[0015] In a second aspect, the present application provides a DC bias cancellation circuit, including: a first subtraction unit, a multiplication unit, an addition unit, a second subtraction unit, and a register; a first input end of the first subtraction unit is used to receive a baseband signal, and a second input end of the first subtraction unit is connected to an output end of the register; the first subtraction unit is used to calculate a first difference between the baseband signal and the current DC bias estimation value stored in the register; wherein, the initial value of the DC bias estimation value is 0; a first input end of the multiplication unit is connected to an output end of the first subtraction unit, a second input end of the multiplication unit is used to receive a preset coefficient, and the multiplication unit is used to calculate a product of the first difference and the preset coefficient; a first input end of the addition unit is connected to an output end of the multiplication unit, and an output end of the addition unit is connected to an output end of the register; the addition unit is used to calculate a sum of the product and the current DC bias estimation value to obtain a new DC bias estimation value; an input end of the register is connected to an output end of the addition unit, and the register is used to replace the current DC bias estimation value with the new DC bias estimation value; a first input end of the second subtraction unit is used to receive the baseband signal, and a second input end of the second subtraction unit is connected to an output end of the register; the second subtraction unit is used to cancel the DC bias in the baseband signal based on the new DC bias estimation value.

[0016] In the embodiments of the present application, by calculating the first difference between the baseband signal and the current DC bias estimation value, calculating the product of the first difference and a preset coefficient, and finally calculating the sum of the product and the current DC bias estimation value, other signals in the baseband signal are filtered out, leaving only the DC bias, that is, the new DC bias estimation value. Furthermore, the DC bias in the baseband signal can be eliminated by using the new DC bias estimation value. Since this solution can estimate the DC bias estimation value without receiving the Bluetooth signal for a long enough time, the time required to obtain the DC bias estimation value is reduced, and the real-time performance of the DC bias estimation value is improved.

[0017] Combined with the technical solution provided in the second aspect above, in some possible implementation manners, the DC bias cancellation circuit further includes: an average value calculation unit, the input end of the average value calculation unit is used to receive the baseband signal; the output end of the average value calculation unit is connected to the first input end of the first subtraction unit; the average value calculation unit is used to calculate and update the average value of the baseband signal at intervals of a preset duration; correspondingly, the first subtraction unit is used to calculate the difference between the most recently updated average value and the current DC bias estimation value, and the difference is the first difference.

[0018] Combined with the technical solution provided in the first aspect above, in some possible implementation manners, the DC bias cancellation circuit further includes: a delay unit, the input end of the delay unit is used to receive the baseband signal, and the output end of the delay unit is connected to the first input end of the second subtraction unit; the delay unit is used to delay the baseband signal by a preset time and then output it to the second subtraction unit; wherein, the preset time is determined according to the time required to calculate a DC bias estimation value.

[0019] In the embodiments of the present application, the baseband signal is delayed by a preset time by the delay unit and then output to the second subtraction unit, so that each segment of the baseband signal can eliminate the DC bias according to its own determined DC bias estimation value, improving the accuracy of DC bias cancellation.

[0020] In a third aspect, the present application provides an electronic device, including: a DC bias cancellation circuit as described in the second aspect above and / or in any possible implementation manner in combination with the second aspect above. Description of the Drawings

[0021] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings required in the embodiments. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.

[0022] Figure 1 Schematic flowchart of the first DC bias cancellation method shown in the embodiments of the present application;

[0023] Figure 2 Schematic flowchart of the second DC bias cancellation method shown in the embodiments of the present application;

[0024] Figure 3 Circuit structure diagram of the first DC bias cancellation circuit shown in the embodiments of the present application;

[0025] Figure 4 Circuit structure diagram of the second DC bias cancellation circuit shown in the embodiments of the present application;

[0026] Figure 5 Circuit structure diagram of the third DC bias cancellation circuit shown in the embodiments of the present application;

[0027] Figure 6 Circuit structure diagram of the fourth DC bias cancellation circuit shown in the embodiments of the present application;

[0028] Figure 7 Differential constellation diagram (signal constellation) of a part of the DPSK signal without DC bias cancellation shown in the embodiments of the present application;

[0029] Figure 8 Differential constellation diagram of a part of the DPSK signal with DC bias cancellation shown in the embodiments of the present application. Detailed implementation manners

[0030] Next, the technical solutions in the embodiments of the present application will be described with reference to the accompanying drawings in the embodiments of the present application.

[0031] It should be noted that: Similar reference numerals and letters denote similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of the present application, relational terms such as "first", "second", etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the element.

[0032] The technical solution of the present application will be described in detail below with reference to the accompanying drawings.

[0033] Please refer to Figure 1 , Figure 1 which is a schematic flow diagram of a DC offset cancellation method shown in an embodiment of the present application. The steps included therein will be described below with reference to Figure 1 it.

[0034] S100: Receive a baseband signal.

[0035] Among them, the baseband signal may be a baseband signal of Bluetooth.

[0036] Receiving the baseband signal may be to receive the baseband signal through a Bluetooth module or the like, or it may also be to read a pre-stored baseband signal from an electronic component such as a storage module. The manner of receiving the baseband signal is not limited to the examples given here.

[0037] Before receiving the baseband signal, coefficient configuration information may also be received first, so as to configure the coefficients required for performing the DC offset cancellation method based on the coefficient configuration information. Among them, the coefficient configuration information includes preset coefficients.

[0038] S200: Calculate a first difference between the baseband signal and the current DC offset estimate value.

[0039] Among them, the initial value of the DC offset estimate value is 0.

[0040] The first difference is the difference between the baseband signal and the current DC offset estimate value.

[0041] In one implementation, the manner of calculating the first difference between the baseband signal and the current DC offset estimate value may be: after receiving a sampled signal of the baseband signal, calculate the difference between the sampled signal and the DC offset estimate value to obtain the first difference.

[0042] Since when the first sampled signal of the baseband signal is received, the DC offset estimate value has not been obtained using the present solution yet, therefore, the initial value of the DC offset estimate value is set to 0, that is, calculate the first difference between the first sampled signal and the DC offset estimate value.

[0043] In one implementation, the manner of calculating the first difference between the baseband signal and the current DC offset estimate value may also be: first calculate and update the average value of the baseband signal at a preset time interval. Then calculate the difference between the most recently updated average value and the current DC offset estimate value, and the difference is the first difference.

[0044] Calculate the average value once every preset time interval, and then calculate the first difference using the average value, so as to reduce the fluctuation of the DC bias estimation value and make the finally obtained signal more stable.

[0045] Among them, the preset time interval can be set according to actual needs, and the specific length of the preset time interval is not limited here.

[0046] Optionally, the specific method of calculating and updating the average value of the baseband signal once every preset time interval can be: record the baseband signal within the preset time interval. Then calculate the average value of the recorded baseband signal and clear the recorded baseband signal.

[0047] By recording the baseband signal within the preset time interval, the average value of the recorded baseband signal can be calculated. After the calculation is completed, the recorded baseband signal can be cleared, and the baseband signal of the preset time interval can be recorded again, and this average value calculation process can be cycled until the DC bias elimination method is completed.

[0048] Optionally, the specific method of calculating and updating the average value of the baseband signal once every preset time interval can also be: record the received baseband signal, and calculate the average value of the recorded baseband signal every preset time interval.

[0049] Since the baseband signal includes a GFSK signal part and a DPSK signal part. The GFSK signal part is the front-end synchronization part of the baseband signal, and then is the DPSK signal part (π / 4DPSK and 8DPSK). At the same DC bias power, GFSK is less sensitive to the signal than DPSK.

[0050] Optionally, different preset time intervals can be set for the GFSK signal part and the DPSK signal part respectively. When it is the GFSK signal part, the preset time interval is the first time interval. When it is the DPSK signal part, the preset time interval is the second time interval. Among them, the first time interval is less than the second time interval.

[0051] Since the GFSK signal part and the DPSK signal part are components of the baseband signal, using a smaller time interval for the GFSK signal part can make the DC bias estimation value closer to the actual value faster, while using a larger time interval for the DPSK signal part is to reduce the oscillation of the DC bias estimation value.

[0052] Among them, for a determined baseband signal, the time ratios occupied by the GFSK signal part and the DPSK signal part in a signal cycle are fixed. Therefore, the GFSK signal part and the DPSK signal part in each signal cycle can be determined by pre-configuring the time ratios occupied by the GFSK signal part and the DPSK signal part in a signal cycle.

[0053] S300: Calculate the product of the first difference and the preset coefficient.

[0054] Among them, the preset coefficient is determined according to the power of the DC bias, the power of the baseband signal, and the frequency of the DC bias.

[0055] The calculation method of the preset coefficient can be: k = 2 * π * (f h + 200) ÷ F s * dcPower ÷ signalPower * correctCoef.

[0056] Among them, k is the preset coefficient, f h is the frequency of the DC bias, F s is the sampling frequency (the frequency for sampling the baseband signal), dcPower is the average power of the DC bias, signalPower is the average power of the baseband signal, and correctCoef is the correction coefficient.

[0057] Optionally, the correction coefficient can be obtained through testing. For example, preset multiple initial correction coefficients, calculate a coefficient based on each correction coefficient respectively, and then use each obtained coefficient to eliminate the DC bias respectively. Take the correction coefficient corresponding to the best elimination result as the final correction coefficient.

[0058] Optionally, the correction coefficient can be 100.

[0059] Optionally, since the baseband signal includes a GFSK signal part and a DPSK signal part, therefore, when it is the GFSK signal part, the preset coefficient is the first preset coefficient. When it is the DPSK signal part, the preset coefficient is the second preset coefficient. Among them, the first preset coefficient is greater than the second preset coefficient.

[0060] Since the GFSK signal part and the DPSK signal part are components of the baseband signal, using a larger preset coefficient in the GFSK signal part can make the DC bias estimated value closer to the actual value faster, while using a smaller preset coefficient in the DPSK signal part can reduce the oscillation of the DC bias estimated value.

[0061] Optionally, the calculation methods of the first preset coefficient and the second preset coefficient are the same as the aforementioned preset coefficient. For the sake of brief description, it will not be elaborated here.

[0062] S400: Calculate the sum of the product and the current DC bias estimated value to obtain a new DC bias estimated value.

[0063] This new DC bias estimated value is used to replace the current DC bias estimated value to become the new current DC bias estimated value.

[0064] S500: Eliminate the DC bias in the baseband signal based on the new DC bias estimation value.

[0065] The way to eliminate the DC bias in the baseband signal based on the new DC bias estimation value can be: subtract the new DC bias estimation value from the baseband signal to complete the elimination of the DC bias in the baseband signal.

[0066] To facilitate the understanding of the above DC bias elimination method, the following will be combined with Figure 2 to illustrate it. Among them, Figure 2 the DC bias elimination method shown is only one implementation manner of the DC bias elimination method provided by this application.

[0067] As Figure 2 shown, first receive the coefficient configuration information, and configure the first duration, the second duration, the first preset coefficient, and the second preset coefficient based on this coefficient configuration information.

[0068] Then receive the baseband signal. When receiving the GFSK signal part of the baseband signal, configure the preset duration as the first duration, and configure the preset coefficient as the first preset coefficient. When receiving the DPSK signal part of the baseband signal, configure the preset duration as the second duration, and configure the preset coefficient as the second preset coefficient.

[0069] Calculate and update the average value of the baseband signal once every preset duration. Calculate the difference between the most recently updated average value and the current DC bias estimation value, and this difference is the first difference. Calculate the product of the first difference and the preset coefficient. Calculate the sum of the product and the current DC bias estimation value to obtain the new DC bias estimation value. Eliminate the DC bias in the baseband signal based on the new DC bias estimation value. Repeat the above steps until no more baseband signal is received.

[0070] Figure 2 The specific implementation manners and principles of the various steps shown have been clearly described above. For the sake of brief description, they will not be elaborated here.

[0071] Based on the same technical concept, this application also provides a DC bias elimination circuit. As Figure 3 shown, this DC bias circuit includes a first subtraction unit ( Figure 3 SUB1 shown), a multiplication unit ( Figure 3 × shown), an addition unit ( Figure 3 ADD shown), a second subtraction unit ( Figure 3 SUB2 shown), and a register ( Figure 3 REG1 shown).

[0072] The first input terminal of the first subtraction unit is used to receive the baseband signal, and the second input terminal of the first subtraction unit is connected to the output terminal of the register. The first subtraction unit is used to calculate the first difference between the baseband signal and the current DC bias estimation value stored in the register; wherein, the initial value of the DC bias estimation value is 0.

[0073] Wherein, the first subtraction unit can be any existing electronic component that can calculate the first difference between the baseband signal and the DC bias estimation value, such as a subtractor, etc., and the specific implementation method thereof is not limited herein.

[0074] The first input terminal of the multiplication unit is connected to the output terminal of the first subtraction unit, the second input terminal of the multiplication unit is used to receive a preset coefficient, and the multiplication unit is used to calculate the product of the first difference and the preset coefficient.

[0075] Wherein, the multiplication unit can be any existing electronic component that can calculate the product of the first difference and the preset coefficient, such as a multiplier, etc., and the specific implementation method thereof is not limited herein.

[0076] Optionally, since the baseband signal includes a GFSK signal part and a DPSK signal part. Therefore, it can be set that when it is the GFSK signal part, the preset coefficient received by the second input terminal of the multiplication unit is the first preset coefficient. When it is the DPSK signal part, the preset coefficient received by the second input terminal of the multiplication unit is the second preset coefficient. Wherein, the first preset coefficient is greater than the second preset coefficient.

[0077] The first input terminal of the addition unit is connected to the output terminal of the multiplication unit, the output terminal of the addition unit is connected to the input terminal of the register, and the second input terminal of the addition unit is connected to the output terminal of the register; the addition unit is used to calculate the sum of the product and the current DC bias estimation value (that is, the value stored in the register) to obtain a new DC bias estimation value.

[0078] Wherein, the addition unit can be any existing electronic component that can calculate the sum of the product and the current DC bias estimation value, such as an adder, etc., and the specific implementation method thereof is not limited herein.

[0079] The input terminal of the register is connected to the output terminal of the addition unit, and the register is used to update the current DC bias estimation value stored in itself by using the new DC bias estimation value output by the addition unit. After the update, the current DC bias estimation value stored in the register is the new DC bias estimation value.

[0080] For example, if the current DC bias estimation value stored in the register is A, and the newly obtained DC bias estimation value output by the addition unit is B, the content of the register replaces A with B, that is, the current DC bias estimation value stored in the register is changed to B. The example here is only for easy understanding and should not be used as a limitation to this application.

[0081] The register can be any existing type of register, and its specific type is not limited here.

[0082] The first input end of the second subtraction unit is used to receive the baseband signal, and the second input end of the second subtraction unit is connected to the output end of the register; the second subtraction unit is used to eliminate the DC bias in the baseband signal based on the newly obtained DC bias estimation value to obtain an output signal with the DC bias eliminated.

[0083] Among them, the second subtraction unit can be any existing electronic component that can eliminate the DC bias in the baseband signal based on the newly obtained DC bias estimation value, such as a subtractor, etc., and its specific implementation method is not limited here.

[0084] Optionally, the second subtraction unit is used to calculate the difference between the baseband signal and the newly obtained DC bias estimation value to obtain a baseband signal with the DC bias eliminated.

[0085] In one implementation manner, the DC bias cancellation circuit may further include an average value calculation unit. For easy understanding, please refer to Figure 4 . The input end of the average value calculation unit is used to receive the baseband signal, and the output end of the average value calculation unit is connected to the first input end of the first subtraction unit. The average value calculation unit is used to calculate and update the average value of the baseband signal at intervals of a preset duration ( Figure 4 the gap shown).

[0086] Correspondingly, in this case, the first subtraction unit is used to calculate the difference between the most recently updated average value and the current DC bias estimation value, and the difference is the first difference.

[0087] Among them, the average value calculation unit can be any existing electronic component that can calculate and update the average value of the baseband signal at intervals of a preset duration, such as a signal averager, etc., and its specific implementation method is not limited here.

[0088] Optionally, since the baseband signal includes a GFSK signal part and a DPSK signal part. Therefore, in this way, the average value calculation unit further includes a duration input end, and this duration input end is used to receive the preset duration. When it is the GFSK signal part, the preset duration received by the duration input end is the first duration. When it is the DPSK signal part, the preset duration received by the duration input end is the second duration. Among them, the first duration is less than the second duration.

[0089] Optionally, the preset duration can be configured through the preset duration receiver of the average value calculation unit.

[0090] In one implementation, the DC bias cancellation circuit may further include a delay unit. For ease of understanding, please refer to Figure 5 .

[0091] The input end of the delay unit ( Figure 5 the delay unit shown) is used to receive the baseband signal, and the output end of the delay unit is connected to the first input end of the second subtraction unit. The delay unit is used to delay the baseband signal by a preset time and then output it to the second subtraction unit. Among them, the preset time is determined according to the time required to calculate a DC bias estimation value.

[0092] By delaying the baseband signal by a preset time through the delay unit and then outputting it to the second subtraction unit, each segment of the baseband signal can cancel the DC bias according to its own determined DC bias estimation value, improving the accuracy of DC bias cancellation.

[0093] The delay unit can be any existing electronic component that can delay signals. For example, it can be any type of delay circuit, etc., and its specific implementation method is not limited here.

[0094] For ease of understanding the above DC bias cancellation circuit, please refer to Figure 6 .

[0095] As Figure 6 shown, the DC bias cancellation circuit includes a first subtraction unit, a multiplication unit, an addition unit, a second subtraction unit, a register, an average value calculation unit, and a delay unit.

[0096] The input end of the average value calculation unit is used to receive the baseband signal; the output end of the average value calculation unit is connected to the first input end of the first subtraction unit. The average value calculation unit is used to calculate and update the average value of the baseband signal every preset duration.

[0097] The second input end of the first subtraction unit is connected to the output end of the register. The first subtraction unit is used to calculate the difference between the most recently updated average value and the current DC bias estimation value, and the difference is the first difference.

[0098] The first input end of the multiplication unit is connected to the output end of the first subtraction unit, the second input end of the multiplication unit is used to receive a preset coefficient, and the multiplication unit is used to calculate the product of the first difference and the preset coefficient.

[0099] The first input end of the addition unit is connected to the output end of the multiplication unit, and the output end of the addition unit is connected to the output end of the register. The addition unit is used to calculate the sum of the product and the current DC bias estimation value to obtain a new DC bias estimation value.

[0100] The input terminal of the register is connected to the output terminal of the addition unit, and the register is used to replace the current DC bias estimate value with a new DC bias estimate value;

[0101] The input terminal of the delay unit is used to receive the baseband signal, and the output terminal of the delay unit is connected to the first input terminal of the second subtraction unit. The delay unit is used to delay the baseband signal by a preset time and then output it to the second subtraction unit.

[0102] The second input terminal of the second subtraction unit is connected to the output terminal of the register; the second subtraction unit is used to eliminate the DC bias in the baseband signal based on the new DC bias estimate value. The output terminal of the second subtraction unit is used to output the baseband signal with the DC bias eliminated.

[0103] Among them, Figure 6 The specific implementation manners of the various components of the DC bias cancellation circuit shown have been described clearly in the foregoing. For the sake of brief description, they will not be repeated here.

[0104] For the sake of facilitating the understanding of the effects that can be produced by this solution, as Figure 7 and Figure 8 shown.

[0105] Figure 7 It is the differential constellation diagram of the DPSK signal part when there is a large DC bias in the baseband signal. As can be seen from Figure 7 , the constellation diagram is significantly affected by the DC bias, resulting in a large distortion of the constellation diagram. Among them, the abscissa is the in-phase component, and the ordinate is the quadrature component.

[0106] After the DC bias of this baseband signal is eliminated by using this solution, the differential constellation diagram of the DPSK signal part is as shown in Figure 8 . It can be observed that the distortion of the differential constellation diagram of the DPSK signal part in Figure 8 is significantly reduced compared with that in Figure 7 . It can be seen that the influence of the DC bias on the baseband signal can be significantly reduced by this solution.

[0107] Based on the same technical concept, this application also provides an electronic device. The electronic device includes the aforementioned DC bias cancellation circuit.

[0108] Among them, the electronic device can be any electronic device that needs to receive the baseband signal of Bluetooth. For example, it can be an electronic device such as a mobile phone, a tablet computer, a computer, an automobile, etc. The specific type of the electronic device is not limited to the types exemplified here.

[0109] The above are only the preferred embodiments of the present application and are not intended to limit the present application. For those skilled in the art, various changes and modifications can be made to the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the protection scope of the present application.

Claims

1. A DC offset cancellation method, characterized in that, including: receiving a baseband signal; calculating a first difference between the baseband signal and a current DC bias estimate value, wherein an initial value of the DC bias estimate value is 0; calculating a product of the first difference and a preset coefficient; calculating a sum of the product and the current DC bias estimate value to obtain a new DC bias estimate value; eliminating the DC bias in the baseband signal based on the new DC bias estimate value.

2. The method according to claim 1, characterized in that, The calculating the first difference between the baseband signal and the current DC bias estimate value includes: calculating and updating an average value of the baseband signal at preset time intervals; calculating a difference between the most recently updated average value and the current DC bias estimate value, and the difference is the first difference.

3. The method according to claim 2, wherein The calculating and updating an average value of the baseband signal at preset time intervals includes: recording the baseband signal within a preset time period; calculating an average value of the recorded baseband signal and clearing the recorded baseband signal.

4. The method according to claim 2, wherein The baseband signal includes a GFSK signal part and a DPSK signal part; when in the GFSK signal part, the preset time period is a first time period; when in the DPSK signal part, the preset time period is a second time period; the first time period is less than the second time period.

5. The method according to claim 1, characterized in that Before receiving the baseband signal, the method further includes: receiving coefficient configuration information, where the coefficient configuration information includes the preset coefficient.

6. The method according to any one of claims 1-5, characterized in that, The baseband signal includes a GFSK signal part and a DPSK signal part; when in the GFSK signal part, the preset coefficient is a first preset coefficient; when in the DPSK signal part, the preset coefficient is a second preset coefficient; the first preset coefficient is greater than the second preset coefficient.

7. A DC bias cancellation circuit, characterized in that, including: a first subtraction unit, a multiplication unit, an addition unit, a second subtraction unit, a register; a first input end of the first subtraction unit is used to receive the baseband signal, and a second input end of the first subtraction unit is connected to an output end of the register; the first subtraction unit is used to calculate a first difference between the baseband signal and a current DC bias estimate value stored in the register, wherein an initial value of the DC bias estimate value is 0; a first input end of the multiplication unit is connected to an output end of the first subtraction unit, and a second input end of the multiplication unit is used to receive the preset coefficient, and the multiplication unit is used to calculate a product of the first difference and the preset coefficient; a first input end of the addition unit is connected to an output end of the multiplication unit, and an output end of the addition unit is connected to an output end of the register; the addition unit is used to calculate a sum of the product and the current DC bias estimate value to obtain a new DC bias estimate value; an input end of the register is connected to an output end of the addition unit, and the register is used to replace the new DC bias estimate value with the current DC bias estimate value; a first input end of the second subtraction unit is used to receive the baseband signal, and a second input end of the second subtraction unit is connected to an output end of the register; the second subtraction unit is used to eliminate the DC bias in the baseband signal based on the new DC bias estimate value.

8. The DC bias cancellation circuit according to claim 7, wherein The DC bias cancellation circuit further includes: An average value calculation unit, an input end of the average value calculation unit is used to receive the baseband signal; an output end of the average value calculation unit is connected to a first input end of the first subtraction unit; the average value calculation unit is used to calculate and update the average value of the baseband signal at intervals of a preset duration. Correspondingly, the first subtraction unit is used to calculate the difference between the most recently updated average value and the current DC bias estimation value, and the difference is the first difference.

9. The DC bias cancellation circuit according to claim 7, wherein The DC bias cancellation circuit further includes: A delay unit, an input end of the delay unit is used to receive the baseband signal, an output end of the delay unit is connected to a first input end of the second subtraction unit; the delay unit is used to delay the baseband signal by a preset time and output it to the second subtraction unit; wherein, the preset time is determined according to the time required to calculate a DC bias estimation value.

10. An electronic device, characterized in that, Comprising: The DC bias cancellation circuit according to any one of claims 7-9.

Images