Alignment mask and manufacturing method of semiconductor device

Abstract

The invention relates to the technical field of semiconductor manufacturing, and discloses an alignment mask and a manufacturing method of a semiconductor device.The alignment mask comprises a first alignment pattern, a second alignment pattern, a third alignment pattern and a fourth alignment pattern which are distributed around the geometric center and are the same in pattern; the alignment mask can rotate around the geometric center by 180 degrees so as to be switched between a first use state and a second use state. The first alignment pattern in the first use state partially coincides with the third alignment pattern in the second use state, and the second alignment pattern in the first use state partially coincides with the fourth alignment pattern in the second use state; the third alignment pattern in the first use state partially coincides with the first alignment pattern in the second use state, and the fourth alignment pattern in the first use state partially coincides with the second alignment pattern in the second use state. Therefore, multiple epitaxial processes of the semiconductor device can be completed by repeatedly using one alignment mask.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor manufacturing, and particularly relates to an alignment mask and a manufacturing method of a semiconductor device. Background Art

[0002] Currently, many types of semiconductor devices use multiple epitaxial processes to grow multiple epitaxial layers such as buffer layers and breakdown voltage layers during the manufacturing process. During the manufacturing process, masked implantation doping needs to be performed multiple times to form the required doped regions on the multiple epitaxial layers. Therefore, a photolithography mask or multiple photolithography masks need to be used multiple times, which involves the alignment problem of the photolithography masks used in two adjacent times.

[0003] Currently, alignment marks are usually formed on the epitaxial layer by using an alignment mask. However, when the number of epitaxial processes is large, multiple alignment masks need to be used, which is rather troublesome. Summary of the Invention

[0004] The present invention aims to solve at least one of the technical problems existing in the prior art. To this end, the present invention provides an alignment mask that can complete multiple epitaxial processes of a semiconductor device by repeatedly using one alignment mask.

[0005] The alignment mask according to the first aspect embodiment of the present invention includes a first alignment pattern, a second alignment pattern, a third alignment pattern, and a fourth alignment pattern that all adopt the same pattern; the first alignment pattern, the third alignment pattern, the second alignment pattern, and the fourth alignment pattern are sequentially distributed around the geometric center of the alignment mask; the alignment mask has a first use state and a second use state, and the alignment mask can rotate 180 degrees around the geometric center to switch between the first use state and the second use state, and make the first alignment pattern in the first use state and the third alignment pattern in the second use state partially overlap, the second alignment pattern in the first use state and the fourth alignment pattern in the second use state partially overlap, the third alignment pattern in the first use state and the first alignment pattern in the second use state partially overlap, and the fourth alignment pattern in the first use state and the second alignment pattern in the second use state partially overlap.

[0006] The alignment mask according to the embodiment of the present invention has at least the following beneficial effects: By providing a first alignment pattern, a second alignment pattern, a third alignment pattern, and a fourth alignment pattern that are sequentially distributed around the geometric center and have the same pattern on the alignment mask, the alignment mask can be rotated 180 degrees around the geometric center to switch between a first use state and a second use state. The first alignment pattern in the first use state and the third alignment pattern in the second use state partially overlap, the second alignment pattern in the first use state and the fourth alignment pattern in the second use state partially overlap, the third alignment pattern in the first use state and the first alignment pattern in the second use state partially overlap, and the fourth alignment pattern in the first use state and the second alignment pattern in the second use state partially overlap. In this way, the alignment patterns of the rotated alignment mask can be aligned with the alignment marks formed on the epitaxial layer by the alignment mask in the previous use state. Then, new alignment marks can be formed on the new epitaxial layer, so that the alignment marks can be refreshed, and the same alignment mask can be reused to complete multiple epitaxial processes of semiconductor devices, which helps to reduce the manufacturing cost. In addition, by setting the alignment patterns before and after rotation to partially overlap, it is possible to reduce the influence of the contour line of the previous alignment mark on the new alignment mark on the epitaxial layer, which helps to ensure the clarity of the contour line of the new alignment mark.

[0007] According to some embodiments of the present invention, the number of the first alignment patterns, the number of the second alignment patterns, the number of the third alignment patterns, and the number of the fourth alignment patterns are all multiple; the distribution directions of the multiple first alignment patterns and the distribution directions of the multiple second alignment patterns are perpendicular, the distribution directions of the multiple second alignment patterns and the distribution directions of the multiple third alignment patterns are perpendicular, the distribution directions of the multiple third alignment patterns and the distribution directions of the multiple fourth alignment patterns are perpendicular, and the distribution directions of the multiple fourth alignment patterns and the distribution directions of the multiple first alignment patterns are perpendicular; wherein, the alignment mask can be rotated 180 degrees around the geometric center so that the multiple first alignment patterns in the first use state and the multiple third alignment patterns in the second use state correspond one by one and partially overlap, the multiple second alignment patterns in the first use state and the multiple fourth alignment patterns in the second use state correspond one by one and partially overlap, the multiple third alignment patterns in the first use state and the multiple first alignment patterns in the second use state correspond one by one and partially overlap, and the multiple fourth alignment patterns in the first use state and the multiple second alignment patterns in the second use state correspond one by one and partially overlap.

[0008] According to some embodiments of the present invention, the multiple first alignment patterns and the multiple third alignment patterns are sequentially and spaced apart along the width direction of the alignment mask, and the multiple second alignment patterns and the multiple fourth alignment patterns are sequentially and spaced apart along the length direction of the alignment mask.

[0009] According to some embodiments of the present invention, the alignment mask includes a peripheral region and an inner region. The peripheral region is annularly arranged, and the inner region is located within the ring of the peripheral region; the first alignment pattern, the second alignment pattern, the third alignment pattern, and the fourth alignment pattern are all disposed in the inner region.

[0010] According to some embodiments of the present invention, the inner region includes a plurality of first channels and a plurality of second channels; the plurality of first channels are spaced along the length direction of the alignment mask, and each first channel extends along the width direction of the alignment mask to respectively connect the opposite inner sides of the two rings of the peripheral region; the plurality of second channels are spaced along the width direction, and each second channel extends along the length direction to respectively connect the opposite inner sides of the two rings of the peripheral region; the plurality of first channels and the plurality of second channels intersect perpendicularly to divide the inner region into a plurality of exposure units for exposing semiconductor devices; wherein, the first alignment pattern and the third alignment pattern are respectively disposed in two different first channels; the second alignment pattern and the fourth alignment pattern are respectively disposed in two different second channels.

[0011] According to some embodiments of the present invention, the number of the first channels and the number of the second channels are both odd; the first channel located at the center of the plurality of first channels and the second channel located at the center of the plurality of second channels intersect to form a central intersection region, and the geometric center is located in the central intersection region.

[0012] A method for manufacturing a semiconductor device according to an embodiment of the second aspect of the present invention includes the steps of: providing a substrate; growing an epitaxial layer on the substrate, and selecting the topmost epitaxial layer as a target epitaxial layer; transferring a first alignment pattern, a second alignment pattern, a third alignment pattern, and a fourth alignment pattern on an alignment mask to the target epitaxial layer respectively, so as to form a first alignment mark, a second alignment mark, a third alignment mark, and a fourth alignment mark on the target epitaxial layer respectively, and recording them as a target mark set; wherein, the alignment mask is the alignment mask in any of the above embodiments; growing a new epitaxial layer on the target epitaxial layer; detecting the target mark set, when it is determined that all alignment marks in the target mark set can be detected, continuing to grow the new epitaxial layer; when it is determined that at least one alignment mark in the target mark set cannot be detected, selecting the current topmost epitaxial layer as the new target epitaxial layer, rotating the alignment mask by 180 degrees on the basis of the previous time, so as to form a new first alignment mark, a second alignment mark, a third alignment mark, and a fourth alignment mark on the reselected target epitaxial layer, and updating the target mark set; wherein, the first alignment mark, the second alignment mark, the third alignment mark, and the fourth alignment mark in the updated target mark set partially coincide with the third alignment mark, the fourth alignment mark, the first alignment mark, and the second alignment mark in the previous target mark set respectively; aligning a fifth alignment pattern and a sixth alignment pattern on a lithography mask with the first alignment mark and the third alignment mark respectively, or aligning the fifth alignment pattern and the sixth alignment pattern on the lithography mask with the second alignment mark and the fourth alignment mark respectively; transferring a functional pattern on the lithography mask to a preset epitaxial layer, so as to form a functional region on the preset epitaxial layer.

[0013] According to some embodiments of the present invention, after the step of: transferring a functional pattern on a lithography mask to a preset epitaxial layer, so as to form a functional region on the preset epitaxial layer, the method for manufacturing a semiconductor device further includes the steps of: when it is detected that the total number of epitaxial layers is less than a target number, returning to detect the target mark set; when it is detected that the total number of epitaxial layers is equal to the target number, stopping growing the epitaxial layer.

[0014] According to some embodiments of the present invention, after the step of: when it is detected that the total number of epitaxial layers is equal to the target number, stopping growing the epitaxial layer, the method for manufacturing a semiconductor device further includes the steps of: using the alignment mask again, and rotating the alignment mask by 180 degrees on the basis of the previous time to form a new first alignment mark, a second alignment mark, a third alignment mark, and a fourth alignment mark on the current topmost epitaxial layer.

[0015] According to some embodiments of the present invention, after the step of stopping growing the epitaxial layer when it is detected that the total number of layers of the epitaxial layer is equal to the target number of layers, the method for manufacturing a semiconductor device further includes the steps of moving the alignment mask by a preset distance from a first position to a second position, so that at least part of the peripheral region of the alignment mask in the second position coincides with the peripheral region of the alignment mask in the first position, wherein the first position and the second position correspond to different substrates respectively; returning to grow the epitaxial layer on the substrate, and selecting the topmost epitaxial layer as the target epitaxial layer; wherein, the first alignment pattern, the second alignment pattern, the third alignment pattern and the fourth alignment pattern are all located inside the peripheral region.

[0016] Additional aspects and advantages of the present invention will be given in part in the following description, become apparent in part from the following description, or be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The present invention will be further described below in conjunction with the drawings and embodiments, where:

[0018] Figure 1 FIG. shows a schematic structural diagram of an alignment mask in a first usage state provided by an embodiment of the present invention;

[0019] Figure 2 FIG. shows a schematic structural diagram of an alignment mask in a second usage state provided by an embodiment of the present invention;

[0020] Figure 3 FIG. shows a schematic structural diagram of a photolithography mask provided by an embodiment of the present invention;

[0021] Figure 4 FIG. shows a schematic structural diagram of a semiconductor device provided by an embodiment of the present invention;

[0022] Figure 5 FIG. shows a flowchart of a method for manufacturing a semiconductor device provided by an embodiment of the present invention.

[0023] REFERENCE SIGNS:

[0024] Alignment mask 100; First alignment pattern 110; Second alignment pattern 130; Third alignment pattern 150; Fourth alignment pattern 170; Geometric center 190; Peripheral region 210; Inner region 230; First spacer channel 231; Second spacer channel 233; Exposure unit 235;

[0025] Photolithography mask 300; Fifth alignment pattern 310; Sixth alignment pattern 330; Functional pattern 350;

[0026] Semiconductor device 500; Substrate 510; First epitaxial layer 520; Second epitaxial layer 540; Third epitaxial layer 570;

[0027] Width direction X; length direction Y. Detailed implementation manners

[0028] The embodiments of the present invention will be described in detail below. The examples of the embodiments are shown in the drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the drawings are exemplary and are only used to explain the present invention and should not be construed as a limitation to the present invention.

[0029] In the description of the present invention, it should be understood that for the orientation description, such as the orientation or positional relationship indicated by up, down, front, back, left, right, etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present invention.

[0030] In the description of the present invention, the meaning of several is more than one, and the meaning of multiple is more than two. Understand greater than, less than, exceeding, etc. as not including the present number, and understand above, below, within, etc. as including the present number. If there is a description of first and second, it is only for the purpose of distinguishing technical features and should not be construed as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features or implicitly indicating the sequence relationship of the indicated technical features.

[0031] In the description of the present invention, unless otherwise clearly defined, words such as setting, installing, connecting, etc. should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above words in the present invention in combination with the specific content of the technical solution.

[0032] In the description of the present invention, the description referring to terms such as "one embodiment", "some embodiments", "schematic embodiments", "examples", "specific examples", or "some examples", etc. means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0033] Please refer to Figures 1 to 4 , the embodiment of the present application provides an alignment mask 100. The lithography machine can process alignment marks (such as Figure 4 the reference numerals a, b, and c in) on the semiconductor device 500 through the alignment mask 100, and the lithography mask 300 can be aligned with the alignment marks to improve the processing accuracy.

[0034] The alignment mask 100 includes a first alignment pattern 110, a second alignment pattern 130, a third alignment pattern 150, and a fourth alignment pattern 170. The lithography mask 300 includes a fifth alignment pattern 310, a sixth alignment pattern 330, and a functional pattern 350.

[0035] Among them, the first alignment pattern 110, the second alignment pattern 130, the third alignment pattern 150, and the fourth alignment pattern 170 can all be through-hole structures penetrating the alignment mask 100, so that the lithography machine can transfer the first alignment pattern 110, the second alignment pattern 130, the third alignment pattern 150, and the fourth alignment pattern 170 to the semiconductor device 500 respectively to form the required alignment marks.

[0036] The fifth alignment pattern 310 and the sixth alignment pattern 330 can be through-hole structures penetrating the lithography mask 300, so that the lithography machine can transfer the functional pattern 350 to the semiconductor device 500 to manufacture the required functional area (such as Figure 4 the label o in). The functional pattern 350 can all be set as a hollow structure with the required shape according to the requirements.

[0037] As an example, the semiconductor device 500 can be a power chip. The lithography machine can perform local deep impurity introduction in the terminal area or cell area of the power chip through the functional pattern 350 to form a doped area, so as to improve the reliability and switching characteristics of the power chip.

[0038] As another example, the semiconductor device 500 can be a super junction MOSFET (Super Junction MOSFET, SJ-MOS) device. The lithography machine can form a charge balance area on the super junction MOSFET device through the functional pattern 350 to improve the breakdown voltage performance of the super junction MOSFET device or reduce the resistance during conduction.

[0039] As another example, the semiconductor device 500 can be an epitaxial IGBT (Insulated Gate Bipolar Transistor) device. The lithography machine can form a parasitic diode on the epitaxial IGBT device through the functional pattern 350, so that the epitaxial IGBT device has reverse conduction characteristics.

[0040] It can be understood that the semiconductor device 500 can also be other semiconductor devices 500 other than the above examples.

[0041] The fifth alignment pattern 310 and the sixth alignment pattern 330 can be aligned with the alignment marks on the semiconductor device 500, so as to more precisely control the position of the lithography mask 300 relative to the semiconductor device 500 and precisely process the functional area on the semiconductor device 500.

[0042] It should be noted that when manufacturing the semiconductor device 500, the semiconductor device 500 usually needs to undergo multiple epitaxial processes to generate the required epitaxial layers. Usually, the same photolithography mask 300 is reused, or multiple different photolithography masks 300 are used to respectively form the required functional regions on multiple layers of epitaxial layers. The photolithography mask 300 used in the previous time and the photolithography mask 300 used in the subsequent time can achieve the relationship of overlay, alignment, and offset monitoring based on the alignment marks.

[0043] The epitaxial layer can be a buffer layer, a breakdown voltage layer, or other epitaxial layers, and the epitaxial layer can be grown by chemical vapor deposition. Different epitaxial layers can select the same or different doping types, which can be specifically set according to requirements.

[0044] The first alignment pattern 110, the third alignment pattern 150, the second alignment pattern 130, and the fourth alignment pattern 170 are sequentially distributed around the geometric center 190 of the alignment mask 100.

[0045] As an example, the alignment mask 100 is generally in a rectangular plate-like structure, and the geometric center 190 of the alignment mask 100 can be generally located at the intersection of the two diagonals of the alignment mask 100.

[0046] The first alignment pattern 110, the second alignment pattern 130, the third alignment pattern 150, and the fourth alignment pattern 170 all adopt the same pattern.

[0047] The alignment mask 100 has a first usage state (as Figure 1 shown) and a second usage state (as Figure 2As shown in the figure, the alignment mask 100 can be rotated 180 degrees around the geometric center 190 to switch between the first use state and the second use state, and the first alignment pattern 110 in the first use state and the third alignment pattern 150 in the second use state partially overlap, the second alignment pattern 130 in the first use state and the fourth alignment pattern 170 in the second use state partially overlap, the third alignment pattern 150 in the first use state and the first alignment pattern 110 in the second use state partially overlap, and the fourth alignment pattern 170 in the first use state and the second alignment pattern 130 in the second use state partially overlap. In this way, after the alignment mask 100 is rotated 180 degrees, each alignment pattern only exchanges its orientation on the alignment mask 100. The alignment patterns of the rotated alignment mask 100 can be aligned with the alignment marks formed by the alignment mask 100 in the previous use state on the epitaxial layer, and the rotated alignment mask 100 can form new alignment marks on the new epitaxial layer, so that the alignment marks can be refreshed, and the same alignment mask 100 can be reused to complete multiple epitaxial processes of the semiconductor device 500, which helps to reduce the manufacturing cost.

[0048] In addition, the alignment patterns before and after rotation are set to partially overlap, so as to reduce the influence of the contour line of the previous alignment mark on the epitaxial layer on the contour line of the new alignment mark, and it is convenient for a lithography machine or a manipulator to capture the contour line of the new alignment mark to control the position of the lithography mask 300.

[0049] Among them, the alignment marks formed by the alignment mask 100 on the epitaxial layer specifically refer to the alignment marks formed by the lithography machine on the epitaxial layer through the alignment mask 100.

[0050] Each time the alignment mask 100 is used, it can be rotated 180 degrees on the basis of the previous time to switch from the first use state to the second use state, or from the second use state to the first use state, so as to refresh the alignment marks.

[0051] As an example, when the alignment mask 100 is used for the first time, the alignment mask 100 can enter the lithography machine at 0 degrees (for example, at this time the alignment mask 100 is in the first use state), so as to etch the first alignment mark, the second alignment mark, the third alignment mark and the fourth alignment mark on the epitaxial layer of the first layer through the first alignment pattern 110, the third alignment pattern 150, the second alignment pattern 130 and the fourth alignment pattern 170 respectively, and then withdraw the alignment mask 100 from the lithography machine.

[0052] When the alignment mask 100 is used for the second time, the alignment mask 100 can be rotated 180 degrees based on the first use (at this time, the alignment mask 100 switches to the second use state) and enter the lithography machine. At this time, the first alignment pattern 110 on the alignment mask 100 can be aligned with the third alignment mark on the epitaxial layer of the first layer, the second alignment pattern 130 can be aligned with the fourth alignment mark on the epitaxial layer of the first layer, the third alignment pattern 150 can be aligned with the first alignment mark on the epitaxial layer of the first layer, and the fourth alignment pattern 170 can be aligned with the second alignment mark on the epitaxial layer of the first layer.

[0053] Then, the first alignment mark, the second alignment mark, the third alignment mark, and the fourth alignment mark are respectively etched on the epitaxial layer of the Pth layer (P>1 and is an integer) through the first alignment pattern 110, the third alignment pattern 150, the second alignment pattern 130, and the fourth alignment pattern 170 on the alignment mask 100, and then the alignment mask 100 is withdrawn from the lithography machine. At this time, the first alignment mark on the epitaxial layer of the Pth layer and the third alignment mark on the epitaxial layer of the first layer partially overlap, the second alignment mark on the epitaxial layer of the Pth layer and the fourth alignment mark on the epitaxial layer of the first layer partially overlap, the third alignment mark on the epitaxial layer of the Pth layer and the first alignment mark on the epitaxial layer of the first layer partially overlap, and the fourth alignment mark on the epitaxial layer of the Pth layer and the second alignment mark on the epitaxial layer of the first layer partially overlap.

[0054] It can be understood that when the alignment mask 100 is used for the third time, the alignment mask 100 can be rotated 180 degrees based on the second use and enter the lithography machine.

[0055] It should be noted that the alignment mask 100 can be withdrawn from the lithography machine after each use to prepare for the next use.

[0056] In some embodiments, the first alignment pattern 110, the second alignment pattern 130, the third alignment pattern 150, and the fourth alignment pattern 170 can all adopt rectangular patterns, circular patterns, oval patterns, polygonal patterns, or patterns of other shapes.

[0057] For ease of understanding, in the embodiments of the present application, the first alignment pattern 110, the second alignment pattern 130, the third alignment pattern 150, and the fourth alignment pattern 170 all adopting rectangular patterns are taken as examples for explanation.

[0058] In some embodiments, the number of the first alignment patterns 110 can be multiple, the number of the second alignment patterns 130 can also be multiple, the number of the third alignment patterns 150 can also be multiple, and the number of the fourth alignment patterns 170 can also be multiple.

[0059] Among them, "multiple" can refer to two or more than two.

[0060] The distribution directions of the multiple first alignment patterns 110 are perpendicular to those of the multiple second alignment patterns 130, the distribution directions of the multiple second alignment patterns 130 are perpendicular to those of the multiple third alignment patterns 150, the distribution directions of the multiple third alignment patterns 150 are perpendicular to those of the multiple fourth alignment patterns 170, and the distribution directions of the multiple fourth alignment patterns 170 are perpendicular to those of the multiple first alignment patterns 110. In this way, the alignment marks on the epitaxial layer each time the alignment mask 100 is used can be aligned both front and back.

[0061] Specifically, the alignment mask 100 can be rotated 180 degrees around the geometric center 190 so that the multiple first alignment patterns 110 in the first usage state and the multiple third alignment patterns 150 in the second usage state correspond one by one and partially overlap, the multiple second alignment patterns 130 in the first usage state and the multiple fourth alignment patterns 170 in the second usage state correspond one by one and partially overlap, the multiple third alignment patterns 150 in the first usage state and the multiple first alignment patterns 110 in the second usage state correspond one by one and partially overlap, and the multiple fourth alignment patterns 170 in the first usage state and the multiple second alignment patterns 130 in the second usage state correspond one by one and partially overlap.

[0062] As an example, the multiple first alignment patterns 110 can be X1, X2... XN respectively, the multiple second alignment patterns 130 can be Y1, Y2... YN respectively, the multiple third alignment patterns 150 can be X1R, X2R... XNR respectively, and the multiple fourth alignment patterns 170 can be Y1R, Y2R... YNR respectively.

[0063] Among them, X1, X2... XN can be sequentially and spacedly distributed along the width direction X of the alignment mask 100, Y1, Y2... YN can be sequentially and spacedly distributed along the length direction Y of the alignment mask 100, X1R, X2R... XNR can be sequentially and spacedly distributed along the width direction X of the alignment mask 100, and Y1R, Y2R... YNR can be sequentially and spacedly distributed along the length direction Y of the alignment mask 100.

[0064] Understandably, when the alignment mask 100 is rotated 180 degrees, the first alignment patterns 110 (X1, X2... XN) rotate to the positions of the third alignment patterns 150 (X1R, X2R... XNR), the second alignment patterns 130 (Y1, Y2... YN) rotate to the positions of the fourth alignment patterns 170 (Y1R, Y2R... YNR), the third alignment patterns 150 (X1R, X2R... XNR) rotate to the positions of the first alignment patterns 110 (X1, X2... XN), and the fourth alignment patterns 170 (Y1R, Y2R... YNR) rotate to the positions of the second alignment patterns 130 (Y1, Y2... YN).

[0065] The fifth alignment patterns 310 and the sixth alignment patterns 330 in the photolithography mask 300 can be set according to the alignment patterns on the alignment mask 100. Specifically, there can be multiple fifth alignment patterns 310, which are X1A, X2A... XNA respectively; there can also be multiple sixth alignment patterns 330, which are Y1A, Y2A... YNA respectively. Among them, X1A, X2A... XNA can be sequentially and evenly distributed along the width direction X of the photolithography mask 300, and Y1A, Y2A... YNA can be sequentially and evenly distributed along the length direction Y of the photolithography mask 300.

[0066] Understandably, the fifth alignment patterns 310 (X1A, X2A... XNA) can form an overlay, alignment, and offset monitoring relationship of front and back layers with the first alignment patterns 110 (X1, X2... XN), and the sixth alignment patterns 330 (Y1A, Y2A... YNA) can form an overlay, alignment, and offset monitoring relationship of front and back layers with the second alignment patterns 130 (Y1, Y2... YN). When the alignment mask 100 is rotated 180 degrees, the fifth alignment patterns 310 (X1A, X2A... XNA) can form an overlay, alignment, and offset monitoring relationship of front and back layers with the third alignment patterns 150 (X1R, X2R... XNR), and the sixth alignment patterns 330 (Y1A, Y2A... YNA) can form an overlay, alignment, and offset monitoring relationship of front and back layers with the fourth alignment patterns 170 (Y1R, Y2R... YNR).

[0067] In some embodiments, multiple first alignment patterns 110 and multiple third alignment patterns 150 can both be sequentially and evenly distributed along the width direction X of the alignment mask 100, and multiple second alignment patterns 130 and multiple fourth alignment patterns 170 are sequentially and evenly distributed along the length direction Y of the alignment mask 100. In this way, it helps to more easily arrange and manufacture multiple first alignment patterns 110, multiple second alignment patterns 130, multiple third alignment patterns 150, and multiple fourth alignment patterns 170 on the alignment mask 100.

[0068] In some embodiments, the alignment mask 100 may include a peripheral region 210 and an inner region 230.

[0069] Among them, the peripheral region 210 may be annularly arranged, and the inner region 230 is located within the ring of the peripheral region 210.

[0070] The first alignment pattern 110, the second alignment pattern 130, the third alignment pattern 150, and the fourth alignment pattern 170 are all disposed in the inner region 230, so as to avoid the situation where the alignment patterns on the alignment mask 100 in the second position are aligned with the alignment marks formed by the alignment mask 100 in the first position due to the first alignment pattern 110, the second alignment pattern 130, the third alignment pattern 150, and the fourth alignment pattern 170 being on the peripheral region 210, which helps to separate the alignment marks formed by the alignment mask 100 in the first position and the second position and avoid mutual influence.

[0071] In some embodiments, the inner region 230 may include a plurality of first channels 231 and a plurality of second channels 233.

[0072] Among them, the plurality of first channels 231 are spaced along the length direction Y of the alignment mask 100, and each first channel 231 can extend along the width direction X of the alignment mask 100 to respectively connect the opposite inner sides of the two rings of the peripheral region 210.

[0073] The plurality of second channels 233 are spaced along the width direction X, and each second channel 233 can extend along the length direction Y to respectively connect the opposite inner sides of the two rings of the peripheral region 210.

[0074] The plurality of first channels 231 and the plurality of second channels 233 intersect perpendicularly to divide the inner region 230 into a plurality of exposure units 235. The exposure units 235 are used to expose the semiconductor device 500, so as to better detect the semiconductor device 500 through the exposure units 235, and can control the positions of the first channels 231 and the second channels 233 to control the positions of the first alignment pattern 110, the second alignment pattern 130, the third alignment pattern 150, and the fourth alignment pattern 170.

[0075] The exposure unit 235 may also adopt a through-hole structure that penetrates the alignment mask 100 to expose the semiconductor device 500. Each exposure unit 235 can expose one semiconductor device 500, so as to manufacture a plurality of semiconductor devices 500 at one time, which helps to improve production efficiency.

[0076] Among them, the first alignment pattern 110 and the third alignment pattern 150 can be respectively disposed in two different first spacer channels 231, and the second alignment pattern 130 and the fourth alignment pattern 170 can be respectively disposed in two different second spacer channels 233, so as to ensure that the alignment patterns before and after the rotation of the alignment mask 100 can be aligned.

[0077] In some embodiments, the numbers of both the first spacer channels 231 and the second spacer channels 233 can be odd numbers.

[0078] The first spacer channel 231 located at the center of the plurality of first spacer channels 231 and the second spacer channel 233 located at the center of the plurality of second spacer channels 233 intersect to form a central intersection region, and the geometric center 190 can be located in the central intersection region, which helps to avoid the geometric center 190 being located within the exposure unit 235, and is convenient for better testing whether the alignment patterns can be aligned in different usage states of the alignment mask 100 through the geometric center 190 during the manufacturing stage of the alignment mask 100.

[0079] As an example, a test through hole can be processed at the geometric center of the alignment mask 100. In this way, the alignment mask 100 can be rotated around the test through hole to conveniently test whether the alignment patterns in the first usage state and the second usage state of the alignment mask 100 are aligned.

[0080] Please refer to Figure 5 , the embodiment of the present application further provides a semiconductor manufacturing method, and the semiconductor manufacturing method includes steps S010, S020, S030, S040, S050, and S060.

[0081] Step S010: Provide a substrate.

[0082] Step S020: Grow an epitaxial layer on the substrate, and select the topmost epitaxial layer as the target epitaxial layer.

[0083] Among them, the number of grown epitaxial layers can be one layer or multiple layers, and the multiple layers can be two layers or more than two layers, which can be specifically set according to actual requirements.

[0084] The growth method of the epitaxial layer can adopt chemical vapor deposition or other growth methods.

[0085] Step S030: Transfer the first alignment pattern, the second alignment pattern, the third alignment pattern, and the fourth alignment pattern on the alignment mask to the target epitaxial layer respectively, so as to form a first alignment mark, a second alignment mark, a third alignment mark, and a fourth alignment mark on the target epitaxial layer respectively, and record them as a target mark set.

[0086] Among them, the alignment mask is the alignment mask in the above embodiment. The specific structure of the alignment mask can refer to the above embodiment and will not be elaborated here.

[0087] The formation of the alignment marks can be completed through an etching process. Specifically: First, spin-coat a layer of photoresist on the target epitaxial layer. The alignment mask (for example, at this time, the alignment mask can be in the first use state) can be placed in the lithography machine. The lithography machine defines the first alignment pattern, the second alignment pattern, the third alignment pattern, and the fourth alignment pattern on the alignment mask onto the photoresist through exposure, and then uses the etching process to transfer the pattern onto the target epitaxial layer. After removing the photoresist, the required first alignment mark, second alignment mark, third alignment mark, and fourth alignment mark are formed on the target epitaxial layer.

[0088] Then record the first alignment mark, the second alignment mark, the third alignment mark, and the fourth alignment mark as the target mark set for subsequent monitoring.

[0089] For ease of understanding, the target epitaxial layer in this step can be defined as the first target epitaxial layer, and the target mark set can be defined as the first target mark set.

[0090] Step S040: Continuously grow a new epitaxial layer on the target epitaxial layer.

[0091] Among them, the number of newly grown epitaxial layers can be 1 layer or multiple layers. The multiple layers can be two or more layers, and can be specifically set according to actual needs.

[0092] Step S050: Detect the target mark set. When it is determined that all the alignment marks in the target mark set can be detected, continue to grow a new epitaxial layer; when it is determined that at least one alignment mark in the target mark set cannot be detected, select the current topmost epitaxial layer as the new target epitaxial layer, rotate the alignment mask 180 degrees on the basis of the previous one, so as to form new first alignment marks, second alignment marks, third alignment marks, and fourth alignment marks on the newly selected target epitaxial layer, and update the target mark set.

[0093] Among them, the first alignment mark in the updated target mark set partially coincides with the third alignment mark in the previous target mark set, the second alignment mark in the updated target mark set partially coincides with the fourth alignment mark in the previous target mark set, the third alignment mark in the updated target mark set partially coincides with the first alignment mark in the previous target mark set, and the fourth alignment mark in the updated target mark set partially coincides with the second alignment mark in the previous target mark set.

[0094] Specifically, in this step, the target mark set can be continuously detected. For example, the target mark set is detected once for each grown epitaxial layer.

[0095] The set of target marks to be detected can be detected manually or by machine.

[0096] When it is determined that all alignment marks in the set of target marks can be detected, it means that the first alignment mark, the second alignment mark, the third alignment mark, and the fourth alignment mark on the first target epitaxial layer are all clearly visible. At this time, a new epitaxial layer can be grown continuously.

[0097] When it is determined that any one of the first alignment mark, the second alignment mark, the third alignment mark, and the fourth alignment mark in the first set of target marks cannot be detected, the set of target marks needs to be refreshed. At this time, the topmost layer in the newly grown epitaxial layer can be re-determined as the target epitaxial layer (for ease of understanding, the newly selected target epitaxial layer is defined as the second target epitaxial layer).

[0098] Rotate the alignment mask by 180 degrees to switch its usage state (for example, the alignment mask is switched from the first usage state to the second usage state), and then put it into the lithography machine. At this time, the alignment patterns of the alignment mask can be aligned with the respective alignment marks in the first set of target marks to determine the position of the alignment mask. Specifically, the first alignment pattern of the alignment mask can be aligned with the third alignment mark in the first set of target marks, the second alignment pattern can be aligned with the fourth alignment mark in the first set of target marks, the third alignment pattern can be aligned with the first alignment mark in the first set of target marks, and the fourth alignment pattern can be aligned with the second alignment mark in the first set of target marks.

[0099] Then, an etching process is performed on the second target epitaxial layer. The first alignment pattern, the second alignment pattern, the third alignment pattern, and the fourth alignment pattern are defined on the photoresist through the lithography machine, and then the pattern is transferred to the second target epitaxial layer by using the etching process. After removing the photoresist, new first alignment mark, second alignment mark, third alignment mark, and fourth alignment mark are formed on the second target epitaxial layer. It can be understood that at this time, the first alignment mark on the second target epitaxial layer partially overlaps with the third alignment mark on the first target epitaxial layer, the second alignment mark on the second target epitaxial layer partially overlaps with the fourth alignment mark on the first target epitaxial layer, the third alignment mark on the second target epitaxial layer partially overlaps with the first alignment mark on the first target epitaxial layer, and the fourth alignment mark on the second target epitaxial layer partially overlaps with the second alignment mark on the first target epitaxial layer.

[0100] In the actual manufacturing process, the set of target marks can be detected repeatedly, and the same alignment mask can be reused to refresh the alignment marks repeatedly, so as to ensure that the alignment marks are always clearly visible, which is helpful for the alignment accuracy of the front and back layer lithography masks, and can reduce the number of alignment masks used.

[0101] Step S060: Align the fifth alignment pattern and the sixth alignment pattern on the photolithography mask with the first alignment mark and the third alignment mark respectively, or align the fifth alignment pattern and the sixth alignment pattern on the photolithography mask with the second alignment mark and the fourth alignment mark respectively; transfer the functional pattern on the photolithography mask to a preset epitaxial layer to form a functional region on the preset epitaxial layer.

[0102] In this way, the photolithography mask can determine its own position according to the alignment marks on the target epitaxial layer. When using the photolithography mask each time or using multiple photolithography masks, the adjacent photolithography masks used before and after can form a relationship for overlay, alignment, and offset monitoring based on the alignment marks.

[0103] Among them, the formation method of the functional region is roughly as follows: Spin-coat a photoresist on the preset epitaxial layer, define the functional pattern on the photolithography mask to the photoresist through a lithography machine, form a functional region on the preset epitaxial layer through an ion implantation process, and then remove the photoresist, so that the required functional region can be formed on the preset epitaxial layer.

[0104] It should be noted that in steps S060 and S050, step S050 can be executed first to refresh the target mark set, and then step S060 can be executed to form the required functional region; or step S060 can be executed first to form the required functional region, and then step S050 can be executed to refresh the target mark set, which can be specifically set according to requirements. In addition, the functional region and the target mark set can be located on the same epitaxial layer, or can be located on different epitaxial layers respectively, that is, the above-mentioned preset epitaxial layer can be the target epitaxial layer or other epitaxial layers outside the target epitaxial layer.

[0105] In some embodiments, after the above step: transfer the functional pattern on the photolithography mask to a preset epitaxial layer to form a functional region on the preset epitaxial layer, the manufacturing method of the semiconductor device may further include the following steps:

[0106] (1) When it is detected that the total number of epitaxial layers is less than the target number of layers, return to the step: detect the target mark set.

[0107] (2) When it is detected that the total number of epitaxial layers is equal to the target number of layers, stop growing the epitaxial layer.

[0108] In this way, the growth number of the epitaxial layer can be accurately controlled. When the number of epitaxial layers does not reach the target epitaxial layer, new epitaxial layers can continue to grow, and the alignment marks can continue to be refreshed and the required functional regions can be formed; when the total number of epitaxial layers reaches the target number of layers, it means that the epitaxial process of the semiconductor device is completed, and the growth of the epitaxial layer can be stopped. At this time, the manufacturing of the semiconductor device is completed or the semiconductor device can be subjected to other subsequent processing.

[0109] In some embodiments, after the above step: when it is detected that the total number of epitaxial layers is equal to the target number of layers, and the growth of the epitaxial layer is stopped, the manufacturing method of the semiconductor device may further include the step of reusing the alignment mask and rotating the mask 180 degrees based on the previous time to form new first alignment marks, second alignment marks, third alignment marks, and fourth alignment marks on the current topmost epitaxial layer.

[0110] In this way, alignment marks can still be retained on the topmost layer of the semiconductor device after manufacturing, so that when forming other structures subsequently, alignment can be performed based on the alignment marks on the topmost layer.

[0111] As an example, the alignment marks on the topmost layer can be used as the alignment basis for forming a surface termination structure, a gate structure, metal wiring, or a passivation film on the semiconductor device subsequently.

[0112] In some embodiments, after the above step: when it is detected that the total number of epitaxial layers is equal to the target number of layers, and the growth of the epitaxial layer is stopped, the manufacturing method of the semiconductor device may further include the following steps:

[0113] (1) Move the alignment mask a preset distance from the first position to the second position, so that the peripheral area of the alignment mask at the second position at least partially coincides with the peripheral area of the alignment mask at the first position, where the first position and the second position correspond to different substrates respectively.

[0114] (2) Return to the step of growing an epitaxial layer on the substrate and selecting the topmost epitaxial layer as the target epitaxial layer.

[0115] Among them, the first alignment pattern, the second alignment pattern, the third alignment pattern, and the fourth alignment pattern are all located inside the peripheral area.

[0116] In this way, when manufacturing the next batch of semiconductor devices, the alignment mask can be moved to the second position in the lithography machine, so that the peripheral area of the alignment mask at the second position and the peripheral area of the alignment mask at the first position can partially coincide, thereby avoiding the situation where the alignment patterns on the alignment mask at the second position are aligned with the alignment marks formed by the alignment mask at the first position due to the first alignment pattern, the second alignment pattern, the third alignment pattern, and the fourth alignment pattern being on the peripheral area, which helps to separate the alignment marks formed at the first position and the second position and avoid mutual influence.

[0117] As an example, please refer to Figure 4 , taking the manufacture of the charge balance region of a super junction MOSFET device as an example, the specific manufacturing method is as follows:

[0118] Step 1: Grow a first epitaxial layer 520 with the same doping type on the substrate 510 by chemical vapor deposition (select the first epitaxial layer 520 as the target epitaxial layer).

[0119] Step 2: Spin-coat photoresist on the first epitaxial layer 520, and define the alignment pattern on the photoresist through a lithography machine from the alignment mask 100 (for example, at this time, the alignment mask 100 is in the first use state, as Figure 1 shown). Transfer the pattern to the first epitaxial layer 520 by etching the photoresist, and form an alignment mark after removing the photoresist (such as the label a in Figure 4 ).

[0120] Step 3: Continuously grow a second epitaxial layer 540 on the first epitaxial layer 520 by chemical vapor deposition. The number of the second epitaxial layers 540 can be set according to requirements. Taking the number of the second epitaxial layers 540 as 4 layers as an example.

[0121] Determine whether the alignment mark on the first epitaxial layer 520 can be detected from the top of the 4-layer second epitaxial layer 540. If it can be detected, continue to grow a third epitaxial layer 570 on the second epitaxial layer 540; if it cannot be detected, re-select the top layer of the 4-layer second epitaxial layer 540 as the target epitaxial layer, and form a new alignment mark (such as the label b in Figure 4 ) on the re-selected target epitaxial layer (i.e., the top layer of the 4-layer second epitaxial layer 540) in the same way as forming the alignment mark (such as the label a in Figure 4 ). It should be noted that at this time, the alignment mask 100 needs to be rotated 180 degrees on the basis of the previous one, so that the newly formed alignment mark (such as the label b in Figure 4 ) and the previous alignment mark (such as the label a in Figure 4 ) can correspond one by one and partially overlap, so as to avoid the contour line of the previous alignment mark affecting the contour line of the newly formed alignment mark due to complete overlap.

[0122] Among them, the newly formed alignment mark (such as the label b in Figure 4 ) and the previous alignment mark (such as the label a in Figure 4 ) can correspond one by one and partially overlap, which specifically means that the projections of the newly formed alignment mark and the previous alignment mark on the horizontal plane along the vertical direction correspond one by one and partially overlap.

[0123] It should be noted that the alignment mark can be detected in the way of Step 3 each time a second epitaxial layer 540 is grown, that is, Step 3 can be repeatedly executed.

[0124] For ease of understanding, in this example, taking the case where the alignment marks on the first epitaxial layer 520 cannot be detected as an example, alignment marks are regenerated on the topmost layer of the four-layer second epitaxial layer 540 (such as the label b) in Figure 4 , and the growth of the third epitaxial layer 570 is continued based on the new alignment marks (for example, the growth of four-layer third epitaxial layer 570 is continued).

[0125] Step Four, doping regions (i.e., functional regions) are formed on the preset epitaxial layer through ion implantation process. For example, the required doping regions can be formed on each layer of the second epitaxial layer 540.

[0126] Step Five, after all the epitaxial layers are grown, the alignment mask 100 is reused to form new alignment marks on the topmost third epitaxial layer 570 (such as the label c) in Figure 4 , so as to facilitate the subsequent formation of terminal structures, gate structures, metal wirings, passivation films and other structures on the surface of the semiconductor device 500 based on the alignment marks on the topmost third epitaxial layer 570.

[0127] It should be noted that in Step Two, Step Three and Step Five, the same alignment mask 100 is used to form the required alignment marks on different epitaxial layers respectively.

[0128] In the alignment mask 100 provided in the embodiment of the present application and the manufacturing method of the semiconductor device 500, by providing the first alignment pattern 110, the second alignment pattern 130, the third alignment pattern 150, and the fourth alignment pattern 170 that are sequentially distributed around the geometric center 190 and have the same pattern on the alignment mask 100, the alignment mask 100 can be rotated 180 degrees around the geometric center 190 to switch between the first use state and the second use state. The first alignment pattern 110 in the first use state and the third alignment pattern 150 in the second use state partially overlap, the second alignment pattern 130 in the first use state and the fourth alignment pattern 170 in the second use state partially overlap, the third alignment pattern 150 in the first use state and the first alignment pattern 110 in the second use state partially overlap, and the fourth alignment pattern 170 in the first use state and the second alignment pattern 130 in the second use state partially overlap. Thus, the alignment pattern of the rotated alignment mask 100 can be aligned with the alignment mark formed on the epitaxial layer by the alignment mask 100 in the previous use state. After that, a new alignment mark can be formed on the new epitaxial layer, so that the alignment mark can be refreshed to reuse the same alignment mask 100 to complete multiple epitaxial processes of the semiconductor device 500, which helps to reduce the manufacturing cost. In addition, the alignment patterns before and after rotation are set to partially overlap, so as to reduce the influence of the contour line of the previous alignment mark on the epitaxial layer on the contour line of the new alignment mark, which helps to ensure the clarity of the contour line of the new alignment mark.

[0129] The embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the above embodiments. Various changes can be made without departing from the spirit of the present invention within the knowledge of those of ordinary skill in the art. In addition, the embodiments of the present invention and the features in the embodiments can be combined with each other without conflict.

Claims

1. An alignment mask, characterized in that, The alignment mask includes a first alignment pattern, a second alignment pattern, a third alignment pattern, and a fourth alignment pattern, all of which adopt the same pattern; The first alignment pattern, the third alignment pattern, the second alignment pattern, and the fourth alignment pattern are sequentially distributed around the geometric center of the alignment mask; The alignment mask has a first usage state and a second usage state. The alignment mask can rotate 180 degrees around the geometric center to switch between the first usage state and the second usage state, and make the first alignment pattern in the first usage state and the third alignment pattern in the second usage state partially overlap, the second alignment pattern in the first usage state and the fourth alignment pattern in the second usage state partially overlap, the third alignment pattern in the first usage state and the first alignment pattern in the second usage state partially overlap, and the fourth alignment pattern in the first usage state and the second alignment pattern in the second usage state partially overlap.

2. The alignment mask according to claim 1, characterized in that, The number of the first alignment patterns, the number of the second alignment patterns, the number of the third alignment patterns, and the number of the fourth alignment patterns are all multiple; The distribution directions of the multiple first alignment patterns and the distribution directions of the multiple second alignment patterns are perpendicular, the distribution directions of the multiple second alignment patterns and the distribution directions of the multiple third alignment patterns are perpendicular, the distribution directions of the multiple third alignment patterns and the distribution directions of the multiple fourth alignment patterns are perpendicular, and the distribution directions of the multiple fourth alignment patterns and the distribution directions of the multiple first alignment patterns are perpendicular; Among them, the alignment mask can rotate 180 degrees around the geometric center to make the multiple first alignment patterns in the first usage state and the multiple third alignment patterns in the second usage state correspond one by one and partially overlap, the multiple second alignment patterns in the first usage state and the multiple fourth alignment patterns in the second usage state correspond one by one and partially overlap, the multiple third alignment patterns in the first usage state and the multiple first alignment patterns in the second usage state correspond one by one and partially overlap, and the multiple fourth alignment patterns in the first usage state and the multiple second alignment patterns in the second usage state correspond one by one and partially overlap.

3. The alignment mask according to claim 2, characterized in that, The multiple first alignment patterns and the multiple third alignment patterns are sequentially spaced apart along the width direction of the alignment mask, and the multiple second alignment patterns and the multiple fourth alignment patterns are sequentially spaced apart along the length direction of the alignment mask.

4. The alignment mask according to claim 1, wherein The alignment mask includes a peripheral area and an internal area. The peripheral area is annularly arranged, and the internal area is located inside the ring of the peripheral area; The first alignment pattern, the second alignment pattern, the third alignment pattern, and the fourth alignment pattern are all arranged in the internal area.

5. The alignment mask according to claim 4, wherein The internal area includes multiple first spacer channels and multiple second spacer channels; A plurality of the first spaced channels are spaced along the length direction of the alignment mask, and each of the first spaced channels extends along the width direction of the alignment mask to respectively connect opposite inner sides of two rings in the peripheral region; A plurality of the second spaced channels are spaced along the width direction, and each of the second spaced channels extends along the length direction to respectively connect opposite inner sides of two rings in the peripheral region; The plurality of first spaced channels and the plurality of second spaced channels intersect perpendicularly to divide the inner region into a plurality of exposure units for exposing semiconductor devices; Wherein, the first alignment pattern and the third alignment pattern are respectively disposed in two different first spaced channels; the second alignment pattern and the fourth alignment pattern are respectively disposed in two different second spaced channels.

6. The alignment mask according to claim 5, wherein The number of the first spaced channels and the number of the second spaced channels are both odd numbers; The first spaced channel at the center of the plurality of first spaced channels and the second spaced channel at the center of the plurality of second spaced channels intersect to form a central intersection region, and the geometric center is located in the central intersection region.

7. A manufacturing method of a semiconductor device, characterized in that, Comprising: Providing a substrate; Growing an epitaxial layer on the substrate, and selecting the topmost epitaxial layer as a target epitaxial layer; Transferring the first alignment pattern, the second alignment pattern, the third alignment pattern and the fourth alignment pattern on the alignment mask to the target epitaxial layer respectively to form a first alignment mark, a second alignment mark, a third alignment mark and a fourth alignment mark on the target epitaxial layer respectively, and recording them as a target mark set; wherein, the alignment mask is the alignment mask according to any one of claims 1 to 6; Continuing to grow a new epitaxial layer on the target epitaxial layer; Detecting the target mark set. When it is determined that all the alignment marks in the target mark set can be detected, continue to grow a new epitaxial layer; when it is determined that at least one alignment mark in the target mark set cannot be detected, select the current topmost epitaxial layer as a new target epitaxial layer, rotate the alignment mask by 180 degrees on the basis of the previous time to form a new first alignment mark, a second alignment mark, a third alignment mark and a fourth alignment mark on the reselected target epitaxial layer, and update the target mark set; wherein, the first alignment mark, the second alignment mark, the third alignment mark and the fourth alignment mark in the updated target mark set partially coincide with the third alignment mark, the fourth alignment mark, the first alignment mark and the second alignment mark in the previous target mark set respectively; Aligning the fifth alignment pattern and the sixth alignment pattern on the lithography mask with the first alignment mark and the third alignment mark respectively, or aligning the fifth alignment pattern and the sixth alignment pattern on the lithography mask with the second alignment mark and the fourth alignment mark respectively; transferring the functional pattern on the lithography mask to a preset epitaxial layer to form a functional region on the preset epitaxial layer.

8. The manufacturing method of the semiconductor device according to claim 7, characterized in that, After transferring the functional pattern on the photolithography mask to a preset epitaxial layer to form a functional region on the preset epitaxial layer, the manufacturing method of the semiconductor device further includes: When it is detected that the total number of layers of the epitaxial layer is less than the target number of layers, return to detecting the target mark set; When it is detected that the total number of layers of the epitaxial layer is equal to the target number of layers, stop growing the epitaxial layer.

9. The manufacturing method of the semiconductor device according to claim 8, characterized in that, After the step of "when it is detected that the total number of layers of the epitaxial layer is equal to the target number of layers, stop growing the epitaxial layer", the manufacturing method of the semiconductor device further includes: Use the alignment mask again, and rotate the alignment mask 180 degrees based on the previous time to form new first alignment marks, second alignment marks, third alignment marks and fourth alignment marks on the current topmost epitaxial layer.

10. The manufacturing method of the semiconductor device according to claim 8, characterized in that, After the step of "when it is detected that the total number of layers of the epitaxial layer is equal to the target number of layers, stop growing the epitaxial layer", the manufacturing method of the semiconductor device further includes: Move the alignment mask a preset distance from the first position to the second position, so that at least part of the peripheral area of the alignment mask at the second position coincides with the peripheral area of the alignment mask at the first position, where the first position and the second position correspond to different substrates respectively; Return to the step of growing an epitaxial layer on the substrate and selecting the topmost epitaxial layer as the target epitaxial layer; Wherein, the first alignment pattern, the second alignment pattern, the third alignment pattern and the fourth alignment pattern are all located inside the peripheral area.

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