Diamond neutron detector based on FPGA

Abstract

The invention relates to the technical field of neutron radiation detection, in particular to a diamond neutron detector based on an FPGA. Comprising a signal collector used for collecting neutron signals; the pre-amplifier is in communication connection with the signal collector and is used for automatically adjusting signal gain according to the intensity of the neutron signal; the main amplifier is in communication connection with the pre-amplifier and is used for performing gain adjustment on the neutron signal adjusted by the pre-amplifier so as to prevent the neutron signal from distortion; a multichannel signal analyzer which is in communication connection with the main amplifier and is used for collecting and analyzing the neutron signal after gain adjustment of the main amplifier; and the FPGA signal processor is in communication connection with the multichannel signal analyzer and is used for calculating the analyzed neutron signals to obtain the neutron peak value number. According to the invention, the pre-amplification circuit, the main amplification circuit and the FPGA digital signal processing unit are organically integrated, so that accurate counting, amplitude measurement and efficient time resolution of neutron signals are realized.

Description

Technical Field

[0001] The present invention relates to the technical field of neutron radiation detection, and in particular, to a diamond neutron detector based on FPGA. Background Art

[0002] Most existing neutron detection systems use analog circuits for signal amplification and preliminary processing, convert the signals into digital signals through an analog-to-digital converter (ADC), and then perform further signal analysis and processing through a digital signal processing unit (such as an FPGA or a dedicated processor). The preamplifier circuit and the main amplifier circuit play a role in signal amplification, while gain control and noise suppression are the core parts of signal processing. Although these technologies have solved the problems of neutron signal acquisition and amplification to a certain extent, since most existing systems rely on fixed gain or simple gain adjustment strategies, the accuracy and stability of the signals cannot be effectively guaranteed under complex experimental conditions.

[0003] In addition, in the prior art, noise suppression usually relies on static filtering algorithms. However, due to the dynamic change characteristics of noise characteristics, these static filtering methods often cannot cope with the changes of various environmental noises, resulting in the clarity and accuracy of the signals being affected. Especially in a high-noise experimental environment, background noise often affects the accurate measurement of signals, making the performance of the neutron detection system unable to be fully exerted. At the same time, traditional digital signal processing technologies usually have the problem of high processing delay. Especially in neutron detection applications that require high time resolution, a high processing delay may lead to signal loss or untimely response.

[0004] Currently, the time resolution of most systems can usually only reach the microsecond level, which cannot meet the requirements of neutron pulse counting and accurate time recording of events. This limitation of time resolution means that the system cannot accurately distinguish adjacent neutron events, seriously affecting the need for accurate measurement of neutron events. Most traditional neutron detection systems use discrete modules for signal acquisition, amplification, and processing. Although this modular design is effective in some scenarios, it also increases the complexity and debugging difficulty of the system, resulting in poor overall stability of the system, slow response speed, and high maintenance cost. Therefore, there are still many defects in the prior art in terms of signal acquisition accuracy, gain control flexibility, noise suppression effect, time resolution, and system integration.

[0005] Therefore, the prior art still needs to be further improved and enhanced. Summary of the Invention

[0006] In view of the above deficiencies of the prior art, the purpose of the present invention is to provide a diamond neutron detector based on FPGA, aiming to solve the problems of insufficient flexibility of gain control and low time resolution of existing diamond neutron detectors.

[0007] The above object of the present invention is achieved by the following technical solutions: A diamond neutron detector based on FPGA, comprising:

[0008] A signal collector for collecting neutron signals;

[0009] A preamplifier, communicatively connected to the signal collector, for autonomously adjusting the signal gain according to the intensity of the neutron signal;

[0010] A main amplifier, communicatively connected to the preamplifier, for adjusting the gain of the neutron signal adjusted by the preamplifier to prevent distortion of the neutron signal;

[0011] A multi-channel signal analyzer, communicatively connected to the main amplifier, for collecting and analyzing the neutron signal after the gain adjustment by the main amplifier;

[0012] An FPGA signal processor, communicatively connected to the multi-channel signal analyzer, for calculating the analyzed neutron signal to obtain the number of neutron peaks.

[0013] The following are the preferred technical solutions of the present invention, but do not limit the technical solutions provided by the present invention. Through the following preferred technical solutions, the objects and beneficial effects of the present invention can be better achieved and realized.

[0014] As a preferred technical solution, for the diamond neutron detector based on FPGA, wherein the preamplifier adopts a broadband gain control technology to autonomously adjust the signal gain according to the intensity of the neutron signal.

[0015] As a preferred technical solution, for the diamond neutron detector based on FPGA, wherein the main amplifier is used to adjust the gain according to the intensity of the neutron signal adjusted by the preamplifier through an intelligent dynamic gain adjustment algorithm to prevent distortion of the neutron signal.

[0016] As a preferred technical solution, for the diamond neutron detector based on FPGA, wherein the diamond neutron detector further comprises: a digital noise suppression module for adaptively filtering the neutron signal collected by the signal collector to remove environmental noise.

[0017] As a preferred technical solution, for the diamond neutron detector based on FPGA, wherein the method for processing neutron signals by the diamond neutron detector comprises the steps of:

[0018] S1. Using the preamplifier to perform dynamic gain adjustment on the collected neutron signal by adopting a broadband gain control technology;

[0019] S2. Use the main amplifier to perform dynamic gain adjustment on the neutron signal adjusted by the preamplifier by using an intelligent dynamic gain adjustment algorithm to obtain the adjusted neutron signal;

[0020] S3. Use a multi-channel signal analyzer to collect and analyze the adjusted neutron signal;

[0021] S4. Use an FPGA signal processor to perform denoising, filtering, and peak calculation on the signal collected and analyzed by the multi-channel signal analyzer to obtain the number of neutron peaks.

[0022] 6. The FPGA-based diamond neutron detector according to claim 5, wherein the method of dynamic gain adjustment specifically includes:

[0023] S10. Evaluate and classify the intensity of the neutron signal;

[0024] S11. Judge whether gain adjustment is needed according to the evaluation and classification results of the intensity. When it is needed, generate a gain control word;

[0025] S12. Send the gain control word to the corresponding adjustment circuit for gain adjustment and feedback signal intensity confirmation; judge whether gain adjustment is needed according to the confirmation result;

[0026] S13. When it is needed, repeat steps S11 to S12 until no gain adjustment is required, the signal processing is completed, and it ends.

[0027] As a preferred technical solution, for the FPGA-based diamond neutron detector, wherein the step S4 specifically includes the steps:

[0028] S40. Perform Kalman filtering on the signal collected by the multi-channel signal analyzer and output the filtered signal;

[0029] S41. Use the over-threshold method to identify the peak of the signal, judge whether there is an effective peak. When there is an effective peak, count the number of peaks;

[0030] S42. Output the obtained number of peaks.

[0031] As a preferred technical solution, for the FPGA-based diamond neutron detector, wherein in the step S41, when there is no effective peak, loop steps S40 to S41 until there is an effective peak, and end the loop.

[0032] As a preferred technical solution, for the FPGA-based diamond neutron detector, wherein the diamond neutron detector further includes a power supply module, and there are multiple power supply modules.

[0033] As a preferred technical solution, in the diamond neutron detector based on FPGA, a plurality of FPGA signal processors are provided, and the plurality of FPGA signal processors work cooperatively.

[0034] Beneficial effects: Compared with the prior art, the present invention realizes precise counting, amplitude measurement and high-efficiency time resolution of neutron signals by organically integrating the preamplifier circuit, the main amplifier circuit and the FPGA digital signal processing unit. The detector uses FPGA as the core processing unit, which is responsible for real-time acquisition, analysis and processing of the electrical signals output by the neutron detector. FPGA has the advantages of high parallelism and low latency, and can work synchronously in multiple signal channels, quickly respond to signal changes, and ensure accurate recording and real-time processing of signals. The system realizes noise suppression, signal denoising and gain adjustment through hardware acceleration, avoiding the problems of distortion and loss caused by over-strong or over-weak signals in the traditional system. Especially during the experiment, the detector can dynamically adjust the gain according to the signal intensity and noise environment to ensure that the signals can be accurately processed under various experimental conditions. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 is a schematic structural diagram of a diamond neutron detector based on FPGA provided by the present invention;

[0036] Figure 2 is a test system of a diamond neutron detector based on FPGA provided by the present invention;

[0037] Figure 3 is a schematic diagram of the dynamic gain adjustment process provided by the present invention;

[0038] Figure 4 is a signal filtering and peak counting flow chart provided by the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0039] It should be noted that, without conflict, the embodiments in the present invention and the features in the embodiments can be combined with each other. The present invention will be described in detail below with reference to the drawings and in conjunction with the embodiments.

[0040] To make the objectives, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. The description of at least one exemplary embodiment is actually only illustrative and in no way restrictive of the present invention and its application or use. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0041] It should be noted that the terms used herein are for the purpose of describing specific embodiments only and are not intended to limit the exemplary embodiments according to the present invention. As used herein, unless the context clearly indicates otherwise, the singular forms are also intended to include the plural forms. In addition, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they specify the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0042] Unless otherwise specifically stated, the relative arrangements of components and steps, numerical expressions, and numerical values set forth in these embodiments do not limit the scope of the present invention. At the same time, it should be clear that, for the sake of convenience of description, the sizes of the various parts shown in the drawings are not drawn in actual proportional relationships. For technologies, methods, and devices known to those of ordinary skill in the relevant art, they may not be discussed in detail, but in appropriate cases, the said technologies, methods, and devices should be regarded as part of the authorized specification. In all the examples shown and discussed here, any specific values should be construed as merely exemplary and not as a limitation. Therefore, other examples of the exemplary embodiments may have different values. It should be noted that like reference numerals and letters denote like items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further discussed in subsequent drawings.

[0043] As shown in [drawings not specified], a diamond neutron detector based on FPGA provided by the present invention includes: a signal collector 10 for collecting neutron signals, a preamplifier 20 for pre-amplifying neutron signals, a main amplifier 30 for autonomously adjusting the signal gain according to the intensity of the neutron signals to prevent distortion of the neutron signals, a multi-channel signal analyzer 40 for collecting and analyzing the neutron signals after the gain adjustment of the main amplifier, an FPGA signal processor 50 for calculating the analyzed neutron signals to obtain the number of neutron peaks, and a power supply module 60 for power supply.

[0044] Such as Figure 1 and Figure 2 shown,

[0045] In the present invention, the preamplifier circuit 20 adopts broadband gain control technology, which can automatically adjust the gain according to the strength of the signal, thereby ensuring the effective amplification of weak signals and avoiding signal distortion or loss. The main amplifier circuit 30 can automatically adjust the gain according to the signal strength through an intelligent dynamic gain adjustment algorithm, ensuring that signals of different strengths can be accurately amplified, while avoiding signal distortion caused by over-amplification. In the detection of high-energy neutrons, the detector can automatically reduce the gain, and when the low-energy neutron signal is weak, it can automatically increase the gain to ensure the clarity and accuracy of the signal. The power supply module 60 can adjust the voltage according to different conditions and provide a stable power output. The multi-channel signal analyzer 40 performs multi-channel data acquisition and analysis after the amplified signal is input, and combines with the FPGA processor 50 to perform signal denoising, filtering, peak detection and other processes in real time. The FPGA processor 50, as the core module, is responsible for the acquisition and processing of real-time signals, supports the synchronous processing of multiple signal channels, and utilizes its characteristics of high parallelism and low latency to achieve fast response and efficient processing of neutron signals.

[0046] In the present invention, the broadband gain control technology refers to a key technology for dynamically adjusting the signal gain within a wide frequency band range. As an example, the gain can be linearly changed by adjusting the control voltage, and typical chips such as VCA810 and AD603 can be used; programmable adjustment can also be achieved by using a DAC or a digital interface.

[0047] In one implementation manner of the present invention, the diamond neutron detector is also specially designed with a digital noise suppression module, which uses adaptive filtering technology to dynamically adjust the filtering parameters to remove the interference of environmental noise, thereby improving the clarity and stability of the signal.

[0048] Combined Figure 2 As shown, in the present invention, the signal processing of the diamond neutron detector includes the following steps:

[0049] S1. Using a preamplifier to perform dynamic gain adjustment on the collected neutron signal by adopting broadband gain control technology for the neutron signal;

[0050] S2. Using a main amplifier to perform dynamic gain adjustment on the neutron signal adjusted by the preamplifier by adopting an intelligent dynamic gain adjustment algorithm to obtain an adjusted neutron signal;

[0051] S3. Using a multi-channel signal analyzer to collect and analyze the adjusted neutron signal;

[0052] S4. Using an FPGA signal processor to perform denoising, filtering and peak calculation on the signal collected and analyzed by the multi-channel signal analyzer to obtain the number of neutron peaks.

[0053] In the present invention, the acquisition of neutron signals can be carried out by using a signal collector in the prior art, and the specific structure of the signal collector is not limited herein. By adopting the broadband gain control technology, the gain can be automatically adjusted according to the strength of the collected neutron signals, thereby ensuring that even weak signals can be amplified in a timely and effective manner, avoiding signal loss or distortion. The low-voltage power supply provides electrical energy for the preamplifier. The signal amplified by the preamplifier circuit will be amplified again by the main amplifier. The main amplifier can automatically adjust the gain according to the amplitude of the signal, ensuring that signals of different intensities can be accurately amplified, and at the same time, signal distortion caused by over-amplification can be avoided. In the detection of high-energy neutrons, the detector can automatically reduce the gain, while when the low-energy neutron signal is weak, it can automatically increase the gain to ensure the clarity and accuracy of the signal. The main amplification circuit is connected to an oscilloscope, and the signal amplification situation can be observed according to the display of the oscilloscope. After the neutron signal is amplified by the main amplifier, it will enter a multi-channel analyzer for analysis, and in combination with the FPGA processor, signal denoising, filtering, peak detection and other processes are carried out in real time to obtain the number of neutron peaks, and then output and display outward.

[0054] Combined with Figure 3 The dynamic gain adjustment in the present invention specifically includes: evaluating the strength of the obtained signal, and classifying the signal strength according to the evaluation result. Since there are differences in the strength of the obtained signals, the signals with strong strength can be classified into one category, and the signals with weak strength can be classified into one category. Of course, this classification is only one of many classification criteria, and it is only used for explanation here and is not used for limitation.

[0055] Judge the classified signals, that is, judge whether the strength of the signal meets the subsequent requirements. If it meets, the signal is directly sent to the main amplification circuit, and the signal processing is completed. If it does not meet, the gain is adjusted to generate a gain control word, and the gain control word is sent to the gain adjustment circuit for gain adjustment. After the gain adjustment, the signal strength is confirmed by feedback, and it is judged whether the gain needs to be adjusted according to the feedback. If it still does not meet the requirements, the above steps are looped until the gain adjustment is not required, the signal processing is completed, and the dynamic gain adjustment ends.

[0056] Combined with Figure 4 As shown, the signal filtering and peak counting in the present invention include the following processes:

[0057] The collected signals are subjected to Kalman filtering using the Kalman filter algorithm. The Kalman filter can adaptively adjust the filtering parameters in dynamically changing signals, significantly improving the effect of noise suppression. Through the smoothing process of the signals, the Kalman filter not only effectively removes the random noise interference from the environment but also retains the detailed features of the signals, thus providing a clearer signal input for subsequent peak detection. After Kalman filtering, the filtered signal is output. The over-threshold method is used to identify the peaks, and the identified peaks are judged. Whether there are valid peaks or not. If there are no valid peaks, the above Kalman filtering is looped until valid peaks are identified. Then, the identified valid peaks are accumulated, and the accumulated result is output to end the filtering and peak counting.

[0058] In the present invention, in terms of peak detection, a real-time peak counting scheme based on FPGA hardware acceleration is adopted. The parallel processing ability of the FPGA enables each signal peak to be accurately counted in a short time, thus avoiding the missed counting or delay caused by insufficient real-time processing ability in traditional systems. This peak detection algorithm identifies all valid peaks by real-time monitoring of the amplitude change of the signals and accurately counts them. Compared with the traditional software implementation method, the parallel computing characteristics of the FPGA greatly improve the processing speed and response time, enabling the system to meet the stringent requirements for real-time performance and accuracy in fields such as high frequency and neutron detection.

[0059] In one implementation manner of the present invention, multiple FPGA signal processors are provided, and the multiple FPGA signal processors work together. It should be noted that the FPGA is used as the core platform for signal processing, relying on its high parallel computing ability and low latency characteristics. The FPGA as the core platform for signal processing can be replaced with a high-performance application-specific integrated circuit (ASIC). In terms of noise suppression, the present invention adopts an adaptive filtering algorithm to remove environmental noise. However, algorithms such as deep learning or machine learning can also be adopted to identify the noise patterns in real time through training the model and perform denoising. To implement the technical solution of the present invention, different hardware and software implementation methods can be adopted. In terms of hardware, the preamplifier circuit, the main amplifier circuit, and the FPGA module can be integrated through conventional PCB design, and a suitable FPGA chip such as the Xilinx or Intel series can be selected. In terms of software, the programming of the FPGA can be implemented through a hardware description language (such as VHDL or Verilog), and the digital noise suppression algorithm can be implemented in the FPGA after being simulated by Matlab.

[0060] It should be understood that the application of the present invention is not limited to the above examples. For those of ordinary skill in the art, improvements or transformations can be made according to the above description, and all these improvements and transformations should fall within the protection scope of the appended claims of the present invention.

Claims

1. A diamond neutron detector based on FPGA, characterized in that, Including: A signal collector for collecting neutron signals; A preamplifier communicatively connected to the signal collector, for autonomously adjusting the signal gain according to the intensity of the neutron signal; A main amplifier communicatively connected to the preamplifier, for adjusting the gain of the neutron signal adjusted by the preamplifier to prevent distortion of the neutron signal; A multi-channel signal analyzer communicatively connected to the main amplifier, for collecting and analyzing the neutron signal after the gain adjustment by the main amplifier; An FPGA signal processor communicatively connected to the multi-channel signal analyzer, for calculating the analyzed neutron signal to obtain the number of neutron peaks.

2. The diamond neutron detector based on FPGA according to claim 1, wherein The preamplifier adopts a broadband gain control technology to autonomously adjust the signal gain according to the intensity of the neutron signal.

3. The diamond neutron detector based on FPGA according to claim 1, characterized in that, The main amplifier is used to adjust the gain according to the intensity of the neutron signal adjusted by the preamplifier through an intelligent dynamic gain adjustment algorithm to prevent distortion of the neutron signal.

4. The diamond neutron detector based on FPGA according to claim 1, characterized in that The diamond neutron detector further includes: a digital noise suppression module for adaptively filtering the neutron signal collected by the signal collector to remove environmental noise.

5. The diamond neutron detector based on FPGA according to claim 1, characterized in that, The method for processing neutron signals by the diamond neutron detector includes the steps: S1. Using the preamplifier to perform dynamic gain adjustment on the collected neutron signal by adopting a broadband gain control technology; S2. Using the main amplifier to perform dynamic gain adjustment on the neutron signal adjusted by the preamplifier by adopting an intelligent dynamic gain adjustment algorithm to obtain an adjusted neutron signal; S3. Using the multi-channel signal analyzer to collect and analyze the adjusted neutron signal; S4. Using the FPGA signal processor to perform denoising, filtering and peak calculation on the signal collected and analyzed by the multi-channel signal analyzer to obtain the number of neutron peaks.

6. The diamond neutron detector based on FPGA according to claim 5, wherein The method for the dynamic gain adjustment specifically includes: S10. Evaluating and classifying the intensity of the neutron signal; S11. Judging whether gain adjustment is needed according to the evaluation and classification results of the intensity. When it is needed, generating a gain control word; S12. Sending the gain control word to the corresponding adjustment circuit for gain adjustment and feeding back the confirmation of the signal intensity; judging whether gain adjustment is needed according to the confirmation result; S13. When it is needed, repeating steps S11 to S12 until no gain adjustment is required, the signal processing is completed, and it ends.

7. The diamond neutron detector based on FPGA according to claim 5, wherein The step S4 specifically includes the steps: S40. Performing Kalman filtering on the signal collected by the multi-channel signal analyzer and outputting a filtered signal; S41. Identifying the peak of the signal by using an over-threshold method, judging whether there is an effective peak. When there is an effective peak, counting the number of peaks; S42. Outputting the obtained number of peaks.

8. The diamond neutron detector based on FPGA according to claim 7, wherein In the step S41, when there is no effective peak, then looping steps S40 to S41 until there is an effective peak, and ending the loop.

9. The diamond neutron detector based on FPGA according to claim 1, characterized in that, The diamond neutron detector further includes a power supply module, and there are multiple power supply modules.

10. The diamond neutron detector based on FPGA according to claim 1, wherein There are multiple FPGA signal processors, and the multiple FPGA signal processors work together.

Images