Methods, apparatus and storage media for correcting mask patterns

Abstract

Embodiments of this disclosure provide a method, apparatus, and storage medium for correcting mask patterns. The method includes: arranging at least one subresolution auxiliary pattern (SRAF) adjacent to a target pattern in a layout, the target pattern including at least one pattern segment; and performing a first-stage optical proximity correction (OPC) on the target pattern, wherein the relative positions between the pattern segment in the target pattern and one or more SRAFs associated with the pattern segment remain unchanged during the first-stage OPC correction. In this manner, the SRAFs can be positioned appropriately in the layout, thereby ensuring maximization of the process window and improving product design yield.

Description

Technical Field

[0001] The embodiments of this disclosure are primarily related to the field of semiconductor technology, and more specifically, to methods, apparatus, and storage media for modifying mask patterns. Background Technology

[0002] Photolithography is a key process in chip manufacturing. Its purpose is to increase the exposure size beyond the hardware limitations by improving resolution and other technologies, without changing the existing hardware environment of photolithography machines and other equipment, thus greatly promoting the development of semiconductor technology.

[0003] In photolithography, Sub-Resolution Assist Feature (SRAF) is a special technique. It involves placing patterns smaller than the minimum design rule around the design layout, thereby enabling the design layout to achieve higher signal contrast. These patterns are not resolved onto the photoresist by the photolithography process, thus allowing for a better process window. Summary of the Invention

[0004] In a first aspect of this disclosure, a method for correcting a mask pattern is provided. The method includes: arranging at least one subresolution auxiliary pattern (SRAF) adjacent to a target pattern in a layout, the target pattern comprising at least one pattern segment; and performing a first-stage optical proximity correction (OPC) on the target pattern, wherein the relative positions between the pattern segment in the target pattern and one or more SRAFs associated with the pattern segment remain unchanged during the first-stage OPC correction.

[0005] In a second aspect of this disclosure, an electronic device is provided. The electronic device includes a processor and a memory coupled to the processor. The memory has instructions stored therein, which, when executed by the processor, cause the electronic device to perform a method according to a first aspect of this disclosure.

[0006] In a third aspect of this disclosure, a computer-readable storage medium is provided. A computer program is stored on the computer-readable storage medium. When executed by a processor, the computer program implements the method according to a first aspect of this disclosure.

[0007] As will be understood from the following description, according to embodiments of the present disclosure, at least one subresolution auxiliary graphic (SRAF) is arranged adjacent to a target graphic in the layout, the target graphic comprising at least one graphic segment. Further, a first-stage optical proximity correction (OPC) is performed on the target graphic, wherein the relative positions between the graphic segment in the target graphic and one or more SRAFs associated with that graphic segment remain unchanged during the first-stage OPC correction. In this way, the SRAF can be positioned appropriately in the layout, thereby ensuring the maximization of the process window and improving product design yield.

[0008] It should be understood that the content described in this summary section is not intended to limit the key or essential features of the embodiments of this disclosure, nor is it intended to restrict the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description

[0009] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. In the drawings, the same or similar reference numerals denote the same or similar elements, wherein:

[0010] Figure 1 A schematic diagram of an example environment in which the various embodiments of this disclosure can be implemented is shown;

[0011] Figure 2 A flowchart illustrating a process for modifying a mask pattern according to some embodiments of the present disclosure is shown;

[0012] Figures 3A to 3G Schematic diagrams of example layouts at different stages of the OPC modification process according to some embodiments of the present disclosure are shown; and

[0013] Figure 4 A block diagram of an electronic device in which one or more embodiments of the present disclosure may be implemented is shown. Detailed Implementation

[0014] Embodiments of this disclosure will now be described in more detail with reference to the accompanying drawings. While some embodiments of this disclosure are shown in the drawings, it should be understood that this disclosure can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of this disclosure. It should be understood that the accompanying drawings and embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of protection of this disclosure.

[0015] In the description of embodiments of this disclosure, the term "comprising" and similar terms should be understood as open-ended inclusion, i.e., "including but not limited to". The term "based on" should be understood as "at least partially based on". The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The terms "first", "second", etc., may refer to different or the same objects. Other explicit and implicit definitions may also be included below.

[0016] The following will describe in detail various example implementations of this scheme with reference to the accompanying drawings.

[0017] First see Figure 1 It illustrates a schematic diagram of an example environment 100 in which the various embodiments of this disclosure can be implemented. For example... Figure 1 As shown, the example environment 100 may generally include electronic device 110.

[0018] In some embodiments, the electronic device 110 can interact with other devices (not shown). For example, the electronic device 110 can receive input information from other devices and output feedback information to other devices. In some embodiments, the input information from other devices can be design layout data 120. The electronic device 110 can perform corresponding processing on the design layout data and output the corresponding processing result 130 to other devices. In some embodiments, the processing result can be corrected layout data. In some embodiments, the processing of layout data 120 can be based on Sub-Resolution Assist Feature (SRAF) processing.

[0019] In example environment 100, electronic device 110 can be any type of computing-capable device, including terminal devices or server devices. Terminal devices can be any type of mobile terminal, fixed terminal, or portable terminal, including mobile phones, desktop computers, laptop computers, notebook computers, netbook computers, tablet computers, media computers, multimedia tablets, personal communication system (PCS) devices, personal navigation devices, personal digital assistants (PDAs), audio / video players, digital cameras / camcorders, positioning devices, television receivers, radio receivers, e-book devices, gaming devices, or any combination of the foregoing, including accessories and peripherals of these devices or any combination thereof. Server devices can include, for example, computing systems / servers, such as mainframes, edge computing nodes, computing devices in cloud environments, and so on.

[0020] It should be understood that the structure and function of environment 100 are described for illustrative purposes only and do not imply any limitation on the scope of this disclosure. Exemplary embodiments according to this disclosure will now be described in detail with reference to the accompanying drawings.

[0021] As briefly mentioned above, in photolithography, placing SRAFs around the design layout can improve signal contrast. The SRAFs themselves are not resolved onto the photoresist by the photolithography process, thus allowing for a better process window. In the computational photolithography correction flow, SRAFs need to be inserted into the design layout before performing Optical Proximity Correction (OPC).

[0022] However, the position of the SRAF remains unchanged during subsequent OPC corrections, which leads to several issues. One problem is that the presence of the SRAF limits the correction space for the design layout to some extent. For example, it affects the correction space for line segments in the design layout. Another problem is that the rules used to insert the SRAF in the design layout are determined through simulation, but after OPC corrections, the position of the SRAF, determined through simulation, changes.

[0023] Therefore, embodiments of this disclosure propose a scheme for correcting mask patterns. According to embodiments of this disclosure, at least one subresolution auxiliary pattern (SRAF) is first arranged adjacent to a target pattern in the layout, the target pattern comprising at least one pattern segment. Further, a first-stage optical proximity correction (OPC) is performed on the target pattern. During the first-stage OPC correction, the relative positions between the pattern segment in the target pattern and one or more SRAFs associated with that pattern segment remain unchanged.

[0024] According to embodiments of this disclosure, the SRAF can be positioned appropriately in the layout, thereby effectively adjusting the local spatial frequency and compensating for uneven light intensity distribution caused by diffraction loss. This significantly expands the tolerance range of the photoresist exposure dose, maximizing the process window. Furthermore, the expanded process window directly reduces electrical failures such as short circuits and open circuits caused by photolithography process deviations, thereby improving the yield of product design.

[0025] The following section provides a detailed description of various example implementations of this scheme, with reference to the accompanying drawings. Figure 2 A flowchart of a process 200 for correcting a mask pattern according to some embodiments of the present disclosure is shown. In some embodiments, process 200 may be performed by, for example... Figure 1 The illustrated electronic device 110 performs this operation. It should be understood that process 200 may also include additional boxes not shown and / or some (or more) of the boxes shown may be omitted; the scope of this disclosure is not limited in this respect. The following is in conjunction with... Figure 1 , Figure 2 as well as Figures 3A to 3G The process 200 is described in detail. Figures 3A to 3GSchematic diagrams of example layouts 300 at different stages of the OPC modification process according to some embodiments of the present disclosure are shown. It should also be understood that the layouts shown in the drawings are merely examples, and various layout designs may exist in practice. Embodiments of the present disclosure are not limited in this respect.

[0026] In frame 210, electronic device 110 arranges at least one sub-resolution auxiliary graphic SRAF adjacent to the target graphic in the layout. The target graphic includes at least one graphic segment.

[0027] As described above, electronic device 100 can process a layout. During processing, electronic device 110 can arrange at least one SRAF adjacent to a target graphic in the layout. In some embodiments, the layout processing by electronic device 110 may include OPC correction of the target graphic. Before OPC correction, electronic device 110 can arrange at least one SRAF adjacent to the target graphic in the layout according to existing rules or simulation results. In some embodiments, electronic device 110 can determine a distance threshold in the layout according to existing rules or simulation results. Here, the distance threshold may be the distance of the position in the layout relative to the target graphic. Further, electronic device 110 can determine the placement position of at least one SRAF in the layout according to the determined distance threshold. For example, the SRAF may be placed within a range where the distance between the SRAF and the target graphic is less than or equal to the distance threshold. Alternatively, there may be multiple determined distance thresholds, and the SRAF may be placed within a range or region determined by the largest and smallest distance thresholds among the multiple distance thresholds.

[0028] exist Figure 3A In the example, example layout 300 includes target graphic 310, and electronic device 110 may arrange SRAFs 321, 322, 323, 324, 325 and 326 adjacent to target graphic 310. It should be understood that SRAFs arranged adjacent to target graphic 310 may include more or fewer SRAFs. Figure 3A The SRAF shown is for illustrative purposes only and is not intended to limit the implementation of this disclosure.

[0029] In some embodiments, the electronic device 110 can segment the target graphic to divide the target image into multiple graphic segments. Figure 3B In the example, electronic device 110 can divide target graphic 310 into graphic segments 311, 312, 313, and 314. It should be understood that target graphic 310 can also be divided into more or fewer graphic segments. Figure 3B The segmentation results shown are for illustrative purposes only and are not intended to limit the implementation of this disclosure.

[0030] In some embodiments, the electronic device 110 can identify the segmented graphic fragments to distinguish different graphic fragments. Figure 3B In the example, electronic device 110 may use dashed lines to identify graphic segments. It should be understood that graphic segments can also be identified in other appropriate ways, such as using different colors to identify different graphic segments. Figure 3B The markings shown are for illustrative purposes only and are not intended to limit the implementation of this disclosure.

[0031] In some embodiments, the electronic device 110 can determine the association between at least one graphic segment and at least one SRAF. Each graphic segment in the at least one graphic segment can be associated with one or more SARFs in the at least one SRAF.

[0032] In some embodiments, the electronic device 110 may associate each of at least one graphic fragment with one or more SARFs in at least one SRAF to determine the aforementioned association relationship. When associating graphic fragments and SRAFs, edges of the graphic fragments may be associated with the SRAFs.

[0033] Take any edge of any graphic segment in the target graphic as an example. For the purposes of discussion, the arbitrary graphic segment and arbitrary edge here can be referred to as "first graphic segment" and "first edge," respectively. For the first edge in the first graphic segment, the electronic device 110 can determine the SRAFs adjacent to the first edge among at least one SRAFs, and determine the association relationship between the first edge and the SRAFs adjacent to the first edge. For example, the electronic device 110 can determine the distance between each SRAF in the at least one SRAF and the first edge, and determine the SRAF with the closest distance as the SRAF adjacent to the first edge. Alternatively, the electronic device 110 can also sort the at least one SRAF according to the distance between each SRAF in the at least one SRAF and the first edge (e.g., sort in ascending order of distance), and determine the SRAFs adjacent to the first edge from the sorted at least one SRAFs (e.g., select the top-ranked SRAFs).

[0034] In some embodiments, when determining the association between a first side and at least one SRAF adjacent to the first side, the electronic device 110 may project the first side onto the SRAF adjacent to the first side in a predetermined direction, and determine the SRAFs covered by the projection area generated by the first side. The predetermined direction can be any direction, and embodiments of this disclosure are not limited in this respect.

[0035] As an example, when associating a first edge with an SRAF covered by a projected area resulting from the first edge, the electronic device 110 determines that the first edge is associated with one or more complete SRAFs in response to the projected area covering one or more complete SRAFs. The electronic device 110 determines that the first edge is associated with an SRAF segment in response to the projected area covering an SRAF segment within an SRAF.

[0036] exist Figure 3C In the example, when electronic device 110 projects the edges of graphic segment 312 onto SRAF 324, the projections generated by the edges of graphic segment 312 cover the entire SRAF 324. In this case, electronic device 110 can determine that the edges of graphic segment 312 are associated with the entire SRAF 324. When electronic device 110 projects graphic segment 313 onto SRAF 322, the projections generated by the edges of graphic segment 313 cover a segment of SRAF 322. In this case, electronic device 110 can determine that the edges of graphic segment 313 are associated with the SRAF segment in SRAF 322 that is covered by the projection.

[0037] As another example, if the projection area generated by the first side covers one or more complete SRAFs or covers a segment of an SRAF, the electronic device 110 can determine any point or points on the first side (e.g., the endpoints of the first side or points on the first side other than the endpoints) associated with the covered one or more SRAFs or a segment of an SRAF.

[0038] In box 220, electronic device 110 performs a first-stage OPC correction on the target graphic. During the first-stage OPC correction, the relative positions between graphic segments in the target graphic and one or more SRAFs associated with those graphic segments remain unchanged. For example, electronic device 110 may perform the first-stage OPC correction on the target graphic based on the aforementioned associations.

[0039] During OPC correction of the target graphic, the OPC correction process may include multiple OPC corrections. In some embodiments, the multiple OPC corrections may be divided into two stages: a first-stage OPC correction and a second-stage OPC correction. In some embodiments, the accuracy of the first-stage OPC correction is lower than that of the second-stage OPC correction. In other words, the first-stage OPC correction may also be referred to as "coarse correction," and the second-stage OPC correction may also be referred to as "fine correction."

[0040] For example, the OPC correction process may include N OPC corrections, with the first N-3 OPC corrections constituting the first stage of OPC correction (i.e., coarse correction), and the N-2, N-1, and N OPC corrections constituting the second stage of OPC correction (i.e., fine correction), where N ≥ 20. It should be understood that the number of OPC corrections, the division of OPC correction stages, and the number of OPC stages described above are merely illustrative and not intended to limit the implementation of this disclosure; any combination of these can be used.

[0041] During the first phase of OPC correction, the relative positions between graphic segments in the target graphic and one or more SRAFs associated with those graphic segments remain unchanged. Figure 3C In the example, the first-stage OPC correction of graphic fragments 312 and 313 is taken as an example. During the first-stage OPC correction, the relative positions between the edges of graphic fragment 312 and SRAF 324, and the relative positions between the edges of graphic fragment 313 and the SRAF fragments in SRAF 322 covered by the projection of the edges of graphic fragment 313, are always kept unchanged; that is, the distances d1 and d2 remain unchanged. The corrected target graphic 310 is as follows: Figure 3D As shown. In Figure 3D During the first-stage OPC correction performed by the electronic device 110 on the target graphic 310, the distances d1, d2, d3, d4, d5, d6 and d7 between each graphic segment and each SRAF in the target graphic 310 remain unchanged.

[0042] In some embodiments, after the first-stage OPC correction is completed, to ensure compliance with mask manufacturing rules, the electronic device 110 may process at least a portion of the at least one SRAF based on the layout of the at least one SRAF in the layout. For example, fragmented SRAFs may be merged and / or cleaned up, thereby enabling the processed layout to conform to mask manufacturing rules.

[0043] The method of processing at least a portion of at least one SRAF may include removing the portion of at least one SRAF that is in contact with two adjacent SRAF points.

[0044] exist Figure 3E In the example, electronic device 110 can remove the point contacts of SRAF 321 and 322, the point contacts of SRAF 323 and 324, and the point contacts of SRAF 324 and 325.

[0045] The way to process at least a portion of at least one SRAF may include extending the portion of the point contact between two adjacent SRAFs in at least one SRAF.

[0046] exist Figure 3F In the example, electronic device 110 can connect to the point contacts of SRAF 321 and 322, the point contacts of SRAF 323 and 324, and the point contacts of SRAF 324 and 325.

[0047] The processing of at least a portion of the SRAFs in at least one SRAF may include moving the first SRAF in two adjacent SRAFs in at least one SRAF to merge the two adjacent SRAFs, wherein the length of the first SRAF is less than the length of the second SRAF in the two adjacent SRAFs.

[0048] exist Figure 3E In the example, electronic device 110 can move the shorter of SRAFs 325 and 326, that is, move SRAF 326 to merge SRAFs 325 and 326. Figure 3F In the example, electronic device 110 can move the shorter of SRAF 325 and 326, that is, move SRAF 326 to merge SRAF 325 and 326.

[0049] Electronic device 110 can also move the shorter of SRAF 325 and 326, that is, move SRAF 326 to merge SRAF 325 and 326.

[0050] It should be understood that the above-described treatment of SRAF is for illustrative purposes only and is not intended to limit the implementation of this disclosure. Other appropriate treatment methods may also be used.

[0051] In some embodiments, in response to the completion of at least one SRAF processing, the electronic device 110 performs a second-stage OPC correction on the target graphic, wherein the accuracy of the second-stage OPC correction is higher than that of the first-stage OPC correction. When performing the second-stage OPC correction on the target graphic, an arbitrary edge of any graphic fragment in the target graphic is taken as an example. For the purposes of discussion, the arbitrary graphic fragment and arbitrary edge here may be referred to as "second graphic fragment" and "second edge," respectively. The electronic device 110 may determine at least one reference point on the second edge and perform the second-stage OPC correction on the second edge based on at least one reference point.

[0052] exist Figure 3GIn the example, a reference point 316 is set on edge 315 of the graphic segment of the target graphic 310. During each OPC correction of the target graphic 310, the completion of the correction is determined by comparing the relevant parameters (e.g., illumination intensity) of the light signal at reference point 316 with predetermined values. For example, if the relevant parameters of reference point 316 meet the predetermined values, the correction of the target graphic 310 is determined to be complete. Otherwise, it is not complete. It should be understood that... Figure 3G The locations and numbers of reference points in the examples are for illustrative purposes only and are not intended to limit the implementation of this disclosure. In practice, other numbers of reference points may be set in other locations.

[0053] In some embodiments, the relative positions between a graphic fragment in the target graphic and the SRAF associated with that graphic fragment may remain unchanged during the second-stage OPC correction.

[0054] In summary, by using the above methods to modify the mask pattern, the SRAF can be placed in a suitable position on the layout, thereby maximizing the process window and improving the yield of product design.

[0055] Figure 4 A block diagram is shown of an electronic device 400 in which one or more embodiments of the present disclosure may be implemented. The electronic device 400 may, for example, be used to implement... Figure 1 The electronic device 110 shown. It should be understood that, Figure 4 The electronic device 400 shown is merely exemplary and should not be construed as limiting the functionality and scope of the embodiments described herein.

[0056] like Figure 4 As shown, electronic device 400 is in the form of a general-purpose electronic device. Components of electronic device 400 may include, but are not limited to, one or more processors 410 or processing units, memory 420, storage device 430, one or more communication units 440, one or more input devices 450, and one or more output devices 460. The processing unit may be a physical or virtual processor and is capable of performing various processes according to programs stored in memory 420. In a multiprocessor system, multiple processing units execute computer-executable instructions in parallel to improve the parallel processing capability of electronic device 400.

[0057] Electronic device 400 typically includes multiple computer storage media. Such media can be any available media accessible to electronic device 400, including but not limited to volatile and non-volatile media, removable and non-removable media. Memory 420 can be volatile memory (e.g., registers, cache, random access memory (RAM)), non-volatile memory (e.g., read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory), or some combination thereof. Storage device 430 can be a removable or non-removable medium and can include machine-readable media, such as flash drives, disks, or any other media that can be used to store information and / or data (e.g., training data for training) and can be accessed within electronic device 400.

[0058] Electronic device 400 may further include additional removable / non-removable, volatile / non-volatile storage media. Although not explicitly stated... Figure 4 As shown, disk drives for reading from or writing to removable, non-volatile disks (e.g., "floppy disks") and optical disk drives for reading from or writing to removable, non-volatile optical disks can be provided. In these cases, each drive can be connected to a bus (not shown) via one or more data media interfaces. Memory 420 may include computer program product 425 having one or more program modules configured to perform various methods or actions of various embodiments of this disclosure.

[0059] The communication unit 440 enables communication with other electronic devices via a communication medium. Additionally, the functionality of the components of the electronic device 400 can be implemented using a single computing cluster or multiple computing machines capable of communicating via communication connections. Therefore, the electronic device 400 can operate in a networked environment using logical connections to one or more other servers, networked personal computers (PCs), or another network node.

[0060] Input device 450 can be one or more input devices, such as a mouse, keyboard, trackball, etc. Output device 460 can be one or more output devices, such as a monitor, speaker, printer, etc. Electronic device 400 can also communicate with one or more external devices (not shown) via communication unit 440 as needed. These external devices include storage devices, display devices, etc., and can communicate with one or more devices that enable user interaction with electronic device 400, or with any device that enables electronic device 400 to communicate with one or more other electronic devices (e.g., network card, modem, etc.). Such communication can be performed via input / output (I / O) interface (not shown).

[0061] According to an exemplary implementation of this disclosure, a computer-readable storage medium is provided that stores one or more computer instructions, wherein the one or more computer instructions are executed by a processor to implement the methods described above.

[0062] Various aspects of this disclosure are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products implemented according to this disclosure. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0063] These computer-readable program instructions can be provided to a processing unit of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine such that, when executed by the processing unit of the computer or other programmable data processing apparatus, they create means for implementing the functions / actions specified in one or more blocks of the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium that causes a computer, programmable data processing apparatus, and / or other device to operate in a particular manner. Thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing aspects of the functions / actions specified in one or more blocks of the flowchart and / or block diagram.

[0064] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions that execute on the computer, other programmable data processing apparatus, or other device to perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0065] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of an instruction, which contains one or more executable instructions for implementing the specified logical function. In some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0066] Various implementations of this disclosure have been described above. The foregoing description is exemplary and not exhaustive, nor is it limited to the disclosed implementations. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described implementations. The terminology used herein is chosen to best explain the principles, practical applications, or improvements to technology in the market, or to enable others skilled in the art to understand the implementations disclosed herein.

Claims

1. A method for correcting a mask pattern, characterized in that, include: At least one sub-resolution auxiliary graphic SRAF is arranged adjacent to the target graphic in the layout, the target graphic including at least one graphic segment; as well as A first-stage optical proximity correction (OPC) is performed on the target graphic, wherein the relative positions between graphic segments in the target graphic and one or more SRAFs associated with the graphic segments remain unchanged during the first-stage OPC correction.

2. The method for correcting a mask pattern according to claim 1, characterized in that, Before performing the first-stage optical proximity correction (OPC) step on the target pattern, the method further includes: Determine the association between the at least one graphic fragment and the at least one SRAF, wherein the first-stage OPC correction of the target graphic is performed based on the association.

3. The method for correcting a mask pattern according to claim 1 or 2, characterized in that, Determining the association includes: For a first edge in a first graphic segment of the at least one graphic segment, determine the SRAF adjacent to the first edge in the at least one SRSF; and Determine the association relationship between the first edge and the SRAF adjacent to the first edge.

4. The method for correcting a mask pattern according to claim 3, characterized in that, Determining the association between the first edge and the SRAF adjacent to the first edge includes: Projecting the first side onto the SRAF adjacent to the first side along a predetermined direction; and Determine the SRAF covered by the projection region generated by the first edge.

5. The method for correcting a mask pattern according to claim 4, characterized in that, Determining the SRAF covered by the projected region generated by the first edge includes: In response to the projection region covering one or more complete SRAFs, it is determined that the first edge is associated with the one or more complete SRAFs; and In response to the projection region covering an SRAF segment in an SRAF, it is determined that the first edge is associated with the SRAF segment.

6. The method for correcting a mask pattern according to claim 1 or 2, characterized in that, The method further includes: Based on the layout of the at least one SRAF in the layout, at least a portion of the at least one SRAF is processed.

7. The method for correcting a mask pattern according to claim 6, characterized in that, The process includes: Remove the portion of the contact point between two adjacent SRAFs in at least one of the SRAFs. Extend the portion of the contact between two adjacent SRAF points in at least one of the SRAFs, or Move the first SRAF of two adjacent SRAFs in the at least one SRAF to merge the two adjacent SRAFs, wherein the length of the first SRAF is less than the length of the second SRAF of the two adjacent SRAFs.

8. The method for correcting a mask pattern according to claim 6, characterized in that, The method further includes: In response to the completion of the at least one SRAF processing, a second-stage OPC correction is performed on the target graphic, wherein the accuracy of the second-stage OPC correction is higher than that of the first-stage OPC correction.

9. The method for correcting a mask pattern according to claim 8, characterized in that, The second-stage OPC correction of the target graphic includes: Regarding the second side of the second graphic segment in the target graphic, Determine at least one reference point on the second side; and Based on the at least one reference point, the second side is subjected to the second-stage OPC correction.

10. The method for correcting a mask pattern according to claim 9, characterized in that, During the second phase of OPC correction, the relative positions between the graphic fragments in the target graphic and the SRAFs associated with those graphic fragments remain unchanged.

11. An electronic device, characterized in that, include: At least one processing unit; as well as At least one memory, coupled to the at least one processing unit and storing instructions for execution by the at least one processing unit, the instructions causing the electronic device to perform the method according to any one of claims 1 to 10 when executed by the at least one processing unit.

12. A computer-readable storage medium, characterized in that, It stores a computer program thereon, characterized in that the computer program can be executed by a processor to implement the method according to any one of claims 1 to 10.

Images