Accelerator operation state monitoring system, method and device and storage medium

Abstract

The invention discloses an accelerator operation state monitoring system, method and device and a storage medium, the system comprises an accelerator chip, a microcontroller and a host which are connected with one another, and the microcontroller is arranged between circuit boards where the accelerator chip is located; the accelerator chip is used for obtaining first sensor information collected by the first sensor and sending the first sensor information to the microcontroller; the first sensor is arranged in the accelerator chip; the microcontroller is used for acquiring the second sensor information, judging whether the first sensor information is valid or not by comparing the first sensor information with the second sensor information, and returning an instruction to the accelerator chip if the first sensor information is valid; the second sensor is arranged between the circuit boards where the accelerator chip is located; and the accelerator chip is also used for sending the first sensor information to the host after receiving the instruction. According to the invention, the accuracy and reliability of monitoring the operation state of the accelerator are improved.

Description

Technical Field

[0001] The present application relates to the technical field of equipment monitoring, and more specifically, to an accelerator operating state monitoring system, method, device, and storage medium. Background Art

[0002] In the related art, the state monitoring of an accelerator chip usually relies on sensors inside the accelerator chip to collect state information. Once the sensor fails or the data is misreported, the error information will be directly reported to the host, which may lead to misjudgment of the accelerator chip state by the host.

[0003] Therefore, how to improve the accuracy and reliability of monitoring the operating state of the accelerator is a technical problem that those skilled in the art need to solve. Summary of the Invention

[0004] The purpose of the present application is to provide an accelerator operating state monitoring method, device, storage medium, and computer program product, which improve the accuracy and reliability of monitoring the operating state of the accelerator.

[0005] To achieve the above purpose, the present application provides an accelerator operating state monitoring system, including an accelerator chip, a microcontroller, and a host that are connected to each other. The microcontroller is disposed between the boards of the circuit board where the accelerator chip is located;

[0006] The accelerator chip is configured to: obtain first sensor information collected by a first sensor, and send the first sensor information to the microcontroller; wherein, the first sensor is disposed inside the accelerator chip;

[0007] The microcontroller is configured to: obtain second sensor information, and determine whether the first sensor information is valid by comparing the first sensor information with the second sensor information. If the first sensor information is valid, return an instruction to the accelerator chip; wherein, the second sensor is disposed between the boards of the circuit board where the accelerator chip is located;

[0008] The accelerator chip is further configured to: when receiving the instruction, send the first sensor information to the host.

[0009] Wherein, the accelerator chip is specifically configured to: when receiving the instruction, update the base address register based on the first sensor information in the instruction, and send the information in the base address register to the host.

[0010] Among them, the accelerator chip is further configured to: after obtaining the first sensor information collected by the first sensor, store the first sensor information in a buffer area, compare whether the sensor information in the buffer area is consistent with the sensor information in the storage area, and if not, execute the step of sending the first sensor information to the microcontroller; wherein, the storage area is used to store the first sensor information collected last time;

[0011] After receiving the instruction, update the newly collected first sensor information to the storage area.

[0012] Among them, the accelerator chip is specifically configured to: after receiving the instruction, update the sensor information in the storage area based on the sensor information in the buffer area.

[0013] Among them, the accelerator chip is specifically configured to: after receiving the instruction, update the sensor information in the storage area based on the first sensor information in the instruction.

[0014] Among them, the accelerator chip is specifically configured to send the first sensor information to the operating system of the host through a first preset interface conforming to a preset protocol;

[0015] The microcontroller is further configured to: if the first sensor information is valid, send the second sensor information to the management control unit of the host through a second preset interface;

[0016] The host is further configured to: monitor the operating state of the accelerator chip based on the second sensor information.

[0017] To achieve the above object, the present application provides a method for monitoring the operating state of an accelerator, which is applied to a microcontroller. The microcontroller is arranged between boards of a circuit board where the accelerator chip is located. The method includes:

[0018] Obtain the first sensor information collected by the first sensor and the second sensor information collected by the second sensor; wherein, the first sensor is arranged inside the accelerator chip, and the second sensor is arranged between boards of the circuit board where the accelerator chip is located;

[0019] Judge whether the first sensor information is valid by comparing the first sensor information with the second sensor information; wherein, when the difference between the first sensor information and the second sensor information is within a preset threshold range, the first sensor information is valid;

[0020] If the first sensor information is valid, return an instruction to the accelerator chip so that the accelerator chip sends the first sensor information to the host.

[0021] Among them, the accelerator chip sends the first sensor information to the operating system of the host through a first preset interface conforming to a preset protocol;

[0022] Correspondingly, after determining whether the first sensor information is valid by comparing the first sensor information with the second sensor information, the following steps are further included:

[0023] If the first sensor information is valid, the second sensor information is sent to the management control system of the host through a second preset interface, so that the host monitors the operating state of the accelerator chip based on the second sensor information.

[0024] To achieve the above object, the present application provides a monitoring device for the operating state of an accelerator, which is applied to a microcontroller. The microcontroller is arranged between boards of a circuit board where the accelerator chip is located. The device includes:

[0025] An acquisition module, configured to acquire first sensor information collected by a first sensor and second sensor information collected by a second sensor; wherein, the first sensor is arranged inside the accelerator chip, and the second sensor is arranged between boards of the circuit board where the accelerator chip is located;

[0026] A comparison module, configured to determine whether the first sensor information is valid by comparing the first sensor information with the second sensor information; wherein, when the difference between the first sensor information and the second sensor information is within a preset threshold range, the first sensor information is valid;

[0027] A return module, configured to return an instruction to the accelerator chip when the first sensor information is valid, so that the accelerator chip sends the first sensor information to the host.

[0028] To achieve the above object, the present application provides an electronic device, including:

[0029] A memory, configured to store a computer program;

[0030] A processor, configured to implement the steps of the above-mentioned accelerator operating state monitoring method when executing the computer program.

[0031] To achieve the above object, the present application provides a non-volatile storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the above-mentioned accelerator operating state monitoring method are implemented.

[0032] To achieve the above object, the present application provides a computer program product, including a computer program. When the computer program is executed by a processor, the steps of the above-mentioned accelerator operating state monitoring method are implemented.

[0033] The accelerator operation status monitoring system provided by this application sets a first sensor inside the accelerator chip and a second sensor between the boards respectively, and the microcontroller compares the sensor information collected by the two sensors to judge the validity of the data. This dual-sensor redundancy design effectively avoids the problem of incorrect information reporting caused by single-sensor failure or false alarm, ensures the accuracy of the sensor information reported to the host, and the host monitors the operation status of the accelerator chip according to the accurate sensor information received, so as to realize the efficient and stable monitoring of the accelerator operation status. This application also discloses an accelerator operation status monitoring method, device, an electronic device, a computer-readable storage medium and a computer program product, which can also achieve the above technical effects.

[0034] It should be understood that the above general description and the following detailed description are only exemplary and do not limit this application. Brief Description of the Drawings

[0035] In order to more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of this application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings. The drawings are used to provide a further understanding of the present disclosure and constitute a part of the specification, and are used together with the following specific embodiments to explain the present disclosure, but do not constitute a limitation to the present disclosure. In the drawings:

[0036] Figure 1 It is a structural diagram of an accelerator operation status monitoring system shown according to an exemplary embodiment;

[0037] Figure 2 It is a flowchart of an accelerator operation status monitoring method shown according to an exemplary embodiment;

[0038] Figure 3 It is a structural diagram of an accelerator operation status monitoring system in an application embodiment provided by this application;

[0039] Figure 4 It is a flowchart of an accelerator operation status monitoring method in an application embodiment provided by this application;

[0040] Figure 5 It is a structural diagram of an accelerator operation status monitoring device shown according to an exemplary embodiment;

[0041] Figure 6 It is a structural diagram of an electronic device shown according to an exemplary embodiment. Detailed Description of the Embodiments

[0042] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without making creative efforts belong to the scope of protection of the present application. In addition, in the embodiments of the present application, "first", "second", etc. are used to distinguish similar objects, and do not have to be used to describe a specific order or sequence.

[0043] An accelerator operating state monitoring system is disclosed in an embodiment of the present application, as Figure 1 shown, including an accelerator chip 10, a microcontroller 20, and a host 30 that are interconnected. The microcontroller 20 is disposed between the boards of the circuit board where the accelerator chip 10 is located;

[0044] The accelerator operating state monitoring system provided in this embodiment has its core components including an accelerator chip 10, a microcontroller 20, and a host 30. These three are interconnected to form the basic framework of the entire monitoring system. The microcontroller 20 is disposed between the boards of the circuit board where the accelerator chip 10 is located. This layout enables the microcontroller to directly interact with the accelerator chip and obtain its operating state information. The accelerator chip 10 can be an FPGA (Field Programmable Gate Array) chip.

[0045] The accelerator chip 10 is used to: obtain the first sensor information collected by the first sensor and send the first sensor information to the microcontroller 20; wherein, the first sensor is disposed inside the accelerator chip;

[0046] In a specific implementation, a first sensor is integrated inside the accelerator chip 10, which can include a voltage sensor, a current sensor, a power consumption sensor, a temperature sensor, etc. This sensor is responsible for collecting the operating state information of the accelerator chip, such as key parameters such as voltage, current, power consumption, and temperature. That is, the first sensor information can include first voltage information, first current information, first power consumption information, and first temperature information, etc. After the accelerator chip 10 obtains the first sensor information collected by the first sensor, it will send this information to the microcontroller 20.

[0047] As a preferred implementation manner, the accelerator chip is further used to: after obtaining the first sensor information collected by the first sensor, store the first sensor information in a buffer area, compare whether the sensor information in the buffer area is consistent with the sensor information in the storage area. If they are inconsistent, then execute the step of sending the first sensor information to the microcontroller; wherein, the storage area is used to store the first sensor information collected last time.

[0048] After the first sensor collects new first sensor information, the accelerator chip will first store it in the buffer area, and then check whether the new first sensor information in the buffer area is consistent with the sensor information saved in the storage area. The storage area is used to store the first sensor information collected by the first sensor last time. If the two are consistent, it means that the operating state of the accelerator has not changed. At this time, the accelerator chip will not send the information to the microcontroller, thus avoiding unnecessary data transmission. This mechanism reduces the amount of data transmission, reduces the communication burden of the system, and also reduces the power consumption waste caused by repeated processing of the same data.

[0049] On the contrary, if the comparison result shows that the sensor information in the buffer area is inconsistent with that in the storage area, this indicates that the operating state of the accelerator has changed. In this case, the accelerator chip will send the new first sensor information to the microcontroller. This way of sending data on demand ensures that the microcontroller and the host can obtain the truly important information in a timely manner, thus improving the operating efficiency of the entire monitoring system. In this way, the system can process the changing data more efficiently, avoid delays or errors caused by data overload, and enhance the stability and reliability of the system.

[0050] It can be seen that this implementation method realizes precise control of data transmission by adding a simple comparison logic inside the accelerator chip, which not only improves the efficiency and stability of the system, but also reduces the power consumption.

[0051] The microcontroller 20 is used to: obtain the second sensor information, and judge whether the first sensor information is valid by comparing the first sensor information with the second sensor information. If the first sensor information is valid, return an instruction to the accelerator chip 10; wherein, the second sensor is arranged between the boards of the circuit board where the accelerator chip is located;

[0052] In a specific implementation, the microcontroller 20 is responsible for information verification and control instruction sending. The microcontroller 20 is connected to a second sensor, which may include a voltage sensor, a current sensor, a power consumption sensor, a temperature sensor, etc. This sensor is also used to collect the operating state information of the accelerator chip, such as voltage, current, power consumption, temperature, etc. That is, the second sensor information may include second voltage information, second current information, second power consumption information, and second temperature information. After the microcontroller 20 obtains the second sensor information collected by the second sensor, it will compare this information with the first sensor information received from the accelerator chip 10. Through this comparison, the microcontroller can determine whether the first sensor information is valid. The validity determination here is based on whether the information collected by the two sensors is consistent or within a certain error range. If the first sensor information is determined to be valid, the microcontroller 20 will return an instruction to the accelerator chip 10. The function of this instruction is to inform the accelerator chip 10 that the information it has collected is reliable and can be further reported to the host 30.

[0053] The accelerator chip 10 is further configured to: when receiving the instruction, send the first sensor information to the host 30.

[0054] In a specific implementation, when the accelerator chip 10 receives the instruction returned by the microcontroller 20, it sends the previously collected first sensor information to the operating system of the host 30.

[0055] As a feasible implementation manner, the accelerator chip is specifically configured to: when receiving the instruction, update the base address register based on the first sensor information in the instruction, and send the information in the base address register to the host.

[0056] In a specific implementation, after the microcontroller confirms that the first sensor information is valid, it sends an instruction to the accelerator chip. The main function of this instruction is to notify the accelerator chip that the currently collected first sensor information is valid. At the same time, the instruction will also include the currently collected first sensor information. The accelerator chip uses the first sensor information carried in the instruction to update the content of the base address register. The base address register stores the current operating state information of the accelerator chip. The information in the updated base address register will then be sent to the operating system of the host. The host operating system can accurately monitor the operating state of the accelerator chip by reading this updated information.

[0057] As a feasible implementation manner, the accelerator chip is specifically configured to: update the voltage register in the base address register based on the first voltage information, and / or update the current register in the base address register based on the first current information, and / or update the power consumption register in the base address register based on the first power consumption information, and / or update the temperature register in the base address register based on the first temperature information.

[0058] It should be noted that the base address register may include a voltage register, a current register, a power consumption register, and a temperature register. If the power consumption sensor and the temperature sensor are set, the sensors collected by the power consumption sensor may simultaneously include voltage information, current information, and power consumption information. That is, based on the sensor information collected by the power consumption sensor, the data of the voltage register, the current register, and the power consumption register can be determined simultaneously, and the data of the temperature register can be determined based on the temperature information collected by the temperature sensor. If the voltage register, the current register, the power consumption sensor, and the temperature sensor are set separately, then the data of the voltage register can be determined based on the sensor information of the voltage sensor, the data of the current register can be determined based on the sensor information of the current sensor, and then the data of the power consumption register can be obtained through calculation, and the data of the temperature register can be determined based on the temperature information collected by the temperature sensor.

[0059] Furthermore, the accelerator chip is further configured to: when receiving an instruction, update the newly collected first sensor information to the storage area.

[0060] In a specific implementation, when the accelerator chip receives an instruction sent by the microcontroller to confirm the validity of the newly collected first sensor information, it updates the newly collected first sensor information to the storage area, so that the storage area always stores the latest collected and valid first sensor information.

[0061] As a feasible implementation manner, the accelerator chip is specifically configured to: when receiving an instruction, update the sensor information in the storage area based on the sensor information in the buffer area.

[0062] In a specific implementation, the accelerator chip includes an information sending module and an information receiving module. The information sending module includes a storage area and a buffer area. The information sending module is configured to send the newly collected first sensor information to the microcontroller for the microcontroller to determine its validity. The information receiving module is configured to receive an instruction sent by the microcontroller to confirm the validity of the newly collected first sensor information. When the information receiving module receives this instruction, it sends a first update instruction to the information sending module. The first update instruction does not carry specific sensor information. After the information receiving module receives the first update instruction, it updates the sensor information in the buffer area to the storage area.

[0063] In this embodiment, the information receiving module confirms the validity of the information in the buffer area by sending a simple instruction, and the information sending module updates it using the information in its own buffer area, reducing the data transmission volume between different modules inside the accelerator chip and improving the transmission efficiency.

[0064] As another feasible implementation, the accelerator chip is specifically configured to: after receiving an instruction, update the sensor information in the storage area based on the first sensor information in the instruction.

[0065] In a specific implementation, after the information receiving module receives the instruction sent by the microcontroller to confirm the validity of the newly collected first sensor information, it sends a second update instruction to the information sending module. Different from the first implementation, the second update instruction directly carries the newly collected first sensor. After the information receiving module receives the second update instruction, it directly uses the first sensor information carried in the second update instruction to update the storage area. The advantage of this implementation is that the information receiving module directly transmits the verified valid information to the information sending module, avoiding the impact on the storage area due to buffer anomalies, and improving the effectiveness and reliability of storing the first sensor information.

[0066] The host 30 is configured to: monitor the operating state of the accelerator chip 10 based on the first sensor information.

[0067] In a specific implementation, the host 30 is the final decision-making and execution link of the entire monitoring system. It receives the first sensor information from the accelerator chip 10 through the operating system and monitors the operating state of the accelerator chip 10 based on this information. The host can make corresponding decisions according to the received information, such as adjusting the operating parameters of the accelerator, issuing an alarm, performing fault diagnosis, etc., so as to achieve effective management and control of the operating state of the accelerator.

[0068] It can be seen that in the embodiments of the present application, a first sensor and a second sensor are respectively provided inside the accelerator chip and between the boards, and the microcontroller compares the sensor information collected by the two sensors to determine the validity of the data. This dual-sensor redundancy design effectively avoids the problem of incorrect information reporting caused by single-sensor failure or false alarm, ensuring the accuracy of the sensor information reported to the host. The host monitors the operating state of the accelerator chip based on the accurate sensor information received, thereby achieving efficient and stable monitoring of the operating state of the accelerator.

[0069] Based on the above embodiments, as a preferred implementation, the accelerator chip is specifically configured to: send the first sensor information to the operating system of the host through a first preset interface that conforms to a preset protocol; the microcontroller is further configured to: if the first sensor information is valid, send the second sensor information to the management control unit of the host through a second preset interface; the host is further configured to: monitor the operating state of the accelerator chip based on the second sensor information.

[0070] In a specific implementation, the accelerator chip sends the first sensor information collected through a first preset interface that conforms to a preset protocol to the operating system of the host. For example, the accelerator chip sends the first sensor information collected through a PCIe (Peripheral Component Interconnect Express) interface to the operating system of the host. PCIe is a high-speed serial computer expansion bus standard widely used for connecting computer hardware devices to the motherboard. It features high bandwidth, low latency, and good scalability, enabling efficient transmission of a large amount of data. Through the PCIe protocol, the accelerator chip can quickly and stably transfer the first sensor information collected to the host operating system, ensuring that the host can obtain the operating status information of the accelerator chip in real time. At the same time, after the microcontroller confirms the validity of the first sensor information, it sends the second sensor information to the management control unit of the host through a second preset interface, such as a BMC (Baseboard Management Controller). Among them, the second preset interface is an independent low-speed interface for transmitting verified redundant information. Even if the first preset interface fails, the microcontroller can still send the second sensor information to the host through the second preset interface. After receiving the second sensor information, the host monitors the operating status of the accelerator chip based on this verified information, thereby enhancing the reliability and fault tolerance of the system.

[0071] It can be seen that this embodiment adopts a dual-channel reporting mechanism. The accelerator chip reports information to the host operating system through a first preset interface that conforms to a preset protocol, while the microcontroller uploads information to the management control unit of the host through a second preset interface. This dual-link design avoids the problem of information not being reported due to abnormal links of the preset protocol, further enhancing the stability of the system.

[0072] Based on the above embodiments, the host 30 further includes a prediction module for predicting the operating status of the accelerator chip within a certain period in the future using an artificial intelligence model based on the first sensor information or the second sensor information, further improving the intelligence level and fault prevention ability of the accelerator operating status monitoring system.

[0073] When the prediction module detects possible abnormal trends in the accelerator chip (such as rising temperature, abnormal increase in power consumption, etc.), it can issue an early warning signal in advance to remind the operation and maintenance personnel to take preventive measures, such as adjusting operating parameters, starting cooling measures, or conducting fault troubleshooting. This intelligent prediction and early warning mechanism can not only help the operation and maintenance personnel discover potential problems in advance and avoid the occurrence of faults, but also optimize the operating efficiency of the accelerator chip and extend the service life of the device.

[0074] In addition, this mechanism can also be combined with the host's management control unit to achieve automated fault response. For example, when it is predicted that the temperature of the accelerator chip may exceed the safety threshold, the operating frequency of the chip can be automatically adjusted or additional cooling devices can be started to ensure the stable operation of the system. In this way, the accelerator operating status monitoring system can not only monitor the current status in real time, but also actively predict and prevent potential problems, further improving the reliability and intelligence level of the system.

[0075] An embodiment of the present application discloses an accelerator operating status monitoring method, which improves the accuracy and reliability of monitoring the operating status of the accelerator.

[0076] See Figure 2 , a flowchart of an accelerator operating status monitoring method shown according to an exemplary embodiment, as Figure 2 shown, includes:

[0077] S101: Obtain the first sensor information collected by the first sensor and the second sensor information collected by the second sensor; wherein, the first sensor is arranged inside the accelerator chip, and the second sensor is arranged between the boards of the circuit board where the accelerator chip is located;

[0078] The execution subject of this embodiment is the microcontroller in the above accelerator operating status monitoring system. In this step, the microcontroller obtains the information collected by two sensors: the first sensor information and the second sensor information. The first sensor is located inside the accelerator chip and is responsible for collecting the operating status data of the chip, such as temperature, power consumption, etc.; while the second sensor is arranged between the boards of the circuit board where the accelerator chip is located and is used to collect the same or related operating status data. By setting two sensors, the microcontroller can obtain redundant data, providing a basis for subsequent information verification.

[0079] S102: Determine whether the first sensor information is valid by comparing the first sensor information with the second sensor information. If the first sensor information is valid, enter S103; wherein, when the difference between the first sensor information and the second sensor information is within a preset threshold range, the first sensor information is valid;

[0080] In this step, the microcontroller performs a comparative analysis on the first sensor information and the second sensor information. The core of this comparison process is to determine the validity of the first sensor information. Specifically, if the difference between the information collected by the two sensors is within the preset threshold range, the first sensor information is considered valid. This difference-based judgment method can effectively identify sensor failures or abnormal data, ensuring the reliability of the collected information. The preset threshold range is set according to the accuracy of the sensor and the data fluctuation range under normal operating conditions, and is used to distinguish normal data differences and abnormal situations.

[0081] S103: Return an instruction to the accelerator chip so that the accelerator chip sends the first sensor information to the host.

[0082] In this step, the microcontroller returns an instruction to the accelerator chip indicating that the first sensor information is valid. After receiving this instruction, the accelerator chip sends the first sensor information to the operating system of the host. After receiving this verified information, the host can accurately monitor the operating status of the accelerator chip based on the first sensor information.

[0083] As a feasible implementation, return a first update instruction to the accelerator chip so that when the accelerator chip receives the first update instruction, it updates the base address register based on the first sensor information in the cache and sends the information in the base address register to the operating system of the host; wherein, the first update instruction is used to indicate that the first sensor information is valid.

[0084] As another feasible implementation, return a second update instruction to the accelerator chip so that when the accelerator chip receives the second update instruction, it updates the base address register based on the first sensor information in the second update instruction and sends the information in the base address register to the operating system of the host; wherein, the second update instruction includes the first sensor information.

[0085] As a preferred implementation, the accelerator chip sends the first sensor information to the operating system of the host through a first preset interface that conforms to a preset protocol; correspondingly, after determining whether the first sensor information is valid by comparing the first sensor information with the second sensor information, it further includes: if the first sensor information is valid, send the second sensor information to the management control system of the host through a second preset interface so that the host monitors the operating status of the accelerator chip based on the second sensor information.

[0086] In a specific implementation, the accelerator chip sends the first sensor information to the operating system of the host through a first preset interface (such as the PCIe protocol) that conforms to a preset protocol. This design utilizes the high-speed characteristics of the PCIe protocol to ensure that information can be transmitted to the host quickly and efficiently, providing real-time operating status data of the accelerator chip for the operating system of the host. This high-speed transmission is crucial for a monitoring system that requires quick response and can reflect the operating conditions of the accelerator chip in a timely manner.

[0087] At the same time, the microcontroller sends the second sensor information to the host's management and control system through the second preset interface. Compared with the first preset interface, the second preset interface focuses more on stability and reliability rather than pure speed. In this way, the host's management and control system can receive the verified second sensor information, thereby monitoring the operating status of the accelerator chip more comprehensively and accurately. This dual-interface design not only improves the efficiency of information transmission, but also enhances the reliability of the system through a redundancy mechanism, ensuring that even if one of the interfaces has a problem, the other interface can still provide the necessary monitoring data.

[0088] It can be seen that the embodiment of the present application sets the first sensor and the second sensor inside the accelerator chip and between the boards respectively, and the microcontroller judges the validity of the data by comparing the sensor information collected by the two sensors. This dual-sensor redundant design effectively avoids the problem of reporting erroneous information due to single sensor failure or false alarm, and ensures the accuracy of the sensor information reported to the host. The host monitors the operating status of the accelerator chip based on the accurate sensor information received, thereby realizing efficient and stable monitoring of the accelerator operating status. Furthermore, a dual-channel reporting mechanism is adopted, and the accelerator chip reports information to the host operating system through the first preset interface that complies with the preset protocol, and the microcontroller uploads the information to the management control unit of the host through the second preset interface. This dual-link design avoids the problem of information being unable to be reported due to link anomalies of the preset protocol, and further enhances the stability of the system.

[0089] An application example provided by the present application is described below. Figure 3 As shown in the figure, it includes the host side on the left and the artificial intelligence computing accelerator side on the right. The artificial intelligence computing accelerator side includes two main modules: the accelerator chip module and the microcontroller module. Both the accelerator chip module and the microcontroller module have accelerator status information acquisition sensors, among which the accelerator power consumption, temperature and other information acquisition sensors are integrated inside the chip, and the information acquisition sensor of the microcontroller module is an onboard sensor.

[0090] First, instantiate a data forwarding module inside the accelerator chip, which is used for the acquisition, forwarding, and reporting of accelerator status information. It includes five major modules: a power consumption information receiving module, a temperature information receiving module, an information sending module, an information receiving module, and a data update module. The power consumption information receiving module is used to receive the power consumption information data collected by the chip power consumption sensor; the temperature information receiving module is used to receive the temperature information data collected by the chip temperature sensor; the information sending module first receives the data from the power consumption information receiving module and the temperature information receiving module and stores them in the data buffer of this module. Then, it compares the data in the buffer with the historical data in the storage area. When the data is found to be inconsistent, it sends the data to the chip information receiving module of the microcontroller. When the data is consistent, it means that the accelerator status information has not changed and no processing is done; the information receiving module is used to receive the data from the chip information sending module, transfer the data to the data update module, and at the same time notify the information sending module to update the information in the storage area; the data update module updates the accelerator operation status information to the corresponding PCIe base address register, and the host operating system can read the accelerator operation status information by accessing the corresponding PCIe base address register through the PCIe high-speed bus.

[0091] Secondly, build an on-board accelerator operation status information monitoring system composed of a microcontroller, an on-board power consumption sensor, and an on-board temperature sensor. The microcontroller is responsible for data collection, validity judgment, and information reporting, etc. The microcontroller includes six major modules: an on-board power consumption information receiving module, an on-board temperature information receiving module, a chip information receiving module, a chip information sending module, an information verification module, and an information sending module. The on-board power consumption information receiving module and the on-board temperature information receiving module are respectively used to receive the information reported by the on-board power consumption sensor and the on-board temperature sensor; the chip information receiving module and the chip information sending module are respectively used to receive the information from the artificial intelligence acceleration chip and send information to the artificial intelligence acceleration chip; the information verification module is used to receive the data from the on-board power consumption information receiving module, the on-board temperature information receiving module, and the chip information receiving module, and verify the validity of the data. When the difference between the information data from the chip sensor and the on-board sensor is within the threshold range, the reporting process is carried out. When the data difference exceeds the threshold, it means that the operation status information is abnormal. The chip information sending module is mainly used to send data to the information receiving module of the artificial intelligence acceleration chip; the information sending module is used to report information to the host board-level management control system through a low-speed interface.

[0092] The implementation process of the monitoring system is as Figure 4 shown, including the following steps:

[0093] Step 1: The chip power consumption and temperature sensors respectively collect the corresponding information; at the same time, the on-board power consumption and temperature sensors also synchronously collect the corresponding information;

[0094] Step 2: The chip power consumption and temperature sensors respectively send the collected information to the corresponding temperature and power consumption information receiving modules;

[0095] Step 3: The information sending module waits to receive the status information data from the temperature and power consumption information receiving modules;

[0096] Step 4: The information sending module stores the received information in the buffer and compares it with the data information in the storage area. If the data is consistent, it continues to wait for the next data update; if the data is inconsistent, it sends the data to the chip information receiving module of the microcontroller;

[0097] Step 5: The information verification module of the microcontroller verifies the validity of the received data. If the data is invalid, it waits for the next data report; if the data is valid, it sends the data to the information receiving module of the accelerator chip through the chip information sending module, and at the same time reports the information to the main board-level management control system through the low-speed interface. The principle for judging data validity is whether the difference between the data collected by the chip sensor and the data collected by the on-board sensor is within the threshold range. If it is within the threshold range, it means that each sensor is effective and has collected data normally; otherwise, it means that the sensor data collection is abnormal;

[0098] Step 6: The information receiving module receives the information and sends it to the data update module, and at the same time notifies the information sending module to update the data in the storage area; Another alternative solution is that the information receiving module only receives the update instruction and does not receive the specific data, and directly reads the data from the buffer of the information sending module after receiving the update signal. This alternative solution can reduce the data transmission volume.

[0099] Step 7: The data update module updates the status information data to the addresses corresponding to each status information in the PCIe base address register.

[0100] It can be seen that in this embodiment, a dual-sensor mode is adopted for status information acquisition. In addition to the sensors inside the accelerator chip, on-board sensors are also placed between the accelerator boards. Each type of status information is collected by two transmitters simultaneously. When reporting data, reporting is only performed when the difference between the status information collected by the two sensors is within the threshold range, avoiding false data reporting. Furthermore, when reporting information, a dual-channel method is adopted. The accelerator reports information to the system through a high-speed PCIe interface, and the microcontroller uploads data to the main board-level management control system through a low-speed interface. This method adopts a dual-sensor redundancy design for the accelerator operation status information, and information reporting is only performed when the data of the two sensors are consistent, ensuring the accuracy of information acquisition. At the same time, the method of uploading through both high-speed and low-speed interfaces avoids the problem that information cannot be reported due to abnormal PCIe links. This method improves the correctness of the system's monitoring of the accelerator operation status information, and thus ensures the stability of the system.

[0101] Next, an accelerator operation status monitoring device provided by an embodiment of the present application will be introduced. The accelerator operation status monitoring device described below can be referred to in mutual reference with the accelerator operation status monitoring method described above.

[0102] See Figure 5 , a structural diagram of an accelerator operation status monitoring device shown according to an exemplary embodiment, as Figure 5 shown, includes:

[0103] An acquisition module 201, configured to acquire first sensor information collected by a first sensor and second sensor information collected by a second sensor; wherein, the first sensor is disposed inside the accelerator chip, and the second sensor is disposed between the circuit boards where the accelerator chip is located;

[0104] A comparison module 202, configured to determine whether the first sensor information is valid by comparing the first sensor information with the second sensor information; wherein, when the difference between the first sensor information and the second sensor information is within a preset threshold range, the first sensor information is valid;

[0105] A return module 203, configured to, when the first sensor information is valid, return an instruction to the accelerator chip so that the accelerator chip sends the first sensor information to the host.

[0106] As a preferred implementation manner, the accelerator chip sends the first sensor information to the operating system of the host through a first preset interface that conforms to a preset protocol;

[0107] Correspondingly, it further includes:

[0108] A sending module, configured to, when the first sensor information is valid, send the second sensor information to the management control system of the host through a second preset interface, so that the host monitors the operating state of the accelerator chip based on the second sensor information.

[0109] It can be seen that in the embodiment of the present application, a first sensor and a second sensor are respectively arranged inside the accelerator chip and between boards, and the microcontroller judges the validity of the data by comparing the sensor information collected by the two sensors. This dual-sensor redundancy design effectively avoids the problem of incorrect information reporting caused by a single sensor failure or false alarm, ensures the accuracy of the sensor information reported to the host, and the host monitors the operating state of the accelerator chip according to the accurate sensor information received, thereby realizing efficient and stable monitoring of the accelerator operating state. Further, a dual-channel reporting mechanism is adopted. The accelerator chip reports information to the host operating system through a first preset interface conforming to a preset protocol, and at the same time, the microcontroller uploads the information to the management control unit of the host through a second preset interface. This dual-link design avoids the problem of information being unable to be reported due to an abnormal link of the preset protocol, and further enhances the stability of the system.

[0110] Regarding the device in the above embodiment, the specific manners in which each module performs operations have been described in detail in the embodiment related to the method, and will not be elaborated here.

[0111] Based on the hardware implementation of the above program module, and in order to implement the method of the embodiment of the present application, the embodiment of the present application also provides an electronic device. Figure 6 As shown in the structural diagram of an electronic device according to an exemplary embodiment, Figure 6 the electronic device includes:

[0112] A communication interface 1, capable of interacting with other devices such as network devices.

[0113] A processor 2, connected to the communication interface 1 to implement information interaction with other devices, and configured to execute the accelerator operating state monitoring method provided by the above one or more technical solutions when running a computer program. The computer program is stored on a memory 3.

[0114] Of course, in actual application, each component in the electronic device is coupled together through a bus system 4. It can be understood that the bus system 4 is used to realize the connection and communication between these components. The bus system 4 includes not only a data bus, but also a power bus, a control bus, and a status signal bus. However, for the sake of clarity, in Figure 6 all kinds of buses are labeled as the bus system 4.

[0115] The memory 3 in the embodiments of the present application is used to store various types of data to support the operation of the electronic device. Examples of such data include: any computer program for operating on the electronic device.

[0116] It can be understood that the memory 3 can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read-only memory (ROM, Read Only Memory), a programmable read-only memory (PROM, Programmable Read-Only Memory), an erasable programmable read-only memory (EPROM, Erasable Programmable Read-Only Memory), an electrically erasable programmable read-only memory (EEPROM, Electrically Erasable Programmable Read-Only Memory), a ferromagnetic random access memory (FRAM, ferromagnetic random access memory), a flash memory (Flash Memory), a magnetic surface memory, an optical disc, or a compact disc read-only memory (CD-ROM, Compact Disc Read-Only Memory); the magnetic surface memory can be a disk memory or a tape memory. The volatile memory can be a random access memory (RAM, Random Access Memory), which is used as an external cache. By way of example but not limitation, many forms of RAM are available, such as a static random access memory (SRAM, Static Random Access Memory), a synchronous static random access memory (SSRAM, Synchronous Static Random Access Memory), a dynamic random access memory (DRAM, Dynamic Random Access Memory), a synchronous dynamic random access memory (SDRAM, Synchronous Dynamic Random Access Memory), a double data rate synchronous dynamic random access memory (DDR SDRAM, Double Data Rate Synchronous Dynamic Random Access Memory), an enhanced synchronous dynamic random access memory (ESDRAM, Enhanced Synchronous Dynamic Random Access Memory), a sync link dynamic random access memory (SLDRAM, SyncLink Dynamic Random Access Memory), and a direct rambus random access memory (DRRAM, Direct Rambus Random Access Memory).The memory 3 described in the embodiments of the present application is intended to include, but not limited to, these and any other suitable types of memories.

[0117] The method disclosed in the embodiments of the present application above can be applied to or implemented by the processor 2. The processor 2 may be an integrated circuit chip with the ability to process signals. During implementation, each step of the above method can be completed by the integrated logic circuit in hardware or instructions in software form in the processor 2. The above processor 2 may be a general-purpose processor, DSP, or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The processor 2 can implement or execute each method, step, and logic block diagram disclosed in the embodiments of the present application. The general-purpose processor may be a microprocessor or any conventional processor, etc. Combining the steps of the method disclosed in the embodiments of the present application, it can be directly embodied as being executed and completed by the hardware decoding processor, or executed and completed by the combination of hardware and software modules in the decoding processor. The software module may be located in the storage medium, which is located in the memory 3. The processor 2 reads the program in the memory 3 and combines its hardware to complete the steps of the foregoing method.

[0118] When the processor 2 executes the program, it implements the corresponding processes in each method of the embodiments of the present application. For the sake of brevity, it will not be elaborated here.

[0119] In an exemplary embodiment, the embodiments of the present application also provide a non-volatile storage medium storing a computer program, which can be executed by the processor 2 to complete the foregoing method steps.

[0120] In an exemplary embodiment, the embodiments of the present application also provide a computer program product including a computer program, which is executed by the processor 2 to complete the foregoing method steps.

[0121] Those of ordinary skill in the art can understand that all or part of the steps to implement the above method embodiments can be completed by hardware related to computer program instructions. The foregoing computer program can be stored in a non-volatile storage medium. When the computer program is executed, it executes the steps including the above method embodiments. Or, if the above integrated unit is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a non-volatile storage medium. Based on such an understanding, the technical solution of the embodiments of the present application essentially or the part that contributes to the prior art can be embodied in the form of a software product. The computer software product is stored in a non-volatile storage medium and includes several instructions to enable an electronic device (which may be a personal computer, server, network device, etc.) to execute all or part of the methods of the embodiments of the present application.

[0122] The above is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present application can easily think of changes or substitutions, which should all be covered by the protection scope of the present application.

Claims

1. An accelerator operating status monitoring system, characterized in that, It includes an interconnected accelerator chip, a microcontroller, and a host. The microcontroller is disposed between the boards of the circuit board where the accelerator chip is located. The accelerator chip is configured to: obtain first sensor information collected by a first sensor and send the first sensor information to the microcontroller. Wherein, the first sensor is disposed inside the accelerator chip. The microcontroller is configured to: obtain second sensor information and determine whether the first sensor information is valid by comparing the first sensor information with the second sensor information. If the first sensor information is valid, return an instruction to the accelerator chip. Wherein, the second sensor is disposed between the boards of the circuit board where the accelerator chip is located. The accelerator chip is further configured to: when receiving the instruction, send the first sensor information to the host.

2. The accelerator operation status monitoring system according to claim 1, wherein Specifically, the accelerator chip is configured to: when receiving the instruction, update the base address register based on the first sensor information in the instruction and send the information in the base address register to the host.

3. The accelerator operation status monitoring system according to claim 1, wherein The accelerator chip is further configured to: after obtaining the first sensor information collected by the first sensor, store the first sensor information in a buffer area, compare whether the sensor information in the buffer area is consistent with the sensor information in the storage area. If not, execute the step of sending the first sensor information to the microcontroller. Wherein, the storage area is used to store the first sensor information collected last time. When receiving the instruction, update the newly collected first sensor information to the storage area.

4. The accelerator operation status monitoring system according to claim 3, characterized in that, Specifically, the accelerator chip is configured to: when receiving the instruction, update the sensor information in the storage area based on the sensor information in the buffer area.

5. The accelerator operation status monitoring system according to claim 3, characterized in that, Specifically, the accelerator chip is configured to: when receiving the instruction, update the sensor information in the storage area based on the first sensor information in the instruction.

6. The accelerator operation status monitoring system according to claim 1, characterized in that Specifically, the accelerator chip is configured to: send the first sensor information to the operating system of the host through a first preset interface that conforms to a preset protocol. The microcontroller is further configured to: if the first sensor information is valid, send the second sensor information to the management control unit of the host through a second preset interface. The host is further configured to: monitor the operating state of the accelerator chip based on the second sensor information.

7. A method for monitoring the operating state of an accelerator, characterized in that, Applied to a microcontroller, the microcontroller is disposed between the boards of the circuit board where the accelerator chip is located. The method includes: Obtain first sensor information collected by a first sensor and second sensor information collected by a second sensor. Wherein, the first sensor is disposed inside the accelerator chip, and the second sensor is disposed between the boards of the circuit board where the accelerator chip is located. Determine whether the first sensor information is valid by comparing the first sensor information with the second sensor information. Wherein, when the difference between the first sensor information and the second sensor information is within a preset threshold range, the first sensor information is valid. If the first sensor information is valid, an instruction is returned to the accelerator chip so that the accelerator chip sends the first sensor information to the host.

8. The accelerator operation status monitoring method according to claim 7, wherein The accelerator chip sends the first sensor information to the operating system of the host through a first preset interface that complies with a preset protocol; Correspondingly, after determining whether the first sensor information is valid by comparing the first sensor information with the second sensor information, it further includes: If the first sensor information is valid, the second sensor information is sent to the management control system of the host through a second preset interface so that the host monitors the operating state of the accelerator chip based on the second sensor information.

9. An electronic device, characterized in that, It includes: A memory for storing a computer program; A processor for implementing the steps executed by the accelerator operating state monitoring method as claimed in claim 7 or 8 when executing the computer program.

10. A computer-readable storage medium, characterized in that, A computer program is stored on the computer-readable storage medium, and when the computer program is executed, the steps executed by the accelerator operating state monitoring method as claimed in claim 7 or 8 are implemented.

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