Semiconductor module

Abstract

A semiconductor module includes a module substrate, a controller device and a memory device mounted on a surface of the module substrate, and a plurality of tabs on one side of the module substrate. The module substrate has a first through-hole extending vertically through the module substrate. A first via is between the controller device and the memory device. The first through hole extends in a first direction. A length of the first via along the first direction is less than a width of the controller device along the first direction.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor module. Background Art

[0002] A circuit board is configured such that electronic devices are mounted on a dielectric substrate and the electronic devices are electrically connected to conductive wires forming a circuit on the dielectric substrate. Electric signals received from the outside are transmitted through the conductive wires to the corresponding electronic devices, and the electric signals processed and output by the electronic devices are transmitted through the conductive wires to other electronic devices or to the outside. The circuit board uses electric signals to drive the electronic devices or drive external components connected to the circuit board.

[0003] Electronic devices generate a certain amount of heat during operation. The heat radiated from the electronic devices is transferred outward in the form of radiant heat or conductive heat, and the radiant heat or conductive heat is transmitted through the conductive wires or the dielectric substrate. A semiconductor module generally has a heat radiation mechanism (such as a heat radiation plate) for releasing the heat generated during the operation of the electronic devices. Summary of the Invention

[0004] The present disclosure provides a semiconductor module having improved thermal stability.

[0005] According to some implementations, a semiconductor module may include: a module substrate; a controller device and a memory device mounted on a surface of the module substrate; and a plurality of tabs on one side of the module substrate. The module substrate may have a first through hole extending vertically through the module substrate. The first through hole may be between the controller device and the memory device. The first through hole may extend in a first direction. A length of the first through hole along the first direction may be less than a width of the controller device along the first direction.

[0006] According to some implementations, a semiconductor module may include: a module substrate; a controller device, a memory device, and a power supply device spaced apart from each other on a top surface of the module substrate; and a plurality of tabs on one side of the module substrate in a first direction. The controller device and the power supply device may be on one side of the memory device in the first direction. The module substrate may have a first through hole and a second through hole extending vertically through the module substrate. The first through hole may extend between the controller device and the memory device in a second direction. The second direction may intersect the first direction. The second through hole may be between the controller device and the power supply device.

[0007] According to some implementations, a semiconductor module may include: a substrate; a first heat-generating device mounted on a top surface of the substrate; and a second heat-generating device mounted on the top surface of the substrate and spaced apart from the first heat-generating device in a first direction. The substrate may have a through hole between the first heat-generating device and the second heat-generating device. The through hole may extend vertically through the substrate. The through hole may extend in a second direction that intersects the first direction. A length of the through hole along the second direction may be less than a width of the first heat-generating device along the second direction and a width of the second heat-generating device along the second direction. The through hole may be filled with air. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 A perspective view showing an exemplary semiconductor module is shown.

[0009] Figure 2 A plan view showing an exemplary semiconductor module is shown.

[0010] Figure 3 A cross-sectional view taken along line Figure 2 I-I' is shown.

[0011] Figures 4 to 8 A plan view showing an exemplary semiconductor module is shown.

[0012] Figure 9 A cross-sectional view taken along line Figure 8 II-II' is shown.

[0013] Figure 10 A plan view showing an exemplary semiconductor module is shown.

[0014] Figure 11 A cross-sectional view taken along line Figure 10 III-III' is shown.

[0015] Figure 12 A plan view showing an exemplary semiconductor module is shown.

[0016] Figure 13 A cross-sectional view taken along line Figure 12 IV-IV' is shown.

[0017] Figure 14 A cross-sectional view showing an exemplary semiconductor package is shown. DETAILED DESCRIPTION

[0018] A semiconductor module according to an implementation will now be described below with reference to the drawings.

[0019] Figure 1 A perspective view showing an exemplary semiconductor module is shown. Figure 2 A plan view showing an exemplary semiconductor module is shown. Figure 3Shows a cross-sectional view taken along the line I-I' of Figure 2 sectional view taken along the line I-I'.

[0020] For ease of description, the positional relationship of the semiconductor module 10 will be described based on three axes orthogonal to each other. For example, a first direction D1 and a second direction D2 parallel to one surface of the module substrate 100, and a third direction D3 perpendicular to the one surface of the module substrate 100. The first direction D1 may intersect the second direction D2.

[0021] Referring to Figures 1 to 3 , the semiconductor module 10 may include a module substrate 100, a first heat generating device 200, a second heat generating device 300, a third heat generating device 400, and a tab 500.

[0022] The module substrate 100 may have a quadrilateral plate shape and may extend in the first direction D1. The module substrate 100 may have a first surface 100a and a second surface 100b opposite to each other. The module substrate 100 may have a substantially uniform thickness T. In the present specification, the thickness T of the module substrate 100 may represent the interval between the first surface 100a and the second surface 100b. The module substrate 100 may include a printed circuit board (PCB). The module substrate 100 may have an insertion hole 110 on one side thereof for alignment or fixation with a motherboard slot of an electronic product such as a computer. The insertion hole 110 may be provided adjacent to one side surface of the module substrate 100 in a direction opposite to the first direction D1.

[0023] The conductive wire 120 may be provided on the module substrate 100. The conductive wire 120 may be provided inside the module substrate 100, or may be provided on the first surface 100a or the second surface 100b of the module substrate 100. The conductive wire 120 may electrically connect the first heat generating device 200, the second heat generating device 300, the third heat generating device 400, and the tab 500 to each other.

[0024] The first heat generating device 200 may be mounted on the first surface 100a of the module substrate 100. For example, the first heat generating device 200 may be mounted on the module substrate 100 through a wire or a lead frame. Different from that shown, the first heat generating device 200 may be mounted on the second surface 100b of the module substrate 100. According to some embodiments, a plurality of first heat generating devices 200 may be provided. In this case, the plurality of first heat generating devices 200 may be mounted only on the first surface 100a of the module substrate 100, only on the second surface 100b of the module substrate 100, or on both the first surface 100a and the second surface 100b of the module substrate 100. The plurality of first heat generating devices 200 may be spaced apart from each other. Below will focus on Figures 1 to 3Embodiments. The first heating device 200 may be electrically connected to the conductive wire 120 of the module substrate 100. The first heating device 200 may emit high thermal energy in the middle of its operation process. The first heating device 200 may include a memory device. For example, the first heating device 200 may include a NAND flash memory. For another example, the first heating device 200 may include one of other memory devices (such as DRAM, NOR flash memory, OneNAND, PRAM, ReRAM, or MRAM).

[0025] The second heating device 300 may be mounted on one surface of the module substrate 100 on which the first heating device 200 is mounted. The second heating device 300 may be mounted on the first surface 100a of the module substrate 100. For example, the second heating device 300 may be mounted on the module substrate 100 through a wire or a lead frame. Different from what is shown, the second heating device 300 may be mounted on the second surface 100b of the module substrate 100. The second heating device 300 may be disposed at the central portion of the first surface 100a of the module substrate 100. When observed in a plan view, the second heating device 300 may be disposed in a direction opposite to the first direction D1 from the first heating device 200. The second heating device 300 may be spaced apart from the first heating device 200. However, this implementation is not limited thereto, and the first heating device 200 and the second heating device 300 may be arranged in various ways. The second heating device 300 may be electrically connected to the first heating device 200 through the conductive wire 120 of the module substrate 100. The second heating device 300 may emit higher thermal energy than the first heating device 200 in the middle of its operation process. For example, the second heating device 300 may include a controller device. The second heating device 300 may include a register clock driver (RCD), an optoelectronic device, a communication device, a digital signal processor, a controller, a system on a chip, or any other logic device.

[0026] The third heating device 400 can be mounted on the module substrate 100. For example, the third heating device 400 can be mounted on the module substrate 100 through wires or a lead frame. Different from what is shown, the third heating device 400 can be mounted on the second surface 100b of the module substrate 100. The third heating device 400 can be disposed on the central portion of the first surface 100a of the module substrate 100. When observed in a plan view, the third heating device 400 can be disposed from the first heating device 200 in a direction opposite to the first direction D1. When observed in a plan view, the third heating device 400 can be disposed from the second heating device 300 in the second direction D2. For example, the second heating device 300 and the third heating device 400 can be arranged in the second direction D2 on one side in a direction opposite to the first direction D1 of the first heating device 200. The third heating device 400 can be spaced apart from the first heating device 200 and the second heating device 300. However, the present embodiment is not limited thereto, and the first heating device 200, the second heating device 300, and the third heating device 400 can be arranged in various ways. The third heating device 400 can be electrically connected to the first heating device 200 and the second heating device 300 through the conductive wire 120 of the module substrate 100. The third heating device 400 can emit high thermal energy in the middle of its operation process. The third heating device 400 can include, for example, a power device. The third heating device 400 can include a power device such as a power management integrated circuit (PMIC).

[0027] The tab 500 can be disposed at one end of the module substrate 100. For example, the tab 500 can be disposed from the center of the module substrate 100 in a direction opposite to the first direction D1. The tab 500 can be in contact with the side surface of the module substrate 100 in a direction opposite to the first direction D1. The tab 500 can be arranged along the side surface of the module substrate 100 in a direction opposite to the first direction D1. For example, the tab 500 can have a string array in which the tabs 500 are spaced apart from each other in the second direction D2. The tab 500 can extend onto one of the first surface 100a and the second surface 100b of the module substrate 100. The insertion holes 110 can be located between the tabs 500. The tab 500 can be electrically connected to the first heating device 200, the second heating device 300, and the third heating device 400. The tab 500 can send electrical signals to the outside and receive electrical signals from the outside. For example, one side of each tab 500 can be inserted into a motherboard slot of an electronic product (such as a computer) to be electrically connected to the electronic product. The other side of each tab 500 can be electrically connected to the conductive wire 120 of the module substrate 100. The tab 500 can be directly coupled to the motherboard slot and directly or indirectly connected to the conductive wire 120 of the module substrate 100.

[0028] The first through hole 130 may be provided in the module substrate 100. When observed in a plan view, the first through hole 130 may be disposed between the first heat generating device 200 and the second heat generating device 300. The first through hole 130 may be spaced apart from the first heat generating device 200 and the second heat generating device 300. The first through hole 130 may extend completely through the module substrate 100 in the third direction D3. The first through hole 130 may pass between the first heat generating device 200 and the second heat generating device 300. For example, the first through hole 130 may have a linear shape extending in the second direction D2.

[0029] According to some implementations, the second heat generating device 300 may emit greater thermal energy than the thermal energy of the first heat generating device 200. The module substrate 100 may be provided with the first through hole 130 between the first heat generating device 200 and the second heat generating device 300. Accordingly, it is possible to prevent the first heat generating device 200 from receiving heat emitted from the second heat generating device 300 and being damaged by the heat. Accordingly, the semiconductor module 10 may be improved in thermal stability and operation stability.

[0030] When observed in the first direction D1, the first through hole 130 may be located between side surfaces 300a of the second heat generating device 300 in the second direction D2. The length W1 of the first through hole 130 along the second direction D2 may be less than the width of the first heat generating device 200 along the second direction D2. The length W1 of the first through hole 130 may be less than the width W2 of the second heat generating device 300 along the second direction D2. The length W1 of the first through hole 130 may be about 0.2 times to about 1.0 times the width W2 of the second heat generating device 300. For example, the length W1 of the first through hole 130 may be about 0.4 times to about 0.8 times the width W2 of the second heat generating device 300. When the length W1 of the first through hole 130 is less than about 0.2 times the width W2 of the second heat generating device 300, heat transfer from the second heat generating device 300 to the first heat generating device 200 cannot be effectively blocked. When the length W1 of the first through hole 130 is greater than about 1.0 times the width W2 of the second heat generating device 300, heat released from the second heat generating device 300 in the first direction D1 may be overly blocked. Accordingly, heat may accumulate in the second heat generating device 300, and the second heat generating device 300 may be damaged by the heat.

[0031] The first through hole 130 may have a width in the first direction D1, which may be similar to the thickness T of the module substrate 100. Alternatively, the width of the first through hole 130 may be greater than the thickness T of the module substrate 100. The first through hole 130 may have an empty interior. For example, the interior of the first through hole 130 may be filled with air.

[0032] In the following embodiments, the description related to the above reference Figures 1 to 3A detailed description of the technical features with repeated technical features will be discussed, and their differences will be discussed in detail. The same reference numerals may be assigned to the same components as those of the semiconductor module discussed above.

[0033] Figure 4 A plan view showing an exemplary display semiconductor module is shown.

[0034] Referring to Figure 4 , a plurality of first vias 130 may be provided. Each first via 130 may have a linear shape extending in the second direction D2. For example, each first via 130 may have a length W3 along the second direction D2, which is greater than the width of the first via 130 along the first direction D1. The first vias 130 may be disposed between the first heat generating device 200 and the second heat generating device 300 in the second direction D2. The first vias 130 may be spaced apart from each other in the second direction D2. The length W3 of each first via 130 may be less than the width of the first heat generating device 200 along the second direction D2. The sum of the lengths W3 of the first vias 130 may be less than the width W2 of the second heat generating device 300 along the second direction D2. The sum of the lengths W3 of the first vias 130 may be about 0.2 times to about 1.0 times the width W2 of the second heat generating device 300. For example, the sum of the lengths W3 of the first vias 130 may be about 0.4 times to about 0.8 times the width W2 of the second heat generating device 300.

[0035] Figure 5 A plan view showing an exemplary display semiconductor module is shown.

[0036] Referring to Figure 5 , the module substrate 100 may further include a second via 140. The second via 140 may be provided in the module substrate 100. When observed in a plan view, the second via 140 may be disposed between the second heat generating device 300 and the third heat generating device 400. The second via 140 may be spaced apart from the second heat generating device 300 and the third heat generating device 400. The second via 140 may extend completely through the module substrate 100 in the third direction D3. The second via 140 may pass between the second heat generating device 300 and the third heat generating device 400. For example, the second via 140 may have a linear shape extending in the first direction D1.

[0037] According to some implementations, the second heat generating device 300 may emit more thermal energy than the third heat generating device 400. The module substrate 100 may be provided with a second via 140 between the second heat generating device 300 and the third heat generating device 400. Therefore, it is possible to prevent the third heat generating device 400 from receiving the heat emitted from the second heat generating device 300 and being damaged by the heat. For example, the semiconductor module may be improved in thermal stability and operation stability.

[0038] When observed in the second direction D2, the second through hole 140 may be located between the side surfaces 300b of the second heating device 300 in the first direction D1. The length W4 of the second through hole 140 along the first direction D1 may be less than the width W5 of the second heating device 300 along the first direction D1. The length W4 of the second through hole 140 may be about 0.2 times to about 1.0 times the width W5 of the second heating device 300. For example, the length W4 of the second through hole 140 may be about 0.4 times to about 0.8 times the width W5 of the second heating device 300. When the length W4 of the second through hole 140 is less than about 0.2 times the width W5 of the second heating device 300, heat cannot be effectively blocked from being transferred from the second heating device 300 to the third heating device 400. When the length W4 of the second through hole 140 is greater than about 1.0 times the width W5 of the second heating device 300, heat released from the second heating device 300 in the second direction D2 may be overly blocked. Therefore, heat may accumulate in the second heating device 300, and the second heating device 300 may be damaged by the heat.

[0039] The second through hole 140 may have a width in the second direction D2, which may be similar to the thickness T of the module substrate 100. Alternatively, the width of the second through hole 140 may be greater than the thickness T of the module substrate 100. The second through hole 140 may have an empty interior. For example, the interior of the second through hole 140 may be filled with air.

[0040] Figure 6 A plan view showing a display example semiconductor module.

[0041] Referring to Figure 6 FIG., the module substrate 100 may further include a third through hole 150. The third through hole 150 may be provided in the module substrate 100. When observed in a plan view, the third through hole 150 may be provided between the first heating device 200 and the third heating device 400. The third through hole 150 may be spaced apart from the first heating device 200 and the third heating device 400. The third through hole 150 may extend completely through the module substrate 100 in the third direction D3. The third through hole 150 may pass between the first heating device 200 and the third heating device 400. For example, the third through hole 150 may have a linear shape extending in the second direction D2.

[0042] According to some implementations, the module substrate 100 may be provided with a third through hole 150 between the first heating device 200 and the third heating device 400. The third through hole 150 may pass between the first heating device 200 and the third heating device 400. Therefore, the first heating device 200 and the third heating device 400 can be prevented from being damaged by the heat generated therefrom. The semiconductor module can thereby be improved in thermal stability and operation stability.

[0043] When viewed in the first direction D1, the third through-hole 150 may be located between the side surfaces of the third heat-generating device 400 in the second direction D2. The length of the third through-hole 150 along the second direction D2 may be less than the width of the first heat-generating device 200 along the second direction D2. The length of the third through-hole 150 may be less than the width of the third heat-generating device 400 along the second direction D2.

[0044] The third through-hole 150 may have a width in the first direction D1, which may be similar to the thickness T of the module substrate 100. Alternatively, the width of the third through-hole 150 may be greater than the thickness T of the module substrate 100. The third through-hole 150 may have an empty interior. For example, the interior of the third through-hole 150 may be filled with air.

[0045] Figure 7 A plan view showing an exemplary display semiconductor module is shown.

[0046] Referring to Figure 7 , the module substrate 100 may include the first through-hole 130 discussed with reference to Figure 2 , the second through-hole 140 discussed with reference to Figure 5 , and the third through-hole 150 discussed with reference to Figure 6 .

[0047] According to some implementations, the module substrate 100 may be provided with through-holes 130, 140, and 150 respectively between the first heat-generating device 200 and the second heat-generating device 300, between the second heat-generating device 300 and the third heat-generating device 400, and between the first heat-generating device 200 and the third heat-generating device 400. The through-holes 130, 140, and 150 may block heat exchange between the first heat-generating device 200, the second heat-generating device 300, and the third heat-generating device 400. Therefore, the first heat-generating device 200, the second heat-generating device 300, and the third heat-generating device 400 can be prevented from being damaged by the heat generated by them. The semiconductor module can thus be improved in thermal stability and operating stability.

[0048] Figure 8 A plan view showing an exemplary display semiconductor module is shown. Figure 9 A cross-sectional view taken along the line II-II' of Figure 8 is shown.

[0049] Referring to Figure 8 and Figure 9 , as compared with Figure 1Different from that shown, the module substrate 100 may further include a heat radiation layer 132 disposed in the first through hole 130. For example, the heat radiation layer 132 may conformally cover the inner wall of the first through hole 130, but may not fill the first through hole 130. The heat radiation layer 132 may have an annular shape disposed along the inner wall of the first through hole 130. The heat radiation layer 132 may include a metallic material. The heat radiation layer 132 may be electrically insulated from the conductive line 120 of the module substrate 100, from the first heat generating device 200, from the second heat generating device 300, and from the third heat generating device 400.

[0050] The heat radiation layer 132 may release the heat energy of the module substrate 100 outward. The heat radiation layer 132 may have a thermal conductivity greater than that of the module substrate 100, so that the heat energy of the module substrate 100 can be released into the first through hole 130 through the heat radiation layer 132. For example, the heat radiation layer 132 may absorb heat from the module substrate 100 by conduction and may release heat in the first through hole 130 by convection and / or by radiation. The heat radiation layer 132 may release the high heat energy generated when the first heat generating device 200 and the second heat generating device 300 operate, and may effectively block the heat exchange between the first heat generating device 200 and the second heat generating device 300. Therefore, the first heat generating device 200 can be prevented from being damaged by the heat energy.

[0051] In addition, the semiconductor module may not include a heat radiation device, such as a heat sink or a radiator, disposed on the first surface 100a or the second surface 100b of the module substrate 100. Therefore, the semiconductor module can be easily miniaturized and thinned.

[0052] According to some embodiments, when the module substrate 100 has the second through hole 140 discussed with reference to Figure 5 and the third through hole 150 discussed with reference to Figure 6 at least one additional heat radiation layer 132 may be provided in one or both of the second through hole 140 and the third through hole 150. For example, the additional heat radiation layer 132 may conformally cover the inner wall of the second through hole 140 or the third through hole 150, but may not fill the second through hole 140 or the third through hole 150. The additional heat radiation layer 132 may have an annular shape disposed along the inner wall of the second through hole 140 or the third through hole 150.

[0053] Figure 10 A plan view showing an exemplary semiconductor module is shown. Figure 11 A cross-sectional view taken along line III-III' of Figure 10 is shown.

[0054] With reference to Figure 10 and Figure 11, the inner wall of the first through hole 130 may include a first inner surface adjacent to the second heating device 300 and a second inner surface adjacent to the first heating device 200. The heat radiation layer 132 may cover the first inner surface and expose the second inner surface. According to some embodiments, heat transfer from the first inner surface of the first through hole 130 to the second inner surface through the heat radiation layer 132 with high thermal conductivity can be suppressed. Heat transfer to the first heating device 200 can be minimized. Therefore, the efficiency of releasing heat generated from the second heating device 300 through the heat radiation layer 132 can be improved, and the first heating device 200 can also be prevented from being damaged due to the heat generated from the second heating device 300.

[0055] Figure 12 A plan view showing a display example semiconductor module. Figure 13 Shows along Figure 12 The cross-sectional view taken along line IV-IV'.

[0056] Referring to Figure 12 And Figure 13 , the inner wall of the first through hole 130 may include a first inner surface adjacent to the second heating device 300 and a second inner surface adjacent to the first heating device 200. The heat radiation layer 132 may cover the second inner surface and expose the first inner surface. According to some embodiments, since the heat radiation layer 132 is not provided on the first inner surface of the first through hole 130 adjacent to the second heating device 300, heat transfer from the first inner surface of the first through hole 130 to the second inner surface can be suppressed. Therefore, the first heating device 200 can be prevented from being damaged due to the heat generated by the second heating device 300.

[0057] Figure 14 A cross-sectional view showing a display example semiconductor package.

[0058] Referring to Figure 14 , a package substrate 600 can be provided. The package substrate 600 may include a printed circuit board (PCB) having signal patterns on its top surface. Alternatively, the package substrate 600 may have a structure in which dielectric layers and wiring layers are alternately stacked. The package substrate 600 may have pads provided on its top surface.

[0059] External terminals 602 may be provided under the package substrate 600. For example, the external terminals 602 may be provided on terminal pads provided on the bottom surface of the package substrate 600. The external terminals 602 may include solder balls or solder bumps, and based on the type and arrangement of the external terminals 602, the semiconductor package may be provided in the form of one of a ball grid array (BGA) type, a fine ball grid array (FBGA) type, and a land grid array (LGA) type.

[0060] The interposer substrate 100' can be provided on the package substrate 600. For example, the interposer substrate 100' can include a substrate protective layer, lower substrate pads in the substrate protective layer, and a plurality of substrate wiring layers stacked on the substrate protective layer.

[0061] Each substrate wiring layer can include a dielectric pattern 160 and a wiring pattern 170 in the dielectric pattern 160.

[0062] The dielectric pattern 160 can cover the substrate protective layer. The wiring pattern 170 can be provided on the dielectric pattern 160. The wiring pattern 170 can provide wiring or pad portions horizontally extending on the dielectric pattern 160. The wiring pattern 170 can vertically extend through the dielectric pattern 160 to be connected to the lower substrate pads or the wiring pattern 170 of another substrate wiring layer located below the dielectric pattern 160. The dielectric pattern 160 and the wiring pattern 170 can form a substrate wiring layer.

[0063] The substrate wiring layers can be stacked on each other. The wiring pattern 170 of the uppermost substrate wiring layer can be provided as the upper substrate pads of the interposer substrate 100'.

[0064] The interposer substrate 100' can be mounted on the top surface of the package substrate 600. Substrate terminals 105 can be provided on the bottom surface of the interposer substrate 100'. The substrate terminals 105 can be provided between the package substrate pads of the package substrate 600 and the lower substrate pads of the interposer substrate 100'. The substrate terminals 105 can electrically connect the interposer substrate 100' to the package substrate 600. For example, the interposer substrate 100' can be flip-chip mounted on the package substrate 600. The substrate terminals 105 can include solder balls or solder bumps.

[0065] A chip stack can be provided on the interposer substrate 100'. The chip stack can include a base substrate, a first semiconductor chip 820 stacked on the base substrate, and a first molding layer 830 surrounding the first semiconductor chip 820. The configuration of the chip stack will be described in detail below.

[0066] The base substrate can be a base semiconductor chip 810. For example, the base substrate can be a wafer-level semiconductor substrate formed of a semiconductor material such as silicon (Si). In the following description, the base semiconductor chip 810 and the base substrate can represent the same component and can be assigned the same reference numerals.

[0067] The base semiconductor chip 810 may include a base circuit layer 812 and base vias 816. The base circuit layer 812 may be provided on the bottom surface of the base semiconductor chip 810. The base circuit layer 812 may include an integrated circuit. For example, the base circuit layer 812 may include a memory circuit. The base semiconductor chip 810 may be a memory chip, such as a dynamic random access memory (DRAM), a static random access memory (SRAM), a magnetic random access memory (MRAM), or a flash memory. The base vias 816 may extend through the base semiconductor chip 810 in a direction perpendicular to the top surface of the interposer substrate 100'. The base vias 816 may be electrically connected to the base circuit layer 812. The bottom surface of the base semiconductor chip 810 may be an active surface. Figure 14 The depicted base substrate includes the base semiconductor chip 810, but the implementation is not limited thereto. According to some implementations, the base substrate may not include the base semiconductor chip 810. For example, the base substrate may be a substrate that does not include an integrated circuit.

[0068] The base semiconductor chip 810 may further include a protective layer and a first connection terminal 814. The protective layer may be provided on the bottom surface of the base semiconductor chip 810 to cover the base circuit layer 812. The protective layer may include silicon nitride (SiN). The first connection terminal 814 may be provided on the bottom surface of the base semiconductor chip 810. The first connection terminal 814 may be electrically connected to the input / output circuit (e.g., the memory circuit) of the base circuit layer 812. The first connection terminal 814 may be exposed from the protective layer.

[0069] The first semiconductor chip 820 may be mounted on the base semiconductor chip 810. For example, the first semiconductor chip 820 and the base semiconductor chip 810 may form a chip-on-wafer (COW) structure. The first semiconductor chip 820 may have a width smaller than the width of the base semiconductor chip 810.

[0070] The first semiconductor chip 820 may include a first circuit layer 822 and a first through electrode 826. The first circuit layer 822 may include a memory circuit. The first semiconductor chip 820 may be a memory chip, such as a dynamic random access memory (DRAM), a static random access memory (SRAM), a magnetic random access memory (MRAM), or a flash memory. The first circuit layer 822 may include the same circuits as the circuits of the base circuit layer 812, but the embodiments are not limited thereto. The first through electrode 826 may extend through the first semiconductor chip 820 in a direction perpendicular to the top surface of the interposer 100'. The first through electrode 826 may be electrically connected to the first circuit layer 822. The first semiconductor chip 820 may have a bottom surface or an active surface. The first semiconductor chip 820 may be provided with chip bumps 824 on its bottom surface. The chip bumps 824 may be provided between the base semiconductor chip 810 and the first semiconductor chip 820 and electrically connect the base semiconductor chip 810 and the first semiconductor chip 820.

[0071] A plurality of first semiconductor chips 820 may be provided. For example, a plurality of first semiconductor chips 820 may be stacked on the base semiconductor chip 810. The number of stacked first semiconductor chips 820 may be from about 8 to about 32. Chip bumps 824 may be correspondingly provided between the first semiconductor chips 820. In this case, the topmost first semiconductor chip 820 may not include the first through electrode 826. In addition, the topmost first semiconductor chip 820 may have a greater thickness than the other first semiconductor chips 820 located below the topmost first semiconductor chip 820.

[0072] An adhesive layer may be provided between the first semiconductor chips 820. The adhesive layer may include a non-conductive film (NCF). The adhesive layer may be interposed between the chip bumps 824 between the first semiconductor chips 820, thereby preventing an electrical short circuit between the chip bumps 824.

[0073] A first molding layer 830 may be disposed on the top surface of the base semiconductor chip 810. The first molding layer 830 may cover the base semiconductor chip 810 and surround the first semiconductor chips 820. The first molding layer 830 may have a top surface coplanar with the top surface of the topmost first semiconductor chip 820, and the topmost first semiconductor chip 820 may be exposed from the first molding layer 830. The first molding layer 830 may include a dielectric polymer material. For example, the first molding layer 830 may include an epoxy molding compound (EMC).

[0074] A chip stack can be mounted on an interposer substrate 100'. For example, the chip stack can be coupled to an upper substrate pad of the interposer substrate 100' through a first connection terminal 814 of a base semiconductor chip 810. The first connection terminal 814 can be provided between a base circuit layer 812 and the upper substrate pad of the interposer substrate 100'.

[0075] A first underfill layer 806 can be provided between the interposer substrate 100' and the chip stack. The first underfill layer 806 can surround the first connection terminal 814 while filling the space between the interposer substrate 100' and the base semiconductor chip 810.

[0076] A second semiconductor chip 700 can be disposed on the interposer substrate 100'. The second semiconductor chip 700 can be disposed spaced apart from the chip stack. The second semiconductor chip 700 can have a thickness greater than the thickness of each first semiconductor chip 820. The second semiconductor chip 700 can include a semiconductor material such as silicon (Si). The second semiconductor chip 700 can include a second circuit layer 702. The second circuit layer 702 can include a memory circuit. For example, the second semiconductor chip 700 can be a logic chip. The bottom surface of the second semiconductor chip 700 can be an active surface, and the top surface of the second semiconductor chip 700 can be a passive surface. The second semiconductor chip 700 can be provided with a second connection terminal 704 on its bottom surface. The second connection terminal 704 can be electrically connected to an input / output circuit (such as a logic circuit) of the second circuit layer 702.

[0077] The second semiconductor chip 700 can be mounted on the interposer substrate 100'. For example, the second semiconductor chip 700 can be coupled to an upper substrate pad on the interposer substrate 100' through the second connection terminal 704. The second connection terminal 704 can be provided between the second circuit layer 702 and the upper substrate pad of the interposer substrate 100'.

[0078] A second underfill layer 706 can be provided between the interposer substrate 100' and the second semiconductor chip 700. The second underfill layer 706 can surround the second connection terminal 704 while filling the space between the interposer substrate 100' and the second semiconductor chip 700.

[0079] The second semiconductor chip 700 can emit higher thermal energy than the chip stack or the first semiconductor chip 820 during the middle of its operation.

[0080] The via hole 130 may be provided in the interposer substrate 100'. When observed in a plan view, the via hole 130 may be disposed between the second semiconductor chip 700 and the chip stack. The via hole 130 may be spaced apart from the second semiconductor chip 700 and the chip stack. The via hole 130 may extend completely vertically through the interposer substrate 100'. The via hole 130 may pass between the second semiconductor chip 700 and the chip stack. For example, the via hole 130 may have a linear shape that passes between the second semiconductor chip 700 and the chip stack.

[0081] According to some implementations, the interposer substrate 100' may be provided with the via hole 130 between the second semiconductor chip 700 and the chip stack. Accordingly, heat emitted from the second semiconductor chip 700 may be prevented from being transferred to the first semiconductor chip 820 of the chip stack, and the first semiconductor chip 820 may be prevented from being damaged due to the heat. Accordingly, the semiconductor package may be improved in thermal stability and operational stability.

[0082] The second molding layer 900 may be provided on the interposer substrate 100'. The second molding layer 900 may cover the top surface of the interposer substrate 100'. The second molding layer 900 may surround the chip stack and the second semiconductor chip 700. The second molding layer 900 may include a dielectric material. For example, the second molding layer 900 may include an epoxy molding compound (EMC).

[0083] In a semiconductor module according to some implementations, a controller device may emit higher thermal energy than a memory device. The module substrate may be provided with a via hole between the memory device and the controller device. Accordingly, heat emitted from the controller device may be prevented from being transferred to the memory device, and the memory device may be prevented from being damaged due to the heat. Accordingly, the semiconductor module may be improved in thermal stability and operational stability.

[0084] Although this disclosure contains many specific implementation details, these should not be construed as limitations on the scope of the claimed subject matter. Certain features that are described in this disclosure in the context of separate implementations may also be implemented combinatorially in a single implementation. Conversely, various features that are described in the context of a single implementation may also be implemented separately in multiple implementations or in any suitable sub-combination. Additionally, although features may be described above as acting in certain combinations, one or more features from a combination may in some cases be deleted from the combination, and the combination may be directed to a sub-combination or a variation of a sub-combination.

[0085] Although the present disclosure has been described in connection with some implementations shown in the accompanying drawings, those of ordinary skill in the art will understand that changes in form and detail may be made therein without departing from the spirit and essential features of the semiconductor module. Accordingly, the embodiments disclosed above should be considered illustrative rather than restrictive.

[0086] This application claims the priority of Korean Patent Application No. 10-2024-0006973, filed with the Korean Intellectual Property Office on January 16, 2024, the disclosure of which is incorporated herein by reference in its entirety.

Claims

1. A semiconductor module, comprising: A module substrate; A controller device and a memory device, mounted on the surface of the module substrate; And A plurality of tabs, on one side of the module substrate, Wherein the module substrate has a first through hole vertically extending through the module substrate, Wherein the first through hole is between the controller device and the memory device, Wherein the first through hole extends in a first direction, Wherein the length of the first through hole in the first direction is less than the width of the controller device in the first direction.

2. The semiconductor module according to claim 1, wherein the length of the first through hole is 0.4 times to 0.8 times the width of the controller device.

3. The semiconductor module according to claim 1, wherein The controller device has a side surface in the first direction, and When viewed in a second direction intersecting the first direction, the first through hole is between the side surfaces of the controller device in the first direction.

4. The semiconductor module according to claim 1, wherein The first through hole includes a plurality of first through holes, and The plurality of first through holes are arranged in the first direction.

5. The semiconductor module according to claim 4, wherein the sum of the lengths of the first through holes is 0.4 times to 0.8 times the width of the controller device.

6. The semiconductor module according to claim 1, further comprising a power device mounted on the surface of the module substrate, Wherein the module substrate has a second through hole vertically extending through the module substrate, Wherein the second through hole is between the controller device and the power device or between the memory device and the power device.

7. The semiconductor module according to claim 6, wherein The second through hole extends between the controller device and the power device in a second direction intersecting the first direction, and Wherein the length of the second through hole in the second direction is less than the width of the controller device in the second direction.

8. The semiconductor module according to claim 6, wherein the second through hole extends between the memory device and the power device in the first direction.

9. The semiconductor module according to claim 1, wherein The controller device is spaced apart from the memory device in a second direction intersecting the first direction, The tab is spaced apart from the controller device in the second direction, and The tab is arranged in the first direction.

10. The semiconductor module according to claim 1, wherein The controller device and the memory device are mounted on the top surface of the module substrate, and The controller device and the memory device are electrically connected to the tab through a plurality of conductive wires provided on the bottom surface of the module substrate.

11. A semiconductor module, comprising: A module substrate; A controller device, a memory device and a power device, spaced apart from each other on the top surface of the module substrate; And A plurality of tabs, on one side of the module substrate in a first direction, wherein the controller device and the power supply device are on one side of the memory device in the first direction, wherein the module substrate has a first through hole and a second through hole that vertically extend through the module substrate, wherein the first through hole extends between the controller device and the memory device in a second direction that intersects the first direction, and wherein the second through hole is between the controller device and the power supply device.

12. The semiconductor module according to claim 11, wherein a length of the first through hole along the second direction is less than a width of the controller device along the second direction.

13. The semiconductor module according to claim 12, wherein the length of the first through hole is 0.4 times to 0.8 times the width of the controller device.

14. The semiconductor module according to claim 11, wherein the first through hole includes a plurality of first through holes, and the plurality of first through holes are arranged in the second direction.

15. The semiconductor module according to claim 11, wherein the controller device and the power supply device are spaced apart from each other in the second direction, and the second through hole extends between the controller device and the power supply device in the first direction.

16. The semiconductor module according to claim 15, wherein a length of the second through hole along the first direction is less than a width of the controller device along the first direction.

17. The semiconductor module according to claim 11, wherein the controller device, the memory device, and the power supply device are electrically connected to the tab through a plurality of conductive wires provided on a bottom surface of the module substrate.

18. A semiconductor module, comprising: a substrate; a first heating device mounted on a top surface of the substrate; and a second heating device mounted on the top surface of the substrate and spaced apart from the first heating device in a first direction, wherein the substrate has a through hole between the first heating device and the second heating device, and the through hole vertically extends through the substrate, wherein the through hole extends in a second direction that intersects the first direction, wherein a length of the through hole along the second direction is less than a width of the first heating device along the second direction and a width of the second heating device along the second direction, and wherein the through hole is filled with air.

19. The semiconductor module according to claim 18, wherein, When observed in the first direction, the through hole is between side surfaces of the first heating device in the second direction and between side surfaces of the second heating device in the second direction.

20. The semiconductor module according to claim 18, wherein the through hole includes a plurality of through holes, and the plurality of through holes are arranged in the second direction.

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