Operational amplifier and chip

Abstract

The invention discloses an operational amplifier and a chip, the operational amplifier comprises an input stage and a post-stage circuit, the input stage comprises a first triode, a second triode, a first current source, a first voltage dividing unit and a second voltage dividing unit, and the first end of the first current source is connected with a reference voltage; the second end of the first current source is connected with the first end of the first triode and the first end of the second triode to form a connection node, the control end of the first triode is connected with the first end of the first voltage dividing unit, and the second end of the first voltage dividing unit is connected with the post-stage circuit to form a closed feedback loop. The control end of the second triode is connected with the input signal through the second voltage dividing unit. According to the operational amplifier and the chip, under the abnormal degenerate state, the voltage difference between the collector electrode and the emitter electrode of the first triode and the voltage difference between the collector electrode and the emitter electrode of the second triode are increased, so that the load current of the input stage cannot flow away completely through emitter junctions of the triodes, and the degenerate state is quitted.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuits, and particularly relates to an operational amplifier and a chip. Background Art

[0002] When a traditional operational amplifier using a triode as an input tube is connected in a closed-loop application, in addition to its own stable output state, there may also be another stable abnormal state (which can be called a degenerate state). Therefore, the operational amplifier may finally stabilize in this abnormal state, resulting in functional failure.

[0003] In Figure 1 In the shown operational amplifier circuit, the base of the triode Q2 is the non-inverting input terminal of the operational amplifier, which is used to receive the input signal VIP. The base of the triode Q1 is the inverting input terminal of the operational amplifier. The base of the triode Q1 is connected to the feedback resistor R3 and the feedback resistor R4 to receive the feedback voltage VFB, forming a closed-loop operational amplifier.

[0004] When the operational amplifier works in a normal closed-loop state, the output voltage VOUT of the operational amplifier = (1 + R3 / R4)*VFP. When the closed-loop is not established, for example, during the power-on process of the power supply voltage of the operational amplifier, an abnormal state may occur: assume that in a certain initial state, the feedback voltage VFB is close to the power supply voltage VDD. At this time, because there is a forward-biased diode between the base and the emitter of the triode Q1, the voltage at point A can be approximated as VFP - VBE1 (close to the power supply voltage), where VBE1 is the voltage between the base and the emitter of the triode Q1. This causes the voltage VCE1 between the collector and the emitter of the triode Q1 and the voltage VCE2 between the collector and the emitter of the triode Q2 to be very low (close to 0V). At this time, all the load current I1 of the input stage flows through the emitter junction of the triode Q1 (as the base current), and the operational amplifier finally stops in this stable abnormal state and cannot escape.

[0005] This abnormal state is more likely to occur when the closed-loop gain is lower, and is most likely to occur at unity gain because the feedback voltage VFB is more likely to be close to the power supply voltage VDD in the initial state at this time.

[0006] The information disclosed in this background art section is only intended to enhance the overall understanding of the present invention and should not be regarded as an admission or any form of suggestion that this information constitutes prior art already known to those of ordinary skill in the art. Summary of the Invention

[0007] The purpose of the present invention is to provide an operational amplifier and a chip, which can actively exit the degenerate state and work in a normal closed-loop state.

[0008] To achieve the above purpose, the technical solution provided by a specific embodiment of the present invention is as follows:

[0009] An operational amplifier includes an input stage and a post-stage circuit. The input stage includes a first triode, a second triode, a first current source, a first voltage-dividing unit, and a second voltage-dividing unit. The first end of the first current source is connected to a reference voltage, and the second end of the first current source is connected to the first ends of the first triode and the second triode to form a connection node. The second ends of the first triode and the second triode are connected to the post-stage circuit. The control end of the first triode is connected to the first end of the first voltage-dividing unit, and the second end of the first voltage-dividing unit is connected to the post-stage circuit to form a closed feedback loop. The control end of the second triode is connected to the first end of the second voltage-dividing unit, and the second end of the second voltage-dividing unit is connected to an input signal.

[0010] In one or more embodiments of the present invention, the first voltage-dividing unit includes a first resistor. The first end of the first resistor is used to form the first end of the first voltage-dividing unit, and the second end of the first resistor is used to form the second end of the first voltage-dividing unit.

[0011] In one or more embodiments of the present invention, the second voltage-dividing unit includes a second resistor. The first end of the second resistor is used to form the first end of the second voltage-dividing unit, and the second end of the second resistor is used to form the second end of the second voltage-dividing unit.

[0012] In one or more embodiments of the present invention, the input stage further includes an adjustment module. The adjustment module is connected to a reference voltage and the connection node, and is used to adjust the voltage of the connection node based on the reference voltage and the voltage of the connection node.

[0013] In one or more embodiments of the present invention, the adjustment module includes a control unit and a switch unit. The control unit is used to generate a control voltage based on the reference voltage. The switch unit is connected to the control unit and the connection node, and the switch unit is turned on and off based on the control of the control voltage and the voltage of the connection node to adjust the voltage of the connection node.

[0014] In one or more embodiments of the present invention, the control unit includes a second current source and a first transistor. The first end of the first transistor is connected to the reference voltage, and the second end, the control end of the first transistor, and the first end of the second current source are connected to the switch unit to generate a control voltage. The second end of the second current source is connected to the reference voltage.

[0015] In one or more embodiments of the present invention, the switch unit includes a second transistor. The first end of the second transistor is connected to the connection node to receive the voltage of the connection node. The control end of the second transistor is connected to the control unit to receive the control voltage. The second end of the second transistor is connected to the reference voltage.

[0016] In one or more embodiments of the present invention, the post-stage circuit includes an intermediate stage, an output stage, and a feedback unit. The intermediate stage is connected to the second end of the first triode and the second end of the second triode. The output stage is connected to the intermediate stage and the feedback unit. The feedback unit is simultaneously connected to the output stage and the second end of the first voltage dividing unit to form a closed feedback loop.

[0017] In one or more embodiments of the present invention, the post-stage circuit includes an intermediate stage and an output stage. The intermediate stage is connected to the second end of the first triode and the second end of the second triode. The output stage is connected to the intermediate stage. The output stage is simultaneously connected to the second end of the first voltage dividing unit to form a closed feedback loop.

[0018] A specific embodiment of the present invention further provides a chip, including the above-mentioned operational amplifier.

[0019] Compared with the prior art, the operational amplifier and the chip of the present invention, by setting the first voltage dividing unit and the second voltage dividing unit, in the abnormal degeneracy state, increase the voltage difference between the collector and the emitter of the first triode and the voltage difference between the collector and the emitter of the second triode, so that the load current of the input stage will not all flow away through the emitter junction of the triode, thereby exiting the degeneracy state.

[0020] At the same time, by setting the adjustment module, when the degeneracy state occurs, the voltage at the connection node can be adjusted, further increasing the voltage difference between the collector and the emitter of the first triode and the voltage difference between the collector and the emitter of the second triode, and reducing the requirements for the resistance value, matching, etc. of the first voltage dividing unit and the second voltage dividing unit. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments recorded in the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0022] Figure 1 It is the circuit schematic diagram of the operational amplifier in the prior art.

[0023] Figure 2 It is the circuit schematic diagram of the operational amplifier in the first embodiment of the present invention.

[0024] Figure 3 It is the circuit schematic diagram of the operational amplifier in the second embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0025] To enable those skilled in the art to better understand the technical solutions in the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the scope of protection of the present invention.

[0026] In the specification, "coupled", "connected", or "linked" includes both direct connection and indirect connection. Indirect connection is a connection through an intermediate medium, such as a connection through an electrical conduction medium, which may have parasitic inductance or parasitic capacitance; indirect connection may also include a connection through other active or passive devices on the basis of achieving the same or similar functional purposes, such as a connection through circuits or components such as switches and follower circuits. Additionally, in the invention, words such as "first", "second", etc. are mainly used to distinguish one technical feature from another technical feature, and do not necessarily require or imply that there is a certain actual relationship, quantity, or order between these technical features.

[0027] In the detailed description of the specification, reference is made to the accompanying drawings that form a part thereof, in which the same reference numerals always represent the same components, and which are shown by way of exemplary embodiments that can be implemented. It should be understood that other embodiments can be utilized and structural or logical changes can be made without departing from the scope of the present application. Therefore, the following detailed description should not be considered limiting.

[0028] The various operations in the specification can be described as a number of discrete actions or operations in the order that is most helpful for understanding the claimed subject matter. However, the order of description should not be construed as implying that these operations must be order-dependent. Specifically, these operations may not be performed in the order presented. The described operations can be performed in an order different from the described embodiments. Various additional operations can be performed in additional embodiments and / or the described operations can be omitted.

[0029] For the purposes of the present application, the phrase "A and / or B" means (A), (B), or (A and B). For the purposes of the present application, the phrase "A, B, and / or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B, and C).

[0030] Various components and devices may be referred to or shown in the singular form herein (e.g., "MOS transistor", "transistor", "switch", etc.), but this is merely for the convenience of discussion, and any element referred to in the singular form may include multiple such elements in accordance with the teachings herein.

[0031] The specification describes the use of the phrases "in one embodiment", "in other embodiments", or "in some embodiments", which may each refer to one or more of the same or different embodiments. In addition, the terms "comprising", "including", "having", etc. used with respect to the embodiments of the present application are synonymous.

[0032] Embodiment 1

[0033] As Figure 2 shown, the operational amplifier in one embodiment of the present invention includes an input stage 10 and a subsequent stage circuit.

[0034] Among them, the input stage 10 includes a first triode Q1, a second triode Q2, a first current source AI, a first voltage dividing unit 11, and a second voltage dividing unit 12.

[0035] The first end of the first current source AI is connected to the reference voltage, the second end of the first current source AI is connected to the first ends of the first triode Q1 and the second triode Q2 to form a connection node A. The first current source AI is used to generate a load current I1. The second ends of the first triode Q1 and the second triode Q2 are connected to the subsequent stage circuit. The control end of the first triode Q1 is connected to the first end of the first voltage dividing unit 11, the second end of the first voltage dividing unit 11 is connected to the subsequent stage circuit to form a closed feedback loop. The control end of the second triode Q2 is connected to the first end of the second voltage dividing unit 12, and the second end of the second voltage dividing unit 12 is connected to the input signal VIP.

[0036] In one embodiment, the second end of the first voltage dividing unit 11 forms the inverting input terminal of the operational amplifier, and the second end of the second voltage dividing unit 12 forms the non-inverting input terminal of the operational amplifier. In other embodiments, the second end of the first voltage dividing unit 11 may also form the non-inverting input terminal of the operational amplifier, and the second end of the second voltage dividing unit 12 may also form the inverting input terminal of the operational amplifier.

[0037] In one embodiment, the reference voltage is the ground voltage GND. In other embodiments, the reference voltage may also be the power supply voltage VDD or other voltages.

[0038] As Figure 2 shown, the first voltage dividing unit 11 includes a first resistor R1. The first end of the first resistor R1 is used to form the first end of the first voltage dividing unit 11, and the second end of the first resistor R1 is used to form the second end of the first voltage dividing unit 11. The second voltage dividing unit includes a second resistor R2. The first end of the second resistor R2 is used to form the first end of the second voltage dividing unit 12, and the second end of the second resistor R2 is used to form the second end of the second voltage dividing unit 12.

[0039] As Figure 2As shown, the post-stage circuit includes an intermediate stage 21, an output stage 22, and a feedback unit 23. The intermediate stage 21 is connected to the second terminal of the first transistor Q1 and the second terminal of the second transistor Q2. The output stage 22 is connected to the intermediate stage 21. The feedback unit 23 is connected to the output stage 22 and the second terminal of the first voltage dividing unit 11 to form a closed feedback loop.

[0040] In one embodiment, the intermediate stage 21 is a folded cascode structure. Specifically, as Figure 2 shown, the intermediate stage 21 includes a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a ninth transistor M9, and a tenth transistor M10.

[0041] The first terminals of the third transistor M3 and the fourth transistor M4 are connected to the power supply voltage VDD. The control terminals of the third transistor M3, the fourth transistor M4, and the second terminal of the fifth transistor M5 are connected to the second terminal of the seventh transistor M7. The second terminal of the third transistor M3 and the first terminal of the fifth transistor M5 are connected to the second terminal of the first transistor Q1. The second terminal of the fourth transistor M4 and the first terminal of the sixth transistor M6 are connected to the second terminal of the second transistor Q2. The control terminal of the fifth transistor M5 is connected to the control terminal of the sixth transistor M6 to receive a corresponding bias voltage. The second terminals of the sixth transistor M6 and the eighth transistor M8 are connected to the output stage 22. The control terminal of the seventh transistor M7 is connected to the control terminal of the eighth transistor M8 to receive a corresponding bias voltage. The first terminal of the seventh transistor M7 is connected to the second terminal of the ninth transistor M9. The first terminal of the eighth transistor M8 is connected to the second terminal of the tenth transistor M10. The control terminals of the ninth transistor M9 and the tenth transistor M10 are connected to each other to receive a corresponding bias voltage. The first terminals of the ninth transistor M9 and the tenth transistor M10 are connected to the ground voltage GND. In other embodiments, the intermediate stage 21 can also adopt other forms of amplifier intermediate stage circuits.

[0042] As Figure 2 shown, in one embodiment, the output stage 22 includes an eleventh transistor M11. The first terminal of the eleventh transistor M11 is connected to the power supply voltage VDD. The control terminal of the eleventh transistor M11 is connected to the second terminal of the sixth transistor M6. The second terminal of the eleventh transistor M11 is connected to the feedback unit 23 to generate an output signal VOUT. In other embodiments, the output stage 22 can also adopt other forms of amplifier output stage circuits.

[0043] As Figure 2As shown, in one embodiment, the feedback unit 23 includes a third resistor R3 and a fourth resistor R4. The first end of the third resistor R3 is connected to the second end of the eleventh transistor M11. The second end of the third resistor R3 and the first end of the fourth resistor R4 are connected to the second end of the first resistor R1 to divide the output signal VOUT to generate a feedback voltage VFB, and the second end of the fourth resistor R4 is connected to the ground voltage GND.

[0044] In other embodiments, the feedback unit 23 may also adopt other forms of feedback circuits, or the feedback unit 23 may not be provided. Then, the second end of the first resistor R1 is directly connected to the second end of the eleventh transistor M11 in the output stage 22 to form a feedback closed loop.

[0045] In one embodiment, the first triode Q1 and the second triode Q2 are NPN-type triodes. The first ends of the first triode Q1 and the second triode Q2 are the emitters, the second ends of the first triode Q1 and the second triode Q2 are the collectors, and the control ends of the first triode Q1 and the second triode Q2 are the bases.

[0046] In other embodiments, the first triode Q1 and the second triode Q2 may also be PNP-type triodes. Then, the specific connection manners of the first triode Q1 and the second triode Q2 to the subsequent circuit need to be adjusted adaptively.

[0047] In one embodiment, the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, and the eleventh transistor M11 are P-channel MOS transistors, and the seventh transistor M7, the eighth transistor M8, the ninth transistor M9, and the tenth transistor M10 are N-channel MOS transistors. In other embodiments, the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, and the eleventh transistor M11 may also be N-channel MOS transistors or other devices, and the seventh transistor M7, the eighth transistor M8, the ninth transistor M9, and the tenth transistor M10 may also be P-channel MOS transistors or other devices. Then, the connection manners of the above transistors need to be adjusted adaptively.

[0048] The first terminals of the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, the ninth transistor M9, the tenth transistor M10, and the eleventh transistor M11 are source electrodes. The second terminals of the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, the ninth transistor M9, the tenth transistor M10, and the eleventh transistor M11 are drain electrodes. The control terminals of the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, the ninth transistor M9, the tenth transistor M10, and the eleventh transistor M11 are gate electrodes.

[0049] As Figure 2 shown, when the operational amplifier is in a degenerate state, the feedback voltage VFB is close to the power supply voltage VDD. Due to the setting of the first resistor R1, the voltage at the connection node A at this time is: VFB - VBE1 - I1*R1, where VBE1 is the voltage difference between the base and emitter of the first triode Q1. Compared with the prior art, the voltage at the connection node A is reduced by I1*R1, so that the voltage differences between the collector and emitter of the first triode Q1 and the voltage difference between the collector and emitter of the second triode Q2 are both increased by I1*R1. By reasonably controlling this voltage difference to be above a certain voltage value, the first triode Q1 can be prevented from staying in the abnormal state of only passing current through the emitter junction, thereby exiting the degenerate state.

[0050] The present invention also provides a chip including the above-mentioned operational amplifier.

[0051] Embodiment 2

[0052] In Embodiment 1, although the degenerate state can be eliminated, considering the margins of the voltage differences between the collector and emitter of the first triode Q1 and the voltage difference between the collector and emitter of the second triode Q2, and when the load current I1 is relatively small, the values of the first resistor R1 and the second resistor R2 will be relatively large. This will exacerbate the influence on the base currents of the first triode Q1 and the second triode Q2 and increase the input reference noise. At the same time, the matching condition of the first resistor R1 and the second resistor R2 will also affect the input equivalent offset voltage of the operational amplifier.

[0053] As Figure 3 shown, based on the first embodiment, the input stage 10 is increased with an adjustment module 13. The adjustment module 13 is connected to the connection node A. The adjustment module 13 is configured to adjust the voltage of the connection node A based on the reference voltage VREF and the voltage of the connection node A.

[0054] The adjustment module 13 includes a control unit and a switching unit. The control unit is configured to generate a control voltage based on the reference voltage VREF. The switching unit is connected to the control unit and the connection node A. The switching unit is turned on and off based on the control of the control voltage to adjust the voltage of the connection node A.

[0055] As Figure 3 shown, the control unit includes a second current source AII and a first transistor M1. The first end of the first transistor M1 is connected to the reference voltage VREF. The second end of the first transistor M1, the control end of the first transistor M1, and the first end of the second current source AII are connected to the switching unit to generate a control voltage. The second end of the second current source AII is connected to the reference voltage. In one embodiment, the reference voltage is the ground voltage GND.

[0056] As Figure 3 shown, the switching unit includes a second transistor M2. The first end of the second transistor M2 is connected to the connection node A to receive the voltage of the connection node A. The control end of the second transistor M2 is connected to the second end of the first transistor M1 to receive the control voltage. The second end of the second transistor M2 is connected to the reference voltage.

[0057] In one embodiment, the reference voltage VREF is slightly greater than the input signal VIP. The reference voltage VREF satisfies: VIP - VBE2 - (VREF - VGS) < |VTH|, where VBE2 is the voltage difference between the base and emitter of the second triode Q2, VGS is the gate-source voltage of the first transistor M1, and VTH is the turn-on voltage of the second transistor M2. When the operational amplifier is operating normally in the closed-loop state (the current on the base of the second triode Q2 is at the nA level or even smaller and can be ignored), the voltage on the connection node A is VIP - VBE2, and the gate voltage of the second transistor M2 is VREF - VGS. At this time, the gate-source voltage of the second transistor M2 is not sufficient to turn it on, and the second transistor M2 is turned off. That is, when the operational amplifier is in a normal state, the switching unit will be turned off, thus not affecting the normal operation of the operational amplifier.

[0058] When the adjustment module 13 is provided, since the voltage on the connection node A approaches the power supply voltage VDD when a degenerate state occurs, the second transistor M2 can be turned on. While pulling down the voltage on the connection node A, an additional path of current to the ground is added from the connection node A. At this time, if the same collector-emitter voltage difference is to be obtained on the first triode Q1 and the second triode Q2, the first resistor R1 and the second resistor R2 do not need to take relatively large resistance values, and at the same time, the influence generated by the first resistor R1 and the second resistor R2 will be greatly reduced. While solving the input degenerate state, it does not have a great impact on the normal performance of the operational amplifier.

[0059] The present invention also provides a chip, including the above-mentioned operational amplifier.

[0060] For those skilled in the art, it is obvious that the present invention is not limited to the details of the above-mentioned exemplary embodiments, and without departing from the spirit or basic characteristics of the present invention, the present invention can be implemented in other specific forms. Therefore, from any point of view, the embodiments should be regarded as exemplary and non-restrictive. The scope of the present invention is defined by the appended claims rather than the above description. Therefore, all changes falling within the meaning and scope of the equivalent elements of the claims are intended to be embraced within the present invention. Any reference signs in the claims should not be regarded as limiting the claims involved.

[0061] In addition, it should be understood that although this specification is described according to embodiments, not every embodiment only contains an independent technical solution. This narrative way of the specification is only for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. An operational amplifier, comprising an input stage and a post-stage circuit, characterized in that, The input stage includes a first triode, a second triode, a first current source, a first voltage dividing unit, and a second voltage dividing unit. The first end of the first current source is connected to a reference voltage, and the second end of the first current source is connected to the first ends of the first triode and the second triode to form a connection node. The second ends of the first triode and the second triode are connected to the subsequent stage circuit. The control end of the first triode is connected to the first end of the first voltage dividing unit, and the second end of the first voltage dividing unit is connected to the subsequent stage circuit to form a closed feedback loop. The control end of the second triode is connected to the first end of the second voltage dividing unit, and the second end of the second voltage dividing unit is connected to an input signal.

2. The operational amplifier according to claim 1, wherein The first voltage dividing unit includes a first resistor. The first end of the first resistor is used to form the first end of the first voltage dividing unit, and the second end of the first resistor is used to form the second end of the first voltage dividing unit.

3. The operational amplifier according to claim 1, wherein The second voltage dividing unit includes a second resistor. The first end of the second resistor is used to form the first end of the second voltage dividing unit, and the second end of the second resistor is used to form the second end of the second voltage dividing unit.

4. The operational amplifier according to claim 1, characterized in that, The input stage further includes an adjustment module. The adjustment module is connected to a reference voltage and the connection node, and the adjustment module is used to adjust the voltage of the connection node based on the reference voltage and the voltage of the connection node.

5. The operational amplifier according to claim 4, wherein The adjustment module includes a control unit and a switching unit. The control unit is used to generate a control voltage based on the reference voltage. The switching unit is connected to the control unit and the connection node, and the switching unit is turned on and off based on the control of the control voltage and the voltage of the connection node to adjust the voltage of the connection node.

6. The operational amplifier according to claim 5, wherein The control unit includes a second current source and a first transistor. The first end of the first transistor is connected to the reference voltage, and the second end, the control end of the first transistor, and the first end of the second current source are connected to the switching unit to generate a control voltage. The second end of the second current source is connected to the reference voltage.

7. The operational amplifier according to claim 5, wherein The switching unit includes a second transistor. The first end of the second transistor is connected to the connection node to receive the voltage of the connection node. The control end of the second transistor is connected to the control unit to receive the control voltage. The second end of the second transistor is connected to the reference voltage.

8. The operational amplifier according to claim 1, wherein, The subsequent stage circuit includes an intermediate stage, an output stage, and a feedback unit. The intermediate stage is connected to the second ends of the first triode and the second triode. The output stage is connected to the intermediate stage and the feedback unit. The feedback unit is simultaneously connected to the output stage and the second end of the first voltage dividing unit to form a closed feedback loop.

9. The operational amplifier according to claim 1, wherein, The subsequent stage circuit includes an intermediate stage and an output stage. The intermediate stage is connected to the second ends of the first triode and the second triode. The output stage is connected to the intermediate stage. The output stage is simultaneously connected to the second end of the first voltage dividing unit to form a closed feedback loop.

10. A chip, characterized in that, An operational amplifier includes any one of the operational amplifiers according to claims 1 to 9.

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